Circuit board and method of manufacturing the same

Abstract

A circuit board includes a core layer and two circuit structures. The core layer has a first surface and a second surface opposite to each other. The two circuit structures are disposed on the first surface and the second surface, respectively. Each circuit structure includes a substrate, an insulating layer, a metal pattern layer, and a metal layer. The substrate includes two through holes spaced apart and exposing the first surface. The insulating layer is disposed in one of the two through holes and contacts the first surface. The metal pattern layer includes a first heat conduction portion and a circuit portion. The first heat conduction portion is disposed on the insulating layer. The circuit portion is disposed in the other of the two through holes and forms a cavity with the first surface. The metal layer includes a second heat conduction portion and a conducting portion. The second heat conduction portion is disposed on the first heat conduction portion. The conducting portion is disposed on the substrate. The circuit board can improve product yield.

Description

TECHNICAL FIELD

[0001] The present invention relates to a circuit board and a manufacturing method thereof, and more particularly to a circuit board with multiple functional element channels and a manufacturing method thereof. BACKGROUND

[0002] With the development of electronic products towards lightness and miniaturization, more and more products have multiple different signal or energy channels designed on the same circuit board, wherein the aforementioned channels are, for example, heat conduction channels for helping heat dissipation, high current channels, and high speed or high frequency signal transmission channels with cavities. However, different functional element channels each have different sizes (such as length or width) and structures, and the production of these functionally different channels on the same circuit board usually requires quite complex and difficult processes, resulting in difficult improvement or even reduction of product yield. SUMMARY

[0003] The purpose of the present invention is to provide a circuit board with multiple functional element channels to improve product yield.

[0004] Another purpose of the present invention is to provide a manufacturing method of a circuit board to help improve product yield of the circuit board.

[0005] A circuit board according to at least one embodiment of the present invention includes a core layer, a first line structure, and a second line structure. The core layer has a first surface and a second surface opposite to the first surface. The first line structure is disposed on the first surface and includes a first substrate, a first insulating layer, a first metal pattern layer, and a first metal layer. The first substrate includes a first via hole and a second via hole disposed in a spaced-apart manner from the first via hole, and the first via hole and the second via hole expose the first surface. The first insulating layer is disposed in the first via hole and contacts the first surface. The first metal pattern layer includes a first heat conduction portion and a first line portion, the first heat conduction portion is disposed on the first insulating layer, and the first line portion is disposed in the second via hole and forms a first cavity with the first surface. The first metal layer includes a second heat conduction portion and a first conduction portion, the second heat conduction portion is disposed on the first heat conduction portion, and the first conduction portion is disposed on the first substrate. The second line structure is disposed on the second surface and includes a second substrate, a second insulating layer, a second metal pattern layer, and a second metal layer. The second substrate includes a third via hole and a fourth via hole disposed in a spaced-apart manner from the third via hole, and the third via hole and the fourth via hole expose the second surface. The second insulating layer is disposed in the third via hole and contacts the second surface. The second metal pattern layer includes a third heat conduction portion and a second line portion, the third heat conduction portion is disposed on the second insulating layer, and the second line portion is disposed in the fourth via hole and forms a second cavity with the second surface. The second metal layer includes a fourth heat conduction portion and a second conduction portion, the fourth heat conduction portion is disposed on the third heat conduction portion, and the second conduction portion is disposed on the second substrate.

[0006] In at least one embodiment of the present application, the circuit board comprises a heat conduction channel, a circuit channel, and a current channel. The heat conduction channel comprises a first insulating layer, a first heat conduction portion, a second heat conduction portion, a second insulating layer, a third heat conduction portion, and a fourth heat conduction portion. The circuit channel comprises a first circuit portion, a first cavity, a second circuit portion, and a second cavity. The current channel comprises a first conduction portion and a second conduction portion.

[0007] In at least one embodiment of the present application, the first circuit structure further comprises a third metal pattern layer, the third metal pattern layer comprising a fifth heat conduction portion and a third conduction portion, the fifth heat conduction portion being disposed on the second heat conduction portion, and the third conduction portion being disposed on the first conduction portion. The second circuit structure further comprises a fourth metal pattern layer, the fourth metal pattern layer comprising a sixth heat conduction portion and a fourth conduction portion, the sixth heat conduction portion being disposed on the fourth heat conduction portion, and the fourth conduction portion being disposed on the second conduction portion.

[0008] In at least one embodiment of the present application, the heat conduction channel further comprises a fifth heat conduction portion and a sixth heat conduction portion. The current channel further comprises a third conduction portion and a fourth conduction portion.

[0009] In at least one embodiment of the present application, a method for manufacturing a circuit board is provided. The method comprises providing a first initial substrate and a second initial substrate. A first initial metal layer is formed on the first initial substrate, and a second initial metal layer is formed on the second initial substrate. The first initial substrate is patterned to form a first substrate having a first via and a second via arranged in an interval. The second initial substrate is patterned to form a second substrate having a third via and a fourth via arranged in an interval. A first metal pattern layer is formed in the first via and the second via, and a second metal pattern layer is formed in the third via and the fourth via. A first insulating layer is formed on the first metal pattern layer in the first via, and a second insulating layer is formed on the second metal pattern layer in the third via. A core layer is provided. Then, the first substrate and the core layer are pressed to form a first cavity in the second via, and the second substrate and the core layer are pressed to form a second cavity in the fourth via. The first initial metal layer is patterned to form a first metal layer, and the second initial metal layer is patterned to form a second metal layer.

[0010] In at least one embodiment of the present application, the step of forming the first metal pattern layer comprises forming a first heat conduction portion in the first via and forming a first circuit portion in the second via. The step of patterning the first initial metal layer comprises forming a second heat conduction portion on the first heat conduction portion and forming a first conduction portion on the second substrate. The step of forming the second metal pattern layer comprises forming a third heat conduction portion in the third via and forming a second circuit portion in the fourth via. The step of patterning the second initial metal layer comprises forming a fourth heat conduction portion on the third heat conduction portion and forming a second conduction portion on the second substrate.

[0011] In at least one embodiment of the present application, the first insulating layer, the first heat conducting portion, the second heat conducting portion, the second insulating layer, the third heat conducting portion and the fourth heat conducting portion form a heat conducting channel, the first circuit portion, the first cavity, the second circuit portion and the second cavity form a circuit channel, and the first conducting portion and the second conducting portion form a current channel.

[0012] In at least one embodiment of the present application, before patterning the first initial metal layer and the second initial metal layer, the method further comprises forming a third metal pattern layer on the first initial metal layer, and forming a fourth metal pattern layer on the second initial metal layer.

[0013] In at least one embodiment of the present application, the step of forming the third metal pattern layer comprises forming a fifth heat conducting portion, the second heat conducting portion being located between the first heat conducting portion and the fifth heat conducting portion, and forming a third conducting portion, the first conducting portion being located between the first substrate and the third conducting portion, and the step of forming the fourth metal pattern layer comprises forming a sixth heat conducting portion, the fourth heat conducting portion being located between the third heat conducting portion and the sixth heat conducting portion, and forming a fourth conducting portion, the second conducting portion being located between the second substrate and the fourth conducting portion.

[0014] In at least one embodiment of the present application, the heat conducting channel further comprises the fifth heat conducting portion and the sixth heat conducting portion, and the current channel further comprises the third conducting portion and the fourth conducting portion.

[0015] In at least one embodiment of the present application, the first through hole and the second through hole have a depth greater than a thickness of the first metal pattern layer, and the third through hole and the fourth through hole have a depth greater than a thickness of the second metal pattern layer. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 is a partial cross-sectional view of a circuit board according to at least one embodiment of the present application; and

[0017] Figures 2A to 2L is a partial cross-sectional view of a circuit board according to at least one embodiment of the present application at different process stages. DETAILED DESCRIPTION

[0018] In the following detailed description of embodiments of the application, for purposes of reference, the meaning of "upper", "lower", "over", "under", and the like, can be described in terms of the orientation as shown in the drawings. It is to be understood that these terms are not intended to mean that a device or element will necessarily be oriented in that manner during normal use or in a particular orientation during assembly. Terms, such as "above", "below", "upper", "lower", and the like, can be used herein, for ease of description, to describe the relative positioning of one element or feature to another as illustrated in the various drawings. It is to be understood that the spatially relative terms are intended to encompass different orientations of the device in use or during assembly, for example, the various components can be oriented in different directions and the

[0019] It is to be understood that the singular forms "a", "an", and "the" include plural referents unless the context clearly dictates otherwise. Pronouns in the masculine form include the feminine form, and vice versa, and the singular form also includes the plural form, unless the context clearly dictates otherwise.

[0020] Spatially relative terms, such as "under", "below", "lower", "over", "upper" and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or during assembly, for example, the various components can be oriented in different directions and the devices can be in different orientations when in use compared to

[0021] It is to be understood that the singular forms "a", "an", and "the" include plural referents unless the context clearly dictates otherwise. Pronouns in the masculine form include the feminine form, and vice versa, and the singular form also includes the plural form, unless the context clearly dictates otherwise.

[0022] Although the present application is illustrated by way of a series of operations or steps in the manufacturing method, the order of the operations or steps shown should not be construed as limiting the present application. For example, certain operations or steps can be performed in a different order and / or concurrently with other steps. Furthermore, each operation or step described herein can comprise several sub-steps or actions.

[0023] Furthermore, the present application can be carried out or applied in other different embodiments, and the details of the present application can be combined, modified and changed based on different views and applications without departing from the concept of the present application.

[0024] Figure 1 is a schematic diagram of a partial cross-section of a circuit board according to at least one embodiment of the present application. Referring to Figure 1 The circuit board 1 comprises a core layer 30, a first circuit structure 10 and a second circuit structure 20. The core layer 30 has a first surface S1 and a second surface S2, the first surface S1 and the second surface S2 are opposite. The first circuit structure 10 is disposed on the first surface S1 of the core layer 30, and the second circuit structure 20 is disposed on the second surface S2.

[0025] The first circuit structure 10 comprises a first substrate 110, a first insulating layer 112, a first metal pattern layer 114 and a first metal layer 116. The first substrate 110 comprises a first through hole T1 and a second through hole T2, the first through hole T1 and the second through hole T2 are disposed at intervals, and the first through hole T1 and the second through hole T2 expose the first surface S1 of the core layer 30.

[0026] The first insulating layer 112 is disposed in the first through hole T1 and contacts the first surface S1 of the core layer 30. The first metal pattern layer 114 comprises a first heat conduction part 114h and a first circuit part 114t, the first heat conduction part 114h is disposed in the first through hole T1 and disposed on the first insulating layer 112, and the first circuit part 114t is disposed in the second through hole T2 and forms a first cavity C1 with the first surface S1, that is, the first circuit part 114t does not contact the first surface S1. The first metal layer 116 comprises a second heat conduction part 116h and a first conduction part 116c, the second heat conduction part 116h is disposed on the first heat conduction part 114h, and the first conduction part 116c is disposed on the first substrate 110.

[0027] The second circuit structure 20 comprises a second substrate 210, a second insulating layer 212, a second metal pattern layer 214 and a second metal layer 216. The second substrate 210 comprises a third through hole T3 and a fourth through hole T4, the third through hole T3 and the fourth through hole T4 are disposed at intervals, and the third through hole T3 and the fourth through hole T4 expose the second surface S2 of the core layer 30.

[0028] The second insulating layer 212 is disposed in the third through-hole T3 and contacts the second surface S2 of the core layer 30. The second metal pattern layer 214 includes a third heat conducting portion 214h and a second circuit portion 214t. The third heat conducting portion 214h is disposed in the third through-hole T3 and on the second insulating layer 212. The second circuit portion 214t is disposed in the fourth through-hole T4 and forms a second cavity C2 with the second surface S2. That is, the second circuit portion 214t does not contact the second surface S2. The second metal layer 216 includes a fourth heat conducting portion 216h and a second conductive portion 216c. The fourth heat conducting portion 216h is disposed on the third heat conducting portion 214h, and the second conductive portion 216c is disposed on the second substrate 210.

[0029] Through the above structural design, the insulating layer and the heat conducting portion, the circuit portion and the cavity, and the conducting portion can be used as component channels with different functions respectively, thereby forming a circuit board with component channels with multiple functions.

[0030] like Figure 1 As shown, the circuit board 1 includes a heat conduction channel HC, a circuit channel TC, and a current channel CC. The heat conduction channel HC includes the first insulating layer 112, the first heat conduction portion 114h of the first metal pattern layer 114, the second heat conduction portion 116h of the first metal layer 116, the second insulating layer 212, the third heat conduction portion 214h of the second metal pattern layer 214, and the fourth heat conduction portion 216h of the second metal layer 216. The circuit channel TC includes the first circuit portion 114t of the first metal pattern layer 114, the first cavity C1, the second circuit portion 214t of the second metal pattern layer 214, and the second cavity C2. The current channel CC includes the first conductive portion 116c of the first metal layer 116 and the second conductive portion 216c of the second metal layer 216.

[0031] In some embodiments, the first circuit portion 114t of the first metal pattern layer 114 is combined with the first cavity C1 and the second circuit portion 214t of the second metal pattern layer 214 is combined with the second cavity C2, so that the circuit channel TC can be used as a high-speed or high-frequency signal transmission circuit channel, such as for 4G or 5G communication components.

[0032] In some embodiments, a heat conduction channel HC with a heat dissipation effect is formed by providing the second heat conduction portion 116h of the first metal layer 116 and the fourth heat conduction portion 216h of the second metal layer 216. Furthermore, a current channel CC suitable for transmitting high current is formed by providing the first conductive portion 116c of the first metal layer 116 and the second conductive portion 216c of the second metal layer 216.

[0033] In some embodiments, the number of the first through-hole T1, the second through-hole T2, the third through-hole T3 and the fourth through-hole T4 may be more than one. Figure 1As shown, the number of the first through hole T1 and the third through hole T3 is one, and the number of the second through hole T2 and the fourth through hole T4 is two, but the present invention is not limited thereto, and the number of the through holes can be adjusted according to different design requirements.

[0034] In some embodiments, the first heat conducting portion 114 h of the first metal pattern layer 114 contacts the first insulating layer 112 , the second heat conducting portion 116 h of the first metal layer 116 contacts the first heat conducting portion 114 h , and the first conducting portion 116 c of the first metal layer 116 contacts the first substrate 110 .

[0035] In some embodiments, the third heat conducting portion 214 h of the second metal pattern layer 214 contacts the second insulating layer 212 , the fourth heat conducting portion 216 h of the second metal layer 216 contacts the third heat conducting portion 214 h , and the second conducting portion 216 c of the second metal layer 216 contacts the second substrate 210 .

[0036] Please continue reading Figure 1 The first circuit structure 10 further includes a third metal pattern layer 118. The third metal pattern layer 118 includes a fifth heat conducting portion 118h and a third conductive portion 118c. The fifth heat conducting portion 118h is disposed on the second heat conducting portion 116h, and the third conductive portion 118c is disposed on the first conductive portion 116c. The second circuit structure 20 further includes a fourth metal pattern layer 218. The fourth metal pattern layer 218 includes a sixth heat conducting portion 218h and a fourth conductive portion 218c. The sixth heat conducting portion 218h is disposed on the fourth heat conducting portion 216h, and the fourth conductive portion 218c is disposed on the second conductive portion 216c.

[0037] like Figure 1 As shown, the heat conduction channel HC further includes the fifth heat conduction portion 118h of the third metal pattern layer 118 and the sixth heat conduction portion 218h of the fourth metal pattern layer 218, and the current channel CC further includes the third conductive portion 118c of the third metal pattern layer 118 and the fourth conductive portion 218c of the fourth metal pattern layer 218.

[0038] In some embodiments, the thickness of the third metal pattern layer 118 is greater than that of the first metal pattern layer 114, and the thickness of the fourth metal pattern layer 218 is greater than that of the second metal pattern layer 214. The thicker fifth heat conducting portion 118h of the third metal pattern layer 118 and the sixth heat conducting portion 218h of the fourth metal pattern layer 218 further enhance the heat dissipation effect of the heat conducting channel HC. Furthermore, the thicker third conductive portion 118c of the third metal pattern layer 118 and the fourth conductive portion 218c of the fourth metal pattern layer 218 further enhance the high current resistance of the current channel CC.

[0039] In some embodiments, the fifth heat-conductive portion 118h of the third metal pattern layer 118 contacts the second heat-conductive portion 116h, and the third conductive portion 118c of the third metal pattern layer 118 contacts the first conductive portion 116c. In some embodiments, the sixth heat-conductive portion 218h of the fourth metal pattern layer 218 contacts the fourth heat-conductive portion 216h, and the fourth conductive portion 218c of the fourth metal pattern layer 218 contacts the second conductive portion 216c.

[0040] Figure 2A to 2L FIG. 1 is a partial cross-sectional view of a circuit board at different process stages according to an embodiment of the present disclosure. Please refer to FIG. 1, a first initial substrate 110’ and a second initial substrate 210’ are provided, and a first initial metal layer 116’ is formed on the first initial substrate 110’ and a second initial metal layer 216’ is formed on the second initial substrate 210’. Figure 2A In some embodiments, the materials of the first initial substrate 110’ and the second initial substrate 210’ can include resin, and the materials of the first initial metal layer 116’ and the second initial metal layer 216’ can include metal, such as copper.

[0041] Please refer to FIG. 2, the first initial substrate 110’ is patterned to form a first substrate 110 having first and second through holes T1 and T2 arranged in an interval, and the second initial substrate 210’ is patterned to form a second substrate 210 having third and fourth through holes T3 and T4 arranged in an interval. In some embodiments, the first, second, third, and fourth through holes T1, T2, T3, and T4 can be formed by an etching process, such as dry etching. Figure 2B

[0042] Please refer to FIG. 3, a first metal pattern layer 114 is formed in the first through hole T1 and the second through hole T2, and a second metal pattern layer 214 is formed in the third through hole T3 and the fourth through hole T4. In some embodiments, the materials of the first metal pattern layer 114 and the second metal pattern layer 214 can include metal, such as copper. In some embodiments, the first metal pattern layer 114 and the second metal pattern layer 214 can be formed by an electroplating process. In some embodiments, the depth of the first through hole T1 and the depth of the second through hole T2 are greater than the thickness of the first metal pattern layer 114, respectively, and the depth of the third through hole T3 and the depth of the fourth through hole T4 are greater than the thickness of the second metal pattern layer 214, respectively. Figure 2C As shown in FIG. 4, a first metal pattern layer 114 is formed in the first through hole T1 and the second through hole T2, and a second metal pattern layer 214 is formed in the third through hole T3 and the fourth through hole T4. In some embodiments, the materials of the first metal pattern layer 114 and the second metal pattern layer 214 can include metal, such as copper. In some embodiments, the first metal pattern layer 114 and the second metal pattern layer 214 can be formed by an electroplating process. In some embodiments, the depth of the first through hole T1 and the depth of the second through hole T2 are greater than the thickness of the first metal pattern layer 114, respectively, and the depth of the third through hole T3 and the depth of the fourth through hole T4 are greater than the thickness of the second metal pattern layer 214, respectively.

[0043] Figure 2C ​​As shown, the step of forming the first metal pattern layer 114 includes forming the first heat conduction portion 114h in the first via T1 and the first line portion 114t in the second via T2. The step of forming the second metal pattern layer 214 includes forming the third heat conduction portion 214h in the third via T3 and the second line portion 214t in the fourth via T4. In some embodiments, the depth of the first via T1 is greater than the thickness of the first heat conduction portion 114h, the depth of the second via T2 is greater than the thickness of the first line portion 114t, the depth of the third via T3 is greater than the thickness of the third heat conduction portion 214h, and the depth of the fourth via T4 is greater than the thickness of the second line portion 214t.

[0044] Referring to Figure 2D , the first insulating layer 112 is formed on the first metal pattern layer 114 in the first via T1, and the second insulating layer 212 is formed on the second metal pattern layer 214 in the third via T3, to obtain a first initial circuit structure 10'. In some embodiments, the material of the first insulating layer 112 and the second insulating layer 212 can include resin. In some embodiments, the depth of the first via T1 is approximately equal to the sum of the thicknesses of the first heat conduction portion 114h and the first insulating layer 112, and the depth of the third via T3 is approximately equal to the sum of the thicknesses of the third heat conduction portion 214h and the second insulating layer 212.

[0045] Referring to Figure 2E and Figure 2F , the core layer 30 is provided, and the first initial circuit structure 10', the second initial circuit structure 20', and the core layer 30 are laminated, i.e., the first substrate 110 and the core layer 30 are laminated to form the first cavity C1 in the second via T2, and the second substrate 210 and the core layer 30 are laminated to form the second cavity C2 in the fourth via T4. However, the manufacturing method of the second initial circuit structure 20' is the same as that of the first initial circuit structure 10', as shown in Figures 2A to 2D , and thus the same content will not be described here.

[0046] As shown in Figure 2E and Figure 2F , the core layer 30 has a first surface S1 and a second surface S2 opposite to the first surface S1, the core layer 30 is arranged between the first substrate 110 and the second substrate 210, and the first substrate 110, the second substrate 210, and the core layer 30 are laminated, so that the first substrate 110 is attached to the first surface S1 of the core layer 30, and the second substrate 210 is attached to the second surface S2 of the core layer 30.

[0047] In detail, the first substrate 110, the second substrate 210 and the core layer 30 are pressed to form the first cavity C1 between the first line portion 114t formed in the second via hole T2 and the first surface S1 of the core layer 30, and to form the second cavity C2 between the second line portion 214t formed in the fourth via hole T4 and the second surface S2 of the core layer 30. In addition, the first insulating layer 112 formed in the first via hole T1 contacts the first surface S1 of the core layer 30, and the second insulating layer 212 formed in the third via hole T3 contacts the second surface S2 of the core layer 30. In some embodiments, the material of the core layer 30 can include resin, such as low flow prepreg or no flow prepreg.

[0048] Referring to Figures 2G to 2L , the first initial metal layer 116' is patterned to form the first metal layer 116, and the second initial metal layer 216' is patterned to form the second metal layer 216. First, as shown in Figure 2G , a first photoresist film F1 is formed on the first initial metal layer 116', and a second photoresist film F2 is formed on the second initial metal layer 216'. In some embodiments, the first photoresist film F1 and the second photoresist film F2 can be formed on the first initial metal layer 116' and the second initial metal layer 216', respectively, by a pressing process.

[0049] As shown in Figure 2H , the first photoresist film F1 is patterned to form a first opening O1 and a second opening O2 exposing the first initial metal layer 116', and the second photoresist film F2 is patterned to form a third opening O3 and a fourth opening O4 exposing the second initial metal layer 216'. In some embodiments, the first opening O1 is formed corresponding to the position of the first heat conduction portion 114h, i.e., corresponding to the first via hole T1, and the third opening O3 is formed corresponding to the position of the third heat conduction portion 214h, i.e., corresponding to the third via hole T3. In some embodiments, the first opening O1, the second opening O2, the third opening O3 and the fourth opening O4 can be formed by a photolithography process.

[0050] As shown in Figure 2IAs shown, a third metal pattern layer 118 is formed on the first preliminary metal layer 116', and a fourth metal pattern layer 218 is formed on the second preliminary metal layer 216'. Specifically, forming the third metal pattern layer 118 includes forming a fifth heat conducting portion 118h on the first preliminary metal layer 116' in the first opening O1 and a third conductive portion 118c on the first preliminary metal layer 116' in the second opening O2. Forming the fourth metal pattern layer 218 includes forming a sixth heat conducting portion 218h on the second preliminary metal layer 216' in the third opening O3 and a fourth conductive portion 218c on the second preliminary metal layer 216' in the fourth opening O4. In some embodiments, the material of the third metal pattern layer 118 and the fourth metal pattern layer 218 may include a metal, such as copper. In some embodiments, the third metal pattern layer 118 and the fourth metal pattern layer 218 may be formed by an electroplating process.

[0051] like Figure 2J As shown, a first protective layer E1, a second protective layer E2, a third protective layer E3, and a fourth protective layer E4 are formed on the fifth heat conducting portion 118h, the third conductive portion 118c, the sixth heat conducting portion 218h, and the fourth conductive portion 218c, respectively. In some embodiments, the material of the first protective layer E1, the second protective layer E2, the third protective layer E3, and the fourth protective layer E4 may comprise a metal, such as tin. In some embodiments, the first protective layer E1, the second protective layer E2, the third protective layer E3, and the fourth protective layer E4 may be formed by an electroplating process. In some embodiments, the first protective layer E1, the second protective layer E2, the third protective layer E3, and the fourth protective layer E4 are directly in contact with the fifth heat conducting portion 118h, the third conductive portion 118c, the sixth heat conducting portion 218h, and the fourth conductive portion 218c, respectively.

[0052] like Figure 2K As shown in FIG, the first photoresist film F1 and the second photoresist film F2 are removed. Figure 2L As shown, using the first protective layer E1 and the second protective layer E2 as masks, the first preliminary metal layer 116' below the third metal pattern layer 118 is patterned to form the first metal layer 116. Using the third protective layer E3 and the fourth protective layer E4 as masks, the second preliminary metal layer 216' below the fourth metal pattern layer 218 is patterned to form the second metal layer 216. In some embodiments, the first preliminary metal layer 116' and the second preliminary metal layer 216' can be patterned by an etching process.

[0053] In detail, the step of patterning the first initial metal layer 116' includes forming the second heat conduction portion 116h on the first heat conduction portion 114h and forming the first conduction portion 116c on the first substrate 110, and the step of patterning the second initial metal layer 216' includes forming the fourth heat conduction portion 216h on the third heat conduction portion 214h and forming the second conduction portion 216c on the second substrate 210. In other words, the second heat conduction portion 116h is formed between the first heat conduction portion 114h and the fifth heat conduction portion 118h, the first conduction portion 116c is formed between the first substrate 110 and the third conduction portion 118c, the fourth heat conduction portion 216h is formed between the third heat conduction portion 214h and the sixth heat conduction portion 218h, and the second conduction portion 216c is formed between the second substrate 210 and the fourth conduction portion 218c.

[0054] Referring to Figure 1 and Figure 2L After patterning the first initial metal layer 116' and the second initial metal layer 216', the first protective layer E1, the second protective layer E2, the third protective layer E3 and the fourth protective layer E4 are removed to form the first circuit structure 10 and the second circuit structure 20, and the circuit board 1 including the heat conduction channel HC, the circuit channel TC and the current channel CC can be obtained as shown in Figure 1

[0055] In summary, in the above circuit board and the manufacturing method thereof according to at least one embodiment of the present application, the insulating layer and the heat conduction portion, the circuit portion and the cavity, and the conduction portion can be used as element channels with different functions, respectively, so that a circuit board with multiple functional element channels is formed, and the product yield and reliability are improved.

[0056] Although the present application has been disclosed with the above embodiments, it is not intended to limit the present application, and those skilled in the art can make some changes and modifications without departing from the spirit and scope of the present application, and therefore the protection scope of the present application shall be subject to the appended claims.

[0057] SYMBOL DESCRIPTION

[0058] 1: circuit board

[0059] 10: first circuit structure

[0060] 10': first initial circuit structure

[0061] 110: first substrate

[0062] 110': first initial substrate

[0063] 112: first insulating layer

[0064] 114: first metal pattern layer

[0065] ​114h: first heat-conducting portion

[0066] 114t: first circuit portion

[0067] 116: first metal layer

[0068] 116’: first initial metal layer

[0069] 116c: first conductive portion

[0070] 116h: second heat-conducting portion

[0071] 118: third metal pattern layer

[0072] 118c: third conductive portion

[0073] 118h: fifth heat-conducting portion

[0074] 20: second circuit structure

[0075] 20’: second initial circuit structure

[0076] 210: second base material

[0077] 210’: second initial base material

[0078] 212: second insulating layer

[0079] 214: second metal pattern layer

[0080] 214h: third heat-conducting portion

[0081] 214t: second circuit portion

[0082] 216: second metal layer

[0083] 216’: second initial metal layer

[0084] 216c: second conductive portion

[0085] 216h: fourth heat-conducting portion

[0086] 218: fourth metal pattern layer

[0087] 218c: fourth conductive portion

[0088] 218h: sixth heat-conducting portion

[0089] 30: core layer

[0090] C1: first cavity

[0091] C2: second cavity

[0092] CC: current channel

[0093] E1: first protective layer

[0094] E2: second protective layer

[0095] E3: third protective layer

[0096] E4: fourth protective layer

[0097] F1: first photoresist film

[0098] F2: second photoresist film

[0099] HC: heat conduction channel

[0100] O1: first opening

[0101] O2: second opening

[0102] O3: third opening

[0103] O4: fourth opening

[0104] S1: first surface

[0105] S2: second surface

[0106] T1: first through hole

[0107] T2: second through hole

[0108] T3: third through hole

[0109] T4: fourth through hole

[0110] TC: circuit channel

Claims

1. A circuit board, characterized by, Comprising: a core layer having a first surface and a second surface opposite to the first surface; a first circuit structure disposed on the first surface, the first circuit structure comprising: a first substrate comprising a first via and a second via disposed apart from the first via, wherein the first via and the second via expose the first surface; a first insulating layer disposed in the first via and contacting the first surface; a first metal pattern layer comprising a first heat conduction portion and a first circuit portion, wherein the first heat conduction portion is disposed on the first insulating layer, and the first circuit portion is disposed in the second via and forms a first cavity with the first surface; and a first metal layer comprising a second heat conduction portion and a first conduction portion, wherein the second heat conduction portion is disposed on the first heat conduction portion, and the first conduction portion is disposed on the first substrate; and a second circuit structure disposed on the second surface, the second circuit structure comprising: a second substrate comprising a third via and a fourth via disposed apart from the third via, wherein the third via and the fourth via expose the second surface; a second insulating layer disposed in the third via and contacting the second surface; a second metal pattern layer comprising a third heat conduction portion and a second circuit portion, wherein the third heat conduction portion is disposed on the second insulating layer, and the second circuit portion is disposed in the fourth via and forms a second cavity with the second surface; and a second metal layer comprising a fourth heat conduction portion and a second conduction portion, wherein the fourth heat conduction portion is disposed on the third heat conduction portion, and the second conduction portion is disposed on the second substrate.

2. The circuit board of claim 1, wherein comprising a heat conduction channel, a circuit channel, and a current channel, wherein the heat conduction channel comprises the first insulating layer, the first heat conduction portion, the second heat conduction portion, the second insulating layer, the third heat conduction portion, and the fourth heat conduction portion, the circuit channel comprises the first circuit portion, the first cavity, the second circuit portion, and the second cavity, and the current channel comprises the first conduction portion and the second conduction portion.

3. The circuit board of claim 2, wherein The first circuit structure further comprises a third metal pattern layer comprising a fifth heat conduction portion and a third conduction portion, the fifth heat conduction portion is disposed on the second heat conduction portion, and the third conduction portion is disposed on the first conduction portion, wherein the second circuit structure further comprises a fourth metal pattern layer comprising a sixth heat conduction portion and a fourth conduction portion, wherein the sixth heat conduction portion is disposed on the fourth heat conduction portion, and the fourth conduction portion is disposed on the second conduction portion.

4. The circuit board of claim 3, wherein The heat conduction channel further comprises the fifth heat conduction portion and the sixth heat conduction portion, and the current channel further comprises the third conduction portion and the fourth conduction portion.

5. A method of manufacturing a circuit board, characterized by, Comprising: providing a first initial substrate and a second initial substrate; forming a first initial metal layer on the first initial substrate; forming a second initial metal layer on the second initial substrate; patterning the first initial substrate to form a first substrate having a first via and a second via disposed apart; patterning the second initial substrate to form a second substrate having a third via and a fourth via disposed apart; forming a first metal pattern layer in the first via and the second via; forming a second metal pattern layer in the third via and the fourth via; forming a first insulating layer on the first metal pattern layer in the first via; forming a second insulating layer on the second metal pattern layer in the third via; providing a core layer; pressing the first substrate and the core layer to form a first cavity in the second via; pressing the second substrate and the core layer to form a second cavity in the fourth via; patterning the first initial metal layer to form a first metal layer; and patterning the second initial metal layer to form a second metal layer. The step of forming the first metal pattern layer includes forming a first heat conduction portion in the first via and forming a first line portion in the second via, the step of patterning the first initial metal layer includes forming a second heat conduction portion on the first heat conduction portion and forming a first conduction portion on the first substrate, wherein the step of forming the second metal pattern layer includes forming a third heat conduction portion in the third via and forming a second line portion in the fourth via, the step of patterning the second initial metal layer includes forming a fourth heat conduction portion on the third heat conduction portion and forming a second conduction portion on the second substrate.

6. The method of manufacturing a circuit board according to claim 5, wherein The first insulating layer, the first heat conduction portion, the second heat conduction portion, the second insulating layer, the third heat conduction portion and the fourth heat conduction portion form a heat conduction channel, the first line portion, the first cavity, the second line portion and the second cavity form a line channel, and the first conduction portion and the second conduction portion form a current channel.

7. The method of manufacturing a circuit board according to claim 6, wherein Before patterning the first initial metal layer and the second initial metal layer, further comprising:

8. The method of manufacturing a circuit board according to claim 7, wherein forming a third metal pattern layer on the first initial metal layer; and forming a fourth metal pattern layer on the second initial metal layer. The step of forming the third metal pattern layer includes forming a fifth heat conduction portion, the second heat conduction portion is between the first heat conduction portion and the fifth heat conduction portion, and forming a third conduction portion, wherein the first conduction portion is between the first substrate and the third conduction portion, wherein the step of forming the fourth metal pattern layer includes forming a sixth heat conduction portion, the fourth heat conduction portion is between the third heat conduction portion and the sixth heat conduction portion, and forming a fourth conduction portion, wherein the second conduction portion is between the second substrate and the fourth conduction portion.

9. The method of manufacturing a circuit board according to claim 8, wherein The heat conduction channel further includes the fifth heat conduction portion and the sixth heat conduction portion, and the current channel further includes the third conduction portion and the fourth conduction portion.

10. The method of manufacturing a circuit board according to claim 9, wherein The depth of the first via and the depth of the second via are greater than the thickness of the first metal pattern layer, respectively, wherein the depth of the third via and the depth of the fourth via are greater than the thickness of the second metal pattern layer, respectively.

11. The method of manufacturing a circuit board according to claim 5, wherein ​

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