Semiconductor structure and forming method thereof

Abstract

The invention discloses a semiconductor structure and a forming method thereof. The forming method comprises the following steps: providing a substrate; forming a first epitaxial layer with a first doping type on the substrate; a plurality of pairs of super junction structures are formed in the first epitaxial layer, each super junction structure comprises a first column with the second doping type and a second column with the first doping type, and the first columns and the second columns are alternately connected in the horizontal direction; forming a second epitaxial layer with the first doping type on the first epitaxial layer; forming an injection region with the first doping type in the second epitaxial layer, wherein the doping concentration of the injection region is greater than that of the second epitaxial layer; forming a base region with a second doping type in the second epitaxial layer; forming an emitter region with the first doping type in the base region; a collector of the first doping type is formed in the second epitaxial layer away from the base region, the doping concentration of the collector is larger than that of the second epitaxial layer, and the injection region is located between the base region and the collector in the horizontal direction. According to the forming method provided by the embodiment of the invention, the high gain of the semiconductor structure can be realized while the breakdown voltage of the semiconductor structure is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor preparation, and in particular to a semiconductor structure and a forming method thereof. Background Art

[0002] Bipolar junction transistor (BJT) is an important semiconductor device in semiconductor integrated circuits. Bipolar junction transistor has an amplification effect and is widely used in various circuit designs in the industrial and consumer electronics fields, such as detection circuits, rectifier circuits, amplifier circuits, switching circuits, voltage stabilization circuits, signal modulation circuits, etc.

[0003] According to the different structures of bipolar junction transistors, bipolar junction transistors can be divided into two types: NPN type and PNP type. Bipolar junction transistors are also called semiconductor triodes, and have three external leads: collector, emitter and base. The collector is led from the collector region of the bipolar junction transistor, the emitter is led from the emitter region of the bipolar junction transistor, and the base is led from the base region of the bipolar junction transistor.

[0004] However, the bipolar junction transistor provided by the prior art has the conflicting problem of improving gain and increasing breakdown voltage. Summary of the invention

[0005] The technical problem solved by the present invention is to provide a semiconductor structure and a method for forming the same, which can achieve higher gain and better performance of the semiconductor structure and at the same time can improve the breakdown voltage of the semiconductor structure.

[0006] To solve the above technical problems, an embodiment of the present invention provides a method for forming a semiconductor structure, comprising: providing a substrate; forming a first epitaxial layer with a first doping type on the substrate; forming a plurality of pairs of super junction structures in the first epitaxial layer, the super junction structure comprising a plurality of first columns with a second doping type and second columns with a first doping type, the first columns and the second columns being alternately connected and arranged in a horizontal direction; forming a second epitaxial layer with a first doping type on the first epitaxial layer; forming an injection region with a first doping type in the second epitaxial layer, the injection region having a doping concentration greater than the doping concentration of the second epitaxial layer; forming a base region with a second doping type in the second epitaxial layer; forming an emitter region with a first doping type in the base region; forming a collector with a first doping type in the second epitaxial layer away from the base region, the collector having a doping concentration greater than the doping concentration of the second epitaxial layer, and the injection region being located between the base region and the collector in the horizontal direction.

[0007] Optionally, the method for forming several pairs of super junction structures in the first epitaxial layer includes: etching the first epitaxial layer to form first grooves in the first epitaxial layer, the first grooves being spaced apart in a horizontal direction; forming first columns in the first grooves; etching the first epitaxial layer between adjacent first columns to form second grooves in the first epitaxial layer between adjacent first columns; and forming second columns in the second grooves.

[0008] Optionally, a first column is formed in the first trench by using a directional epitaxial growth process; and a second column is formed in the second trench by using a directional epitaxial growth process.

[0009] Optionally, the method for forming the second epitaxial layer and the injection region includes: forming a first initial epitaxial layer on the first epitaxial layer; performing ion implantation on the first initial epitaxial layer to form an injection region in the first initial epitaxial layer; forming a second initial epitaxial layer on the first initial epitaxial layer, the first initial epitaxial layer and the second initial epitaxial layer constituting the second epitaxial layer.

[0010] Optionally, the doping concentration of the implantation region is 1E16-4E16.

[0011] Optionally, the thickness of the injection region is 0.2 to 0.3 microns.

[0012] Optionally, the method further includes: forming a base electrode having a second doping type in the base region, wherein the doping concentration of the base electrode is greater than the doping concentration of the base region, and the base electrode is spaced apart from the emitter region in a horizontal direction.

[0013] Optionally, after forming the base, the method further includes: forming a first isolation structure in the base region, wherein the first isolation structure is located between the emitter region and the base.

[0014] Optionally, the method for forming the first isolation structure in the base region includes: etching the base region to form a first isolation trench between the base and the emitter region; and filling the first isolation trench with a first isolation material to form a first isolation structure.

[0015] Optionally, the first isolation material includes polysilicon or silicon dioxide.

[0016] Optionally, the first doping type is N-type doping; and the second doping type is P-type doping.

[0017] Optionally, the doping ions of the N-type doping are N-type ions, and the N-type ions include phosphorus ions or arsenic ions; the doping ions of the P-type doping are P-type ions, and the P-type ions include boron ions or indium ions.

[0018] Correspondingly, an embodiment of the present invention also provides a semiconductor structure formed by the above-mentioned formation method, comprising: a substrate; a first epitaxial layer having a first doping type, the first epitaxial layer being located on the substrate; a plurality of pairs of super junction structures, the super junction structure being located in the first epitaxial layer, the super junction structure comprising a first column having a second doping type and a second column having a first doping type, the first column and the second column being alternately connected and arranged in a horizontal direction; a second epitaxial layer having a first doping type, the second epitaxial layer being located on the first epitaxial layer; an injection region having a first doping type, the injection region being located in the second epitaxial layer, the doping concentration of the injection region being greater than the doping concentration of the second epitaxial layer; a base region having a second doping type, the base region being located in the second epitaxial layer; an emitter region having a first doping type, the emitter region being located in the base region; a collector having a first doping type, the collector being located in the second epitaxial layer away from the base region, the doping concentration of the collector being greater than the doping concentration of the second epitaxial layer, and the injection region being located between the base region and the collector in the horizontal direction.

[0019] Optionally, the doping concentration of the implantation region is 1E16-4E16.

[0020] Optionally, the thickness of the injection region is 0.2 to 0.3 microns.

[0021] Optionally, it further includes: a base having a second doping type, the base being located in the base region, the doping concentration of the base being greater than the doping concentration of the base region, and the base being spaced apart from the emitter region in a horizontal direction.

[0022] Optionally, it further includes: a first isolation structure, wherein the first isolation structure is located in the base region, and the first isolation structure is located between the emitter region and the base.

[0023] Optionally, the first doping type is N-type doping; and the second doping type is P-type doping.

[0024] Optionally, the doping ions of the N-type doping are N-type ions, and the N-type ions include phosphorus ions or arsenic ions; the doping ions of the P-type doping are P-type ions, and the P-type ions include boron ions or indium ions.

[0025] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects:

[0026] The formation method provided by the technical solution forms a super junction structure in the first epitaxial layer, and the super junction structure can improve the breakdown voltage of the device. At the same time, an injection region is formed in the second epitaxial layer. The doping type of the injection region is the same as the doping type of the second epitaxial layer, and the doping concentration is higher than that of the second epitaxial layer. The injection region is located between the base region and the collector in the horizontal direction. The injection region has a high doping concentration and a low resistance, which can allow carriers to pass through the injection region quickly and concentratedly, thereby increasing the collector current, achieving a high gain of the formed semiconductor structure, and also improving the breakdown voltage of the semiconductor structure.

[0027] The semiconductor structure provided by the technical solution has a super junction structure in the first epitaxial layer, which is beneficial to improving the breakdown voltage. The second epitaxial layer has an injection region, which is located between the base region and the collector in the horizontal direction. The doping type of the injection region is the same as the doping type of the second epitaxial layer, and the doping concentration is higher than that of the second epitaxial layer. When carriers move in the second epitaxial layer, due to the low resistance of the injection region, the carriers can pass through the injection region more quickly and concentratedly, thereby increasing the current amplification factor of the semiconductor structure and achieving high gain and high performance of the formed semiconductor structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figures 1 to 12 It is a schematic structural diagram corresponding to each step of a semiconductor structure forming process in one embodiment of the present invention. DETAILED DESCRIPTION

[0029] As described in the background technology, bipolar junction transistors are divided into two types: NPN type and PNP type. Taking the NPN type BJT transistor as an example, when the BJT is working normally, the emitter junction formed by the base and the emitter is forward biased, and the electrons of the emitter are injected into the base region; at the same time, under the action of the reverse electric field formed by the base and the collector, most of the electrons will be injected into the collector. Since the base region is generally very thin and the doping concentration is low, the base current is very small, and the collector current is formed after amplification. Since there is a large distance between the emitter region and the collector of the current BJT structure, there is a large resistance, so the BJT transistor has a low gain problem. However, if the current gain is increased by reducing the collector resistance, the breakdown voltage from the emitter region to the collector region will be affected.

[0030] In order to solve the above technical problems, an embodiment of the present invention provides a semiconductor structure and a method for forming the same. First, a super junction structure is formed in a first epitaxial layer, and the super junction structure includes a first column with a second doping type and a second column with a first doping type. When a semiconductor device with a super junction structure works in reverse, the first column and the second column of the voltage-resistant layer form a reverse-biased lateral PN junction and establish a lateral horizontal electric field. As the external reverse bias voltage increases, the PN junction depletion layer increases until it is completely depleted, which is equivalent to an intrinsic layer, thereby forming a voltage-resistant region in the first epitaxial layer to increase the breakdown voltage of the semiconductor device; at the same time, in conjunction with an injection region in the second epitaxial layer, the injection region formed has the same doping type as the first initial epitaxial layer, and the doping concentration is higher than the first initial epitaxial layer, and the injection region formed has the characteristic of low resistance. During the carrier migration process, the injection region provides a low-resistance channel, which can enable more carriers to enter the collector region from the base region, thereby achieving a higher breakdown voltage while optimizing the on-resistance of the semiconductor structure, thereby improving the current gain of the semiconductor structure.

[0031] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0032] Figures 1 to 12 It is a schematic structural diagram corresponding to each step of a semiconductor structure forming process in one embodiment of the present invention.

[0033] refer to Figure 1 , providing a substrate 100.

[0034] The substrate 100 is one of monocrystalline silicon, polycrystalline silicon, amorphous silicon or silicon on insulator; the substrate 100 may also be a Si substrate, a Ge substrate, a GeSi substrate or a GaAs substrate. The substrate 100 may be an N-type substrate, a P-type substrate or an intrinsic substrate. In this embodiment, the substrate 100 is a P-type substrate.

[0035] Continue to refer Figure 1 , a buried layer 101 is formed in the substrate 100, and the buried layer 101 has N-type doping ions.

[0036] The N-type doping ions include phosphorus ions or arsenic ions.

[0037] In this embodiment, the method for forming the buried layer 101 includes: forming a first mask layer (not shown) on the surface of the substrate 100; performing N-type ion implantation on the substrate 100 using the first mask layer as a mask; removing the first mask layer and performing an annealing process to form the buried layer 101 in the substrate 100.

[0038] In this embodiment, the buried layer 101 is used to isolate the transistor structure to be formed subsequently from the substrate 100 .

[0039] refer to Figure 2 , a first epitaxial layer 102 is formed on the substrate 100, wherein the first epitaxial layer 102 has a first doping type.

[0040] In this embodiment, the first doping type is N-type doping, and the doping ions of the N-type doping are N-type ions, and the N-type ions include phosphorus ions or arsenic ions.

[0041] Specifically, the first doping type is determined according to the type of the bipolar junction transistor to be formed. Specifically, when the formed semiconductor structure is an NPN transistor, the first doping type is N-type doping; when the formed semiconductor structure is a PNP transistor, the first doping type is P-type doping.

[0042] In this embodiment, the first epitaxial layer 102 is formed by an epitaxial process, so that the overall thickness is uniform and easy to control, which is beneficial to improving the performance of the semiconductor structure.

[0043] In this embodiment, the thickness of the first epitaxial layer 102 is 2 micrometers. The increase in the thickness of the first epitaxial layer 102 can improve the breakdown voltage of the device.

[0044] The doping concentration of the first epitaxial layer 102 is 1E16-4E16.

[0045] After forming the first epitaxial layer 102 , several pairs of super structures are formed in the first epitaxial layer 102 . The super structures include first columns with the second doping type and second columns with the first doping type. The first columns and the second columns are alternately connected and arranged in a horizontal direction.

[0046] It should be noted that the horizontal direction in the embodiment of the present invention refers to a direction parallel to the surface of the substrate 100 and parallel to the flow direction of the current.

[0047] Specific methods for forming a super junction structure include:

[0048] refer to Figure 3 , first trenches 103 are formed in the first epitaxial layer 102 , and the first trenches 103 are arranged at intervals in a horizontal direction.

[0049] The first groove 103 is used to provide space for the subsequent formation of the first column.

[0050] In this embodiment, the method for forming the first groove 103 includes: forming a first patterned photoresist layer (not shown) on the first epitaxial layer 102, the first patterned photoresist layer exposing a portion of the surface of the first epitaxial layer 102; using the first patterned photoresist layer as a mask, etching the first epitaxial layer 102 to form a first groove 103 in the first epitaxial layer 102; and removing the first patterned photoresist layer.

[0051] In this embodiment, the process of etching the first epitaxial layer 102 is dry etching.

[0052] In this embodiment, the bottom of the first trench 103 is higher than the bottom of the first epitaxial layer 102 , and the depth of the first trench 103 is 1.6-1.8 microns.

[0053] refer to Figure 4 , in the first groove 103 (reference Figure 3 ) forms a first column 104 therein, wherein the first column 104 has a second doping type.

[0054] In this embodiment, the second doping type is P-type doping, and the doping ions of the P-type doping are P-type ions, and the P-type ions include boron ions or indium ions.

[0055] In this embodiment, a directional epitaxial growth process is used to grow the first pillar 104 in the first trench 103 .

[0056] In this embodiment, the doping concentration of the first pillar 104 is higher than the doping concentration of the first epitaxial layer 102 , and is 1E15-4E15.

[0057] refer to Figure 5 , a second trench 105 is formed in the first epitaxial layer 102 , and the second trench 105 is located between adjacent first pillars 104 .

[0058] In this embodiment, the second groove 105 is used to provide space for the subsequent formation of the second column.

[0059] In this embodiment, the method for forming the second groove 105 includes: forming a second patterned photoresist layer (not shown) on the first epitaxial layer 102, the second patterned photoresist layer exposing the surface of the first epitaxial layer 102 between adjacent first pillars 104; using the second patterned photoresist layer as a mask, etching the first epitaxial layer 102 to form a second groove 105 in the first epitaxial layer 102; and removing the second patterned photoresist layer.

[0060] In this embodiment, the process of etching the first epitaxial layer 102 is dry etching.

[0061] In this embodiment, the depth of the second trench 105 is consistent with the depth of the first trench 103 , which is conducive to achieving the best effect of subsequent PN junction formation.

[0062] In this embodiment, the width of the second groove 105 is the same as that of the first groove 103, and the width range is 0.4-0.6 microns. Setting this width range can reduce the difficulty of etching process and will not affect the on-resistance of the device.

[0063] refer to Figure 6 , a second pillar 106 is formed in the second trench 105 , and the second pillar 106 has a first doping type.

[0064] In this embodiment, a directional epitaxial growth process is used to grow the second pillar 106 in the second trench 105 .

[0065] In this embodiment, the doping concentration of the second column 106 is higher than the doping concentration of the first epitaxial layer 102, and the doping concentration of the second column 106 is the same as the doping concentration of the first column 104, which can ensure that the charge is completely depleted, expand the depletion area, and improve the voltage resistance of the device.

[0066] In this embodiment, the first column 104 is a P column, the second column 106 is an N column, and the P column and the N column are alternately arranged in the horizontal direction. When the semiconductor device is working in reverse, the P column and the N column form a reverse biased lateral PN junction and establish a lateral horizontal electric field. As the external reverse bias voltage increases, the PN junction depletion layer increases until it is completely depleted, which is equivalent to an intrinsic layer, thereby forming a withstand voltage region in the first epitaxial layer 102, thereby improving the breakdown voltage of the semiconductor device. In addition, the bottom of the P column also forms a PN junction with the first epitaxial layer 102 in contact with it, and a depletion layer is also generated when reverse biased, forming a vertical electric field, further improving the withstand voltage of the device.

[0067] After the super structure is formed, a second epitaxial layer is formed on the first epitaxial layer 102, and an implantation region is formed in the second epitaxial layer. In this embodiment, the second epitaxial layer includes a first initial epitaxial layer and a second initial epitaxial layer. The specific formation method includes:

[0068] refer to Figure 7 , a first initial epitaxial layer 200 is formed on the substrate 100, wherein the first initial epitaxial layer 200 has a first doping type.

[0069] In this embodiment, the first initial epitaxial layer 200 is formed by an epitaxial process, so that the overall thickness is uniform and easy to control, which is beneficial to improving the performance of the semiconductor structure.

[0070] In this embodiment, the thickness of the first initial epitaxial layer 200 is 2 micrometers. In other embodiments, the thickness of the first initial epitaxial layer 200 can be appropriately adjusted to obtain different breakdown voltages of the device.

[0071] The doping concentration of the first initial epitaxial layer 200 is 1E14-4E14.

[0072] Continue to refer Figure 7 , ion implantation is performed on the first initial epitaxial layer 200 to form an implantation region 201 in the first initial epitaxial layer 200 .

[0073] In this embodiment, the method for forming the injection region 201 includes: forming a second mask layer (not shown) on the first initial epitaxial layer 200, the second mask layer being used to define the size and position of the injection region to be formed; using the second mask layer as a mask, performing ion implantation on the first initial epitaxial layer 200 to form the injection region 201 in the first initial epitaxial layer 200; annealing the first initial epitaxial layer 200; and removing the second mask layer.

[0074] In this embodiment, the doping type of the implanted region 201 is the same as the doping type of the first initial epitaxial layer 200 , both of which are N-type doping.

[0075] In this embodiment, the doping concentration of the injection region 201 is greater than the doping concentration of the first initial epitaxial layer 200, and the doping concentration of the injection region 201 is 1E16 to 4E16. The doping concentration has an impact on the resistance. The high doping concentration of the injection region 201 forms a low resistance channel in the collector region. After the BJT transistor structure is subsequently formed, it is beneficial for carriers to move from the base region to the collector, which can improve the current amplification factor and achieve high gain of the semiconductor structure without causing much impact on the breakdown voltage of the semiconductor structure.

[0076] The thickness of the implantation region 201 is 0.2-0.3 micrometers. If the thickness of the implantation region 201 is too large, the breakdown voltage of the device will decrease. Setting this thickness range can reduce the impact on the breakdown voltage of the device while reducing the on-resistance.

[0077] refer to Figure 8 , a second initial epitaxial layer 202 is formed on the first initial epitaxial layer 200 , wherein the second initial epitaxial layer 202 has a first doping type.

[0078] In this embodiment, the second initial epitaxial layer 202 is N-type doped.

[0079] In this embodiment, the doping concentration of the second initial epitaxial layer 202 is the same as the doping concentration of the first initial epitaxial layer 200 .

[0080] In this embodiment, the second initial epitaxial layer 202 is formed by an epitaxial process. The epitaxial process can make the second initial epitaxial layer 202 have a uniform thickness. The first initial epitaxial layer 200 and the second initial epitaxial layer 202 together constitute a collector region. The first initial epitaxial layer 200 and the second initial epitaxial layer 202 have a uniform thickness and can withstand a higher voltage.

[0081] In this embodiment, the thickness of the second initial epitaxial layer 202 is 1.2 microns.

[0082] refer to Fig. 9 , a base region 203 is formed in the second initial epitaxial layer 202, and the base region 203 has a second doping type.

[0083] In this embodiment, the method for forming the base region 203 includes: forming a third mask layer (not shown) on the second initial epitaxial layer 202, the third mask layer being used to define the size and position of the base region to be formed; using the third mask layer as a mask, performing P-type ion implantation on the second initial epitaxial layer 202; removing the third mask layer to form the base region 203 in the second initial epitaxial layer 202.

[0084] In this embodiment, the bottom of the base region 203 is higher than the bottom of the second initial epitaxial layer 202 .

[0085] Continue to refer Fig. 9 , an emitter region 204 is formed in the base region 203, and the emitter region 204 has a first doping type.

[0086] In this embodiment, the emitter region 204 is N-type doped, and the doping concentration of the emitter region 204 is higher than the doping concentration of the second initial epitaxial layer 202 .

[0087] The doping concentration of the emitter region 204 is 1E19-5E19.

[0088] In this embodiment, the bottom of the emitter region 204 is higher than the bottom of the base region 203 , and the emitter region 204 is close to one side of the base region 203 .

[0089] In this embodiment, the method for forming the emitter region 204 includes: forming a fourth mask layer (not shown) on the second initial epitaxial layer 202, the fourth mask layer being used to define the size and position of the emitter region to be formed; using the fourth mask layer as a mask, performing N-type ion implantation on the second initial epitaxial layer 202; removing the fourth mask layer to form the emitter region 204 in the second initial epitaxial layer 202.

[0090] Continue to refer Fig. 9, also includes: forming a collector 205 in the second initial epitaxial layer 202, the doping type of the collector 205 is consistent with the doping type of the second initial epitaxial layer 202, and the doping concentration of the collector 205 is greater than the doping concentration of the second initial epitaxial layer 202.

[0091] The doping concentration of the collector electrode 205 is 2E17-6E17.

[0092] In this embodiment, the collector 205 is located on a side of the second initial epitaxial layer 202 away from the base region 203 .

[0093] In this embodiment, in the horizontal direction, the injection region 201 is located between the base region 203 and the collector 205. The injection region 201 provides a low-resistance channel for the movement of carriers from the base region 203 to the collector 205, and the movement of carriers is more concentrated, which increases the carriers moving from the base region 203 to the collector 205, increases the collector current, and thus can improve the current amplification factor.

[0094] In this embodiment, in the direction perpendicular to the substrate 100 , the end of the implantation region 201 partially overlaps with the base region 203 and the collector 205 .

[0095] In this embodiment, the method further includes: forming a base 206 on the base region 203 , wherein the doping type of the base 206 is the same as the doping type of the base region 203 , and the doping concentration of the base 206 is higher than the doping concentration of the base region 203 .

[0096] In this embodiment, the doping concentration of the base 206 is 1E18-6E18.

[0097] In this embodiment, the base 206 and the emitter region 204 are spaced apart in a horizontal direction.

[0098] The collector electrode 205 serves as the lead-out terminal of the collector region, and the collector region is electrically connected to a subsequently formed metal electrode through the collector electrode 205, and then electrically connected to other semiconductor devices or external circuits; the base electrode 206 serves as the lead-out terminal of the base region 203, and the base region 203 is electrically connected to a subsequently formed metal electrode through the base electrode 206, and then electrically connected to other semiconductor devices or external circuits.

[0099] In this embodiment, after the base region 203, the emitter region 204, the collector 205 and the base 206 are formed, an annealing process is further included to activate the implanted ions and diffuse the implanted ions to a certain extent.

[0100] refer to Fig.10, a first isolation structure 207 is formed in the base region 203 , and the first isolation structure 207 is located between the emitter region 204 and the base 206 .

[0101] In this embodiment, the first isolation structure 207 can reduce the parasitic parameters of the base region 203, thereby facilitating the improvement of the current amplification factor of the semiconductor structure. The PN junction between the base 206 and the emitter 204 will generate a parasitic resistance, which will form a crosstalk capacitor and affect the high-frequency characteristics of the transistor. By providing the first isolation structure 207 between the base 206 and the emitter 204, the contact area between the base 206 and the emitter 204 can be effectively reduced, thereby reducing the parasitic parameters and improving the performance of the semiconductor device.

[0102] In this embodiment, the method for forming the first isolation structure 207 includes: forming a fifth mask layer (not shown) on the base region 203, the base region 203 also covering the surface of the second initial epitaxial layer 202, the fifth mask layer defining the position and size of the first isolation structure to be formed; using the fifth mask layer as a mask, etching the base region 203, and forming a first isolation trench (not shown) in the base region 203 between the emitter region 204 and the base 206; filling the first isolation trench with a first isolation material, and forming a first isolation structure 207 in the base region 203.

[0103] In this embodiment, the base region 203 is etched using a dry etching process.

[0104] In this embodiment, the first isolation material is polysilicon; polysilicon is used as the material of the first isolation structure. Polysilicon has weak conductivity and can conduct electricity in a high voltage environment, thereby optimizing the peak electric field of the isolation structure.

[0105] In other embodiments, the first isolation material may also be silicon dioxide.

[0106] The bottom of the first isolation structure 207 in the base region 203 is lower than the bottom of the emitter 204 , which can enhance the isolation effect.

[0107] refer to Fig.11 , further comprising: forming a second isolation structure 208 in the first epitaxial layer 102 and the second epitaxial layer, wherein the bottom of the second isolation structure 208 is higher than the bottom of the first epitaxial layer 102 and lower than the bottom of the second epitaxial layer.

[0108] In this embodiment, the second isolation structure 208 is used to isolate the collector region and the substrate 100 .

[0109] In this embodiment, the method for forming the second isolation structure 208 includes: forming a sixth mask layer (not shown) on the second initial epitaxial layer 202, the sixth mask layer is used to define the position and size of the second isolation structure 208 to be formed; using the sixth mask layer as a mask, etching the second initial epitaxial layer 202, the first initial epitaxial layer 200 and the first epitaxial layer 102 to form a second isolation trench (not shown) in the second epitaxial layer and the first epitaxial layer 102; filling the second isolation trench with a second isolation material to form a second isolation structure 208.

[0110] In this embodiment, the second isolation material includes silicon dioxide; in other embodiments, the second isolation material also includes nitride.

[0111] refer to Fig.12 , further comprising: forming a metal electrode 209 on the second initial epitaxial layer 202 , wherein the metal electrode 209 is electrically connected to the emitter region 204 , the base 206 and the collector 206 .

[0112] In this embodiment, the method for forming the metal electrode 209 includes: forming a seventh mask layer (not shown) on the second initial epitaxial layer 202, the second mask layer exposing the surfaces of the emitter region 204, the base 206 and the collector 206; forming a metal material layer (not shown) on the second mask layer, the metal material layer covering the surfaces of the emitter region 204, the base 206 and the collector 206; etching the metal material layer to form a metal electrode 209 on the surfaces of the emitter region 204, the base 206 and the collector 206.

[0113] In this embodiment, an epitaxial process is used to form a metal material layer on the second mask layer.

[0114] In this embodiment, the material of the metal electrode 209 is aluminum; in other embodiments, the material of the metal electrode 209 is copper, nickel, or tungsten.

[0115] Correspondingly, in an embodiment of the present invention, a semiconductor structure is also provided. Please continue to refer to Fig.12The semiconductor structure comprises: a substrate 100; a first epitaxial layer 102 having a first doping type, the first epitaxial layer 102 being located on the substrate 100; a plurality of pairs of superjunction structures, the superjunction structures being located in the first epitaxial layer 102, the superjunction structures comprising first pillars 104 having a second doping type and second pillars 106 having a first doping type, the first pillars 104 and the second pillars 106 being alternately connected and arranged in a horizontal direction; a second epitaxial layer having a first doping type, the second epitaxial layer being located on the first epitaxial layer 102; an implantation region 201 having a first doping type, the implantation region 201 being located in the first epitaxial layer 102; a plurality of pairs of superjunction structures, the superjunction structures being located in the first epitaxial layer 102, the superjunction structures comprising first pillars 104 having a second doping type and second pillars 106 having a first doping type, the first pillars 104 and the second pillars 106 being alternately connected and arranged in a horizontal direction; a second epitaxial layer having a first doping type, the second epitaxial layer being located on the first epitaxial layer 102; and a implantation region 201 having a first doping type, the implantation region 201 being located in the first epitaxial layer 102. In the second epitaxial layer, the doping concentration of the injection region 201 is greater than the doping concentration of the second epitaxial layer 200; a base region 203 with a second doping type is located in the second epitaxial layer; an emitter region 204 with a first doping type is located in the base region 203; a collector 205 with a first doping type is located in the second epitaxial layer away from the base region 203, the doping concentration of the collector 205 is greater than the doping concentration of the second epitaxial layer 202, and the injection region 201 is located between the base region 203 and the collector 205 in the horizontal direction.

[0116] In this embodiment, a buried layer 101 is further included. The buried layer 101 is located in the substrate 100 and has N-type doping ions.

[0117] In this embodiment, the first doping type is N-type doping, the doping ions of the N-type doping are N-type ions, and the N-type ions include phosphorus ions or arsenic ions; the second doping type is P-type doping, the doping ions of the P-type doping are P-type ions, and the P-type ions include boron ions or indium ions.

[0118] In this embodiment, the first column 104 and the second column 106 have the same depth.

[0119] In this embodiment, the doping concentrations of the first pillar 104 and the second pillar 106 are the same, and are both greater than the doping concentration of the first epitaxial layer 102 .

[0120] In this embodiment, the doping concentration of the first column 104 and the second column 106 is 1E15-4E15.

[0121] In this embodiment, the width of the first pillar 104 and the second pillar 106 is 0.4-0.6 micrometers.

[0122] In this embodiment, the second peripheral layer includes a first initial epitaxial layer 200 and a second initial epitaxial layer 202 , the injection region 201 is located in the first initial epitaxial layer 200 , and the base region 203 , the emitter region 204 and the collector 205 are located in the second initial epitaxial layer 202 .

[0123] In this embodiment, the doping concentration of the injection region 201 is greater than the doping concentration of the collector 205 , and the doping concentration of the injection region 201 is 1E16-4E16.

[0124] The thickness of the implantation region 201 is 0.2-0.3 micrometers.

[0125] In this embodiment, it also includes: a base 206 of a second doping type, the base 206 is located in the base region 203, the doping concentration of the base 206 is greater than the doping concentration of the base region 203, and the base 206 is spaced apart from the emitter region 204 in the horizontal direction.

[0126] In this embodiment, the first isolation structure 207 is further included. The first isolation structure 207 is located in the base region 203 . The first isolation structure 207 is located between the emitter region 204 and the base 206 .

[0127] In this embodiment, it also includes: a second isolation structure 208, which is located in the first epitaxial layer 102 and the second epitaxial layer, and the bottom of the second isolation structure 208 is higher than the bottom of the first epitaxial layer 102 and lower than the bottom of the second epitaxial layer.

[0128] In this embodiment, it also includes: a metal electrode 209 , which is located on the surfaces of the emitter region 204 , the base 206 and the collector 206 .

[0129] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that: include: providing a substrate; forming a first epitaxial layer having a first doping type on the substrate; forming a plurality of pairs of super junction structures in the first epitaxial layer, the super junction structures comprising first pillars having a second doping type and second pillars having a first doping type, the first pillars and the second pillars being alternately connected and arranged in a horizontal direction; forming a second epitaxial layer having a first doping type on the first epitaxial layer; forming an implantation region having a first doping type in the second epitaxial layer, wherein the doping concentration of the implantation region is greater than the doping concentration of the second epitaxial layer; forming a base region having a second doping type in the second epitaxial layer; forming an emitter region having a first doping type in the base region; A collector having a first doping type is formed in the second epitaxial layer away from the base region, wherein the doping concentration of the collector is greater than the doping concentration of the second epitaxial layer, and the implantation region is located between the base region and the collector in a horizontal direction.

2. The method for forming a semiconductor structure according to claim 1, wherein: The method for forming several pairs of super junction structures in the first epitaxial layer includes: etching the first epitaxial layer to form first grooves in the first epitaxial layer, the first grooves being spaced apart in a horizontal direction; forming first columns in the first grooves; etching the first epitaxial layer between adjacent first columns to form second grooves in the first epitaxial layer between the adjacent first columns; and forming second columns in the second grooves.

3. The method for forming a semiconductor structure according to claim 2, wherein: A first column is formed in the first trench by adopting a directional epitaxial process; and a second column is formed in the second trench by adopting a directional epitaxial process.

4. The method for forming a semiconductor structure according to claim 1, wherein: The method for forming the second epitaxial layer and the injection region comprises: forming a first initial epitaxial layer on the first epitaxial layer; performing ion implantation on the first initial epitaxial layer to form an injection region in the first initial epitaxial layer; forming a second initial epitaxial layer on the first initial epitaxial layer, wherein the first initial epitaxial layer and the second initial epitaxial layer constitute the second epitaxial layer.

5. The method for forming a semiconductor structure according to claim 1, wherein: The doping concentration of the implantation region is 1E16-4E16.

6. The method for forming a semiconductor structure according to claim 1, wherein: The thickness of the injection region is 0.2-0.3 micrometers.

7. The method for forming a semiconductor structure according to claim 1, wherein: Also includes: A base electrode with a second doping type is formed in the base region, the doping concentration of the base electrode is greater than the doping concentration of the base region, and the base electrode is spaced apart from the emitter region in a horizontal direction.

8. The method for forming a semiconductor structure according to claim 7, wherein: After forming the base, the method further includes: forming a first isolation structure in the base region, wherein the first isolation structure is located between the emitter region and the base.

9. The method for forming a semiconductor structure according to claim 8, wherein: The method for forming the first isolation structure in the base region comprises: etching the base region to form a first isolation trench between the base and the emitter region; and filling the first isolation trench with a first isolation material to form a first isolation structure.

10. The method for forming a semiconductor structure according to claim 9, wherein: The first isolation material includes polysilicon or silicon dioxide.

11. The method for forming a semiconductor structure according to claim 1, wherein: The first doping type is N-type doping; the second doping type is P-type doping.

12. The method for forming a semiconductor structure according to claim 11, wherein: The doping ions of the N-type doping are N-type ions, and the N-type ions include phosphorus ions or arsenic ions; the doping ions of the P-type doping are P-type ions, and the P-type ions include boron ions or indium ions.

13. A semiconductor structure, characterized in that: include: substrate; a first epitaxial layer having a first doping type, the first epitaxial layer being located on the substrate; A plurality of pairs of super junction structures, the super junction structures being located in the first epitaxial layer, the super junction structures comprising first pillars having a second doping type and second pillars having a first doping type, the first pillars and the second pillars being alternately connected and arranged in a horizontal direction; A second epitaxial layer having a first doping type, the second epitaxial layer being located on the first epitaxial layer; an implantation region having the first doping type, the implantation region being located in the second epitaxial layer, the doping concentration of the implantation region being greater than the doping concentration of the second epitaxial layer; a base region having a second doping type, the base region being located in the second epitaxial layer; an emitter region having a first doping type, the emitter region being located in the base region; A collector having a first doping type is located in the second epitaxial layer away from the base region, the doping concentration of the collector is greater than the doping concentration of the second epitaxial layer, and the injection region is located between the base region and the collector in a horizontal direction.

14. The semiconductor structure according to claim 13, wherein: The doping concentration of the implantation region is 1E16-4E16.

15. The semiconductor structure according to claim 13, wherein: The thickness of the injection region is 0.2-0.3 micrometers.

16. The semiconductor structure according to claim 13, wherein: Also includes: A base electrode having a second doping type is located in the base region, the doping concentration of the base electrode is greater than the doping concentration of the base region, and the base electrode is spaced apart from the emitter region in a horizontal direction.

17. The semiconductor structure according to claim 16, wherein: Also includes: A first isolation structure is located in the base region and between the emitter region and the base.

18. The semiconductor structure according to claim 13, wherein: The first doping type is N-type doping; the second doping type is P-type doping.

19. The semiconductor structure according to claim 18, wherein: The doping ions of the N-type doping are N-type ions, and the N-type ions include phosphorus ions or arsenic ions; the doping ions of the P-type doping are P-type ions, and the P-type ions include boron ions or indium ions.

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