Method of fabricating light emitting diode with wet etched p-electrode

By wet etching the P-electrode of AlGaN-based deep ultraviolet light-emitting diodes, the problems of high photon absorption and insufficient ohmic contact characteristics were solved, achieving a high-efficiency balance between optical and electrical performance and improving the optical and electrical properties of the device.

CN119342949BActive Publication Date: 2025-11-18HEBEI UNIV OF TECH
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Patent Information

Application Number
CN202411545306.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-11-01
Publication Date
2025-11-18
Estimated Expiration
2044-11-01

AI Technical Summary

Technical Problem

The P-electrode of AlGaN-based deep ultraviolet light-emitting diodes has a high photon absorption rate, resulting in low external quantum efficiency. Furthermore, traditional improvement methods sacrifice ohmic contact characteristics, affecting device reliability.

Method used

Wet etching technology is used to process the Ni/Au P electrode that has formed good ohmic contact, reducing the thickness of the Au layer to reduce photon absorption while retaining good ohmic contact characteristics. The Au layer is etched by using Au etchant to form a P electrode with high reflectivity.

Benefits of technology

The photon transmittance and ohmic contact characteristics of the P electrode were improved, significantly enhancing the optical and electrical properties of the device. The transmittance was increased by 31%, and the LOP and WPE were increased by 10.24% and 9.89% respectively, without affecting the device reliability.

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Abstract

The application is a preparation method of light emitting diode with wet etching P electrode. The method is based on the preparation method of flip-chip structure DUV LED, and the Ni / Au with good ohmic contact is processed by using wet etching technology, that is, after growing Ni, Au is grown again, after obtaining Ni / Au, annealing treatment is carried out, and then, the thick Au is etched, a part of Au of the particles formed by original Au and Ni is removed, the gap between the particles is increased, and the Au is thinned, the absorption of light is reduced, more photons can be reflected by the metal mirror through the gap, and the transmittance is increased. The application overcomes the problem that the P electrode in the prior art cannot simultaneously consider the good ohmic contact characteristic and high transmittance.
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Description

Technical Field

[0001] The technical solution of the present invention relates to the field of semiconductor light-emitting devices, specifically a method for fabricating a light-emitting diode with a wet-etched P-electrode. Background Technology

[0002] Compared to traditional mercury lamps, AlGaN-based deep ultraviolet light-emitting diodes (DUV LEDs) have advantages such as high efficiency, energy saving, and environmental friendliness, and have broad application prospects in sterilization, disinfection, biological detection, wastewater purification, and optical storage.

[0003] Although AlGaN-based DUV LEDs have achieved multiple breakthroughs in optoelectronic performance over the past few decades, they still suffer from lower external quantum efficiency (EQE) compared to InGaN-based blue LEDs. Low light extraction efficiency (LEE) is one of the main reasons limiting high EQE. This is primarily due to the absorption of the p-electrode and its p-type contact layer. While traditional p-electrode Ni / Au metal possesses excellent ohmic contact characteristics, it exhibits only about 30% reflectivity for deep ultraviolet photons, resulting in high absorption. To address this issue, highly reflective p-electrodes can be used to reduce photon absorption, such as Ni / Al [10.1002 / pssa.201700435, Improving the Efficiency of AlGaN Deep‐UVLEDs by Using Highly Reflective Ni / Al p‐Type Electrodes]. In this technology, Ni / Al electrodes are directly stacked on the p-type contact layer, and the high reflectivity is achieved by optimizing the thickness of the Ni layer. However, this method comes at the cost of sacrificing excellent ohmic contact characteristics compared to Ni / Au, resulting in a significant increase in forward voltage that could affect device reliability.

[0004] Therefore, modifying the traditional P-type electrode Ni / Au is undoubtedly a more efficient and economical method. This is mainly because it can not only retain the good ohmic contact characteristics between Ni / Au and the P-type contact layer, but also increase its transmittance and improve optical properties. Summary of the Invention

[0005] The purpose of this invention is to address the shortcomings of current technologies by providing a method for fabricating a light-emitting diode (LED) with a P-electrode using wet etching. This method, in addition to the fabrication of flip-chip DUV LEDs, employs wet etching technology to treat the Ni / Au layer that has already formed a good ohmic contact. Specifically, it uses an Au etchant to etch the Au layer, thereby reducing the absorption of deep ultraviolet photons by the Au layer. This invention overcomes the problem in existing technologies where the P-electrode cannot simultaneously achieve good ohmic contact characteristics and high transmittance.

[0006] The technical solution of this invention is:

[0007] A method for fabricating a light-emitting diode device with a wet-etched P-electrode, the method comprising the following steps:

[0008] The first step, epitaxial growth:

[0009] First, the substrate is baked at 950℃~1350℃ in an MOCVD furnace to remove foreign matter from the substrate surface. Then, a buffer layer, an N-type semiconductor transport layer, a multiple quantum well layer, a P-type electron blocking layer, and a P-type semiconductor transport layer are grown respectively.

[0010] The second step is dry etching of the steps:

[0011] On the epitaxial wafer obtained in the first step, photolithography is used to make the photoresist into a mesa shape and use it as a mask. Dry etching is used to etch the part that is not covered by the photoresist, thereby exposing the N-type semiconductor transport layer.

[0012] The third step is to fabricate the N-type ohmic electrode:

[0013] On the N-type semiconductor transport layer obtained in the second step, the N-type ohmic electrode pattern is exposed by photolithography. The N-type ohmic electrode is fabricated by evaporation and lift-off processes and then subjected to rapid thermal annealing in a suitable gas atmosphere and temperature.

[0014] Step 4: Fabricate the P-type ohmic electrode:

[0015] On the P-type semiconductor transport layer of the DUV LED epitaxial wafer, the P-type ohmic electrode pattern is exposed by photolithography. The P-type ohmic electrode is fabricated by evaporation and lift-off processes and then subjected to rapid thermal annealing in a suitable gas atmosphere and temperature.

[0016] Step 5: Wet etching of the P-type ohmic electrode:

[0017] On the P-type ohmic electrode obtained in step four, the metal surface is cleaned with deionized water, and then a layer of photoresist is spin-coated. The pattern of the P-type ohmic electrode on the photomask is transferred to the epitaxial wafer using a photolithography machine, protecting the part except for the P-type ohmic electrode. Then, the epitaxial wafer is immersed in Au etching solution for wet etching. After etching, the epitaxial wafer is removed for cleaning and drying. The etching time is 1 to 20 minutes.

[0018] The Au etching solution comprises a mixture of 2-6 wt% KI, 2-6 wt% I2, and 1-6 ppm chloride, 1-6 ppm sulfate, and 1-5 ppm phosphate, forming a nitrated acid mixture.

[0019] The chloride mentioned is specifically copper chloride;

[0020] The sulfates mentioned are specifically calcium sulfate and aluminum sulfate;

[0021] The phosphates mentioned are specifically potassium phosphate and nickel phosphate;

[0022] Step 6: Fabricate a high-reflectivity electrode:

[0023] On the wet-etched P-type ohmic electrode obtained in step 5, a mirror pattern is obtained by photolithography, and a metal with high reflectivity is deposited as a metal mirror using evaporation and lift-off processes.

[0024] This process yields a light-emitting diode device with a wet-etched P-electrode.

[0025] The substrate is a sapphire substrate, a silicon carbide (SiC) substrate, a gallium nitride (GaN) substrate, or an aluminum nitride (AlN) substrate;

[0026] The buffer layer is AlN with a thickness of 1–5 μm;

[0027] The N-type semiconductor transport layer is Al x1 Ga 1-x1 N, where the coefficients of each component should be 0≤x1≤1, 0≤1-x1≤1, and the thickness should be 1~5 μm;

[0028] The multi-quantum well layer is made of Al x2 Ga 1-x2 N / Al x3 Ga 1-x3 N is composed of the following formulas: 0≤x2≤1, 0≤1-x2≤1, 0≤x3≤1, 0≤1-x3≤1. The band gap of the quantum barrier should be higher than the band gap of the quantum well. The number of quantum wells is greater than or equal to 1. Quantum well Al x2 Ga 1-x2 The thickness of N is 1–20 nm, and the quantum barrier Alx3 Ga 1-x3 The thickness of N is 5–50 nm;

[0029] The material of the P-type electron blocking layer is Al. x4 Ga 1-x4 N, where 0≤x4≤1, 0≤1-x4≤1, and the thickness is 10~300 nm;

[0030] The material of the P-type semiconductor transport layer is Al. x5 Ga 1-x5 N, where 0≤x5≤1, 0≤1-x5≤1, and the thickness is 0.1~1 μm.

[0031] The N-type ohmic electrode is Ti / Al / Ti / Au, Al / Au, or Cr / Au, wherein the projected area of ​​the N-type ohmic electrode is 5% to 100% of the area of ​​the exposed N-type semiconductor transport layer.

[0032] The P-type ohmic electrode is composed of Ni metal and Au metal stacked one on top of the other, wherein the projected area of ​​the P-type ohmic electrode is 5% to 100% of the area of ​​the exposed P-type semiconductor transport layer.

[0033] The high reflectivity metal is Al, with a thickness of 100–900 nm.

[0034] The resulting light-emitting diode with a wet-etched P-electrode comprises, from bottom to top, a substrate, a buffer layer, and an N-type semiconductor transport layer. The N-type semiconductor transport layer consists of two layers: a lower layer completely covers the buffer layer, and the area of ​​the upper layer is 5-90% of the area of ​​the lower layer. The thickness of the lower layer is 5-95% of the thickness of the N-type semiconductor transport layer.

[0035] The upper part of the N-type semiconductor transport layer consists of, from bottom to top, a multi-quantum well layer, a P-type electron blocking layer, a P-type semiconductor transport layer, a P-type ohmic electrode, and a metal mirror;

[0036] N-type ohmic electrodes are also distributed on the exposed portion of the lower layer of the N-type semiconductor transport layer;

[0037] The P-type ohmic electrode consists of a Ni metal electrode layer and an etched Au electrode layer from bottom to top; the thickness of the Ni metal layer is 3~50 nm; and the thickness of the Au layer after etching with Au etching solution is 0~50 nm.

[0038] The above-mentioned method for fabricating a light-emitting diode device with a wet-etched P-electrode involves raw materials, equipment, and processes that are well known in this technical field.

[0039] The essential features of this invention are:

[0040] In traditional p-type ohmic electrodes made of Ni and Au metals, during the annealing process, Ni reacts with O2 to form NiOx, while Au atoms diffuse uniformly to the interface between NiOx and the p-type semiconductor transport layer, forming metal clusters with specific geometries. This diffusion process also generates gallium vacancies, increasing the surface hole concentration and promoting good ohmic contact. It is precisely this annealing characteristic of Ni / Au that makes a thicker Au layer more conducive to gallium vacancy generation; a thinner Au layer generates fewer gallium vacancies, resulting in poorer ohmic contact. However, a thicker Au layer causes severe absorption of ultraviolet photons, leading to reduced light extraction efficiency.

[0041] In this invention, Ni is grown first, followed by Au to obtain a Ni / Au layer, which is then annealed (i.e., rapid thermal annealing at 550°C). During annealing, Ni and Au melt and aggregate to form particles, which create good ohmic contacts. Therefore, a thicker Au layer allows for more contact between Au and the P-type semiconductor transport layer. During this contact process, gallium vacancies are generated in the P-type semiconductor transport layer, ensuring an increased surface hole concentration and leveraging the advantages of good electrical performance in current technology. To address the severe light absorption issue caused by thick Au layers, Au etching is performed to remove a portion of the Au from the Ni / Au particles. This increases the gaps between the particles. More importantly, as the Au layer thins, light absorption decreases, allowing more photons to pass through the gaps and be reflected by the metal mirror, increasing transmittance and thus improving the optical performance of the Ni / Au layer.

[0042] The beneficial effects of this invention are:

[0043] (1) Compared with traditional structures, the main feature of the light-emitting diode device with wet-etched P-electrode in this invention is that it seeks the best balance between excellent electrical and optical properties, which not only improves the transmittance of the P-type ohmic electrode to photons, but also retains good ohmic contact characteristics. The strong absorption of deep ultraviolet photons greatly increases the probability of them entering the escape cone, significantly improving the optical properties of the device. According to calculations, when the thickness of the Au layer in Ni / Au is reduced from 6 nm to 0 nm, the transmittance of deep ultraviolet photons with a wavelength of 275 nm can be increased by 31%. In addition, under the same injection current, the device after wet etching treatment improves the LOP and WPE by 10.24% and 9.89% respectively compared with the untreated device. According to the 1000-h reliability test of the device, the device after wet etching treatment does not affect the reliability.

[0044] (2) The light-emitting diode device with wet etching P electrode in this invention has a simple manufacturing process, is easy to operate, has strong repeatability, and has low production cost. Attached Figure Description

[0045] The invention will now be further described with reference to the accompanying drawings.

[0046] Figure 1 This is a schematic diagram of the standard light-emitting diode device obtained in Example 1;

[0047] Figure 2 This is a schematic diagram of the light-emitting diode device with a wet-etched P-electrode obtained in Example 2.

[0048] Figure 3 This is a schematic diagram of the epitaxial structure of the DUV LEDs in Example 2;

[0049] Figure 4 This is a schematic diagram of the step fabrication process performed on the epitaxial wafer of DUV LEDs using photolithography and dry etching in Example 2.

[0050] Figure 5 This is a schematic diagram of the fabrication of an N-type ohmic electrode on a stepped epitaxial wafer using photolithography, vapor deposition, and lift-off processes in Example 2.

[0051] Figure 6 This is a schematic diagram of the fabrication of a P-type ohmic electrode on an epitaxial wafer with an N-type ohmic electrode in Example 2, involving photolithography, evaporation, and lift-off processes.

[0052] Figure 7 This is a schematic diagram of wet etching on an epitaxial wafer with a P-type ohmic electrode in Example 2;

[0053] Figure 8 This is a schematic flowchart illustrating the basic process of the method of the present invention.

[0054] Figure 9 This is a graph showing the relationship between the transmittance of different Au layer thicknesses in a P-type ohmic electrode and different incident light wavelengths.

[0055] Figure 10 The graph shows the relationship between the LOP (Level of Shift) of the flip-chip LED obtained in Examples 1 and 2 and the injected current.

[0056] Figure 11 The graph shows the relationship between the WPE of the flip-chip LED obtained in Examples 1 and 2 and the injection current.

[0057] Figure 12 The graph shows the relationship between the relative optical power of the flip-chip LEDs obtained in Examples 1 and 2 and the aging time.

[0058] Among them, 101. substrate, 102. buffer layer, 103. N-type semiconductor transport layer, 104. multiple quantum well layer, 105. P-type electron blocking layer, 106. P-type semiconductor transport layer, 107. N-type ohmic electrode, P-type ohmic electrode (108. Ni, 109. Au), 110. metal mirror. Detailed Implementation

[0059] The present invention will be further described below with reference to embodiments and accompanying drawings, but this should not be construed as limiting the scope of protection of the claims of this application.

[0060] Figure 1 The schematic diagram of the device structure under the standard process flow of Embodiment 1 is shown. It includes, along the epitaxial growth direction, the following components in sequence: substrate 101, buffer layer 102, N-type semiconductor transport layer 103, multiple quantum well layer 104, P-type current blocking layer 105, P-type semiconductor transport layer 106, N-type ohmic electrode 107, P-type ohmic electrode (Ni 108, Au 109) and metal reflector 110.

[0061] Figure 2 The diagram shows a light-emitting diode device with a wet-etched P-electrode obtained in Embodiment 2. It includes, along the epitaxial growth direction, a substrate 101, a buffer layer 102, an N-type semiconductor transport layer 103, a multiple quantum well layer 104, a P-type current blocking layer 105, a P-type semiconductor transport layer 106, an N-type ohmic electrode 107, a P-type ohmic electrode (Ni 108, etched Au 109), and a metal reflector 110.

[0062] Figure 3 Example 2 shows an epitaxial wafer structure grown on a substrate 101, which includes, in sequence along the epitaxial growth direction: substrate 101, buffer layer 102, N-type semiconductor transport layer 103, multiple quantum well layer 104, P-type current blocking layer 105, and P-type semiconductor transport layer 106.

[0063] Figure 4 Example 2 shows a photoresist layer spin-coated on an epitaxial wafer, and steps are created by photolithography and dry etching techniques to expose the N-type semiconductor transport layer 103.

[0064] Figure 5 Example 2 shows the fabrication of an N-type ohmic electrode 107 on an N-type semiconductor transport layer 103 using photolithography, vapor deposition, and lift-off processes.

[0065] Figure 6 Example 2 shows the fabrication of a P-type ohmic electrode (Ni 108, Au 109) on a P-type semiconductor transport layer 103 using photolithography, evaporation, and lift-off processes.

[0066] Figure 7 Example 2 shows a wet etching process using Au etching solution on an epitaxial wafer with a deposited P-type ohmic electrode.

[0067] Figure 8 The illustrated embodiments show that the basic process of the present invention is as follows: growing an epitaxial wafer using MOCVD technology → creating steps using photolithography and dry etching technology → fabricating an N-type ohmic electrode and annealing it using photolithography, evaporation, and lift-off processes → fabricating a P-type ohmic electrode and annealing it using photolithography, evaporation, and lift-off processes → removing the Au layer in the P-type ohmic electrode using Au etching solution → depositing a reflector on the wet-etched P-type ohmic electrode using photolithography, evaporation, and lift-off processes.

[0068] Example 1

[0069] The standard light-emitting diode device fabrication method of this embodiment includes the following steps:

[0070] The first step, epitaxial growth:

[0071] In an MOCVD furnace, a circular sapphire substrate 101 is baked at 1300℃ to remove foreign matter from its surface. Then, an AlN buffer layer 102 is grown. N-type Al... 0.60 Ga 0.40 N semiconductor transport layer 103; 5 pairs of Al 0.45 Ga 0.55 N / Al 0.56 Ga 0.44 N multiple quantum well layers 104; P-type Al 0.60 Ga 0.40 N-electron blocking layer 105; P-type Al 0.43 Ga 0.57 N-semiconductor transport layer 106;

[0072] The second step is dry etching of the steps:

[0073] On the DUV LED epitaxial wafer obtained in the first step, a layer of photoresist is spin-coated. The photoresist is then fabricated into a mesa shape using photolithography and used as a mask. The areas not covered by the photoresist are etched away using inductively coupled plasma dry etching, thereby exposing the N-type Al. 0.60 Ga 0.40 N-semiconductor transport layer 103, N-type Al that was not etched away 0.60 Ga 0.40 The thickness of the N semiconductor transport layer 103 is 400 nm;

[0074] The third step is to fabricate the N-type ohmic electrode:

[0075] On the DUV LED epitaxial wafer obtained in the second step, a layer of photoresist is spin-coated, and the pattern of the N-type ohmic electrodes on the mask is transferred to the exposed N-type Al using a photolithography machine. 0.60 Ga 0.40 The N-type semiconductor transport layer 103 is fabricated by thermally depositing a Ti / Al / Ti / Au multilayer film on an epitaxial wafer, followed by partially stripping the metal by removing photoresist to create a Ti / Al / Ti / Au N-type ohmic electrode 107 with a thickness of 20 / 30 / 60 / 100 nm. The electrode is then annealed for 60 seconds in a rapid annealing furnace at 650°C in an N2 environment. The projected area of ​​the N-type ohmic electrode is 80% of the area of ​​the exposed N-type semiconductor transport layer.

[0076] Step 4: Fabricate the P-type ohmic electrode:

[0077] On the DUV LED epitaxial wafer obtained in the third step, a layer of photoresist is spin-coated. The pattern of the P-type ohmic electrode on the photomask is transferred to the P-type Al0.43Ga0.57N semiconductor transport layer 106 using a photolithography machine. Two layers of Ni metal and Au metal are thermally deposited on the epitaxial wafer, with thicknesses of 5 nm and 6 nm, respectively. The P-type ohmic electrode (Ni 108, Au 109) is fabricated by removing part of the metal by removing the photoresist. Then, it is continuously annealed in a dry air environment at 550°C for 360 seconds using a rapid annealing furnace.

[0078] Step 5: Fabricate a high-reflectivity electrode:

[0079] On the P-type ohmic electrode (Ni 108, Au 109) obtained in the fourth step, a layer of photoresist is spin-coated. The pattern of the metal mirror on the mask is transferred to the N-type ohmic electrode 107 and the P-type ohmic electrode (Ni 108, Au 109) using a photolithography machine. After thermally evaporating an Al film on the epitaxial wafer, part of the metal is peeled off by removing the photoresist to fabricate the metal mirror 110 with a thickness of 200 nm.

[0080] This process yields a standard flip-chip LED.

[0081] Example 2

[0082] The light-emitting diode device with a wet-etched P-electrode in this embodiment is fabricated as follows:

[0083] The first step, epitaxial growth:

[0084] In an MOCVD furnace, a circular sapphire substrate 101 was baked at 1300℃ for 20 min to remove foreign matter from its surface. Then, an AlN buffer layer 102 with a thickness of 2 μm was grown. 0.60 Ga 0.40 N-semiconductor transport layer 103, 1 μm thick; 5 pairs of Al 0.45 Ga 0.55 N / Al 0.56 Ga 0.44 N quantum well layers 104, with a thickness of 75 nm, in which Al 0.45 Ga 0.55 The thickness of N is 3 nm, and Al 0.56 Ga 0.44 The thickness of N is 12 nm; P-type Al 0.60 Ga 0.40 N-electron blocking layer 105, 20 nm thick; p-type Al 0.43 Ga 0.57 The N-semiconductor transport layer is 106 with a thickness of 175 nm;

[0085] The second step is dry etching of the steps:

[0086] On the DUV LED epitaxial wafer obtained in the first step, a layer of photoresist is spin-coated. The photoresist is then fabricated into a mesa shape using photolithography and used as a mask. The areas not covered by the photoresist are etched away using inductively coupled plasma dry etching, thereby exposing the N-type Al. 0.60 Ga 0.40 N-semiconductor transport layer 103, N-type Al that was not etched away 0.60 Ga 0.40 The thickness of the N-semiconductor transport layer 103 is 400 nm; of which, the etched area is 40% of the total area of ​​103.

[0087] The third step is to fabricate the N-type ohmic electrode:

[0088] On the DUV LED epitaxial wafer obtained in the second step, a layer of photoresist is spin-coated, and the pattern of the N-type ohmic electrodes on the mask is transferred to the exposed N-type Al using a photolithography machine. 0.60 Ga 0.40 The N-type semiconductor transport layer 103 is fabricated by thermally depositing a Ti / Al / Ti / Au multilayer film on an epitaxial wafer, followed by partially stripping the metal by removing photoresist to create a Ti / Al / Ti / Au N-type ohmic electrode 107 with a thickness of 20 / 30 / 60 / 100 nm. The electrode is then annealed for 60 seconds in a rapid annealing furnace at 650°C in an N2 environment. The projected area of ​​the N-type ohmic electrode is 80% of the area of ​​the exposed N-type semiconductor transport layer.

[0089] Step 4: Fabricate the P-type ohmic electrode:

[0090] On the DUV LED epitaxial wafer obtained in the third step, a layer of photoresist is spin-coated, and the pattern of the P-type ohmic electrode on the mask is transferred to the P-type Al using a photolithography machine. 0.43 Ga 0.57 The N semiconductor transport layer 106 is formed by thermally depositing two layers of Ni metal and Au metal on the epitaxial wafer, with thicknesses of 5 nm and 6 nm, respectively. A portion of the metal is stripped off by removing the photoresist to fabricate a P-type ohmic electrode (Ni 108, Au 109). Then, it is continuously annealed in a dry air environment at 550°C for 360 seconds using a rapid annealing furnace.

[0091] Step 5: Wet etching of the P-type ohmic electrode:

[0092] On the P-type ohmic electrodes (Ni 108, Au 109) obtained in step four, the metal surface was cleaned with deionized water, and a layer of photoresist was spin-coated. The pattern of the P-type ohmic electrodes on the photomask was transferred to the epitaxial wafer using a photolithography machine, protecting the portion except for the P-type ohmic electrodes. The epitaxial wafer was then immersed in an Au etching solution for wet etching. The Au etching solution was a mixture of 4 wt% KI, 4.5 wt% I2, and nitrifying acid consisting of 3 ppm chloride, 3 ppm sulfate, and 2 ppm phosphate. The pH of the solution was less than 6. The chloride was 3 ppm copper chloride, the sulfates were 3 ppm calcium sulfate and 3 ppm aluminum sulfate, and the phosphates were 2 ppm potassium phosphate and 2 ppm nickel phosphate. The etching time was 10 min. After etching, the thickness of Au 109 was reduced to 0 nm. After etching, the epitaxial wafer was removed and rinsed with deionized water for 3 minutes. The etching solution and impurities are removed by a process involving N2 rinsing and drying.

[0093] Step 6: Fabricate a high-reflectivity electrode:

[0094] On the P-type ohmic electrode (Ni 108, Au 109) obtained in step 5, a layer of photoresist is spin-coated. The pattern of the metal mirror on the mask is transferred to the N-type ohmic electrode 107 and the P-type ohmic electrode (Ni 108, Au 109) using a photolithography machine. After thermally evaporating an Al film on the epitaxial wafer, part of the metal is peeled off by removing the photoresist to fabricate the metal mirror 110 with a thickness of 200 nm.

[0095] This process yields a light-emitting diode device with a wet-etched P-electrode.

[0096] Figure 9The curves shown illustrate the linear relationship between the transmittance of a P-type ohmic electrode (Ni / Au) and the Au layer thickness before and after treatment with Au etching solution, simulated using FDTD software. When the Au layer was set to 6 nm and 0 nm, the transmittance of the P-type ohmic electrode was 35% and 46%, respectively, an increase of 31%. This is because the thinning of Au reduces the absorption of photons.

[0097] Figure 10 The figure shows the optical power (LOP) curves of the flip-chip LEDs obtained in Examples 1 and 2, measured at room temperature using an integrating sphere under a current injection range of 0–300 mA, with measurements taken every 20 mA. The curves indicate that the LOP of the flip-chip LEDs obtained in Examples 1 and 2 was significantly improved due to the wet etching process. At an injection current of 100 mA, the LOPs of the standard device and the etched device were 16.21 mW and 17.89 mW, respectively, representing an improvement of 10.24%.

[0098] Figure 11 The figure shows the WPE versus injection current curve obtained by dividing the optical power and voltage-current curves collected at room temperature from the flip-chip LEDs obtained in Examples 1 and 2. This curve shows that the wet etching process significantly improved the WPE of the flip-chip LEDs obtained in Examples 1 and 2. At an injection current of 100 mA, the WPE of the standard device and the etched device were 2.73% and 3.02%, respectively, representing an improvement of 10.62%.

[0099] Figure 12 The figure shows a flip-chip LED obtained in Examples 1 and 2 that has been continuously lit for 1000 hours at room temperature using an injection current of 40 mA. The curve indicates that the relative optical power of the LED device with a wet-etched P-electrode is similar to that of a standard LED device. This is mainly because the wet-etching of the P-electrode does not affect the reliability of the LED device.

[0100] The above embodiments achieve the following: the P-type ohmic electrode treated with Au etching solution not only retains the ohmic contact characteristics of Ni / Au, but also significantly increases its transmittance, reduces photon absorption by the P-type ohmic electrode, and allows more photons to be reflected by the top metal mirror and re-enter the escape cone of the DUV LED, thereby greatly improving the LED light extraction efficiency. Furthermore, wet etching does not reduce device reliability. The method of this invention has a simple fabrication process, high repeatability, low production cost, and is easy to operate.

[0101] Matters not covered in this invention are common knowledge.

Claims

1. A method for fabricating a light-emitting diode device with a wet-etched P-electrode, Its characteristic is that the method includes the following steps: The first step, epitaxial growth: First, the substrate is baked at 950℃~1350℃ in an MOCVD furnace to remove foreign matter from the substrate surface. Then, a buffer layer, an N-type semiconductor transport layer, a multiple quantum well layer, a P-type electron blocking layer, and a P-type semiconductor transport layer are grown respectively. The second step is dry etching of the steps: On the epitaxial wafer obtained in the first step, photolithography is used to make the photoresist into a mesa shape and use it as a mask. Dry etching is used to etch the part that is not covered by the photoresist, thereby exposing the N-type semiconductor transport layer. The third step is to fabricate the N-type ohmic electrode: On the N-type semiconductor transport layer obtained in the second step, the N-type ohmic electrode pattern is exposed by photolithography. The N-type ohmic electrode is fabricated by vapor deposition and lift-off processes, followed by thermal annealing. Step 4: Fabricate the P-type ohmic electrode: On the P-type semiconductor transport layer of the DUV LED epitaxial wafer, the P-type ohmic electrode pattern is exposed by photolithography. The P-type ohmic electrode is fabricated by evaporation and lift-off processes and then thermally annealed in a suitable gas atmosphere and temperature. Step 5: Wet etching of the P-type ohmic electrode: On the P-type ohmic electrode obtained in step four, the metal surface is cleaned with deionized water, and then a layer of photoresist is spin-coated. The pattern of the P-type ohmic electrode on the photomask is transferred to the epitaxial wafer using a photolithography machine, protecting the part except for the P-type ohmic electrode. Then, the epitaxial wafer is immersed in Au etching solution for wet etching. After etching, the epitaxial wafer is removed for cleaning and drying. The etching time is 1 to 20 minutes. The Au etching solution comprises a mixture of 2-6 wt% KI, 2-6 wt% I2, and 1-5 ppm chloride, 1-6 ppm sulfate, and 1-6 ppm phosphate, forming a nitrated acid mixture. The chloride mentioned is specifically copper chloride; The sulfates mentioned are specifically calcium sulfate and aluminum sulfate; The phosphates mentioned are specifically potassium phosphate and nickel phosphate; Step 6: Fabricate a high-reflectivity electrode: On the wet-etched P-type ohmic electrode obtained in step 5, a mirror pattern is obtained by photolithography, and a metal with high reflectivity is deposited as a metal mirror using evaporation and lift-off processes. This process yields a light-emitting diode device with a wet-etched P-electrode.

2. The method for fabricating a light-emitting diode device with a wet-etched P-electrode as described in claim 1, characterized in that: The substrate is a sapphire substrate, a silicon carbide (SiC) substrate, a gallium nitride (GaN) substrate, or an aluminum nitride (AlN) substrate; The buffer layer is AlN with a thickness of 1–5 μm; The N-type semiconductor transport layer is Al x1 Ga 1-x1 N, where the coefficients of each component should be 0≤x1≤1, 0≤1-x1≤1, and the thickness should be 1~5 μm; The multi-quantum well layer is made of Al x2 Ga 1-x2 N / Al x3 Ga 1-x3 N is composed of the following formulas: 0≤x2≤1, 0≤1-x2≤1, 0≤x3≤1, 0≤1-x3≤1. The band gap of the quantum barrier should be higher than the band gap of the quantum well. The number of quantum wells is greater than or equal to 1. Quantum well Al x2 Ga 1-x2 The thickness of N is 1–20 nm, and the quantum barrier Al x3 Ga 1-x3 The thickness of N is 5–50 nm; The material of the P-type electron blocking layer is Al. x4 Ga 1-x4 N, where 0≤x4≤1, 0≤1-x4≤1, and the thickness is 10~300 nm; The material of the P-type semiconductor transport layer is Al. x5 Ga 1-x5 N, where 0≤x5≤1, 0≤1-x5≤1, and the thickness is 0.1~1 μm; The high reflectivity metal is Al, with a thickness of 100–900 nm.

3. The method for fabricating a light-emitting diode device with a wet-etched P-electrode as described in claim 1, characterized in that the N-type ohmic electrode is Ti / Al / Ti / Au, Al / Au, or Cr / Au, wherein, The projected area of ​​the N-type ohmic electrode is 5% to 100% of the area of ​​the exposed N-type semiconductor transport layer.

4. The method for fabricating a light-emitting diode device with a wet-etched P-electrode as described in claim 1, characterized in that: The P-type ohmic electrode is composed of Ni metal and Au metal stacked one on top of the other. The projected area of ​​the P-type ohmic electrode is 5% to 100% of the area of ​​the exposed P-type semiconductor transport layer. The thickness of the Ni metal before etching is 3 to 50 nm, and the thickness of the Au metal before etching is 2 to 60 nm.

5. The method for fabricating a light-emitting diode device with a wet-etched P-electrode as described in claim 1, characterized in that the resulting light-emitting diode with a wet-etched P-electrode comprises, from bottom to top, a substrate, a buffer layer, and an N-type semiconductor transport layer; wherein, The N-type semiconductor transport layer consists of two layers, a lower layer that completely covers the buffer layer, and an upper layer whose area is 5-90% of the area of ​​the lower layer; the thickness of the lower layer is 5-95% of the thickness of the N-type semiconductor transport layer. The upper part of the N-type semiconductor transport layer consists of, from bottom to top, a multi-quantum well layer, a P-type electron blocking layer, a P-type semiconductor transport layer, a P-type ohmic electrode, and a metal mirror; N-type ohmic electrodes are also distributed on the exposed portion of the lower layer of the N-type semiconductor transport layer.

6. The method for fabricating a light-emitting diode device with a wet-etched P-electrode as described in claim 1, characterized in that the P-type ohmic electrode consists of a Ni metal electrode layer and an etched Au electrode layer from bottom to top; the thickness of the Ni metal layer is 3~50 nm; and the thickness of the Au layer after etching with Au etching solution is 0~50 nm.

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