Silicon carbide thyristor based on external electrode turn-off extraction structure and preparation method thereof

Abstract

The application relates to a silicon carbide thyristor based on an external electrode turn-off extraction structure and a preparation method thereof, which comprises the following steps: sequentially stacking an N-type 4H-SiC substrate, a P-type 4H-SiC buffer layer, a P-type 4H-SiC drift layer and an N-type 4H-SiC gate layer from bottom to top; arranging a groove in the N-type 4H-SiC gate layer and the P-type 4H-SiC drift layer; and arranging a P-type 4H-SiC anode region, a first ohmic contact layer, a passivation layer, an etching corner protection region, a P-type 4H-SiC extraction region, an N-type 4H-SiC heavily doped region, a second ohmic contact layer and an Al contact layer. The first ohmic contact layer arranged on the P-type 4H-SiC extraction region serves as an external control electrode for controlling the drift layer and the buffer layer. By introducing the external control electrode, the thyristor is beneficial to fast switching in a switching or pulse working state, and the working frequency of the thyristor is improved.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor technology, specifically relating to a silicon carbide thyristor based on an external electrode turn-off extraction structure and its fabrication method. Background Technology

[0002] With societal development demanding new energy sources and sustainable development, numerous new requirements have emerged for power electronic equipment. In particular, the increasing emphasis on energy conservation in power transmission systems, such as high-voltage direct current (HVDC) transmission technology, necessitates control devices with robust high-voltage, high-power load-bearing capacity. Furthermore, the development of electric traction technology in the new energy vehicle sector has created a demand for power devices. Traditional device materials and structures also need to evolve in line with technological advancements.

[0003] Silicon carbide is a widely studied new material with advantages that traditional materials cannot match, such as excellent thermal conductivity and high saturated carrier mobility. These properties enable devices to perform better under high temperature and high pressure conditions. Applying silicon carbide to the thyristor device structure allows for greater voltage and current carrying capacity in a smaller size. In traditional structures, the device transports carriers by injecting gate current and then establishes conduction through a positive feedback mechanism.

[0004] However, traditional thyristors, such as Figure 1 As shown, the turn-off capability and turn-off time of the device have been limited due to the limitations of the gate current extraction capability and the external turn-off circuit. In particular, after the requirements for the device's blocking voltage capability have increased, the larger device size has made the turn-off extraction process more difficult. Summary of the Invention

[0005] To address the aforementioned problems in the prior art, this invention provides a silicon carbide thyristor based on an external electrode turn-off and extraction structure, and its fabrication method. The technical problem to be solved by this invention is achieved through the following technical solution:

[0006] This invention provides a silicon carbide thyristor based on an external electrode turn-off and pull-out structure, comprising:

[0007] The N-type 4H-SiC substrate, P-type 4H-SiC buffer layer, P-type 4H-SiC drift layer and N-type 4H-SiC gate layer are stacked sequentially from bottom to top.

[0008] A groove is disposed inside the N-type 4H-SiC gate layer and the P-type 4H-SiC drift layer, with the bottom of the groove located in the P-type 4H-SiC drift layer;

[0009] The P-type 4H-SiC anode region is disposed on the upper surface of the N-type 4H-SiC gate layer and located on both sides of the groove;

[0010] An etching corner protection zone is set in the P-type 4H-SiC drift layer and located below and on both sides of the groove to form a surrounding structure for the corner at the bottom of the groove;

[0011] The P-type 4H-SiC extraction area is located on the upper surface of the P-type 4H-SiC drift layer at the bottom of the groove.

[0012] The N-type 4H-SiC heavily doped region is disposed inside the N-type 4H-SiC gate layer between the groove and the P-type 4H-SiC anode region, and is flush with the upper surface of the N-type 4H-SiC gate layer;

[0013] The first ohmic contact layer is disposed on the upper surface of the P-type 4H-SiC anode region, the upper surface of the N-type 4H-SiC heavily doped region, and a portion of the upper surface of the P-type 4H-SiC extraction region, and does not contact the inner wall of the groove.

[0014] A passivation layer is disposed at a location where the upper surface of the N-type 4H-SiC gate layer is not covered, at the inner sidewall of the groove, and at a location where the upper surface of the P-type 4H-SiC extraction area is not covered.

[0015] A second ohmic contact layer is disposed on the lower surface of the N-type 4H-SiC substrate;

[0016] An Al contact layer is disposed on the lower surface of the second ohmic contact layer.

[0017] This invention also provides a method for fabricating a silicon carbide thyristor based on an external electrode turn-off and pull-out structure, comprising:

[0018] Step 1: Obtain an N-type 4H-SiC substrate;

[0019] Step 2: On the N-type 4H-SiC substrate, a P-type 4H-SiC buffer layer, a P-type 4H-SiC drift layer and an N-type 4H-SiC gate layer are sequentially fabricated from bottom to top;

[0020] Step 3: Etch the N-type 4H-SiC gate layer and the P-type 4H-SiC drift layer to form a groove, wherein the bottom of the groove is located in the P-type 4H-SiC drift layer;

[0021] Step 4: Ion implantation is performed on the bottom and sidewalls of the groove to form an etched corner protection zone;

[0022] Step 5: Prepare a P-type 4H-SiC extraction region on the upper surface of the P-type 4H-SiC drift layer at the bottom of the groove;

[0023] Step 6: Prepare passivation layers on the inner sidewall of the groove, the upper surface of the P-type 4H-SiC extraction area near the inner sidewall of the groove, and the upper surface of the N-type 4H-SiC gate layer.

[0024] Step 7: Ion implantation is performed on the upper surface of the N-type 4H-SiC gate layer to form a heavily doped N-type 4H-SiC region, which is located on both sides of the groove;

[0025] Step 8: Prepare a P-type 4H-SiC anode region on the upper surface of the N-type 4H-SiC gate layer, wherein the P-type 4H-SiC anode region is located on both sides of the groove;

[0026] Step 9: Prepare a first ohmic contact layer on the upper surface of the P-type 4H-SiC anode region, the upper surface of the N-type 4H-SiC heavily doped region, and the upper surface of the P-type 4H-SiC extraction region;

[0027] Step 10: Prepare a second ohmic contact layer on the lower surface of the N-type 4H-SiC substrate;

[0028] Step 11: Prepare an Al contact layer on the lower surface of the second ohmic contact layer.

[0029] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0030] 1. The silicon carbide thyristor based on an external electrode turn-off extraction structure of the present invention has a groove inside the N-type 4H-SiC gate layer and the P-type 4H-SiC drift layer. A P-type 4H-SiC extraction region is set at the bottom of the groove, and a first ohmic contact layer is set on the P-type 4H-SiC extraction region. The first ohmic contact layer can be used as an external control electrode to control the drift layer and the buffer layer. In order to obtain a larger current carrying capacity, the basic working mode of the silicon carbide thyristor is to carry a large current by connecting multiple thyristors in parallel. By introducing an external control electrode, the turn-off of part of the working circuit can be realized to control the carrying current. This achieves a discrete turn-off structure for different regions when the thyristor is turned off, realizing separate control of the thyristor's opening and closing. This is beneficial for the rapid switching of the thyristor in the switching or pulse working state and improves the operating frequency of the thyristor.

[0031] 2. The silicon carbide thyristor based on an external electrode turn-off extraction structure of the present invention introduces an external control electrode for extracting charge carriers under external circuit control, thereby achieving enhanced control over thyristor turn-off. This is beneficial for the thyristor's turn-off in switching or pulse operation states and can significantly improve the thyristor's operating frequency. Because the external control electrode controls the thyristor turn-off, the turn-off drive control is transformed from traditional gate control to dual control of turn-off by both the external control electrode and the gate electrode. This helps solve the problems of excessive turn-off current and reduced turn-off gain that occur in thyristor circuit design, and effectively reduces thyristor losses.

[0032] 3. For silicon carbide thyristors, the forward voltage carrying capacity, i.e., the forward voltage carrying capacity, is provided by the second reverse-biased PN junction in the four-layer pnpn structure when the thyristor is not conducting (i.e., no turn-on current is applied to the gate). This is achieved through the voltage carrying capacity of the N-type 4H-SiC gate layer and the P-type 4H-SiC drift layer. The thyristor's voltage carrying capacity is primarily above the drift layer and gate layer. The silicon carbide thyristor based on the external electrode turn-off and pull-out structure of this invention utilizes an external control electrode to enhance the ability to control the thyristor's turn-on voltage. By adjusting the voltage settings of the drift layer and gate layer, multiple thyristors can operate under the same conditions, achieving thyristor control and thus improving the stability of parallel thyristor operation while reducing the complexity of the external circuitry. This is because the effectiveness of parallel operation of multiple thyristors involves the thermal failure that may occur during the parallel connection. Due to defects in SiC materials, thyristor fabrication requires a margin, and the operating states of thyristors are not always consistent. When a thyristor fails to turn off completely, excessive current may cause the thyristor's cell structure to break down. However, by introducing external control electrodes, the turn-off capability of the thyristor is improved, thus reducing the possibility of failure during turn-off. The reduced complexity of the external circuit is because traditional thyristor structures are difficult to turn off, with stringent requirements on the rate and magnitude of gate turn-off current changes. Although introducing external electrodes results in additional electrodes, overall, the requirements for the thyristor's turn-off capability are reduced, thereby lowering the complexity of the external circuit for thyristor operation.

[0033] The above description is merely an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described in detail below with reference to the accompanying drawings. Attached Figure Description

[0034] Figure 1 This is a schematic diagram of the structure of a traditional silicon carbide thyristor.

[0035] Figure 2 This is a schematic diagram of a silicon carbide thyristor based on an external electrode turn-off extraction structure provided in an embodiment of the present invention;

[0036] Figure 3 This is a flowchart of a method for fabricating a silicon carbide thyristor based on an external electrode turn-off extraction structure provided in an embodiment of the present invention;

[0037] Figures 4-13 This is a schematic diagram of the fabrication process of a silicon carbide thyristor based on an external electrode turn-off extraction structure provided in an embodiment of the present invention.

[0038] Icons: 1-N-type 4H-SiC substrate; 2-P-type 4H-SiC buffer layer; 3-P-type 4H-SiC drift layer; 4-N-type 4H-SiC gate layer; 5-P-type 4H-SiC anode region; 6-First ohmic contact layer; 7-Passivation layer; 8-Etching corner protection zone; 9-P-type 4H-SiC extraction region; 10-N-type 4H-SiC heavily doped region; 11-Second ohmic contact layer; 12-Al contact layer. Detailed Implementation

[0039] To further illustrate the technical means and effects adopted by the present invention to achieve the intended purpose, the following, in conjunction with the accompanying drawings and specific embodiments, provides a detailed description of a silicon carbide thyristor based on an external electrode turn-off extraction structure and its preparation method according to the present invention.

[0040] The foregoing and other technical contents, features, and effects of the present invention will be clearly presented in the following detailed description of specific embodiments in conjunction with the accompanying drawings. Through the description of the specific embodiments, a more in-depth and concrete understanding can be gained of the technical means and effects adopted by the present invention to achieve its intended purpose. However, the accompanying drawings are for reference and illustration only and are not intended to limit the technical solutions of the present invention.

[0041] In a first aspect, embodiments of the present invention provide a silicon carbide thyristor based on an external electrode turn-off / pull-out structure. Please refer to [link to relevant documentation]. Figure 2 , Figure 2 This is a schematic diagram of a silicon carbide thyristor based on an external electrode turn-off and pull-out structure provided in an embodiment of the present invention, as shown below. Figure 2 As shown, the silicon carbide thyristor based on the external electrode turn-off extraction structure in this embodiment includes: an N-type 4H-SiC substrate 1, a P-type 4H-SiC buffer layer 2, a P-type 4H-SiC drift layer 3, an N-type 4H-SiC gate layer 4, a P-type 4H-SiC anode region 5, a first ohmic contact layer 6, a passivation layer 7, an etch corner protection zone 8, a P-type 4H-SiC extraction region 9, an N-type 4H-SiC heavily doped region 10, a second ohmic contact layer 11, and an Al contact layer 12.

[0042] The N-type 4H-SiC substrate 1, P-type 4H-SiC buffer layer 2, P-type 4H-SiC drift layer 3, and N-type 4H-SiC gate layer 4 are stacked sequentially from bottom to top. Grooves are formed inside the N-type 4H-SiC gate layer 4 and the P-type 4H-SiC drift layer 3, with the bottom of the grooves located within the P-type 4H-SiC drift layer 3. The P-type 4H-SiC anode region 5 is disposed on the upper surface of the N-type 4H-SiC gate layer 4 and located on both sides of the groove; the etching corner protection zone 8 is disposed in the P-type 4H-SiC drift layer 3 and located below and on both sides of the groove to form a surrounding structure for the corner at the bottom of the groove; the P-type 4H-SiC extraction region 9 is disposed on the upper surface of the P-type 4H-SiC drift layer at the bottom of the groove; the N-type 4H-SiC heavily doped region 10 is disposed inside the N-type 4H-SiC gate layer 4 between the groove and the P-type 4H-SiC anode region 5 and is adjacent to the upper surface of the N-type 4H-SiC gate layer 4. The surfaces are flush; the first ohmic contact layer 6 is disposed on the upper surface of the P-type 4H-SiC anode region 5, the upper surface of the N-type 4H-SiC heavily doped region 10, and part of the upper surface of the P-type 4H-SiC extraction region 9, and does not contact the inner sidewall of the groove; the passivation layer 7 is disposed at the uncovered position on the upper surface of the N-type 4H-SiC gate layer 4, the inner sidewall of the groove, and the uncovered position on the upper surface of the P-type 4H-SiC extraction region 9; the second ohmic contact layer 11 is disposed on the lower surface of the N-type 4H-SiC substrate 1; the Al contact layer 12 is disposed on the lower surface of the second ohmic contact layer 11.

[0043] In an optional embodiment, the thickness of the N-type 4H-SiC substrate 1 is 250 μm to 300 μm, and the doping concentration is 5 × 10⁻⁶. 18 cm -3 ~2×10 19 cm -3 .

[0044] In an optional embodiment, the thickness of the p-type 4H-SiC buffer layer 2 is 3 μm to 5 μm, and the doping concentration is 5 × 10⁻⁶. 16 cm -3 ~2×10 17 cm -3 .

[0045] In an optional embodiment, the thickness of the p-type 4H-SiC drift layer 3 is 100 μm to 200 μm, and the doping concentration is 2 × 10⁻⁶. 14 cm -3 ~9×10 14 cm -3 .

[0046] In an optional embodiment, the thickness of the N-type 4H-SiC gate layer 4 is 2 μm to 3 μm, and the doping concentration is 2 × 10⁻⁶.17 cm -3 ~5×10 17 cm -3 .

[0047] In an optional embodiment, the thickness of the p-type 4H-SiC anode region 5 is 2 μm to 4 μm, and the doping concentration is 1 × 10⁻⁶. 19 cm -3 ~5×10 19 cm -3 .

[0048] In an optional embodiment, the thickness of the first ohmic contact layer 6 is 150 nm to 200 nm.

[0049] In an optional embodiment, the passivation layer 7 is a SiO2 passivation layer with a thickness of 1.5 μm to 2 μm.

[0050] In an optional embodiment, the etching corner protection zone 8 is a P-type 4H-SiC etching corner protection zone with a doping concentration of 1×10⁻⁶. 16 cm -3 ~5×10 16 cm -3 .

[0051] In an optional embodiment, the thickness of the p-type 4H-SiC extract region 9 is 0.5 μm to 2 μm, and the doping concentration is 5 × 10⁻⁶. 18 cm -3 ~1×10 19 cm -3 .

[0052] In an optional embodiment, the thickness of the heavily doped N-type 4H-SiC region 10 is 0.5 μm to 1 μm, and the doping concentration is 5 × 10⁻⁶. 18 cm -3 The above can be 2×10 19 cm -3 .

[0053] In an optional embodiment, the thickness of the second ohmic contact layer 11 is 150 nm to 200 nm; the thickness of the Al contact layer 12 is 200 nm to 300 nm.

[0054] In an optional embodiment, the groove has a depth of 7–10 μm and a width of 15–20 μm.

[0055] In this embodiment, a silicon carbide thyristor based on an external electrode turn-off extraction structure has a groove inside the N-type 4H-SiC gate layer 4 and the P-type 4H-SiC drift layer 3. A P-type 4H-SiC extraction region 9 is formed at the bottom of the groove, and a first ohmic contact layer 11 is formed on the P-type 4H-SiC extraction region 9. This first ohmic contact layer 11 can serve as an external control electrode for controlling the P-type 4H-SiC drift layer 3 and the P-type 4H-SiC buffer layer 2. It should be noted that after the silicon carbide thyristor is fabricated, aluminum metal is deposited into the groove to form an Al pillar to act as an external electrode. During the fabrication of the silicon carbide thyristor, it is not necessary to fabricate the Al pillar connecting the first ohmic contact layer 11 on the upper surface of the P-type 4H-SiC extraction region 9.

[0056] To achieve greater current carrying capacity, the basic operating mode of silicon carbide thyristors is to use multiple thyristors connected in parallel to carry large currents. By introducing external control electrodes, the current carrying capacity can be controlled by turning off a portion of the working circuit structure. This achieves a discrete turn-off structure for different regions when the thyristor is turned off, enabling separate control of the thyristor's on and off states. This facilitates rapid switching of the thyristor in switching or pulse operation states and increases the thyristor's operating frequency.

[0057] This embodiment of the silicon carbide thyristor based on an external electrode turn-off extraction structure introduces an external control electrode for carrier extraction under external circuit control, achieving enhanced control over thyristor turn-off. This is beneficial for thyristor turn-off in switching or pulse operation states and can significantly improve the thyristor's operating frequency. By introducing an external control electrode to control thyristor turn-off, the turn-off drive control is transformed from traditional gate control to dual control of turn-off by both the external control electrode and the gate electrode. This helps solve the problems of excessive turn-off current and reduced turn-off gain that occur during thyristor circuit design, effectively reducing thyristor losses.

[0058] Secondly, for silicon carbide thyristors, the voltage carrying capacity, i.e., the forward voltage carrying capacity, is provided by the second reverse-biased PN junction in the four-layer pnpn structure when the thyristor is not conducting (i.e., no turn-on current is applied to the gate). This is achieved through the voltage carrying capacity of the N-type 4H-SiC gate layer and the P-type 4H-SiC drift layer. The voltage carrying capacity of the thyristor is primarily above the drift layer and gate layer. In this embodiment, the silicon carbide thyristor based on an external electrode turn-off and pull-out structure utilizes an external control electrode to enhance the ability to control the thyristor's turn-on voltage. By adjusting the voltage settings of the drift layer and gate layer, multiple thyristors can operate under the same conditions, achieving thyristor control and thus improving the stability of parallel thyristor operation while reducing the complexity of the external circuitry. This is because the effectiveness of parallel operation of multiple thyristors involves the thermal failure that may occur during the parallel connection. Due to defects in SiC materials, thyristor fabrication requires a margin, and the operating states of thyristors are not always consistent. When a thyristor fails to turn off completely, excessive current may cause the thyristor's cell structure to break down. However, by introducing external control electrodes, the turn-off capability of the thyristor is improved, thus reducing the possibility of failure during turn-off. The reduced complexity of the external circuit is because traditional thyristor structures are difficult to turn off, with stringent requirements on the rate and magnitude of gate turn-off current changes. Although introducing external electrodes results in additional electrodes, overall, the requirements for the thyristor's turn-off capability are reduced, thereby lowering the complexity of the external circuit for thyristor operation.

[0059] Secondly, embodiments of the present invention provide a method for fabricating a silicon carbide thyristor based on an external electrode turn-off and pull-out structure. Please refer to [reference needed]. Figures 3-13 , Figure 3 This is a flowchart illustrating a method for fabricating a silicon carbide thyristor based on an external electrode turn-off extraction structure, as provided in an embodiment of the present invention. Figures 4-13 This is a schematic diagram illustrating the fabrication process of a silicon carbide thyristor based on an external electrode turn-off extraction structure, as provided in an embodiment of the present invention. Figure 3 As shown, the method for fabricating a silicon carbide thyristor based on an external electrode turn-off and pull-out structure in this embodiment includes:

[0060] Step 1: Obtain N-type 4H-SiC substrate 1.

[0061] Optionally, the thickness of the N-type 4H-SiC substrate 1 is 250 μm to 300 μm, and the doping concentration is 5 × 10⁻⁶. 18 cm -3 ~2×10 19 cm -3 .

[0062] Step 2: On the N-type 4H-SiC substrate 1, a P-type 4H-SiC buffer layer 2, a P-type 4H-SiC drift layer 3, and an N-type 4H-SiC gate layer 4 are sequentially prepared from bottom to top.

[0063] Optionally, plasma-enhanced chemical vapor deposition (PECVD) or low-pressure chemical vapor deposition (LPCVD) equipment can be used to sequentially grow a P-type 4H-SiC buffer layer 2 with a thickness of 3 μm to 5 μm, a P-type 4H-SiC drift layer 3 with a thickness of 100 μm to 200 μm, and an N-type 4H-SiC gate layer 4 with a thickness of 2 μm to 3 μm on the upper surface of the N-type 4H-SiC substrate 1, such as... Figure 4 As shown.

[0064] Step 3: Etch the N-type 4H-SiC gate layer 4 and the P-type 4H-SiC drift layer 3 to form a groove, wherein the bottom of the groove is located in the P-type 4H-SiC drift layer 3.

[0065] To prevent the etching of the grooves from affecting the quality of the upper surface of the N-type 4H-SiC gate layer 4, step 3 may optionally include:

[0066] Step 3.1: Photolithography is used to form a groove region on the N-type 4H-SiC gate layer 4.

[0067] Specifically, a groove region can be photolithographically etched in the middle of the N-type 4H-SiC gate layer 4 using photoresist development technology.

[0068] Step 3.2: Form a mask layer on the N-type 4H-SiC gate layer 4 outside the groove region.

[0069] Specifically, a mask layer can be formed on the upper surface of the N-type 4H-SiC gate layer 4 outside the groove region. The selected mask layer needs to be a material that does not affect the upper surface of the N-type 4H-SiC gate layer 4 and is easy to peel off. In this embodiment, the mask layer can be a polysilicon / oxide bilayer structure, wherein the thickness of the polysilicon is... The thickness of the oxide layer is

[0070] Step 3.3: Use dry etching or wet etching to etch away the N-type 4H-SiC gate layer 4 and part of the P-type 4H-SiC drift layer 3 in the groove area to form a groove, and then remove the mask layer.

[0071] Optionally, the depth of the groove is 7–10 μm, and the width is 15–20 μm. Specifically, a buffered oxide etching (BOE) solution can be used to remove the mask layer outside the groove region, resulting in the final etched structure as shown. Figure 5 As shown.

[0072] Step 4: Ion implantation is performed at the bottom and sidewalls of the groove to form an etched corner protection zone 8.

[0073] Optionally, ion implantation can be used to implant the P-type 4H-SiC drift layer at the bottom and sidewalls near the corner of the groove to a depth of 0.5 μm to 1 μm and an ion concentration of 1 × 10⁻⁶. 16 cm -2 ~5×10 16 cm -2 Al ions form a P-type 4H-SiC etching angle protection zone 8, such as Figure 6 As shown.

[0074] Step 5: Prepare a P-type 4H-SiC extraction region 9 on the upper surface of the P-type 4H-SiC drift layer 3 at the bottom of the groove.

[0075] Optionally, a P-type 4H-SiC extraction region 9 with a thickness of 0.5 μm to 2 μm can be grown on the upper surface of the P-type 4H-SiC drift layer 3 at the bottom of the groove using a chemical vapor deposition process, such as PECVD or LPCVD. Figure 7 As shown, the doping concentration of P-type 4H-SiC extraction region 9 is 5 × 10⁻⁶. 18 cm -3 ~1×10 19 cm -3 .

[0076] Step 6: Prepare a passivation layer 7 on the inner wall of the groove, the upper surface of the P-type 4H-SiC extraction region 9 near the inner wall of the groove, and the upper surface of the N-type 4H-SiC gate layer 4.

[0077] Optionally, a SiO2 passivation layer 7 with a thickness of 1.5 μm to 2 μm can be grown on the side surface of the N-type 4H-SiC gate layer 4 and the side surface of the P-type 4H-SiC drift layer 3 within the groove, on the upper surface of part of the N-type 4H-SiC gate layer 4, and on the upper surface of part of the P-type 4H-SiC extraction layer 9 using PECVD or LPCVD equipment. Figure 8 As shown.

[0078] Step 7: Ion implantation is performed on the upper surface of the N-type 4H-SiC gate layer 4 to form an N-type 4H-SiC heavily doped region 10, which is located on both sides of the groove.

[0079] Optionally, an ion implantation process can be used to implant N ions into the region near the groove of the N-type 4H-SiC gate layer 4 to form a heavily doped N-type 4H-SiC region 10, such as... Figure 9 As shown, the implantation depth is 0.5 μm to 1 μm and the ion concentration is 2 × 10⁻⁶. 19 cm -2 .

[0080] Step 8: Prepare a P-type 4H-SiC anode region 5 on the upper surface of the N-type 4H-SiC gate layer 4. The P-type 4H-SiC anode region 5 is located on both sides of the groove.

[0081] Optionally, a P-type 4H-SiC anode region 5 with a thickness of 2μm to 4μm can be grown on the upper surface of the N-type 4H-SiC gate layer 4 on both sides of the groove using PECVD or LPCVD equipment, such as... Figure 10 As shown, the doping concentration of P-type 4H-SiC anode region 5 is 1×10⁻⁶. 19 cm -3 ~5×10 19 cm -3 .

[0082] Step 9: Prepare a first ohmic contact layer 6 on the upper surface of the P-type 4H-SiC anode region 5, the upper surface of the N-type 4H-SiC heavily doped region 10, and the upper surface of the P-type 4H-SiC extraction region 9.

[0083] Optionally, a first ohmic contact layer 6 with a thickness of 150 nm to 200 nm can be deposited on the upper surface of the P-type 4H-SiC anode region 5, the upper surface of the N-type 4H-SiC heavily doped region 10, and the upper surface of the P-type 4H-SiC extraction region 9 using magnetron sputtering or electron beam evaporation processes to form a first ohmic contact layer 6. Figure 11 As shown, the first ohmic metal can be Ni, Ti, etc.

[0084] Step 10: Prepare a second ohmic contact layer 11 on the lower surface of the N-type 4H-SiC substrate 1.

[0085] Optionally, a second ohmic metal can be deposited on the lower surface of the N-type 4H-SiC substrate 1 using magnetron sputtering or electron beam evaporation to form a second ohmic contact layer 11 with a thickness of 150 nm to 200 nm, such as... Figure 12 As shown, the second ohmic metal can be Ni, Ti, etc.

[0086] It should be noted that after step 10, the entire sample is subjected to rapid thermal annealing. For example, the annealing temperature is 1000℃ and the annealing duration is 5 minutes.

[0087] Step 11: Prepare an Al contact layer 12 on the lower surface of the second ohmic contact layer 11.

[0088] Optionally, an Al contact layer 12 with a thickness of 200 nm to 300 nm can be grown on the lower surface of the second ohmic contact layer 11 using an electron beam evaporation process, such as... Figure 13 As shown.

[0089] The operation methods such as PECVD, LPCVD, and ion implantation mentioned in the embodiments of this invention are all existing technologies and will not be described in detail here.

[0090] For details regarding the fabrication method of the silicon carbide thyristor based on the external electrode turn-off extraction structure and its corresponding beneficial effects, please refer to the relevant content on the silicon carbide thyristor based on the external electrode turn-off extraction structure provided in the first aspect, which will not be repeated here.

[0091] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations are intended to cover non-exclusive inclusion, such that an article or apparatus comprising a list of elements includes not only those elements but also other elements not expressly listed. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the article or apparatus that includes said element. Terms such as "connected" or "linked" are not limited to physical or mechanical connections but can include electrical connections, whether direct or indirect. The orientations or positional relationships indicated by terms such as "upper," "lower," "left," and "right" are based on the orientations or positional relationships shown in the accompanying drawings and are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as limiting the invention.

[0092] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A silicon carbide thyristor based on an external electrode turn-off and pull-out structure, characterized in that, include: The N-type 4H-SiC substrate, P-type 4H-SiC buffer layer, P-type 4H-SiC drift layer and N-type 4H-SiC gate layer are stacked sequentially from bottom to top. A groove is disposed inside the N-type 4H-SiC gate layer and the P-type 4H-SiC drift layer, with the bottom of the groove located in the P-type 4H-SiC drift layer; The P-type 4H-SiC anode region is disposed on the upper surface of the N-type 4H-SiC gate layer and located on both sides of the groove; An etching corner protection zone is set in the P-type 4H-SiC drift layer and located below and on both sides of the groove to form a surrounding structure for the corner at the bottom of the groove; The P-type 4H-SiC extraction area is located on the upper surface of the P-type 4H-SiC drift layer at the bottom of the groove. The N-type 4H-SiC heavily doped region is disposed inside the N-type 4H-SiC gate layer between the groove and the P-type 4H-SiC anode region, and is flush with the upper surface of the N-type 4H-SiC gate layer; The first ohmic contact layer is disposed on the upper surface of the P-type 4H-SiC anode region, the upper surface of the N-type 4H-SiC heavily doped region, and a portion of the upper surface of the P-type 4H-SiC extraction region, and does not contact the inner wall of the groove. A passivation layer is disposed at a location where the upper surface of the N-type 4H-SiC gate layer is not covered, at the inner sidewall of the groove, and at a location where the upper surface of the P-type 4H-SiC extraction area is not covered. A second ohmic contact layer is disposed on the lower surface of the N-type 4H-SiC substrate; An Al contact layer is disposed on the lower surface of the second ohmic contact layer.

2. The silicon carbide thyristor based on an external electrode turn-off and pull-out structure according to claim 1, characterized in that, The groove has a depth of 7–10 μm and a width of 15–20 μm.

3. The silicon carbide thyristor based on an external electrode turn-off and pull-out structure according to claim 1, characterized in that, The doping concentration of the p-type 4H-SiC extract region is 5 × 10⁻⁶. 18 cm -3 ~1×10 19 cm -3 The thickness is 0.5μm to 2μm.

4. The silicon carbide thyristor based on an external electrode turn-off and pull-out structure according to claim 1, characterized in that, The etching angle protection zone is a P-type 4H-SiC etching angle protection zone with a doping concentration of 1×10⁻⁶. 16 cm -3 ~5×10 16 cm -3 .

5. A method for fabricating a silicon carbide thyristor based on an external electrode turn-off and pull-out structure, characterized in that, include: Step 1: Obtain an N-type 4H-SiC substrate; Step 2: On the N-type 4H-SiC substrate, a P-type 4H-SiC buffer layer, a P-type 4H-SiC drift layer and an N-type 4H-SiC gate layer are sequentially fabricated from bottom to top; Step 3: Etch the N-type 4H-SiC gate layer and the P-type 4H-SiC drift layer to form a groove, wherein the bottom of the groove is located in the P-type 4H-SiC drift layer; Step 4: Ion implantation is performed on the bottom and sidewalls of the groove to form an etched corner protection zone; Step 5: Prepare a P-type 4H-SiC extraction region on the upper surface of the P-type 4H-SiC drift layer at the bottom of the groove; Step 6: Prepare passivation layers on the inner sidewall of the groove, the upper surface of the P-type 4H-SiC extraction area near the inner sidewall of the groove, and the upper surface of the N-type 4H-SiC gate layer. Step 7: Ion implantation is performed on the upper surface of the N-type 4H-SiC gate layer to form a heavily doped N-type 4H-SiC region, which is located on both sides of the groove; Step 8: Prepare a P-type 4H-SiC anode region on the upper surface of the N-type 4H-SiC gate layer, wherein the P-type 4H-SiC anode region is located on both sides of the groove; Step 9: Prepare a first ohmic contact layer on the upper surface of the P-type 4H-SiC anode region, the upper surface of the N-type 4H-SiC heavily doped region, and the upper surface of the P-type 4H-SiC extraction region; Step 10: Prepare a second ohmic contact layer on the lower surface of the N-type 4H-SiC substrate; Step 11: Prepare an Al contact layer on the lower surface of the second ohmic contact layer.

6. The method for fabricating a silicon carbide thyristor based on an external electrode turn-off and pull-out structure according to claim 5, characterized in that, Step 3 includes: Step 3.1: Photolithographically form a groove region on the N-type 4H-SiC gate layer; Step 3.2: Form a mask layer on the N-type 4H-SiC gate layer outside the groove region; Step 3.3: Use dry etching or wet etching to etch away the N-type 4H-SiC gate layer and part of the P-type 4H-SiC drift layer in the groove area to form the groove, and then remove the mask layer.

7. The method for fabricating a silicon carbide thyristor based on an external electrode turn-off and pull-out structure according to claim 6, characterized in that, The mask layer has a polysilicon / oxide dual-layer structure, wherein the thickness of the polysilicon is... The thickness of the oxide layer is 8. The method for fabricating a silicon carbide thyristor based on an external electrode turn-off and pull-out structure according to claim 6, characterized in that, The groove has a depth of 7–10 μm and a width of 15–20 μm.

9. The method for fabricating a silicon carbide thyristor based on an external electrode turn-off and pull-out structure according to claim 5, characterized in that, Step 4 includes: The P-type 4H-SiC drift layer implanted at a depth of 0.5 μm to 1 μm and an ion concentration of 1 × 10⁻⁶ at the bottom and sidewalls near the corner of the groove. 16 cm -2 ~5×10 16 cm -2 The Al ions form a P-type 4H-SiC etching angle protection zone.

10. The method for fabricating a silicon carbide thyristor based on an external electrode turn-off and pull-out structure according to claim 5, characterized in that, Step 5 includes: A P-type 4H-SiC extraction region with a thickness of 0.5 μm to 2 μm was grown on the upper surface of the P-type 4H-SiC drift layer at the bottom of the groove using chemical vapor deposition. The doping concentration of the P-type 4H-SiC extraction region was 5 × 10⁻⁶. 18 cm -3 ~1×10 19 cm -3 .

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