Chip performance test method and device in multi-environment state

Abstract

The invention relates to the technical field of integrated circuit chips, and discloses a chip performance test method and device in a multi-environment state. The method comprises the following steps: acquiring environment information corresponding to a plurality of environment states, and identifying a plurality of key influence factors of a first chip in each piece of environment information; analyzing a plurality of pieces of historical operation information of the first chip in combination with each key influence factor to obtain a plurality of chip influence parameters corresponding to each environment state; based on the structure parameter information of the first chip and the plurality of chip influence parameters, constructing a simulation test model corresponding to each environment state; performing performance test on the first chip by utilizing the simulation test model corresponding to each environment state to obtain a test result of the first chip in each environment state; and respectively analyzing and adjusting the test results of the first chip in each environment state to obtain the chip operation performance of the first chip in each environment state. According to the invention, the precision and efficiency of chip performance testing under the multi-environment condition are improved, and the testing cost is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit chips, and in particular to a chip performance testing method and device under multiple environmental conditions. Background Art

[0002] In the chip production and testing process, the overall performance data of the chip can only be obtained by testing the chip in different environments, different operating conditions, and different influencing factors. Therefore, how to perform performance testing on chips under multi-environment conditions is the current research focus.

[0003] Currently, the traditional method of chip performance testing under multi-environmental conditions is to conduct experimental tests on the chip by constructing experimental areas with different environmental conditions. However, this method requires the construction of experimental scenarios with multiple environmental conditions, which is costly. In addition, due to equipment limitations, this method cannot simulate all environmental scenarios, resulting in low efficiency and accuracy in chip performance testing under multi-environmental conditions. Summary of the invention

[0004] The present invention provides a chip performance testing method and device under multiple environmental conditions, which improves the accuracy and efficiency of chip performance testing under multiple environmental conditions and reduces testing costs.

[0005] In order to solve the above technical problems, the present invention provides a chip performance testing method under multiple environment states, comprising:

[0006] Acquire environmental information corresponding to a plurality of environmental states, and identify a plurality of key influencing factors of the first chip in each of the environmental information;

[0007] Acquire several historical operation information of the first chip, and analyze each of the historical operation information in combination with each of the key influencing factors to obtain several chip influencing parameters corresponding to each of the environmental states;

[0008] Based on the structural parameter information of the first chip and the plurality of chip influencing parameters, construct a simulation test model corresponding to each of the environmental states;

[0009] Using the simulation test models corresponding to the environmental states, respectively perform performance tests on the first chip to obtain test results of the first chip under the environmental states;

[0010] The test results of the first chip under each of the environmental conditions are analyzed and adjusted respectively to obtain the chip operation performance of the first chip under each of the environmental conditions.

[0011] Furthermore, the identifying of several key influencing factors of the first chip in each of the environmental information is specifically:

[0012] Identify environmental characteristic information of each of the environmental information;

[0013] Acquire several operating performance influencing factors of the first chip from a preset database;

[0014] Identify the key factor characteristics of each of the operating performance influencing factors;

[0015] Selecting a number of pieces of environmental feature information having the highest similarity to the key factor features from each piece of environmental feature information;

[0016] The environmental information corresponding to each piece of environmental feature information is determined as a key influencing factor of the first chip.

[0017] Furthermore, the acquisition of several historical operation information of the first chip, and analysis of each of the historical operation information in combination with each of the key influencing factors to obtain several chip influencing parameters corresponding to each of the environmental states are specifically:

[0018] Acquire some historical operation information of the first chip;

[0019] Analyze the influence of each of the key influencing factors in combination with the operating performance information in each of the historical operating information;

[0020] By analyzing the data of each of the environmental states in each of the historical operation information, an influencing factor value range of each of the key influencing factors is obtained;

[0021] Based on the influencing mode and value range of each of the key influencing factors, a chip influencing parameter corresponding to each of the environmental states is generated.

[0022] Furthermore, the operation performance information in each of the historical operation information is combined to analyze the influence mode of each of the key influencing factors, specifically:

[0023] Identifying the factor value of each of the key influencing factors corresponding to each of the historical operation information;

[0024] Based on the factor value of each of the key influencing factors corresponding to each of the historical operation information, a plurality of target historical operation information are selected from each of the historical operation information;

[0025] Identify the operation performance information of each target's historical operation information;

[0026] The change correspondence between each of the key influencing factors of each target historical operation information and each of the operation performance information is analyzed to determine the influence mode of each of the key influencing factors.

[0027] Furthermore, the influencing factor value range of each of the key influencing factors is obtained by analyzing the data of each of the environmental states in each of the historical operation information, specifically:

[0028] Obtaining status range information of each of the environmental states in each of the historical operation information;

[0029] Identify the influencing factor value of each of the key influencing factors corresponding to each of the state range information;

[0030] The influencing factor values ​​of the key influencing factors are respectively collected to obtain the influencing factor value range of the key influencing factors.

[0031] Furthermore, based on the influence mode and value range of each of the key influence factors, the chip influence parameters corresponding to each of the environmental states are generated, specifically:

[0032] Based on the influence mode and the value range of each of the key influencing factors, identifying the operation performance change value of the first chip corresponding to each of the influencing factor values ​​of each of the key influencing factors;

[0033] Based on each of the operating performance change values, parameter change information corresponding to each of the operating performance change values ​​is generated to form a parameter change information group corresponding to each key influencing factor;

[0034] The parameter change information groups of all key influencing factors corresponding to each of the environmental states are determined as chip influencing parameters corresponding to each of the environmental states.

[0035] Furthermore, the simulation test model corresponding to each of the environmental states is constructed based on the structural parameter information of the first chip and a plurality of the chip influencing parameters, specifically:

[0036] Acquire the sample structure model and structure parameter information of the first chip in a preset database;

[0037] Adjusting the chip structure in the sample structure model based on the structure parameter information to form a simulation structure model of the first chip;

[0038] Based on the chip impact parameters corresponding to the environmental states, generating a performance adjustment group corresponding to each of the environmental states;

[0039] Each of the performance adjustment groups is added to the output layer of the simulation structure model to obtain a simulation test model corresponding to each of the environmental states.

[0040] Furthermore, the simulation test models corresponding to the environmental states are used to perform performance tests on the first chip respectively, and test results of the first chip under the environmental states are obtained, specifically:

[0041] Based on the simulation test models corresponding to the environmental states, respectively perform simulation test processing on the first chip to obtain initial test results corresponding to the simulation test models;

[0042] Generating each operating performance change value group based on the performance adjustment group corresponding to each simulation test model;

[0043] Each of the operating performance change value groups is added to the corresponding initial test result to form a test result of the first chip under each of the environmental conditions.

[0044] Further, the test results of the first chip under each of the environmental conditions are analyzed and adjusted respectively to obtain the chip operation performance of the first chip under each of the environmental conditions, specifically:

[0045] Analyze the chip operating performance corresponding to each test result to obtain the chip operating performance under various environmental conditions;

[0046] Analyzing the initial chip operating performance corresponding to the initial test result in each of the test results;

[0047] Based on the operation performance change value group of each test result, adjust each of the initial chip operation performances to obtain the chip operation performance corresponding to each of the test results;

[0048] The chip operating performance corresponding to each of the test results is respectively determined as the chip operating performance of the first chip under each environmental state.

[0049] The present invention provides a chip performance test method under multiple environmental states, obtains environmental information corresponding to several environmental states, and identifies several key influencing factors of a first chip in each environmental information; obtains several historical operation information of the first chip, and analyzes each historical operation information in combination with each key influencing factor to obtain several chip influencing parameters corresponding to each environmental state; constructs a simulation test model corresponding to each environmental state based on the structural parameter information of the first chip and several chip influencing parameters; performs performance tests on the first chip respectively using the simulation test models corresponding to each environmental state to obtain the test results of the first chip under each environmental state; analyzes and adjusts the test results of the first chip under each environmental state respectively to obtain the chip operation performance of the first chip under each environmental state. The present invention uses a simulation model instead of an actual experiment to avoid low-precision chip performance test results due to equipment limitations, chip placement problems, etc. in the experimental process, reduces the test cost, improves the test accuracy, and comprehensively improves the efficiency of chip performance testing under multiple environmental conditions.

[0050] Accordingly, the present invention provides a chip performance testing device under multiple environment states, comprising: an acquisition module, an analysis module, a modeling module, a testing module and an adjustment module;

[0051] The acquisition module is used to acquire environmental information corresponding to a plurality of environmental states, and identify a plurality of key influencing factors of the first chip in each of the environmental information;

[0052] The analysis module is used to obtain a plurality of historical operation information of the first chip, and analyze each of the historical operation information in combination with each of the key influencing factors to obtain a plurality of chip influencing parameters corresponding to each of the environmental states;

[0053] The modeling module is used to construct a simulation test model corresponding to each of the environmental states based on the structural parameter information of the first chip and a plurality of chip influencing parameters;

[0054] The testing module is used to perform performance tests on the first chip respectively using simulation test models corresponding to the environmental states, and obtain test results of the first chip under the environmental states;

[0055] The adjustment module is used to analyze and adjust the test results of the first chip under each of the environmental states, respectively, to obtain the chip operating performance of the first chip under each of the environmental states.

[0056] The present invention provides a chip performance test device under multiple environmental states, based on the organic combination of modules, to obtain environmental information corresponding to several environmental states, and identify several key influencing factors of a first chip in each environmental information; to obtain several historical operation information of the first chip, and to analyze each historical operation information in combination with each key influencing factor, to obtain several chip influencing parameters corresponding to each environmental state; to construct a simulation test model corresponding to each environmental state based on the structural parameter information of the first chip and several chip influencing parameters; to perform performance tests on the first chip respectively using the simulation test models corresponding to each environmental state, to obtain the test results of the first chip under each environmental state; to analyze and adjust the test results of the first chip under each environmental state respectively, to obtain the chip operation performance of the first chip under each environmental state. The present invention uses simulation models instead of actual experiments, avoids low-precision chip performance test results due to equipment limitations, chip placement problems, etc. in the experimental process, reduces test costs, improves test accuracy, and comprehensively improves the efficiency of chip performance testing under multiple environmental conditions. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] Figure 1 A schematic diagram of a flow chart of an embodiment of a chip performance testing method under multiple environment states provided by the present invention;

[0058] Figure 2 A schematic structural diagram of an embodiment of a chip performance testing device under multiple environment states provided by the present invention. DETAILED DESCRIPTION

[0059] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0060] The flowcharts shown in the accompanying drawings are only examples and do not necessarily include all the contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps may also be decomposed, combined or partially merged, so the actual execution order may change according to actual conditions.

[0061] Some embodiments of the present invention are described in detail below in conjunction with the accompanying drawings. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.

[0062] Example 1

[0063] See also Figure 1 , is a flow chart of an embodiment of a chip performance testing method under multiple environment states provided by the present invention, the method includes steps 101 to 105, each step is specifically as follows:

[0064] Step 101: Acquire environmental information corresponding to a plurality of environmental states, and identify a plurality of key influencing factors of the first chip in each of the environmental information.

[0065] Optionally, the environmental state includes, but is not limited to, a high temperature state, a high pressure state, a drought state, a humid state, and an electromagnetic environment state. The environmental information of each environmental state includes environmental characteristic information of the environmental state, for example, the environmental characteristic information of the high temperature state is the temperature abnormality characteristic, and the environmental characteristic information of the high pressure state is the air pressure abnormality characteristic, etc. The environmental state also includes environmental states corresponding to different combinations of environmental characteristic information, for example, a high temperature and humid state, a high temperature and high pressure state, and a humid and low temperature state.

[0066] Furthermore, in the first embodiment of the present invention, several key influencing factors of the first chip are identified in each of the environmental information, specifically:

[0067] Identify environmental characteristic information of each of the environmental information;

[0068] Acquire several operating performance influencing factors of the first chip from a preset database;

[0069] Identify the key factor characteristics of each of the operating performance influencing factors;

[0070] Selecting a number of pieces of environmental feature information having the highest similarity to the key factor features from each piece of environmental feature information;

[0071] The environmental information corresponding to each piece of environmental feature information is determined as a key influencing factor of the first chip.

[0072] Optionally, the operating performance influencing factors include, but are not limited to, temperature influencing factors, humidity influencing factors, electromagnetic wave influencing factors, heat dissipation influencing factors, and other stress resistance influencing factors. The key influencing factors affecting the first chip are screened from multiple environmental information by first extracting the environmental feature information of each environmental information; then obtaining multiple operating performance influencing factors of the first chip from a preset database, and extracting the key factor features of each operating performance influencing factor; for each key factor feature, respectively calculating the similarity between each environmental feature information and it, thereby obtaining the environmental feature information with the greatest similarity corresponding to each key factor feature, and determining the environmental information corresponding to these environmental feature information with the greatest similarity as the key influencing factors of the first chip. Among them, the cosine similarity algorithm can be used to calculate the similarity between the key factor feature and the environmental feature information.

[0073] The present invention screens key influencing factors through similarity calculation, thereby improving the accuracy of data screening.

[0074] Step 102: Acquire a plurality of historical operation information of the first chip, and analyze each of the historical operation information in combination with each of the key influencing factors to obtain a plurality of chip influencing parameters corresponding to each of the environmental states.

[0075] Further, in the first embodiment of the present invention, several historical operation information of the first chip is obtained, and each of the historical operation information is analyzed in combination with each of the key influencing factors to obtain several chip influencing parameters corresponding to each of the environmental states, specifically:

[0076] Acquire some historical operation information of the first chip;

[0077] Analyze the influence of each of the key influencing factors in combination with the operating performance information in each of the historical operating information;

[0078] By analyzing the data of each of the environmental states in each of the historical operation information, an influencing factor value range of each of the key influencing factors is obtained;

[0079] Based on the influencing mode and value range of each of the key influencing factors, a chip influencing parameter corresponding to each of the environmental states is generated.

[0080] Furthermore, in the first embodiment of the present invention, the influence mode of each of the key influencing factors is analyzed in combination with the operation performance information in each of the historical operation information, specifically:

[0081] Identifying the factor value of each of the key influencing factors corresponding to each of the historical operation information;

[0082] Based on the factor value of each of the key influencing factors corresponding to each of the historical operation information, a plurality of target historical operation information are selected from each of the historical operation information;

[0083] Identify the operation performance information of each target's historical operation information;

[0084] The change correspondence between each of the key influencing factors of each target historical operation information and each of the operation performance information is analyzed to determine the influence mode of each of the key influencing factors.

[0085] In the first embodiment of the present invention, the influence mode of the key influencing factor is the correspondence between the change information of the key influencing factor and the change information of the operating performance of the first chip. Therefore, the change information of the key influencing factor and the change information of the operating performance of the first chip are first determined, and then the correspondence between the two types of change information is analyzed to obtain the influence mode of the key influencing factor.

[0086] Optionally, a plurality of historical operation information of the first chip may be obtained from a preset database, and factor values ​​of key influencing factors of the first chip may be obtained by identifying the historical operation information.

[0087] Optionally, for each key influencing factor, in each historical operation information, each target historical operation information of the key influencing factor under a single variable condition is screened, and the operation performance information of each target historical operation information can be obtained. Taking the first key influencing factor as an example, the method of screening the target historical operation information in each historical operation information is: screening the historical operation information for the fluctuation range of the influencing factor value of the first key influencing factor greater than the preset fluctuation range threshold, and the fluctuation range of the influencing factor values ​​of other key influencing factors except the first key influencing factor is less than the preset fluctuation range threshold, and determining it as the target historical operation information. Among them, the preset fluctuation range threshold can be adjusted according to the importance of the first key influencing factor.

[0088] Optionally, after filtering the target historical operation information, the operation performance information and the factor value of the key influencing factor of each target historical operation information can be obtained respectively. By analyzing the corresponding relationship between the change of the factor value of the key influencing factor and the change of the operation performance information, the influence mode of each key influencing factor can be determined.

[0089] Optionally, the corresponding relationship between the change in the factor value of the key influencing factor and the change in the operating performance information may be: a proportional relationship between the change amount of the influencing factor value and the change amount of the operating performance.

[0090] The present invention can determine the influence mode of key influencing factors by identifying the proportional relationship between the change in the influencing factor value and the change in the operating performance, thereby facilitating the subsequent adjustment of the chip operating performance corresponding to the performance test result of the first chip.

[0091] Further, in the first embodiment of the present invention, by analyzing the data of each environmental state in each historical operation information, the influencing factor value range of each key influencing factor is obtained, specifically:

[0092] Obtaining status range information of each of the environmental states in each of the historical operation information;

[0093] Identify the influencing factor value of each of the key influencing factors corresponding to each of the state range information;

[0094] The influencing factor values ​​of the key influencing factors are respectively collected to obtain the influencing factor value range of the key influencing factors.

[0095] Optionally, the state range information of the environment state is obtained in each historical operation information, and then the influencing factor value of each key influencing factor corresponding to the state range information is obtained. After respectively obtaining the influencing factor value of each key influencing factor corresponding to each historical operation information, for each key influencing factor, the influencing factor value of the key influencing factor is aggregated to obtain the influencing factor value range of the key influencing factor.

[0096] Furthermore, in the first embodiment of the present invention, based on the influence mode and value range of each of the key influence factors, the chip influence parameters corresponding to each of the environmental states are generated, specifically:

[0097] Based on the influence mode and the value range of each of the key influencing factors, identifying the operation performance change value of the first chip corresponding to each of the influencing factor values ​​of each of the key influencing factors;

[0098] Based on each of the operating performance change values, parameter change information corresponding to each of the operating performance change values ​​is generated to form a parameter change information group corresponding to each key influencing factor;

[0099] The parameter change information groups of all key influencing factors corresponding to each of the environmental states are determined as chip influencing parameters corresponding to each of the environmental states.

[0100] Optionally, for each key influencing factor, based on the influencing mode and value range of the key influencing factor, the operating performance change value of the chip corresponding to each influencing factor value of the key influencing factor can be identified; based on the operating performance change value of the chip corresponding to each influencing factor value of the key influencing factor, parameter change information corresponding to each operating performance change value can be generated to obtain a parameter change information group corresponding to the key influencing factor.

[0101] Optionally, the parameter change information groups of key influencing factors are obtained respectively through the above-mentioned method of obtaining the parameter change information groups of key influencing factors, and for each environmental state, the parameter change information groups of all key influencing factors corresponding to the environmental state are combined to form multiple chip influencing parameters corresponding to the environmental state.

[0102] The present invention determines the chip influencing parameters corresponding to each environmental state by identifying the chip operating performance change value corresponding to each influencing factor value of each key influencing factor, thereby improving the accuracy of determining the chip influencing parameters.

[0103] Step 103: constructing a simulation test model corresponding to each of the environmental states based on the structural parameter information of the first chip and a plurality of the chip influencing parameters.

[0104] Furthermore, in the first embodiment of the present invention, based on the structural parameter information of the first chip and a number of the chip influencing parameters, a simulation test model corresponding to each of the environmental states is constructed, specifically:

[0105] Acquire the sample structure model and structure parameter information of the first chip in a preset database;

[0106] Adjusting the chip structure in the sample structure model based on the structure parameter information to form a simulation structure model of the first chip;

[0107] Based on the chip impact parameters corresponding to the environmental states, generating a performance adjustment group corresponding to each of the environmental states;

[0108] Each of the performance adjustment groups is added to the output layer of the simulation structure model to obtain a simulation test model corresponding to each of the environmental states.

[0109] In the first embodiment of the present invention, based on the structural parameter information of the first chip, the sample structural model of the first chip is adjusted to obtain a simulation structural model of the first chip. Then, each chip impact parameter corresponding to each environmental state is added to the simulation structural model to form a simulation test model corresponding to each environmental state.

[0110] Optionally, a sample structural model and structural parameter information of the first chip can be obtained in a preset database. The sample structural model of the first chip includes a historical simulation structural model with the same model parameters as the first chip established in a historical period; the structural parameter information of the first chip includes the hardware structural parameters of the chip, which are obtained by constructing a finite element simulation model. Based on the structural parameter information of the first chip, the chip structure corresponding to each structural parameter information can be identified; based on the structural parameter information corresponding to each chip structure, the structural parameters of each chip structure in the sample structural model are adjusted to obtain a simulation structural model of the first chip.

[0111] The present invention determines the simulation structure model of the first chip by adjusting the model parameters of the sample structure model, thereby effectively improving the construction efficiency of the simulation structure model.

[0112] In the first embodiment of the present invention, each chip influencing parameter corresponding to each environmental state is added to the simulation structure model, so that a simulation test model corresponding to each environmental state can be obtained.

[0113] Optionally, for each environmental state, a performance adjustment group corresponding to the environmental state can be generated based on the chip influencing parameter change information group corresponding to each key influencing factor of the environmental state; wherein the performance adjustment group includes an operating performance change value group corresponding to each influencing factor value group of all key influencing factors of the environmental state. Each environmental state corresponds to a performance adjustment group, and each performance adjustment group is added to the output layer of the simulation structure model of the first chip, respectively, to obtain a simulation test model corresponding to each environmental state.

[0114] As an example of the first embodiment of the present invention, it is assumed that the environmental state A includes four key influencing factors b, c, d, and e, and the operating performance change value corresponding to each influencing factor value group of the influencing factor value range corresponding to each influencing factor is a(1,2,3,4), b(5,6,7,8), c(9,10,11,12), d(13,14,15), then each operating performance change group includes: 1.(1,5,9,13), 2.(2,6,10,14), 3.(3,7,11,15), 1.(4,8,12,13), 1.(1,5,9,14), ..., n.(4,8,12,15).

[0115] The present invention directly adds a performance adjustment group for each environmental state in the model output layer, thereby identifying the chip operating performance of the chip in each environmental state by adjusting the chip operating performance corresponding to the chip test results, thereby improving the accuracy of identifying the chip operating performance.

[0116] Step 104: using the simulation test models corresponding to the environmental states, respectively perform performance tests on the first chip to obtain test results of the first chip under the environmental states.

[0117] Further, in the first embodiment of the present invention, the first chip is subjected to performance tests respectively using the simulation test models corresponding to the environmental states, and test results of the first chip under the environmental states are obtained, specifically:

[0118] Based on the simulation test models corresponding to the environmental states, respectively perform simulation test processing on the first chip to obtain initial test results corresponding to the simulation test models;

[0119] Generating each operating performance change value group based on the performance adjustment group corresponding to each simulation test model;

[0120] Each of the operating performance change value groups is added to the corresponding initial test result to form a test result of the first chip under each of the environmental conditions.

[0121] In the first embodiment of the present invention, a functional test process required by a user to perform a performance test on a first chip is obtained, and a simulation test process is performed on the first chip based on a simulation test model of each environmental state, so that the test results of the first chip in each environmental state can be obtained.

[0122] Optionally, through the performance testing process that needs to be performed on the first chip, each simulation test model is used to perform simulation testing on the first chip to obtain initial test results corresponding to each simulation test model; based on the performance adjustment group of the environmental state corresponding to each simulation test model, each operating performance change value group is added to the initial test result corresponding to each simulation test model to obtain each test result under the environmental state.

[0123] The present invention can improve the comprehensiveness and efficiency of the test under each environmental state by using the combination result of each initial test result and each operating performance change value group as each test result under each environmental state.

[0124] Step 105: Analyze and adjust the test results of the first chip under each of the environmental conditions respectively, and obtain the chip operation performance of the first chip under each of the environmental conditions.

[0125] Furthermore, in the first embodiment of the present invention, the test results of the first chip under each of the environmental conditions are analyzed and adjusted respectively to obtain the chip operating performance of the first chip under each of the environmental conditions, specifically:

[0126] Analyze the chip operating performance corresponding to each test result to obtain the chip operating performance under various environmental conditions;

[0127] Analyzing the initial chip operating performance corresponding to the initial test result in each of the test results;

[0128] Based on the operation performance change value group of each test result, adjust each of the initial chip operation performances to obtain the chip operation performance corresponding to each of the test results;

[0129] The chip operating performance corresponding to each of the test results is respectively determined as the chip operating performance of the first chip under each environmental state.

[0130] In the first embodiment of the present invention, after obtaining the test results output by each simulation test model, the chip operation performance of the first chip under each environmental state can be obtained by analyzing the chip operation performance corresponding to each test result. The first chip operation performance includes the chip operation rate, operation state fluctuation range, jamming / packet loss / waiting times, etc.

[0131] Optionally, for each test result, analyze the initial chip operating performance corresponding to the initial test result in the test result; adjust the initial chip operating performance based on the operating performance change value group of the test result to obtain the chip operating performance corresponding to the test result; and use the chip operating performance of each test result in each environmental state as the chip operating performance of the first chip in each environmental state.

[0132] The present invention determines the chip operating performance corresponding to each environmental state by adjusting the initial chip operating performance of the initial test result, thereby improving the accuracy and efficiency of identifying the chip operating performance corresponding to each environmental state.

[0133] In summary, the first embodiment of the present invention provides a chip performance test method under multiple environmental states, obtains environmental information corresponding to several environmental states, and identifies several key influencing factors of the first chip in each environmental information; obtains several historical operation information of the first chip, and analyzes each historical operation information in combination with each key influencing factor to obtain several chip influencing parameters corresponding to each environmental state; constructs a simulation test model corresponding to each environmental state based on the structural parameter information of the first chip and several chip influencing parameters; uses the simulation test model corresponding to each environmental state to perform performance tests on the first chip respectively, and obtains the test results of the first chip under each environmental state; analyzes and adjusts the test results of the first chip under each environmental state respectively, and obtains the chip operation performance of the first chip under each environmental state. The present invention uses simulation models instead of actual experiments to avoid low-precision chip performance test results due to equipment limitations, chip placement problems, etc. in the experimental process, reduces test costs, improves test accuracy, and comprehensively improves the efficiency of chip performance testing under multiple environmental conditions.

[0134] Example 2

[0135] See also Figure 2 , is a schematic diagram of the structure of an embodiment of a chip performance testing device under multiple environment states provided by the present invention, the device includes an acquisition module 201, an analysis module 202, a modeling module 203, a testing module 204 and an adjustment module 205;

[0136] The acquisition module 201 is used to acquire environmental information corresponding to a plurality of environmental states, and identify a plurality of key influencing factors of the first chip in each of the environmental information;

[0137] The analysis module 202 is used to obtain a plurality of historical operation information of the first chip, and analyze each of the historical operation information in combination with each of the key influencing factors to obtain a plurality of chip influencing parameters corresponding to each of the environmental states;

[0138] The modeling module 203 is used to construct a simulation test model corresponding to each of the environmental states based on the structural parameter information of the first chip and a plurality of chip influencing parameters;

[0139] The testing module 204 is used to perform performance tests on the first chip respectively using the simulation test models corresponding to the environmental states, and obtain test results of the first chip under the environmental states;

[0140] The adjustment module 205 is used to analyze and adjust the test results of the first chip under each of the environmental states, respectively, to obtain the chip operating performance of the first chip under each of the environmental states.

[0141] Furthermore, in the second embodiment of the present invention, several key influencing factors of the first chip are identified in each of the environmental information, specifically:

[0142] Identify environmental characteristic information of each of the environmental information;

[0143] Acquire several operating performance influencing factors of the first chip from a preset database;

[0144] Identify the key factor characteristics of each of the operating performance influencing factors;

[0145] Selecting a number of pieces of environmental feature information having the highest similarity to the key factor features from each piece of environmental feature information;

[0146] The environmental information corresponding to each piece of environmental feature information is determined as a key influencing factor of the first chip.

[0147] Further, in the second embodiment of the present invention, several historical operation information of the first chip is obtained, and each of the historical operation information is analyzed in combination with each of the key influencing factors to obtain several chip influencing parameters corresponding to each of the environmental states, specifically:

[0148] Acquire some historical operation information of the first chip;

[0149] Analyze the influence of each of the key influencing factors in combination with the operating performance information in each of the historical operating information;

[0150] By analyzing the data of each of the environmental states in each of the historical operation information, an influencing factor value range of each of the key influencing factors is obtained;

[0151] Based on the influencing mode and value range of each of the key influencing factors, a chip influencing parameter corresponding to each of the environmental states is generated.

[0152] Furthermore, in the second embodiment of the present invention, the influence mode of each of the key influencing factors is analyzed in combination with the operation performance information in each of the historical operation information, specifically:

[0153] Identifying the factor value of each of the key influencing factors corresponding to each of the historical operation information;

[0154] Based on the factor value of each of the key influencing factors corresponding to each of the historical operation information, a plurality of target historical operation information are selected from each of the historical operation information;

[0155] Identify the operation performance information of each target's historical operation information;

[0156] The change correspondence between each of the key influencing factors of each target historical operation information and each of the operation performance information is analyzed to determine the influence mode of each of the key influencing factors.

[0157] Further, in the second embodiment of the present invention, by analyzing the data of each environmental state in each historical operation information, the influencing factor value range of each key influencing factor is obtained, specifically:

[0158] Obtaining status range information of each of the environmental states in each of the historical operation information;

[0159] Identify the influencing factor value of each of the key influencing factors corresponding to each of the state range information;

[0160] The influencing factor values ​​of the key influencing factors are respectively collected to obtain the influencing factor value range of the key influencing factors.

[0161] Furthermore, in the second embodiment of the present invention, based on the influence mode and value range of each of the key influence factors, the chip influence parameters corresponding to each of the environmental states are generated, specifically:

[0162] Based on the influence mode and the value range of each of the key influencing factors, identifying the operation performance change value of the first chip corresponding to each of the influencing factor values ​​of each of the key influencing factors;

[0163] Based on each of the operating performance change values, parameter change information corresponding to each of the operating performance change values ​​is generated to form a parameter change information group corresponding to each key influencing factor;

[0164] The parameter change information groups of all key influencing factors corresponding to each of the environmental states are determined as chip influencing parameters corresponding to each of the environmental states.

[0165] Furthermore, in the second embodiment of the present invention, based on the structural parameter information of the first chip and a number of the chip influencing parameters, a simulation test model corresponding to each of the environmental states is constructed, specifically:

[0166] Acquire the sample structure model and structure parameter information of the first chip in a preset database;

[0167] Adjusting the chip structure in the sample structure model based on the structure parameter information to form a simulation structure model of the first chip;

[0168] Based on the chip impact parameters corresponding to the environmental states, generating a performance adjustment group corresponding to each of the environmental states;

[0169] Each of the performance adjustment groups is added to the output layer of the simulation structure model to obtain a simulation test model corresponding to each of the environmental states.

[0170] Furthermore, in the second embodiment of the present invention, the first chip is subjected to performance tests respectively using the simulation test models corresponding to the environmental states, and test results of the first chip under the environmental states are obtained, specifically:

[0171] Based on the simulation test models corresponding to the environmental states, respectively perform simulation test processing on the first chip to obtain initial test results corresponding to the simulation test models;

[0172] Generating each operating performance change value group based on the performance adjustment group corresponding to each simulation test model;

[0173] Each of the operating performance change value groups is added to the corresponding initial test result to form a test result of the first chip under each of the environmental conditions.

[0174] Furthermore, in the second embodiment of the present invention, the test results of the first chip under each of the environmental conditions are analyzed and adjusted respectively to obtain the chip operation performance of the first chip under each of the environmental conditions, specifically:

[0175] Analyze the chip operating performance corresponding to each test result to obtain the chip operating performance under various environmental conditions;

[0176] Analyzing the initial chip operating performance corresponding to the initial test result in each of the test results;

[0177] Based on the operation performance change value group of each test result, adjust each of the initial chip operation performances to obtain the chip operation performance corresponding to each of the test results;

[0178] The chip operating performance corresponding to each of the test results is respectively determined as the chip operating performance of the first chip under each environmental state.

[0179] In summary, the second embodiment of the present invention provides a chip performance test device under multiple environmental states, based on the organic combination of modules, to obtain environmental information corresponding to several environmental states, and identify several key influencing factors of the first chip in each environmental information; to obtain several historical operation information of the first chip, and to analyze each historical operation information in combination with each key influencing factor, to obtain several chip influencing parameters corresponding to each environmental state; to construct a simulation test model corresponding to each environmental state based on the structural parameter information of the first chip and several chip influencing parameters; to use the simulation test model corresponding to each environmental state to perform performance tests on the first chip respectively, and obtain the test results of the first chip under each environmental state; to analyze and adjust the test results of the first chip under each environmental state respectively, and obtain the chip operation performance of the first chip under each environmental state. The present invention uses simulation models instead of actual experiments to avoid low-precision chip performance test results due to equipment limitations, chip placement problems, etc. in the experimental process, reduce test costs, improve test accuracy, and comprehensively improve the efficiency of chip performance testing under multiple environmental conditions.

[0180] It should be understood that, although the various steps in the flowcharts involved in the above-mentioned embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps does not have a strict order restriction, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-mentioned embodiments can include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0181] The specific embodiments described above further illustrate the purpose, technical solutions and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. It is particularly pointed out that for those skilled in the art, any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the scope of protection of the present invention.

Claims

1. A chip performance testing method under multiple environment states, characterized in that: include: Acquire environmental information corresponding to a plurality of environmental states, and identify a plurality of key influencing factors of the first chip in each of the environmental information; Acquire several historical operation information of the first chip, and analyze each of the historical operation information in combination with each of the key influencing factors to obtain several chip influencing parameters corresponding to each of the environmental states; Based on the structural parameter information of the first chip and the plurality of chip influencing parameters, construct a simulation test model corresponding to each of the environmental states; Using the simulation test models corresponding to the environmental states, respectively perform performance tests on the first chip to obtain test results of the first chip under the environmental states; The test results of the first chip under each of the environmental conditions are analyzed and adjusted respectively to obtain the chip operation performance of the first chip under each of the environmental conditions.

2. The chip performance testing method under multiple environment states according to claim 1, characterized in that: The identifying of several key influencing factors of the first chip in each of the environmental information is specifically: Identify environmental characteristic information of each of the environmental information; Acquire several operating performance influencing factors of the first chip from a preset database; Identify the key factor characteristics of each of the operating performance influencing factors; Selecting a number of pieces of environmental feature information having the highest similarity to the key factor features from each piece of environmental feature information; The environmental information corresponding to each piece of environmental feature information is determined as a key influencing factor of the first chip.

3. The chip performance testing method under multiple environment states according to claim 2, characterized in that: The acquiring of several historical operation information of the first chip, and analyzing the historical operation information in combination with the key influencing factors to obtain several chip influencing parameters corresponding to the environmental states are specifically: Acquire some historical operation information of the first chip; Analyze the influence of each of the key influencing factors in combination with the operating performance information in each of the historical operating information; By analyzing the data of each of the environmental states in each of the historical operation information, an influencing factor value range of each of the key influencing factors is obtained; Based on the influencing mode and value range of each of the key influencing factors, a chip influencing parameter corresponding to each of the environmental states is generated.

4. The chip performance testing method under multiple environment states according to claim 3, characterized in that: The analysis of the influence of each of the key influencing factors in combination with the operation performance information in each of the historical operation information is specifically as follows: Identifying the factor value of each of the key influencing factors corresponding to each of the historical operation information; Based on the factor value of each of the key influencing factors corresponding to each of the historical operation information, a plurality of target historical operation information are selected from each of the historical operation information; Identify the operation performance information of each target's historical operation information; The change correspondence between each of the key influencing factors of each target historical operation information and each of the operation performance information is analyzed to determine the influence mode of each of the key influencing factors.

5. The chip performance testing method under multiple environment states according to claim 4, characterized in that: The influencing factor value range of each key influencing factor is obtained by analyzing the data of each environmental state in each historical operation information, specifically: Obtaining status range information of each of the environmental states in each of the historical operation information; Identify the influencing factor value of each of the key influencing factors corresponding to each of the state range information; The influencing factor values ​​of the key influencing factors are respectively collected to obtain the influencing factor value range of the key influencing factors.

6. The chip performance testing method under multiple environment states according to claim 5, characterized in that: The chip influencing parameters corresponding to each of the environmental states are generated based on the influencing mode and value range of each of the key influencing factors, specifically: Based on the influence mode and the value range of each of the key influencing factors, identifying the operation performance change value of the first chip corresponding to each of the influencing factor values ​​of each of the key influencing factors; Based on each of the operating performance change values, parameter change information corresponding to each of the operating performance change values ​​is generated to form a parameter change information group corresponding to each key influencing factor; The parameter change information groups of all key influencing factors corresponding to each of the environmental states are determined as chip influencing parameters corresponding to each of the environmental states.

7. The chip performance testing method under multiple environment states according to claim 6, characterized in that: The construction of the simulation test model corresponding to each of the environmental states based on the structural parameter information of the first chip and the plurality of chip influencing parameters is specifically as follows: Acquire the sample structure model and structure parameter information of the first chip in a preset database; Adjusting the chip structure in the sample structure model based on the structure parameter information to form a simulation structure model of the first chip; Based on the chip impact parameters corresponding to the environmental states, generating a performance adjustment group corresponding to each of the environmental states; Each of the performance adjustment groups is added to the output layer of the simulation structure model to obtain a simulation test model corresponding to each of the environmental states.

8. The chip performance testing method under multiple environment states according to claim 7, characterized in that: The simulation test models corresponding to the environmental states are used to perform performance tests on the first chip respectively, and test results of the first chip under the environmental states are obtained, specifically: Based on the simulation test models corresponding to the environmental states, respectively perform simulation test processing on the first chip to obtain initial test results corresponding to the simulation test models; Generating each operating performance change value group based on the performance adjustment group corresponding to each simulation test model; Each of the operating performance change value groups is added to the corresponding initial test result to form a test result of the first chip under each of the environmental conditions.

9. The chip performance testing method under multiple environment states according to claim 8, characterized in that: The test results of the first chip under each of the environmental conditions are analyzed and adjusted respectively to obtain the chip operation performance of the first chip under each of the environmental conditions, specifically: Analyze the chip operating performance corresponding to each test result to obtain the chip operating performance under various environmental conditions; Analyzing the initial chip operating performance corresponding to the initial test result in each of the test results; Based on the operation performance change value group of each test result, adjust each of the initial chip operation performances to obtain the chip operation performance corresponding to each of the test results; The chip operating performance corresponding to each of the test results is respectively determined as the chip operating performance of the first chip under each environmental state.

10. A chip performance testing device under multiple environment states, characterized in that: include: Acquisition module, analysis module, modeling module, testing module and adjustment module; The acquisition module is used to acquire environmental information corresponding to a plurality of environmental states, and identify a plurality of key influencing factors of the first chip in each of the environmental information; The analysis module is used to obtain a plurality of historical operation information of the first chip, and analyze each of the historical operation information in combination with each of the key influencing factors to obtain a plurality of chip influencing parameters corresponding to each of the environmental states; The modeling module is used to construct a simulation test model corresponding to each of the environmental states based on the structural parameter information of the first chip and a plurality of chip influencing parameters; The testing module is used to perform performance tests on the first chip respectively using simulation test models corresponding to the environmental states, and obtain test results of the first chip under the environmental states; The adjustment module is used to analyze and adjust the test results of the first chip under each of the environmental states, respectively, to obtain the chip operating performance of the first chip under each of the environmental states.

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