Code processing method and device and storage medium
Through decompilation and compilation technology, the software code of the source platform is transplanted to the target platform, which solves the difficulty of building an ARMv8 platform software ecosystem and achieves cross-platform software adaptation and improvement in development efficiency.
Patent Information
- Application Number
- CN202411197562.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2020-09-21
- Filing Date
- 2020-09-30
- Publication Date
- 2025-01-24
Smart Images

Figure CN119356689A_ABST
Abstract
Description
[0001] This application is a divisional application. The application number of the original application is 202011066288.4, and the original application date is September 30, 2020. The entire contents of the original application are incorporated into this application by reference. Technical Field
[0002] The embodiments of the present application relate to the field of code processing technology, and in particular, to a code processing method, device and storage medium. Background Art
[0003] The x86 platform is a general computing platform developed by Intel Corporation. Specifically, it refers to a series of CPU instruction set architectures based on Intel 8086 and backward compatible. Since its launch in 1978, the x86 platform has evolved into a large and complex instruction set after years of accumulation.
[0004] In actual applications, developers usually develop various software that can be applied to the x86 platform based on the x86 platform, thus building a huge software ecosystem. Therefore, many application software may only be applicable to the x86 platform, and cannot be applied to other platforms, such as the ARMv8 platform (a processor architecture released by ARM that supports 64-bit instruction sets).
[0005] When building a software ecosystem for the ARMv8 platform or other platforms, technicians usually write software code according to the platform's code rules (such as instruction sets, etc.) so that the developed software can be applied to the platform. However, the difficulty of developing new software for the platform is usually high, and the software development efficiency is slow, which makes it difficult to build a software ecosystem for the ARMv8 platform or other platforms. For this reason, there is an urgent need for a method that can reduce the difficulty of building a platform software ecosystem. Summary of the invention
[0006] The embodiments of the present application provide a code processing method, device and storage medium to reduce the difficulty of building a software ecosystem for a platform.
[0007] In the first aspect, the embodiment of the present application provides a code processing method, which reduces the difficulty of building the software ecology of the platform by transplanting the software code of the source platform to the first target platform. The source platform and the first target platform belong to different platforms, and specifically may have different instruction sets. In specific implementation, a first code based on a low-level language applied to the source platform can be first obtained. The first code can be, for example, a code based on an assembly language or a machine language, and can be recognized by the source platform; then, the obtained first code can be decompiled to obtain a first intermediate representation (IR), and the first IR can be an IR related to the first target platform, or an IR unrelated to the first target platform; then, the first IR can be compiled to obtain a code based on a low-level language applied to the first target platform, and the obtained code can be recognized and run by the first target platform, thereby realizing the transplantation of the software code on the source platform to the first target platform.
[0008] At the same time, the above-mentioned process of decompiling and compiling the software code does not require the participation of developers, thereby isolating developers from the software code and reducing the possibility of developers contacting the software code. For software operators, optimization and secondary development can be performed based on the software code transplanted to the first target platform, which is convenient for software operators to maintain the software code transplanted to the first target platform.
[0009] The source platform may be, for example, an x86 platform, and the first target platform may be an ARM platform, specifically an ARMv8 platform, etc. Of course, in practical applications, the source platform may be any platform, and the first target platform may be any platform different from the source platform.
[0010] The above method can be applied locally or in the cloud. When applied locally, it can be applied to a local terminal or server, etc., and when applied in the cloud, it can be presented to users in the form of cloud services.
[0011] In a possible implementation, the first code of the source platform can be transplanted to any target platform. Specifically, taking transplanting to the first target platform and the second target platform as an example, in addition to obtaining the low-level language-based code applied to the first target platform through the above-mentioned decompilation and compilation process, it is also possible to obtain the IR corresponding to the second platform according to the first code during the decompilation process. The IR corresponding to the second target platform is different from the first IR, and the applicable target platform is different. The first target platform and the second target platform have different instruction sets, and the second target platform and the source platform also have different instruction sets. That is, when the software code on the source platform is transplanted to any platform, the above-mentioned decompilation and compilation process can be used to implement it.
[0012] In a possible implementation, a target platform selection interface may be presented to the user, and the target platform selection interface may present multiple target platform candidates for the user to select a target platform. Then, in response to the user's selection operation for the target platform, the target platform selected by the user may be determined from the multiple target platforms. For example, the first target platform may be determined according to the selection operation performed by the user on the target platform selection interface.
[0013] In a possible implementation, in the process of decompiling the first code, annotation information of the first code may be obtained first. The annotation information may include, for example, any one or more of the type, quantity, and jump address type of the parameters in the first code. In this way, when decompiling, the first code may be decompiled according to the annotation information to obtain the first IR. Taking the parameter type in the annotation information as an example, assuming that the length of the parameter in the first code is 64 bits, in the first IR obtained when the first code is decompiled, the length of the parameter can still be 64 bits (such as floating point type) instead of being changed to 32 bits (such as integer type). In this way, the type of the parameter before and after decompilation can be kept consistent, reducing the possibility of logical errors in the first IR.
[0014] In a possible implementation, during the decompiling process of the first code, the initially obtained IR can also be optimized. Specifically, after the first code is decompiled, a second IR can be obtained. Usually, the second IR may have a certain optimization space. For example, the data reading method in the generated second IR is to read 64 bits of data each time, and the first target platform has the ability to read 128 bits at a time. The data reading method in the second IR can be optimized to read 128 bits of data each time. In specific implementation, the second IR can be optimized according to the first target platform, such as according to the hardware / logic capabilities of the first target platform, so as to obtain the above-mentioned first IR. In this way, after the first IR is subsequently compiled, a more efficient code can be obtained.
[0015] In a possible implementation, prompt information may be further generated and presented, and the prompt information may be used to provide prompts for items to be checked, wherein the items to be checked may be generated based on the differences between the first target platform and the source platform. For example, the prompt information may specifically be instructions of the source platform displayed in a highlighted manner and instructions of the first target platform having the same semantics as the instructions, so that the user may determine whether the instructions of the first target platform obtained by translating the instructions of the source platform based on the prompt information are accurate.
[0016] In a possible implementation, when the above method is applied to the cloud, the user can provide the first code to the cloud. For example, the user can send a code processing request containing the first code to the cloud through a terminal or a client, so that the cloud obtains the first code; accordingly, after the cloud performs corresponding decompilation and compilation processing on the received first code, the obtained low-level language-based code applied to the first target platform can be sent to the user, so that the user can obtain the code he needs.
[0017] In a possible implementation, when the first code is decompiled, the first code may be decompiled according to the instruction semantic library corresponding to the source platform. For example, the instruction semantic library may contain the semantics of multiple instructions of the source platform, so that during the decompilation process, each instruction in the first code may be traversed, and the semantics of the instruction may be identified according to the instruction semantic library, so that the first code may be decompiled into the corresponding compiler IR according to the identified instruction semantics.
[0018] In a possible implementation, the instruction semantic library can also be modified by the user. For example, the user can add single instruction multiple data (SIMD) instructions to the instruction semantic library to identify SIMD instructions in the first code, so that during the decompilation process, the SIMD instructions in the first code can be decompiled accordingly so that the first IR contains instructions with vectorized semantics. Accordingly, the terminal or server can respond to the user's modification operation on the instruction semantic library and modify the instruction semantic library accordingly.
[0019] In a possible implementation, in an embedded assembly scenario, the software code to be transplanted may include both a first code based on a low-level language and a variable based on a high-level language. Therefore, when the terminal or server obtains the first code, it also obtains the variable based on the high-level language, so that when the first code is decompiled, the first code can be translated into a first IR containing a function, the function includes a formal parameter, and the actual parameter corresponding to the formal parameter can be a variable. That is, during the decompilation process, the variable based on the high-level language can be passed as an actual parameter to the formal parameter in the function.
[0020] In a possible implementation, when translating the first code into a first IR containing a function, the semantics of each instruction string in the first code can be specifically determined, so that the function corresponding to the semantics of each instruction string in the first code can be determined based on the correspondence between the semantics and the function, and then the first IR containing the function can be generated.
[0021] In a possible implementation, before decompiling the first code, the variables in the first code may be relocated, so that after decompiling the first code, the variables in the obtained first IR may have different logical addresses. Taking the first variable and the second variable included in the first IR as an example, the first variable may have a first logical address, and the second variable may have a second logical address, and the first logical address and the second logical address are different logical addresses. In a specific implementation, before decompiling the first code, a preset first logical address may be configured for the first variable in the first code, and a preset second logical address may be configured for the second variable in the first code, wherein both the first logical address and the second logical address may be abstract logical addresses.
[0022] In a possible implementation, since there may be differences in function calling conventions or SIMD instructions between the source platform and the first target platform, when decompiling the first code, the first code may be decompiled according to the function calling conventions of the first target platform or the SIMD instructions of the first target platform, so that the final code can meet the function calling conventions or SIMD instruction requirements of the first target platform. In practical applications, the decompilation process may be performed based on the differences in function calling conventions or SIMD instructions between the first target platform and the source platform.
[0023] In a possible implementation, when the first code includes SIMD instructions, the first code may be decompiled in a direct vectorized manner. Specifically, a third code based on a low-level language of the target platform may be generated first, and the third code may be used to describe the vectorized semantics of the SIMD instructions in the first code; illustratively, the third code may be a code including an intrinsic function. Then, the third code may be decompiled to obtain a first IR corresponding to the SIMD instructions of the first target platform with a vectorization mark, and at this time, the first IR is associated with the first target platform.
[0024] In a possible implementation, when the first code includes SIMD instructions, the first code may be decompiled in an indirect vectorization manner. In a specific implementation, a fourth code based on a high-level language may be generated first, and the fourth code may be used to describe the vectorization semantics of the SIMD instructions in the first code; then, the fourth code may be compiled to obtain a first IR with a vectorization mark. Then, in the compilation stage, the IR with the vectorization mark may be automatically vectorized and compiled to generate a low-level language-based code for the first target platform, which may include the SIMD instructions of the first target platform. In this way, indirect vectorization processing of the SIMD instructions in the first code is achieved.
[0025] In the second aspect, the embodiment of the present application also provides a code processing method. In the process of implementing software code transplantation, a first code based on a low-level language applied to a source platform can be obtained, and then a second code can be output based on the first code, wherein the second code is a code based on a low-level language that can be applied to a first target platform, and the second code is obtained by processing the obtained first code, for example, the first code can be decompiled and then compiled, and the source platform and the first target platform have different instruction sets. In this way, the second code applied to the first target platform can be obtained based on the first code of the source platform, and the obtained second code can be recognized and run by the first target platform, thereby realizing the transplantation of the software code on the source platform to the first target platform.
[0026] At the same time, the above processing of the first code does not require the participation of developers, thereby isolating developers from software codes and reducing the possibility of developers contacting software codes. For software operators, optimization and secondary development can be performed based on the software code transplanted to the first target platform, which is convenient for software operators to maintain the software code transplanted to the first target platform.
[0027] The source platform may be, for example, an x86 platform, and the first target platform may be an ARM platform, specifically an ARMv8 platform, etc. Of course, in practical applications, the source platform may be any platform, and the first target platform may be any platform different from the source platform.
[0028] In a possible implementation, when the second code is output, the second code may be presented through a code display interface, so that the user can view the translated code on the code display interface and perform secondary development, optimization and other operations based on the translated code.
[0029] In a possible implementation, the processing of the first code can be applied to the cloud, and when obtaining the first code, the first code from the user can be specifically received; for example, the user can send a code processing request to the cloud through a terminal or a client, and the code processing request can carry the first code, etc. Of course, the user can also provide the first code to the cloud in other ways. In this way, after the cloud processes the first code and obtains the second code, when outputting the second code, the second code can be specifically output to the user, for example, it can be presented on the code display interface of the terminal used by the user.
[0030] In a possible implementation, before processing the first code, a target platform selection interface may be presented, and the target platform selection interface may present multiple target platform candidates for the user to select a target platform. Then, in response to the user's selection operation for the target platform, the target platform selected by the user may be determined from the multiple target platforms. For example, the first target platform may be determined according to the selection operation performed by the user on the target platform selection interface.
[0031] In one possible implementation, when processing the first code, specifically, the instruction semantic library corresponding to the source platform may be first obtained, and the first code may be processed using the instruction semantic library. For example, the instruction semantic library may contain the semantics of multiple instructions of the source platform. In this way, when processing the first code, each instruction in the first code may be traversed, and the semantics of the instruction may be identified based on the instruction semantic library, so that the first code may be decompiled into the corresponding compiler IR based on the identified instruction semantics.
[0032] In a possible implementation, the user may also modify the instruction semantic library corresponding to the source platform. For example, the user may add SIMD instructions, etc. to the instruction semantic library to identify SIMD instructions, etc. in the first code. Then, the instruction semantic library corresponding to the source platform may be modified in response to the modification operation performed by the user on the instruction semantic library. In this way, in the process of decompiling the first code, decompilation may be performed according to the modified instruction semantic library.
[0033] In a possible implementation, after obtaining the second code according to the first code, prompt information may be generated and presented, and the prompt information is used to prompt the items to be checked, wherein the items to be checked are generated based on the differences between the first target platform and the source platform. For example, the prompt information may specifically be the instructions of the source platform displayed in a highlighted manner and the instructions of the first target platform having the same semantics as the instructions, so that the user can determine whether the instructions of the first target platform obtained by translating the instructions of the source platform based on the prompt information are accurate.
[0034] In a possible implementation, not only the second code can be output, but also the first IR obtained by decompiling the first code can be presented. Correspondingly, the output second code is obtained by compiling the first IR. In this way, the user can debug, observe, and perform corresponding analysis on the presented first IR.
[0035] In a possible implementation, a second IR may also be presented, and the second IR is obtained by decompiling the first code. Specifically, during the decompilation process, the second IR may be first decompiled according to the first code, and then the second IR may be optimized to obtain the first IR. In this way, the first IR obtained after the optimization process may be more efficient in the code execution stage. For example, the data reading method in the generated second IR is to read 64 bits of data each time, and the first target platform has the ability to read 128 bits at a time. The data reading method in the second IR may be optimized to read 128 bits of data each time, so that when reading the same amount of data, there is no need to perform the data reading operation twice.
[0036] In a possible implementation, the output first IR can also be modified by the user. For example, when the user determines that there is a logical error or code that can be optimized in the output first IR, the first IR can be modified. Then, the terminal or server can obtain a modified first IR in response to the modification operation on the first IR, so that it can be compiled according to the modified first IR to obtain a relatively better third code, which is a low-level language-based code applied to the first target platform, so that the third code can be presented to the user.
[0037] In a possible implementation, when a low-level language-based code applied to a second target platform is generated based on the first code, when the first code is decompiled, the first code can be decompiled into a third IR, and then the third IR can be compiled to obtain a low-level language code applied to the second target platform. The IRs corresponding to different target platforms can be different, so that different IRs and codes can be generated for different target platforms.
[0038] In a possible implementation, the user may also modify the output second code, for example, the user may perform secondary development and optimization based on the output second code. Accordingly, by responding to the user's modification operation on the second code, the modified second code may be obtained, and the modified second code may be presented to the user in real time for the user to view.
[0039] In a possible implementation, when obtaining the first code, not only the low-level language-based first code applied to the source platform can be obtained, but also variables based on high-level languages can be obtained at the same time. For example, in an embedded assembly scenario, not only assembly language codes as low-level languages are included, but also variables of high-level languages, such as variables of C / C++ languages, etc. can be included.
[0040] In a third aspect, based on the same inventive concept as the method embodiment of the first aspect, an embodiment of the present application provides a computing device. The device has functions corresponding to the implementation of each embodiment of the first aspect. The function can be implemented by hardware, or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions.
[0041] In a fourth aspect, based on the same inventive concept as the method embodiment of the second aspect, the present application embodiment provides two computing devices. The device has the functions corresponding to the implementation of each embodiment of the second aspect. The function can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions.
[0042] In a fifth aspect, an embodiment of the present application provides a computing device, comprising: a processor and a memory; the memory is used to store instructions, and when the computing device is running, the processor executes the instructions stored in the memory, so that the device executes the code processing method in the above-mentioned first aspect or any implementation of the first aspect. It should be noted that the memory can be integrated into the processor or can be independent of the processor. The device may also include a bus. The processor is connected to the memory via a bus. The memory may include a readable memory and a random access memory.
[0043] In a sixth aspect, an embodiment of the present application provides a computing device, comprising: a processor and a memory; the memory is used to store instructions, and when the computing device is running, the processor executes the instructions stored in the memory, so that the device executes the code processing method in the above-mentioned second aspect or any implementation of the second aspect. It should be noted that the memory can be integrated into the processor or can be independent of the processor. The device may also include a bus. The processor is connected to the memory via a bus. The memory may include a readable memory and a random access memory.
[0044] In the seventh aspect, an embodiment of the present application further provides a readable storage medium, in which a program or instruction is stored. When the program or instruction is run on a computer, the code processing method in the above-mentioned first aspect or any implementation of the first aspect is executed.
[0045] In an eighth aspect, an embodiment of the present application further provides a readable storage medium, wherein a program or instruction is stored in the readable storage medium, and when the program or instruction is run on a computer, the code processing method in the above-mentioned second aspect or any implementation of the second aspect is executed.
[0046] In a ninth aspect, an embodiment of the present application further provides a computer program product comprising instructions, which, when executed on a computer, enables the computer to execute any code processing method in the above-mentioned first aspect or any implementation of the first aspect.
[0047] In the tenth aspect, an embodiment of the present application also provides a computer program product comprising instructions, which, when executed on a computer, enables the computer to execute any code processing method in the above-mentioned second aspect or any implementation of the second aspect.
[0048] In addition, the technical effects brought about by any implementation method in the third to tenth aspects can refer to the technical effects brought about by different implementation methods in the first aspect, or can refer to the technical effects brought about by different implementation methods in the second aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS
[0049] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present application. For ordinary technicians in this field, other drawings can also be obtained based on these drawings.
[0050] Figure 1 This is a schematic diagram of an exemplary system architecture in an embodiment of the present application;
[0051] Figure 2A flowchart of a code processing method in an embodiment of the present application;
[0052] Figure 3 This is a schematic diagram of a code embedded in an assembly scenario in an embodiment of the present application;
[0053] Figure 4 A schematic diagram of a process of parameterized translation in an embodiment of the present application;
[0054] Figure 5 A schematic diagram of adjusting the parameters of a function in an embodiment of the present application;
[0055] Figure 6 IR schematic diagram before and after optimization in the embodiment of the present application;
[0056] Figure 7 A schematic diagram of a target platform selection interface in an embodiment of the present application;
[0057] Figure 8 This is a schematic diagram of a user 801 interacting with a computing device 802 in an embodiment of the present application;
[0058] Fig. 9 A schematic diagram of the structure of a computing device in an embodiment of the present application;
[0059] Fig.10 A schematic diagram of the structure of another computing device in an embodiment of the present application;
[0060] Fig.11 A schematic diagram of the hardware structure of a computing device in an embodiment of the present application;
[0061] Fig.12 Schematic diagram of the hardware structure of another computing device in an embodiment of the present application. DETAILED DESCRIPTION
[0062] When building a platform's software ecosystem, it is usually up to the technicians to write software that can run on the platform. However, this method of manually writing software program codes not only has low software development efficiency, but also is prone to various program errors when writing program codes, which makes it more difficult to develop software, and thus makes it more difficult to build a platform software ecosystem.
[0063] To this end, the embodiment of the present application provides a code processing method, which can be to port software on other platforms to this platform, thereby enriching the software that can be successfully run on this platform, thereby reducing the difficulty of building the software ecology of this platform. In specific implementation, the software code of the source platform (i.e., the above-mentioned other platforms) can be decompiled to obtain the internal representation (intermediate representation, IR) of the compiler, and then the IR is compiled into a low-level language-based code applied to the target platform (the above-mentioned platform), so that the code can be successfully run on the target platform, so that the software of the source platform can be ported to the target platform for operation. Of course, the source platform and the target platform are different platforms, and the difference between the two platforms is at least that they have different instruction sets.
[0064] In addition, the above-mentioned process of decompiling and compiling the software code does not require the participation of developers, thereby isolating developers from the software code and reducing the possibility of developers contacting the software code. For software operators, optimization and secondary development can be performed based on the software code transplanted to the target platform, which is convenient for software operators to maintain the software code transplanted to the target platform.
[0065] As an example, the above code processing method can be applied to Figure 1 In the system architecture shown in Figure 1 As shown, the system architecture 100 includes a decompilation module 101 and a compilation module 102. For a code 1 applied to a source platform 103, the decompilation module 101 decompiles it to obtain IR, and then passes the decompiled IR to the compilation module 102, and the compilation module 102 compiles the IR into a low-level language-based code 2 applied to a target platform 104, so that the obtained code 2 can run on the target platform 104.
[0066] In practical applications, the decompilation module 101 may be a software-based functional module, or may be implemented by a device having a decompilation function, such as a decompiler, etc. Similarly, the compilation module 102 may be implemented by a device having a compilation function, such as a compiler, etc. The decompilation module 101 and the compilation module 102 may be deployed on a target platform 104, or may be deployed on a terminal 105 or a server 106, etc. Exemplarily, when the decompilation module 101 and the compilation module 102 are deployed on the terminal 105 and the server 106, the decompilation module 101 may be deployed on the server 106, and the compilation module may be deployed on the terminal 105, etc.; or, the decompilation module 101 and the compilation module 102 may be deployed in the server 106 located in the cloud. At this time, during the software transplantation process, the terminal 105 may send software code to the cloud (specifically, the server 106 in the cloud), for example, it may send a code processing request to the cloud, and the code processing request includes the software code to be transplanted; then, after the cloud (server 106) performs the above-mentioned decompilation and compilation processing, a low-level language-based code applied to the target platform may be obtained, and the code is sent to the terminal 105. In this way, the terminal 105 can obtain software code that can be applied to the target platform, and software transplantation is realized. Of course, in actual applications, the server 106 may also be a local server.
[0067] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, various non-limiting implementation methods in the embodiments of the present application are exemplarily described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of this application.
[0068] like Figure 2 As shown, it is a flowchart of a code processing method in an embodiment of the present application. The method can be applied to the above-mentioned target platform 104, or can be applied to a computing device, and the computing device can be, for example, the above-mentioned terminal 105 or server 106, and the computing device can include a decompilation module 101 and a compilation module 102. The method can specifically include:
[0069] S201: Acquire a first code based on a low-level language and applied to a source platform.
[0070] In actual applications, when the software runs on a source platform, the program code of the software is usually compiled into a low-level language code that can be directly recognized by the source platform. Among them, low-level language refers to a program language or instruction code that can be directly recognized by the machine, which can be assembly language or machine language. Machine language is a language represented by binary code. Machine language is the only language that can be recognized and executed by computers. Assembly language is a language that uses easy-to-understand and memorable names and symbols to represent the opcodes in machine instructions in order to solve the shortcomings of machine language that is difficult to understand and remember. Assembly language uses symbols instead of binary code of machine language, so assembly language is essentially a symbolic language.
[0071] Compared with low-level languages, there is also a high-level language that is independent of machines and oriented to processes or objects. High-level programming languages are usually close to natural languages and can use mathematical expressions, so they have stronger expressive power, can easily represent data operations and program control structures, and can better describe various algorithms, such as C, C++, Java and other languages. High-level languages can be applied to different platforms, such as platforms applicable to the x86 instruction set architecture (a general-purpose computing platform led by Intel, hereinafter referred to as the x86 platform), platforms applicable to the advanced reduced instruction set machine (advanced RISC machines, ARM) architecture (hereinafter referred to as the ARM platform), a platform with a reduced instruction set architecture (Performance Optimization With Enhanced RISC-Performance Computing) architecture, etc. Under normal circumstances, high-level programming languages cannot be directly recognized and executed by machines. Developers can compile code files based on high-level languages through compilers such as compilers so that they can be recognized and executed by machines.
[0072] In this embodiment, the first code obtained may be a code based on a low-level language, and the code may be applicable to the source platform. For example, the first code obtained may be a code in a ".obj" format file or other format file obtained by assembling the assembly language corresponding to the source platform.
[0073] Alternatively, in other possible implementations, while obtaining the first code, a variable based on a high-level language may be obtained at the same time. Figure 3In the embedded assembly scenario shown, the first code obtained is an assembly language code in the format of "movdqa %%xmm4, 16(%0)", and the high-level language-based variables are specifically "&ff_inverse[0]" and "&ff_inverse[8]" in ""r"(&ff_inverse[0]), "r"(&ff_inverse[8])". Among them, embedded assembly is usually an encoding method used to improve code execution efficiency and execute processor-specific instructions. Then, after assembling the embedded assembly code, the first code in a file such as a ".obj" format can be obtained.
[0074] Exemplarily, the first code in this embodiment may be a code in the "obj" format obtained by assembling the entire assembly language program code of the software on the source platform; or a code in the "obj" format obtained by assembling part of the program code, such as one of the multiple code files of the software; or a section of code in a code file, such as Figure 3 The code blocks shown are compiled to obtain the code, etc., that is, in this embodiment, the software code can be partially decompiled, etc.
[0075] In this embodiment, the source platform to which the first code is applied and the target platform to which the first code is transplanted are not the same, and specifically may have different instruction sets. The source platform and the target platform may be platforms of different types. For example, the source platform may be an x86 platform, and the target platform may be an ARMv8 platform (a processor architecture supporting a 64-bit instruction set released by ARM); or, the source platform and the target platform may be two different platforms of the same type, the source platform may be a Pentium II under an x86 platform, and the target platform may be a Pentium III under an x86 platform (introducing a new SSE instruction set), or the source platform may be an x86 platform supporting 32 bits, and the target platform may be an x86-64 platform supporting 64 bits, etc.
[0076] S202: Decompile the acquired first code to obtain a first IR.
[0077] In this embodiment, when the first code applied to the source platform is transplanted to the target platform for operation, the first code can be decompiled using the decompilation module 101, specifically, the input first code can be subjected to lexical analysis, syntax analysis and semantic analysis, and converted into a compiler IR, which is the decompilation result corresponding to the first code. The compiler IR can represent the semantic and syntax structure of the first code, and can be considered as another high-level language.
[0078] As an example, only the first code based on the low-level language may be obtained, and in this case, the decompilation module 101 may decompile the first code into a compiler IR. In other examples, while obtaining the first code based on the low-level language, variables based on the high-level language may also be obtained. In this case, when the decompilation module 101 decompiles the first code, it is also necessary to perform parameterized translation processing on the variables in the high-level language to avoid loss of variable information in the high-level language in the first code.
[0079] For details, see Figure 4 The parameterized translation process shown:
[0080] S401: For the low-level language-based instruction string in the mixed code block, the decompilation module 101 can translate the instruction string into a compiler first IR including a function according to the semantics of the instruction string, and the semantics expressed by the function included in the first IR is consistent with the semantics of the instruction string. For example, when the instruction string is "ADD%x%y", the function included in the compiler IR obtained by translating the instruction string can be a function for summing.
[0081] In an exemplary implementation of translating an instruction string, the decompilation module 101 may obtain the correspondence between the instruction semantics and the function in advance, for example, it may be saved in the decompilation module 101 in advance. Then, the decompilation module 101 may determine the semantics of the low-level language-based instruction string in the mixed code block, and the instruction string may include one or more instructions, and the decompilation module may determine the semantics of each instruction in the instruction string. Next, the decompilation module 201 determines the function corresponding to the semantics of each instruction in the instruction string by searching for the correspondence between the semantics and the function according to the semantics of each instruction in the instruction string, so that the first IR containing the function may be further generated according to the determined function.
[0082] As an example, the decompilation module 101 can determine the semantics of each instruction in the instruction string by searching the instruction semantic library corresponding to the source platform (such as a technician pre-semantically marking the instructions of the source platform and importing the instructions and instruction semantics into the decompilation module 101, etc.). The instruction semantic library includes multiple instructions of the source platform, and the semantics of each instruction is pre-semantically annotated. When instruction A in the first code has the same grammatical structure as instruction a in the instruction semantic library, it can be determined that the semantics of instruction a in the instruction semantic library is the semantics of instruction A in the first code. In practical applications, other methods can also be used to determine the semantics of each instruction, which is not limited in this embodiment.
[0083] S402: When the decompiling module 101 determines the function corresponding to the instruction string, it can create a virtual register as a parameter for the function.
[0084] S403: The decompiling module 101 references the virtual register created above for the function determined in the translation process, and uses the virtual register as a parameter of the function.
[0085] S404: the decompiling module 101 establishes a correspondence between the high-level language variables and the formal parameters in the function, so as to pass the high-level language-based variables in the mixed code as actual parameters to the formal parameters in the semantic function.
[0086] Exemplarily, the decompilation module 101 can count the variables of the high-level language in the mixed code block, so as to obtain a list consisting of multiple high-level language variables, and then correspond the variables in the list with the formal parameters in the function according to the position of the formal parameters in the IR and the calling convention of the compiler. For example, the first variable in the list can be corresponded to the first formal parameter of the first function in the IR, and the second variable in the list can be corresponded to the second formal parameter of the first function in the IR, etc.
[0087] In this way, during the decompilation process, the variable information of the high-level language can be retained in the function as actual parameters without information loss, so that in the embedded assembly scenario, the code information before and after the decompilation process remains consistent.
[0088] In actual application, the decompilation module 101 can first distinguish whether the code to be decompiled includes only the first code based on the low-level language, or includes the first code and high-level language variables at the same time. In a possible implementation, the decompilation module 101 can first detect the compilation command of the code to be decompiled and the file type of the code to determine whether the first code is based on the high-level language or the low-level language. Further, when the code is determined to be based on the low-level language based on the compilation command and the file type, the decompilation module 101 can further determine whether the code is all based on the first code of the low-level language, or a mixed code block that includes both the first code of the low-level language and the variables of the high-level language, such as an embedded assembly code composed of C / C++ language and assembly language (low-level language), etc. according to the syntax in the code.
[0089] Furthermore, if the first code includes a mixed code block of a second code based on a low-level language and variables based on a high-level language, the decompilation module 101 can perform the above-mentioned parameterized translation process for the high-level language variables in the first code during the decompilation of the first code.
[0090] In this embodiment, the first code usually includes at least one function call. The called function is essentially a variable. For example, in function y=a+b*c, function y is essentially a variable. In some possible implementations, other variables are also associated with the function body of the function. For example, function y is also associated with variables a, b, and c. Based on this, the variables associated with the function include the function itself and the variables associated in the function body, such as the variables associated with function y include y and a, b, c. Since the addresses of the variables associated with the function in the first code are relative addresses, that is, the addresses of each variable are uncertain, for this reason, before translating the instructions in the first code into the first IR of the compiler based on the instruction semantic library corresponding to the source platform, the decompilation module 101 can also relocate the variables in the IR (different from the variables in the high-level language) to determine the absolute addresses of each variable in the first code.
[0091] Exemplary, taking the first variable and the second variable included in the first code as an example, before decompiling, the decompiling module 101 can configure a preset first logical address for the first variable in the first code, and a preset second logical address for the second variable in the first code, and the first logical address and the second logical address can be different. In specific implementation, the decompiling module can access the relocation table, which stores the logical address information of multiple variables (including the first variable and the second variable). The decompiling module 101 determines the logical addresses corresponding to the first variable and the second variable respectively (that is, the absolute addresses corresponding to the variables) according to the logical address information in the redirection table, and associates the logical addresses with the symbols of the variables. Among them, the address information configured for the first variable and the second variable can be false logical address information. Then, the decompiling module 101 can use the instruction semantic library corresponding to the source platform to decompile the first code that completes the address configuration of the variable to obtain the first IR of the compiler. In this way, in the subsequent compilation stage, the logical address of the variable will be recompiled into the relocation information of the target platform, that is, in the compilation stage, the variables in the first IR of the compiler can point to specific logical addresses.
[0092] In actual applications, in addition to the different instruction sets, there may be other differences between the source platform and the target platform, such as differences in function call conventions or single instruction multiple data (SIMD) instructions between the source platform and the target platform. Therefore, in some embodiments, when decompiling the first code, the decompiling module 101 may first determine the difference between the source platform and the target platform, and decompile the first code according to the difference. The difference between the source platform and the target platform may be determined by a technician in advance by comparing the function call conventions or SIMD instructions of the source platform and the target platform, and then imported into the decompiling module 101, and this embodiment does not limit this.
[0093] In other possible implementations, the decompilation module 101 may also directly decompile the first code according to the function calling convention or SIMD instruction of the target platform, etc., which is not limited in this embodiment. In this way, after the above-mentioned differentiation processing or directly decompiling based on the information of the target platform, the function call or SIMD instruction in the obtained IR can be made to conform to the function calling convention and SIMD instruction of the target platform.
[0094] For ease of understanding, the following is an exemplary explanation using an example of adjusting the parameters in the first code according to the difference in function calling conventions between the target platform and the source platform.
[0095] Specifically, the parameters of the function are stored in registers or in a stack stored in memory. The storage methods of parameters are different in different platforms. The decompile module 101 can adjust the register information or stack information of the function in the source code block according to the difference in function call rules between the source platform and the target platform. For example, the decompile module 101 can adjust the parameters stored in the registers and store them in the stack; or adjust the parameters stored in the stack and store them in the registers.
[0096] Before adjusting the register information or stack information, the decompilation module 101 can first use a decoding tool, such as Intel XED, to decode the source code block to obtain the instruction control flow. Then the decompilation module 101 can execute a data flow analysis algorithm for the instruction control flow to analyze the active registers and stacks, thereby obtaining the parameter type and quantity of the function in the source code block. Among them, the parameter type is mainly used to indicate whether the parameter is stored in a register or stored in a stack.
[0097] For ease of understanding, the processes of register analysis and stack analysis are described in detail below.
[0098] First, this embodiment defines the following data sets:
[0099] Use[n]:set of variables used by n;
[0100] Def[n]:set of variables defined by n;
[0101] In[n]:variables live on entry to n;
[0102] Out[n]:variables live on exit to n;
[0103] Among them, variables represents the registers corresponding to the variables. In[n] and Out[n] represent the sets of registers corresponding to input and output respectively, and Def[n] and Use[n] represent the sets of registers corresponding to definition and use respectively.
[0104] The decompile module 101 can traverse the blocks in the source code block and construct the use set and def set of each block. The specific construction process is as follows:
[0105] a) Traverse the instructions in the block according to the execution order of the instructions in the block;
[0106] b) If the operand type of the instruction is Register and the action is kActionRead, it will be added to the use set;
[0107] c) If the operand type of the instruction is Register and the action is kActionWrite, it will be added to the def set;
[0108] d) If the operand type of the instruction is Address, add its base_reg and index_reg to the use set;
[0109] The decompile module 101 can establish a data flow analysis equation according to the above set, as shown below:
[0110]
[0111] Among them, n represents a block, symbol Indicates that the set to the right of the symbol is a subset of the set to the left of the symbol. succ[n] indicates the registers that are still valid in the block.
[0112] The decompilation module 101 can solve the above equation by a fixed point algorithm, as shown below:
[0113]
[0114] After the fixed point algorithm, the intersection of the in set at the function entry and the input parameter Reg specified by the Calling Convention is the input parameter register; the intersection of the out set at the function exit and the output parameter Reg specified by the Calling Convention is the possible return value register.
[0115] When performing stack analysis, the decompile module 101 may use an algorithm based on a rex-extended stack pointer (RSP) register or an algorithm based on a rex-extended base pointer (RBP) register to analyze and implement the instruction control flow.
[0116] The process of the decompiling module 101 performing analysis using the RSP-based algorithm may specifically include the following steps:
[0117] a. Check whether RSP has an offset based on the function prelogue part (entry basic block) and record the offset value off;
[0118] The decompiling module 101 may determine the offset through a sub instruction or a push instruction. The decompiling module 101 also records the register associated with the RSP.
[0119] b. Traverse all instructions in all blocks and find the usage scenario where the operand Operand Type is kTypeAddress, action is kActionRead, base_reg = RSP (associated register), and the memory offset (dispalcement, dis) is a positive number. This parameter is the (dis-off) / 8th stack parameter, and then count the total number of parameters S.
[0120] c. For cases that meet rule b, further distinguish parameter types:
[0121] If the other register operands of the same instruction are integer registers (RXX), and the instruction is a non-floating point->integer type conversion related instruction, the stack parameter is determined to be an integer. If the other register operands of the same instruction are floating point registers (XMM), and the instruction is a non-integer->floating point type conversion related instruction, the stack parameter is determined to be a floating point.
[0122] The process of the decompiling module 101 performing analysis using the RBP-based algorithm may specifically include the following steps:
[0123] a. Traverse all instructions in all blocks and find the usage scenario where the operand Operand Type is kTypeAddress, action is kActionRead, base_reg = RBP, and dis is a positive number. This parameter is the (dis-8) / 8th stack parameter, and the total number of parameters is X.
[0124] b. For cases that meet the a rule, further distinguish the parameter types:
[0125] If the other register operand of the same instruction is an integer register (RXX), and the instruction is a non-floating point->integer type conversion related instruction, the stack parameter is judged to be an integer. If the other register operand of the same instruction is a floating point register (XMM), and the instruction is a non-integer->floating point type conversion related instruction, the stack parameter is judged to be a floating point.
[0126] In some possible implementations, the decompile module 101 may execute the above two algorithms simultaneously, and then take the maximum value of the total number of parameters S determined by the two algorithms.
[0127] After obtaining the total number of parameters and parameter types, the decompilation module 101 can adjust the storage location of the parameters according to the difference in function call rules. Specifically, the decompilation module 101 performs cross-platform processing on the input parameter registers and stack according to the difference in function call rules, such as pushing several parameters in the registers into the stack, switching the stack pointer, etc., so that the input parameter registers and stack space perspectives are consistent at runtime on different platforms.
[0128] To facilitate understanding, a specific example is provided below for explanation.
[0129] See also Figure 5 The schematic diagram of adjusting the parameters of the function shown in the example, the function test includes 10 parameters from i0 to i9. In the runtime under the x86 platform, parameters i0 to i5 are stored in registers, and i6 to i9 are stored in the stack. In the runtime under the ARM platform, parameters i0 to i7 are stored in registers, and i8 to i9 are stored in the stack. The decompilation module 101 can push parameters i6 and i7 into the stack and switch the stack pointer, so that the input parameter registers and stack space perspectives of the runtime under different platforms are consistent.
[0130] This method uses compiler active register analysis and stack analysis to obtain accurate input parameter registers and stack input parameters, thereby reducing unnecessary register conversions of function call conventions.
[0131] Further, when the source platform and the target platform belong to different categories of platforms, such as the source platform and the target platform are x86 platform and ARM platform respectively, the decompilation module 101 can also obtain the annotation information corresponding to the first code before decompiling the first code. The annotation information of the first code can include any one or more of the type and quantity of parameters in the first code, and the type of jump address (internal or external jump of the assembly code, etc.), so that the decompilation module 101 can determine the type, quantity, and jump address type of the parameters in the compiler IR according to the annotation information when decompiling the first code. The annotation information in the first code can be generated during the compilation of the assembly language code and is used to carry relevant information of the assembly language. Taking the parameter type in the annotation information as an example, assuming that the length of the parameter in the first code is 64 bits, then in the first IR obtained when the first code is decompiled, the length of the parameter can still be 64 bits (such as floating point type), and will not be changed to 32 bits (such as integer type). In this way, decompiling the first code according to the annotation information can make the parameter type consistent before and after decompilation, thereby reducing the possibility of logical errors in the first IR.
[0132] Of course, in other possible implementations, the decompilation module 101 may not need to consider the annotation information when decompiling the first code. For example, when the source platform and the target platform are of the same type of platform, the similarity between the two platforms is high and the difference is small. For example, between the source platform and the target platform, for the assembly language with the same instruction semantics, the only difference is the instruction format. The decompilation module 101 can directly decompile the first code without the help of the annotation information of the first code.
[0133] Furthermore, the instruction semantics library used to translate instruction strings may also include vectorized instruction semantics, such as SIMD instruction semantics (the SIMD instruction can simultaneously perform the same operation on each data in a group of data to achieve spatial parallel processing), etc. The vectorized instruction semantics can be used to perform vectorized translation on some instructions in the first code, thereby obtaining the vectorized IR corresponding to the instruction.
[0134] Generally, vectorized code (instruction) can be used to replace the loop execution structure, which makes the program code more concise and the code execution efficiency is also higher. For example, when the first code includes a SIMD instruction (for summing multiple data), if the decompilation module 101 does not perform vectorization processing on the SIMD instruction, the corresponding code execution process in the first IR obtained after decompilation is a serial operation of reading data one by one and summing from a group of data, and after the SIMD instruction is vectorized, the corresponding code execution process in the first IR obtained after decompilation is to read all data from a group of data and perform parallel summation calculation on all data in the group.
[0135] Taking the first code including SIMD instructions as an example, when the decompilation module 101 translates the first code, for other instructions in the first code, it can translate into IR including corresponding functions according to the semantics of the instruction; and for the SIMD instruction in the first code, it can vectorize the SIMD instruction to obtain a first IR with a vectorization mark. In practical applications, the vectorization mark can be, for example, a special symbol in the first IR, such as "^", "!", "<" and other symbols. Exemplarily, the technician can pre-add the semantics of the SIMD instructions of the source platform to the imported instruction semantic library, so that in the compilation stage, the decompilation module 101 can identify the semantics of the SIMD instructions in the first code according to the instruction semantic library.
[0136] The decompiling module 101 may directly or indirectly translate the SIMD instructions in the first code into IR with a vectorization mark.
[0137] In a direct vectorization implementation, the decompilation module 101 can generate a third code based on a low-level language applied to the target platform. The third code can be, for example, a low-level language code including an intrinsic function corresponding to the target platform. The intrinsic function can package language extensions or platform-related capabilities and be defined in a high-level language header file such as C / C++. In this way, the generated third code related to the target platform can be used to describe the vectorization semantics of the SIMD instructions of the source platform. Then, the decompilation module 101 can decompile the third code to obtain the first IR corresponding to the SIMD instructions of the target platform with the vectorization mark. In this way, after the subsequent compiler compiles the first IR, the SIMD instructions of the target platform can be obtained.
[0138] In an indirect vectorization implementation, the decompilation module 101 can generate a fourth code based on a high-level language that is independent of the target platform, and the fourth code can be used to describe the vectorization semantics of the SIMD instruction. Then, the decompilation module 101 can decompile the fourth code based on the high-level language to obtain a first IR that is independent of the platform and has a vectorization mark. In this way, the subsequent compiler can automatically vectorize the first IR to generate the SIMD instruction of the target platform.
[0139] S203: Compile the first IR obtained by decompilation into a second code based on a low-level language applied to a target platform, where the source platform and the target platform have different instruction sets.
[0140] In specific implementation, the compilation module 102 can compile the obtained first IR to obtain a second code that can be run on the target platform. Of course, the second code is a low-level language code supported by the target platform, such as the assembly code corresponding to the target platform.
[0141] Normally, the IR obtained by decompiling the first code may have a certain room for optimization. For example, when the decompilation module 101 does not decompile the first code based on the capabilities of the target platform, since the capabilities of different platforms are usually different, in order to make the decompiled IR applicable to multiple platforms, the decompilation module 101 can decompile the first code based on the minimum capabilities of multiple platforms, which allows the decompilation module 101 to optimize the obtained IR according to the higher capabilities of the target platform, so that when the target platform executes the code corresponding to the IR, the code execution efficiency is relatively higher. Among them, the capabilities of the platform may include the data reading speed and data access method supported by the platform.
[0142] For example, suppose that when various existing platforms read data, some platforms can read 64-bit data at a time, while other platforms can read 128-bit data at a time. Therefore, after the decompilation module 101 decompiles the first code, the IR obtained can be as follows: Figure 6 The code shown above, if the target platform reads data based on the code, it only reads 64 bits of data each time. However, the target platform can actually read 128 bits of data at a time, which means that the target platform needs to read 128 bits of data twice when reading 128 bits of data, which reduces the code execution efficiency. Figure 6 The code shown above is optimized to Figure 6The code shown below enables the target platform to read 128 bits of data each time when reading data based on this code.
[0143] Based on this, in a further possible implementation, the decompilation module 101 can decompile the first code to generate a second IR, and then optimize the second IR according to the first target platform to obtain the first IR. For example, after decompiling the first code and obtaining the second IR, the decompilation module 101 can also determine the semantics of each (sentence) instruction string in the second IR, and determine the compilation optimization rules corresponding to the semantics of each instruction string in the second IR according to the correspondence between the semantics and the compilation optimization rules, thereby optimizing the second IR based on the determined compilation optimization rules to obtain the first IR, so that the compilation module 102 can compile the optimized first IR when compiling.
[0144] After compiling the first IR, a binary file in ".obj" format or other formats can be obtained, so that the assembly language code applied to the target platform can be generated according to the binary file. In this way, the assembly language code obtained through the above process can be applicable to the target platform, so that it can be successfully run on the target platform, realizing the porting of the source platform code to the target platform.
[0145] In this embodiment, the target platform can be any platform different from the source platform, that is, the decompilation module 101 and the compilation module 102 can transform the first code into a low-level language-based code applicable to any platform. Specifically, for ease of description, the above-mentioned target platform can be referred to as the first target platform below, and the decompilation module 101 and the compilation module 102 can not only transform the first code of the source platform into a low-level language code applicable to the first target platform based on the above process, but also transform the second code of the source platform into a low-level language code applicable to the second target platform in a similar process, wherein the second target platform, the first target platform and the source platform are different from each other, specifically, they have different instruction sets.
[0146] In practical applications, the target platform to which the software code is to be ported may be determined based on the needs of the user. In an exemplary embodiment, a target platform selection interface may be presented to the user, for example, a screen such as Figure 7 The target platform selection interface shown in the figure can provide multiple different candidate target platforms, such as Figure 7The target platform 1, target platform 2, ..., target platform N (N is a positive integer greater than 1) are shown. The user can perform a selection operation for the target platform from the multiple candidate platforms presented on the target platform selection interface according to actual needs, and determine the above-mentioned first target platform or second target platform from the multiple target platforms, so that the first code can be transformed into a low-level language-based code suitable for the first target platform or the second target platform through the above-mentioned similar process. For example, the user can use the mouse to click the drop-down menu button to present multiple target platforms, and then the user moves the cursor to the target platform desired to be selected, and selects the target platform by clicking the mouse, thereby determining the first target platform.
[0147] Furthermore, based on the target platform selected by the user, the target platform selection interface may also present relevant information of the target platform, such as Figure 7 As shown, for the target platform selected by the user, the data processing capability, applicable hardware type, required hardware environment, etc. of the target platform can also be presented.
[0148] In addition, after the above-mentioned decompilation and compilation process, after obtaining the low-level language-based code applied to the first target platform, corresponding prompt information can be generated for the code, and the prompt information can be used to indicate the difference between the source platform and the first target platform. Then, the prompt information can be presented on the interface for the user to select the target platform to prompt the user. For example, the user can be prompted with the correspondence between the instructions in the first code and the instructions in the code of the first target platform, such as highlighting the code instructions of the two platforms with specific colors. In actual applications, the prompt information can also be presented in other interfaces, not limited to the above-mentioned target platform selection interface. This embodiment does not limit how to present the prompt information and the specific implementation method of presenting the prompt information.
[0149] For ease of understanding, the technical solution of the embodiment of the present application is described below from the perspective of human-computer interaction. Figure 8 FIG. 8 is a flow chart showing the interaction between user 801 and computing device 802. The computing device 802 may be a cloud device, such as a cloud server, or a local terminal / server. Figure 8 As shown, the process may specifically include:
[0150] S801: The computing device 802 presents a target platform selection interface to the user 801, wherein a plurality of candidate target platforms are provided in the target platform selection interface.
[0151] In this embodiment, the computing device 802 can support porting software codes to a variety of different target platforms, so the computing device 802 can first present a target platform selection interface to the user, and present the target platforms that can be ported supported by the computing device 802 on the target platform selection interface for the user to select. Among them, different platforms at least have different instruction sets.
[0152] S802: The computing device 802 determines a first target platform from multiple target platforms according to a user's selection operation on the target platform.
[0153] S803: The user 801 sends a first code based on a low-level language applied to a source platform to the computing device 802 .
[0154] The user 801 may specifically send the first code to the computing device 802 through a terminal, a client or other medium.
[0155] In this embodiment, the first code may be a binary file based on the ".obj" format, or a binary file based on other formats. In other embodiments, the user may also send the assembly language code of the source platform to the computing device 802. In this way, after receiving the assembly language code, the computing device 802 may first assemble the assembly language code to obtain a binary file in the ".obj" format or other formats.
[0156] S804: The computing device 802 presents a second code on a code display interface, where the second code is a low-level language-based code applied to the first target platform.
[0157] Among them, the second code is obtained by processing the first code. Specifically, the second code can be obtained by the computing device 802 decompiling and compiling the first code. Its specific implementation can be found in the relevant description in the aforementioned embodiment, and will not be repeated here.
[0158] Furthermore, after obtaining the second code, the computing device 802 may present the second code on a corresponding code display interface, so that the user 801 can view the details of the processed second code.
[0159] In this embodiment, the second code may be a binary file in "obj" format or other formats. In other possible embodiments, the second code may also be a code based on other languages applicable to the first target platform, for example, it may be an assembly language code applicable to the first target platform, and the assembly language code may be obtained by decompiling the first code and converting the "obj" format file generated after the compilation.
[0160] S805: The computing device 802 presents prompt information.
[0161] In this embodiment, the computing device 802 can prompt the user 801, such as prompting the corresponding relationship between the instructions in the first code and the instructions in the second code; or prompting the user 801 of possible problems in the code transplantation process. In this embodiment, the content and specific implementation of the prompt information presented by the computing device 802 are not limited.
[0162] S806 : The user 801 modifies the second code presented by the computing device 802 .
[0163] Exemplarily, after viewing the second code or the prompt information, the user 801 can change the second code. For example, if a logic vulnerability is found in the second code through the prompt information or by viewing the second code, the second code can be modified to resolve the logic vulnerability problem.
[0164] S807: The computing device 802 presents the modified second code.
[0165] In actual applications, the user 801 may continue to further modify the modified second code until the code meets the user's expectations.
[0166] S808: The computing device 802 presents the first IR or the second IR.
[0167] When decompiling the first code, the computing device 802 may first decompile the first code to obtain the second IR, and then further optimize the second IR to obtain the first IR. Then, the computing device 802 may present the first IR or the second IR obtained in the decompiling process to the user 801.
[0168] In this way, user 801 can view the first IR or second IR presented by the computing device 802, and can debug the first IR or second IR, so that the computing device 802 can obtain the corresponding low-level language-based code applied to the first target platform according to the debugged first IR or second IR.
[0169] In a further possible implementation manner, this embodiment may also include:
[0170] S809: User 801 modifies the instruction semantic library corresponding to the source platform.
[0171] During the decompilation process, the computing device 802 usually decompiles the first code according to the instruction semantic library corresponding to the source platform, and the user can adjust the instruction semantic library used in the decompilation process by viewing the second code, prompt information or IR, such as adding the semantics of SIMD instructions corresponding to the source platform to the instruction semantic library, so that when the first code is decompiled based on the adjusted instruction semantic library, the obtained IR or the code applied to the first target platform can be better.
[0172] It is worth noting that, in this embodiment, the decompilation, compilation and related processes of the first code by the computing device 802 can refer to the relevant descriptions of the aforementioned embodiments, which will not be repeated here.
[0173] Combined with the above Figures 1 to 8 , describes in detail the code processing method provided by this application, and will be combined with Figures 9 and 10 , describing a computing device provided according to the present application.
[0174] With the same inventive concept as the above method, the present application embodiment also provides a computing device, which can implement the above Figure 2 The functions of the computing device in the illustrated embodiment. Fig. 9 As shown, the device 900 may include:
[0175] An acquisition module 901 is used to acquire a first code based on a low-level language and applied to a source platform;
[0176] A decompiling module 902, configured to decompile the first code to obtain a first intermediate representation IR;
[0177] The compiling module 903 is used to compile the first IR into a second code based on a low-level language applied to a first target platform, where the source platform and the first target platform have different instruction sets.
[0178] In a possible implementation, the decompilation module 902 is also used to decompile the first code to obtain an IR corresponding to a second target platform, the first IR is different from the IR corresponding to the second target platform, and the first target platform and the second target platform have different instruction sets.
[0179] In a possible implementation manner, the device 900 further includes:
[0180] Presentation module 904, used to present a target platform selection interface;
[0181] The determination module 905 is configured to determine the first target platform from multiple target platforms in response to a selection operation for the target platform.
[0182] In a possible implementation, the decompile module 902 is specifically used to:
[0183] Acquire annotation information of the first code, where the annotation information includes any one or more of a type, a quantity, and a jump address type of a parameter in the first code;
[0184] The first code is decompiled according to the annotation information to obtain the first IR.
[0185] In a possible implementation, the decompile module 902 is specifically used to:
[0186] Decompile the first code to obtain a second IR;
[0187] According to the first target platform, the second IR is optimized to obtain the first IR.
[0188] In a possible implementation manner, the device 900 further includes:
[0189] A generating module 906, configured to generate prompt information, wherein the prompt information is used to provide prompts for items to be checked, wherein the items to be checked are generated based on the differences between the first target platform and the source platform;
[0190] The presentation module 904 is used to present the prompt information.
[0191] In a possible implementation, the device is applied to a cloud, and the acquisition module 901 is specifically configured to receive a first code from a user;
[0192] The apparatus 900 further includes: a communication module 907, configured to send a second code based on a low-level language and applied to the first target platform to the user.
[0193] In a possible implementation, the decompile module 902 is specifically configured to decompile the first code according to an instruction semantic library corresponding to the source platform.
[0194] In a possible implementation manner, the device 900 further includes:
[0195] The modification module 908 is used to modify the instruction semantic library in response to a modification operation on the instruction semantic library.
[0196] In a possible implementation, the acquisition module 901 is specifically configured to acquire a first code based on a low-level language and a variable based on a high-level language applied to a source platform;
[0197] The decompile module 902 is specifically used to translate the first code into a first IR including a function, wherein the function includes a formal parameter, and an actual parameter corresponding to the formal parameter is the variable.
[0198] In a possible implementation, the first IR includes a first variable and a second variable, the first variable has a first logical address, the second variable has a second logical address, and the first logical address is different from the second logical address.
[0199] In a possible implementation, the decompile module 902 is specifically configured to decompile the first code according to the target platform function calling convention or single instruction stream multiple data stream SIMD instructions.
[0200] The computing device 900 in this embodiment corresponds to Figure 2 Therefore, for the specific implementation of each functional module in the computing device 900 of this embodiment and its technical effects, please refer to Figure 2 The description of the relevant parts in the illustrated embodiment will not be repeated here.
[0201] In addition, the present application also provides another computing device, which can implement the above Figure 8 The functionality of computing device 802 in the illustrated embodiment. Fig.10 As shown, the device 1000 may include:
[0202] An acquisition module 1001 is used to acquire a first code based on a low-level language and applied to a source platform;
[0203] The output module 1002 is used to output a second code, where the second code is a low-level language-based code applied to a first target platform, and the second code is obtained by processing the first code. The source platform and the first target platform have different instruction sets.
[0204] In a possible implementation, the output module 1002 is specifically configured to present the second code through a code display interface.
[0205] In a possible implementation, the device is applied to a cloud, and the acquisition module 1001 is specifically configured to receive a first code from a user;
[0206] The output module 1002 is specifically configured to output the second code to the user.
[0207] In a possible implementation manner, the device 1000 further includes:
[0208] Presentation module 1003, used to present a target platform selection interface;
[0209] The determination module 1004 is configured to determine the first target platform from a plurality of target platforms in response to a selection operation for the target platform.
[0210] In a possible implementation, the acquisition module 1001 is further used to acquire an instruction semantic library corresponding to the source platform, and the instruction semantic library is used to process the first code.
[0211] In a possible implementation manner, the device 1000 further includes:
[0212] The modification module 1005 is used to modify the instruction semantic library in response to a modification operation on the instruction semantic library.
[0213] In a possible implementation manner, the device 1000 further includes:
[0214] A generating module 1006, configured to generate prompt information, wherein the prompt information is used to provide prompts for items to be checked, wherein the items to be checked are generated based on the differences between the first target platform and the source platform;
[0215] The presenting module 1003 is used to present the prompt information.
[0216] In a possible implementation manner, the device 1000 further includes:
[0217] The presentation module 1003 is used to present a first intermediate representation IR, where the first IR is obtained by decompiling the first code, and the second code is obtained by compiling the first IR.
[0218] In a possible implementation, the presentation module 1003 is further used to present a second IR, where the second IR is obtained by decompiling the first code, and the first IR is obtained by optimizing the first IR according to the first target platform.
[0219] In a possible implementation manner, the device 1000 further includes:
[0220] A modification module 1005, configured to obtain a modified first IR in response to a modification operation on the first IR;
[0221] The presenting module 1003 is further used to present a third code, where the third code is a low-level language-based code applied to the first target platform, and the third code is obtained by compiling the modified first IR.
[0222] In a possible implementation, the presentation module 1003 is also used to present a third IR, where the third IR is obtained by decompiling the first code, and the third IR is used to generate a low-level language-based code applied to a second target platform, and the third IR is different from the first IR.
[0223] In a possible implementation, the apparatus 1000 further includes:
[0224] A modification module 1005, configured to obtain a modified second code in response to a modification operation on the second code;
[0225] The output module 1002 is further configured to output the modified second code.
[0226] In a possible implementation, the acquisition module 1001 is specifically configured to acquire a first code based on a low-level language and a variable based on a high-level language applied to a source platform.
[0227] The computing device 1000 in this embodiment corresponds to Figure 8 Therefore, for the specific implementation of each functional module in the computing device 1000 of this embodiment and its technical effects, please refer to Figure 8 The description of the relevant parts in the illustrated embodiment will not be repeated here.
[0228] In addition, the present application also provides a computing device, such as Fig.11 As shown, the device 1100 may include a communication interface 1110 and a processor 1120. Optionally, the device 1100 may also include a memory 1130. The memory 1130 may be disposed inside the device 1100 or outside the device 1100. Figure 2 Each action in the illustrated embodiment can be implemented by the processor 1120. The processor 1120 can obtain the first code applied to the source platform through the communication interface 1110, and use it to implement Figure 2 In the implementation process, each step of the processing flow can be completed by the hardware integrated logic circuit in the processor 1120 or the software instruction. Figure 2 For the sake of brevity, it will not be described here. The program code executed by the processor 1120 to implement the above method can be stored in the memory 1130. The memory 1130 is connected to the processor 1120, such as a coupling connection.
[0229] Some features of the embodiments of the present application may be completed / supported by the processor 1120 executing program instructions or software codes in the memory 1230. The software components loaded on the memory 1230 may be summarized in terms of function or logic, for example, Fig. 9 The obtained module 901 , the decompile module 902 , the compile module 903 , the present module 904 , the determine module 905 , the generate module 906 , and the modify module 908 are shown. The function of the communication module 907 can be implemented by the communication interface 1110 .
[0230] Any communication interface involved in the embodiments of the present application may be a circuit, a bus, a transceiver, or any other device that can be used for information exchange. For example, the communication interface 1110 in the device 1100, illustratively, the other device may be a device connected to the device 1100, for example, a user terminal that provides the first code, etc.
[0231] In addition, the present application also provides a computing device, such as Fig.12 As shown, the device 1200 may include a communication interface 1210 and a processor 1220. Optionally, the device 1200 may also include a memory 1230. The memory 1230 may be disposed inside the device 1200 or outside the device 1200. Figure 8 Each action in the illustrated embodiment can be implemented by the processor 1220. The processor 1220 can obtain the first code applied to the source platform through the communication interface 1210, and use it to implement Figure 8 In the implementation process, each step of the processing flow can be completed by the hardware integrated logic circuit in the processor 1220 or the instructions in the form of software. Figure 8 For the sake of brevity, it will not be described here. The program code executed by the processor 1220 to implement the above method can be stored in the memory 1230. The memory 1230 is connected to the processor 1220, such as a coupling connection.
[0232] Some features of the embodiments of the present application may be completed / supported by the processor 1220 executing program instructions or software codes in the memory 1230. The software components loaded on the memory 1230 may be summarized in terms of function or logic, for example, Fig.10 The illustrated components include an acquisition module 1001 , an output module 1002 , a presentation module 1003 , a determination module 1004 , a modification module 1005 and a generation module 1006 .
[0233] Any communication interface involved in the embodiments of the present application may be a circuit, a bus, a transceiver, or any other device that can be used for information exchange. For example, the communication interface 1210 in the device 1200, illustratively, the other device may be a device connected to the device 1200, for example, a user terminal that provides the first code, etc.
[0234] The processor involved in the embodiments of the present application may be a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component, and may implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of the present application. A general-purpose processor may be a microprocessor or any conventional processor, etc. The steps of the method disclosed in the embodiments of the present application may be directly embodied as being executed by a hardware processor, or may be executed by a combination of hardware and software modules in the processor.
[0235] The coupling in the embodiments of the present application is an indirect coupling or communication connection between devices, modules or modules, which can be electrical, mechanical or other forms, and is used for information exchange between devices, modules or modules.
[0236] The processor may operate in conjunction with a memory. The memory may be a non-volatile memory, such as a hard disk drive (HDD) or a solid-state drive (SSD), or a volatile memory, such as a random-access memory (RAM). The memory is any other medium that can be used to carry or store desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto.
[0237] The specific connection medium between the communication interface, processor and memory is not limited in the embodiments of the present application. For example, the memory, processor and communication interface may be connected via a bus. The bus may be divided into an address bus, a data bus, a control bus, etc.
[0238] Based on the above embodiments, the embodiments of the present application further provide a computer storage medium, in which a software program is stored, and when the software program is read and executed by one or more processors, the method for executing the proxy edge device or edge device or cloud center provided by any one or more of the above embodiments can be implemented. The computer storage medium may include: a U disk, a mobile hard disk, a read-only memory, a random access memory, a magnetic disk or an optical disk, and other media that can store program codes.
[0239] Based on the above embodiments, the present application also provides a chip, which includes a processor, for implementing the functions of the proxy edge device or the edge device or the cloud center involved in the above embodiments, for example, for implementing Figure 3-4 The method executed by the proxy edge side device is used to implement Figure 3-4 The method performed by the edge device, or used to implement Figure 3-4 The method executed by the Zhongyun Center. Optionally, the chip also includes a memory, which is used for the necessary program instructions and data executed by the processor. The chip can be composed of a chip or include a chip and other discrete devices.
[0240] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that include computer-usable program code.
[0241] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.
[0242] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.
[0243] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.
[0244] The terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the terms used in this way can be interchangeable under appropriate circumstances. This is just a way of distinguishing objects with the same attributes when describing the embodiments of this application.
[0245] Obviously, those skilled in the art can make various changes and modifications to the embodiments of the present application without departing from the scope of the embodiments of the present application. Thus, if these modifications and variations of the embodiments of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.
Claims
1. A code processing method, characterized in that: The method comprises: Obtaining a first code, where the first code is applied to a source platform; Decompiling the first code to obtain a first intermediate representation IR; Compile the first IR into a second code, the second code being applied to a first target platform; in, The source platform and the first target platform have different instruction sets; the first code and the second code are both codes based on low-level languages.
2. The method according to claim 1, characterized in that The method further comprises: The first code is decompiled to obtain an IR corresponding to a second target platform, the first IR is different from the IR corresponding to the second target platform, and the first target platform and the second target platform have different instruction sets.
3. The method according to claim 1 or 2, characterized in that: The method further comprises: Present the target platform selection interface; In response to a selection operation for a target platform, the first target platform is determined from a plurality of target platforms.
4. The method according to any one of claims 1 to 3, characterized in that: Decompiling the first code to obtain a first intermediate representation IR includes: Acquire annotation information of the first code, where the annotation information includes any one or more of a type, a quantity, and a jump address type of a parameter in the first code; The first code is decompiled according to the annotation information to obtain the first IR.
5. The method according to any one of claims 1 to 4, characterized in that: Decompiling the first code to obtain a first intermediate representation IR includes: Decompile the first code to obtain a second IR; According to the first target platform, the second IR is optimized to obtain the first IR.
6. The method according to any one of claims 1 to 5, characterized in that: The method further comprises: Generate prompt information, where the prompt information is used to provide prompts for items to be checked, where the items to be checked are generated based on differences between the first target platform and the source platform; The prompt information is presented.
7. The method according to any one of claims 1 to 6, characterized in that: The method is applied in the cloud, and obtaining the first code includes: receiving a first code from a user; The method further comprises: The second code is sent to the user.
8. The method according to any one of claims 1 to 7, characterized in that: The decompiling the first code includes: The first code is decompiled according to the instruction semantic library corresponding to the source platform.
9. The method according to claim 8, characterized in that The method further comprises: In response to a modification operation on the instruction semantic library, the instruction semantic library is modified.
10. The method according to any one of claims 1 to 9, characterized in that: The obtaining of the first code comprises: Acquire a first code based on a low-level language and a variable based on a high-level language applied to a source platform; The decompiling the first code includes: The first code is translated into a first IR including a function, wherein the function includes a formal parameter, and an actual parameter corresponding to the formal parameter is the variable.
11. The method according to any one of claims 1 to 10, characterized in that: The first IR includes a first variable and a second variable, the first variable has a first logical address, the second variable has a second logical address, and the first logical address is different from the second logical address.
12. The method according to any one of claims 1 to 11, characterized in that: The decompiling the first code includes: The first code is decompiled according to the target platform function calling convention or single instruction stream multiple data stream SIMD instructions.
13. A code processing method, characterized in that: The method comprises: Obtaining a first code, where the first code is applied to a source platform; Outputting a second code, where the second code is applied to a first target platform, and the second code is obtained by processing the first code; in, The source platform and the first target platform have different instruction sets; the first code and the second code are both codes based on low-level languages.
14. The method according to claim 13, characterized in that The outputting of the second code comprises: The second code is presented through a code display interface.
15. The method according to claim 13 or 14, characterized in that The method is applied in the cloud, and obtaining the first code includes: receiving a first code from a user; The outputting the second code comprises: The second code is output to the user.
16. The method according to any one of claims 13 to 15, characterized in that The method further comprises: Present the target platform selection interface; In response to a selection operation for a target platform, the first target platform is determined from a plurality of target platforms.
17. The method according to any one of claims 13 to 16, characterized in that The method further comprises: An instruction semantic library corresponding to the source platform is obtained, where the instruction semantic library is used to process the first code.
18. The method according to claim 17, characterized in that The method further comprises: In response to a modification operation on the instruction semantic library, the instruction semantic library is modified.
19. The method according to any one of claims 13 to 18, characterized in that The method further comprises: Generate prompt information, where the prompt information is used to provide prompts for items to be checked, where the items to be checked are generated based on differences between the first target platform and the source platform; The prompt information is presented.
20. The method according to any one of claims 13 to 19, characterized in that The method further comprises: A first intermediate representation IR is presented, where the first IR is obtained by decompiling the first code, and the second code is obtained by compiling the first IR.
21. The method according to claim 20, characterized in that The method further comprises: A second IR is presented, where the second IR is obtained by decompiling the first code, and the first IR is obtained by optimizing the first IR according to the first target platform.
22. The method according to claim 20 or 21, characterized in that The method further comprises: In response to the modification operation on the first IR, a modified first IR is obtained; A third code is presented, where the third code is a low-level language-based code applied to the first target platform, and the third code is obtained by compiling the modified first IR.
23. The method according to any one of claims 20 to 22, characterized in that The method further comprises: A third IR is presented, where the third IR is obtained by decompiling the first code, where the third IR is used to generate a low-level language-based code applied to a second target platform, and where the third IR is different from the first IR.
24. The method according to any one of claims 13 to 23, characterized in that The method further comprises: In response to the modification operation on the second code, obtaining a modified second code; The modified second code is output.
25. The method according to any one of claims 13 to 24, characterized in that The obtaining of the first code comprises: A low-level language-based first code and a high-level language-based variable applied to a source platform are acquired.
26. A code processing device, characterized in that: The device comprises: An acquisition module, configured to acquire a first code, where the first code is applied to a source platform; A decompilation module, used for decompiling the first code to obtain a first intermediate representation IR; A compiling module, used for compiling the first IR into a second code, wherein the second code is applied to a first target platform; in, The source platform and the first target platform have different instruction sets; the first code and the second code are both codes based on low-level languages.
27. The device according to claim 26, characterized in that The decompile module is further used to decompile the first code to obtain an IR corresponding to a second target platform, the first IR is different from the IR corresponding to the second target platform, and the first target platform and the second target platform have different instruction sets.
28. The device according to claim 26 or 27, characterized in that The device also includes: A presentation module, used to present a target platform selection interface; The determination module is configured to determine the first target platform from a plurality of target platforms in response to a selection operation for the target platform.
29. The device according to any one of claims 26 to 28, characterized in that The decompilation module is specifically used for: Acquire annotation information of the first code, where the annotation information includes any one or more of a type, a quantity, and a jump address type of a parameter in the first code; The first code is decompiled according to the annotation information to obtain the first IR.
30. The device according to any one of claims 26 to 29, characterized in that The decompilation module is specifically used for: Decompile the first code to obtain a second IR; According to the first target platform, the second IR is optimized to obtain the first IR.
31. The device according to any one of claims 26 to 30, characterized in that The device also includes: A generating module, used for generating prompt information, wherein the prompt information is used for providing prompts for items to be checked, wherein the items to be checked are generated based on the differences between the first target platform and the source platform; A presentation module is used to present the prompt information.
32. The device according to any one of claims 26 to 31, characterized in that The device is applied to the cloud, and the acquisition module is specifically used to receive a first code from a user; The device further includes: a communication module, configured to send a second code based on a low-level language and applied to the first target platform to the user.
33. The device according to any one of claims 26 to 32, characterized in that The decompile module is specifically used to decompile the first code according to the instruction semantic library corresponding to the source platform.
34. The device according to claim 33, characterized in that The device also includes: The modification module is used to modify the instruction semantic library in response to a modification operation on the instruction semantic library.
35. The device according to any one of claims 26 to 34, characterized in that The acquisition module is specifically used to acquire a first code based on a low-level language and a variable based on a high-level language applied to a source platform; The decompile module is specifically used to translate the first code into a first IR including a function, wherein the function includes a formal parameter, and an actual parameter corresponding to the formal parameter is the variable.
36. The device according to any one of claims 26 to 35, characterized in that The first IR includes a first variable and a second variable, the first variable has a first logical address, the second variable has a second logical address, and the first logical address is different from the second logical address.
37. The device according to any one of claims 26 to 36, characterized in that The decompiling module is specifically used to decompile the first code according to the target platform function calling convention or single instruction stream multiple data stream SIMD instructions.
38. A code processing device, characterized in that: The device comprises: An acquisition module, configured to acquire a first code, where the first code is applied to a source platform; an output module, used for outputting a second code, where the second code is applied to a first target platform and is obtained by processing the first code; in, The source platform and the first target platform have different instruction sets; the first code and the second code are both codes based on low-level languages.
39. The device according to claim 38, characterized in that The output module is specifically configured to present the second code through a code display interface.
40. The device according to claim 38 or 39, characterized in that The device is applied to the cloud, and the acquisition module is specifically used to receive a first code from a user; The output module is specifically configured to output the second code to the user.
41. The device according to any one of claims 38 to 40, characterized in that The device also includes: A presentation module, used to present a target platform selection interface; The determination module is configured to determine the first target platform from a plurality of target platforms in response to a selection operation for the target platform.
42. The device according to any one of claims 38 to 41, characterized in that The acquisition module is further used to acquire an instruction semantic library corresponding to the source platform, and the instruction semantic library is used to process the first code.
43. The device according to claim 42, characterized in that The device also includes: The modification module is used to modify the instruction semantic library in response to a modification operation on the instruction semantic library.
44. The device according to any one of claims 38 to 43, characterized in that The device also includes: A generating module, used for generating prompt information, wherein the prompt information is used for providing prompts for items to be checked, wherein the items to be checked are generated based on the differences between the first target platform and the source platform; A presentation module is used to present the prompt information.
45. The device according to any one of claims 38 to 44, characterized in that The device also includes: The presentation module is used to present a first intermediate representation IR, where the first IR is obtained by decompiling the first code, and the second code is obtained by compiling the first IR.
46. The device according to claim 45, characterized in that The presentation module is further used for presenting a second IR, where the second IR is obtained by decompiling the first code, and the first IR is obtained by optimizing the first IR according to the first target platform.
47. The device according to claim 45 or 46, characterized in that The device also includes: A modification module, configured to obtain a modified first IR in response to a modification operation on the first IR; The presentation module is further used to present a third code, where the third code is a low-level language-based code applied to the first target platform, and the third code is obtained by compiling the modified first IR.
48. The device according to any one of claims 45 to 47, characterized in that The presentation module is further used to present a third IR, where the third IR is obtained by decompiling the first code, and the third IR is used to generate a low-level language-based code applied to a second target platform, and the third IR is different from the first IR.
49. The device according to any one of claims 38 to 48, characterized in that The device also includes: A modification module, configured to obtain a modified second code in response to a modification operation on the second code; The output module is further used to output the modified second code.
50. The device according to any one of claims 38 to 49, characterized in that The acquisition module is specifically used to acquire a first code based on a low-level language and a variable based on a high-level language applied to a source platform.
51. A computing device, characterized in that: The device includes a memory and a processor, wherein the memory is used to store software instructions; the processor calls the software instructions stored in the memory to execute any one of the methods described in claims 1 to 12 above.
52. A computing device, characterized in that The device includes a memory and a processor, wherein the memory is used to store software instructions; the processor calls the software instructions stored in the memory to execute any of the methods described in claims 13 to 25 above.
53. A computer-readable storage medium, characterized in that: The method comprises instructions for implementing the method according to any one of claims 1 to 12, or for implementing the method according to any one of claims 13 to 25.
54. A computer program product, characterized in that When the method is executed on a computer, the computer is enabled to execute the method according to any one of claims 1 to 12, or execute the method according to any one of claims 13 to 25.