Data processing method and device, equipment, medium and program product
By calculating and regulating the reliability of the read interval of the memory, and converting it into an integer type, the problem of large LLR value is solved, and the soft decoding ability of the hard decoration of the read operation is improved.
Patent Information
- Application Number
- CN202411884967.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-19
- Publication Date
- 2025-01-24
- Estimated Expiration
- 2044-12-19
AI Technical Summary
In the prior art, all LLR values recorded in the LLR table are amplified, resulting in insufficient soft decoding capabilities after the hard decoding of the read operation.
By calculating the read reliability of floating point types in multiple read intervals, normalizing them, converting them into integer types, recording the read reliability of integer types in each read interval, if the hard decoding fails, use these reads Decoding and error correction based on reliability.
Effectively improved the soft decoding ability and success rate after the failure of the hard decoding operation, and ensured the reliability of the read operation operation operation.
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Figure CN119357079A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of computer technology, and in particular to a data processing method, device, equipment, medium and program product. Background Art
[0002] At present, the LLR (Log-Likelihood Ratio) table is used for the soft decoding process after the hard decoding of the read operation fails. The LLR table records the integer type LLR values of multiple read intervals determined based on the memory read voltage. These LLR values are either directly rounded or linearly changed for the corresponding floating-point numbers, which results in the amplification of all LLR values recorded in the LLR table. For example, when the difference between different floating-point numbers is small, the difference between the LLRs of different read intervals will be eliminated by the rounding operation, which may cause the soft decoding to fail.
[0003] Therefore, how to improve the soft decoding capability after the hard decoding of the read operation fails is a problem that those skilled in the art need to solve. Summary of the invention
[0004] In view of this, the purpose of the present invention is to provide a data processing method, device, equipment, medium and program product to improve the soft decoding capability after the hard decoding of the read operation fails. The specific scheme is as follows:
[0005] In a first aspect, the present invention provides a data processing method, applied to a memory, comprising:
[0006] Calculating the read reliability of the floating-point type corresponding to the plurality of read intervals according to the default read operation voltage, the first read offset and the second read offset;
[0007] According to the preset storage bit upper limit, the read reliability of the floating point type corresponding to each read interval is normalized;
[0008] Convert the read reliability of the floating point type corresponding to each read interval after normalization into an integer type, and record the read reliability of the integer type corresponding to each read interval;
[0009] If hard decoding of any read operation of the memory fails, the read operation is decoded and error corrected using the integer-type read reliability corresponding to each read interval.
[0010] Optionally, the reading reliability of the floating-point type corresponding to the plurality of read intervals is calculated according to the default read operation voltage, the first read offset, and the second read offset, including:
[0011] Determine K read voltage axes according to the read operation voltage, the first read offset and the second read offset;
[0012] Calculate the product of the number of intervals X and K corresponding to each reading voltage axis to obtain XK reading intervals;
[0013] Calculate the read reliability of the floating-point type corresponding to each of the XK read intervals.
[0014] Optionally, according to a preset storage bit upper limit, normalization processing is performed on the read reliability of the floating point type corresponding to each read interval, including:
[0015] Determine the maximum read reliability of XK floating point types;
[0016] Calculate the ratios of the read reliability of XK floating point types to the maximum value respectively, and obtain XK ratios;
[0017] According to the XK ratios and the storage bit upper limit, the read reliability of the floating-point type corresponding to the XK read intervals after normalization is calculated.
[0018] Optionally, according to the XK ratios and the storage bit upper limit, the read reliability of the floating-point type corresponding to the XK read intervals after normalization is calculated, including:
[0019] Subtract one from the upper limit of the storage bit to obtain a target value;
[0020] The product of the target value and the XK ratios is calculated to obtain the read reliability of the floating-point type corresponding to the normalized XK read intervals.
[0021] Optionally, calculating the read reliability of the floating-point type corresponding to the XK read intervals respectively includes:
[0022] The ratios of the probability of writing character 0 to the probability of writing character 1 in the XK read intervals are calculated respectively, and the corresponding ratios are used as the read reliability of the floating-point type corresponding to the XK read intervals respectively.
[0023] Optionally, converting the read reliability of the floating point type corresponding to each read interval after normalization into an integer type includes:
[0024] Reading the storage bit upper limit from the main controller of the memory;
[0025] Calculate n quantization points using the storage bit upper limit;
[0026] Calculating a maximum amplitude using the storage bit upper limit;
[0027] A piecewise symbol function is constructed by using the n quantization points, the maximum amplitude and the reading reliability of the floating point type corresponding to each reading interval after normalization;
[0028] The piecewise symbol function is solved to obtain the integer type reading reliability corresponding to each reading interval.
[0029] Optionally, using the storage bit upper limit to calculate and obtain n quantization points includes:
[0030] According to the first formula, the function values with equal spacing are calculated;
[0031] Determine n quantization points with non-uniform distribution based on equally spaced function values;
[0032] Among them, the first formula is: ; Represents the quantized point x i The corresponding function value, m represents the upper limit of the storage bit, i=1,2,…,n.
[0033] Optionally, calculating the distance between two adjacent points using the storage bit upper limit and n includes:
[0034] The distance between two adjacent points is calculated according to the second formula;
[0035] The second formula is: D=(m-1) / n; D represents the spacing, m represents the upper limit of the storage bit, and n represents the number of quantization points.
[0036] Optionally, the piecewise symbol function is:
[0037] ;q 1 ,q 2 ,…,q n Represents n quantization points, i=1,2,…,n, It indicates the reading reliability of the floating-point type corresponding to each reading interval after normalization processing, sign() is a sign function used to identify the positive and negative of q(y), and magn indicates the maximum amplitude.
[0038] Optionally, calculating the maximum amplitude using the storage bit upper limit includes:
[0039] The maximum amplitude is calculated according to the third formula;
[0040] Wherein, the third formula is: magn=2 m-1 -1; magn represents the maximum magnitude, and m represents the upper limit of the storage bit.
[0041] Optionally, the read reliability of the integer type corresponding to each read interval is recorded, including:
[0042] A log-likelihood ratio table including integer-type read reliability corresponding to each read interval is generated.
[0043] Optionally, decoding and error correction are performed on the read operation using the integer-type read reliability corresponding to each read interval, including:
[0044] Determining a read voltage and a corresponding read offset corresponding to a storage unit read by the read operation;
[0045] Reading the storage unit a preset number of times using the read voltage and the read offset to obtain a read result;
[0046] Query the read reliability of the integer type corresponding to the read result;
[0047] The read operation is decoded and error corrected based on the queried read reliability of the integer type.
[0048] Optionally, querying the read reliability of an integer type corresponding to the read result includes:
[0049] In the log-likelihood ratio table corresponding to the preset number, the log-likelihood ratio value corresponding to the read result queried is used as the integer type read reliability corresponding to the read result.
[0050] Optionally, it also includes:
[0051] If the decoding and error correction fails, the preset number is adjusted if the maximum adjustment number is not reached, and the following steps are performed based on the adjusted preset number: the storage unit is read a preset number of times using the read voltage and the read offset to obtain a read result; a read reliability of an integer type corresponding to the read result is queried; and the read operation is decoded and error corrected based on the queried read reliability of the integer type.
[0052] Optionally, it also includes:
[0053] If the decoding and error correction are successful, the data read by the read operation is fed back to the corresponding client.
[0054] Optionally, it also includes:
[0055] If the decoding error correction fails, the corresponding data recovery operation is performed when the maximum number of adjustments is reached.
[0056] Optionally, it also includes:
[0057] Count the probability of decoding error correction failure within a period of time;
[0058] If the decoding error correction failure probability is greater than a preset probability threshold, the read operation voltage, the first read offset and / or the second read offset are adjusted.
[0059] In a second aspect, the present invention provides a data processing device, applied to a memory, comprising:
[0060] A calculation module, used for calculating the read reliability of the floating-point type corresponding to the plurality of read intervals respectively according to a default read operation voltage, a first read offset and a second read offset;
[0061] A normalization module, used to normalize the read reliability of the floating-point type corresponding to each read interval according to a preset storage bit upper limit;
[0062] A conversion module, used to convert the reading reliability of the floating point type corresponding to each reading interval after normalization into an integer type, and record the reading reliability of the integer type corresponding to each reading interval;
[0063] The read processing module is used to decode and correct the read operation by using the integer type read reliability corresponding to each read interval if the hard decoding of any read operation of the memory fails.
[0064] Optionally, the computing module is specifically used for:
[0065] Determine K read voltage axes according to the read operation voltage, the first read offset and the second read offset;
[0066] Calculate the product of the number of intervals X and K corresponding to each reading voltage axis to obtain XK reading intervals;
[0067] Calculate the read reliability of the floating-point type corresponding to each of the XK read intervals.
[0068] Optionally, the normalization module is specifically used for:
[0069] Determine the maximum read reliability of XK floating point types;
[0070] Calculate the ratios of the read reliability of XK floating point types to the maximum value respectively, and obtain XK ratios;
[0071] According to the XK ratios and the storage bit upper limit, the read reliability of the floating-point type corresponding to the XK read intervals after normalization is calculated.
[0072] Optionally, the normalization module is specifically used for:
[0073] Subtract one from the upper limit of the storage bit to obtain a target value;
[0074] The product of the target value and the XK ratios is calculated to obtain the read reliability of the floating-point type corresponding to the normalized XK read intervals.
[0075] Optionally, the computing module is specifically used for:
[0076] The ratios of the probability of writing character 0 to the probability of writing character 1 in the XK read intervals are calculated respectively, and the corresponding ratios are used as the read reliability of the floating-point type corresponding to the XK read intervals respectively.
[0077] Optionally, the conversion module is specifically used for:
[0078] Reading the storage bit upper limit from the main controller of the memory;
[0079] Calculate n quantization points using the storage bit upper limit;
[0080] Calculating a maximum amplitude using the storage bit upper limit;
[0081] A piecewise symbol function is constructed by using the n quantization points, the maximum amplitude and the reading reliability of the floating point type corresponding to each reading interval after normalization;
[0082] The piecewise symbol function is solved to obtain the integer type reading reliability corresponding to each reading interval.
[0083] Optionally, the conversion module is specifically used for:
[0084] According to the first formula, the function values with equal spacing are calculated;
[0085] Determine n quantization points with non-uniform distribution based on equally spaced function values;
[0086] Among them, the first formula is: ; Represents the quantized point x i The corresponding function value, m represents the upper limit of the storage bit, i=1,2,…,n.
[0087] Optionally, the conversion module is specifically used for:
[0088] The distance between two adjacent points is calculated according to the second formula;
[0089] The second formula is: D=(m-1) / n; D represents the spacing, m represents the upper limit of the storage bit, and n represents the number of quantization points.
[0090] Optionally, the piecewise symbol function is:
[0091] ;q 1 ,q2 ,…,q n Represents n quantization points, i=1,2,…,n, It indicates the reading reliability of the floating-point type corresponding to each reading interval after normalization processing, sign() is a sign function used to identify the positive and negative of q(y), and magn indicates the maximum amplitude.
[0092] Optionally, the conversion module is specifically used for:
[0093] The maximum amplitude is calculated according to the third formula;
[0094] Wherein, the third formula is: magn=2 m-1 -1; magn represents the maximum magnitude, and m represents the upper limit of the storage bit.
[0095] Optionally, the conversion module is specifically used for:
[0096] A log-likelihood ratio table including integer-type read reliability corresponding to each read interval is generated.
[0097] Optionally, the read processing module is specifically used for:
[0098] Determining a read voltage and a corresponding read offset corresponding to a storage unit read by the read operation;
[0099] Reading the storage unit a preset number of times using the read voltage and the read offset to obtain a read result;
[0100] Query the read reliability of the integer type corresponding to the read result;
[0101] The read operation is decoded and error corrected based on the queried read reliability of the integer type.
[0102] Optionally, the read processing module is specifically used for:
[0103] In the log-likelihood ratio table corresponding to the preset number, the log-likelihood ratio value corresponding to the read result queried is used as the integer type read reliability corresponding to the read result.
[0104] Optionally, it also includes:
[0105] The loop module is used for adjusting the preset number if the decoding and error correction fails and executing the steps based on the adjusted preset number: reading the storage unit a preset number of times using the read voltage and the read offset to obtain a read result; querying the read reliability of the integer type corresponding to the read result; and decoding and error correcting the read operation based on the query read reliability of the integer type.
[0106] Optionally, it also includes:
[0107] The decoding success module is used to feed back the data read by the read operation to the corresponding client if the decoding error correction is successful.
[0108] Optionally, it also includes:
[0109] The decoding failure module is used to perform corresponding data recovery operations if the decoding error correction fails and the maximum number of adjustment times is reached.
[0110] Optionally, it also includes:
[0111] The adjustment module is used to count the decoding error correction failure probability within a period of time; if the decoding error correction failure probability is greater than a preset probability threshold, adjust the read operation voltage, the first read offset and / or the second read offset.
[0112] In a third aspect, the present invention provides an electronic device, comprising:
[0113] Memory for storing computer programs;
[0114] The processor is used to execute the computer program to implement the data processing method disclosed above.
[0115] In a fourth aspect, the present invention provides a non-volatile storage medium for storing a computer program, wherein the computer program implements the aforementioned disclosed data processing method when executed by a processor.
[0116] In a fifth aspect, the present invention provides a computer program product, comprising a computer program / instruction, which implements the steps of the aforementioned disclosed data processing method when executed by a processor.
[0117] It can be seen from the above scheme that the present invention provides a data processing method, which is applied to a memory, including: calculating the read reliability of floating-point types corresponding to multiple read intervals according to a default read operation voltage, a first read offset and a second read offset; normalizing the read reliability of the floating-point type corresponding to each read interval according to a preset storage bit upper limit; converting the read reliability of the floating-point type corresponding to each read interval after the normalization into an integer type, and recording the read reliability of the integer type corresponding to each read interval; if the hard decoding of any read operation of the memory fails, the read operation is decoded and corrected using the read reliability of the integer type corresponding to each read interval.
[0118] It can be seen that the beneficial effects of the present invention are as follows: after calculating the read reliability of the floating-point type corresponding to the plurality of read intervals according to the default read operation voltage, the first read offset and the second read offset, the read reliability of the floating-point type corresponding to each read interval is normalized according to the preset storage bit upper limit, so that the amplitude of the read reliability of the floating-point type is constrained to the storage bit upper limit, and then the read reliability of the floating-point type corresponding to each read interval after the normalization is converted to an integer type, and the read reliability of the integer type corresponding to each read interval is recorded; if the hard decoding of any read operation of the memory fails, the read reliability of the integer type corresponding to each read interval is used to decode and correct the read operation. This scheme constrains the amplitude of the read reliability of the floating-point type to the storage bit upper limit set by the hardware; and the number of read intervals is calculated according to the default read operation voltage, the first read offset and the second read offset, and more quantization points can be taken in the area with a smaller LLR amplitude, and a small number of quantization points can be taken in the area with a larger LLR value, thereby improving the soft decoding capability and success rate after the hard decoding of the read operation fails.
[0119] Correspondingly, a data processing device, equipment, medium and program product provided by the present invention also have the above-mentioned technical effects. BRIEF DESCRIPTION OF THE DRAWINGS
[0120] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.
[0121] Figure 1 A flow chart of a data processing method disclosed in the present invention;
[0122] Figure 2 A schematic diagram of using voltage to read data disclosed in the present invention;
[0123] Figure 3 A schematic diagram of a function disclosed in the present invention;
[0124] Figure 4 A schematic diagram of a read operation processing flow disclosed in the present invention;
[0125] Figure 5 A schematic diagram of an electronic device disclosed in the present invention;
[0126] Figure 6 A server structure diagram provided by the present invention;
[0127] Figure 7A terminal structure diagram provided by the present invention. DETAILED DESCRIPTION
[0128] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other examples obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0129] At present, the LLR table is used for the soft decoding process after the hard decoding of the read operation fails. The LLR table records the integer type LLR values of multiple read intervals determined based on the memory read voltage. These LLR values are either directly rounded or linearly changed to the corresponding floating point numbers, which leads to the amplification of all LLR values recorded in the LLR table. For example: when the difference between different floating point numbers is small, the difference of LLRs in different read intervals will be eliminated by the rounding operation, which may cause the soft decoding to fail. To this end, the present invention provides a data processing scheme that can improve the soft decoding capability after the hard decoding of the read operation fails.
[0130] See also Figure 1 As shown, an embodiment of the present invention discloses a data processing method, which is applied to a memory, including:
[0131] S101 . Calculate and obtain floating-point type read reliability corresponding to a plurality of read intervals according to a default read operation voltage, a first read offset, and a second read offset.
[0132] In one embodiment, the read reliability of the floating-point type corresponding to the plurality of read intervals is calculated based on the default read operation voltage, the first read offset, and the second read offset, including: determining K read voltage axes based on the read operation voltage, the first read offset, and the second read offset; calculating the product of the number of intervals X and K corresponding to each read voltage axis to obtain XK read intervals; and calculating the read reliability of the floating-point type corresponding to the XK read intervals.
[0133] S102 : performing normalization processing on the read reliability of the floating-point type corresponding to each read interval according to a preset storage bit upper limit.
[0134] In one embodiment, the read reliability of the floating-point type corresponding to each read interval is normalized according to a preset storage bit upper limit, including: determining the maximum value of the read reliability of XK floating-point types; calculating the ratio of the read reliability of the XK floating-point types to the maximum value to obtain XK ratios; and calculating the normalized read reliability of the floating-point type corresponding to the XK read intervals according to the XK ratios and the storage bit upper limit.
[0135] In one embodiment, based on XK ratios and the upper limit of the storage bit, the read reliability of the floating-point type corresponding to the XK read intervals after normalization is calculated, including: subtracting one from the upper limit of the storage bit to obtain a target value; calculating the product of the target value and the XK ratios to obtain the read reliability of the floating-point type corresponding to the XK read intervals after normalization.
[0136] In one embodiment, calculating the read reliability of the floating-point type corresponding to each of the XK read intervals includes: calculating the ratio of the probability of writing character 0 to the probability of writing character 1 in each of the XK read intervals, and using the corresponding ratio as the read reliability of the floating-point type corresponding to each of the XK read intervals.
[0137] S103 , converting the reading reliability of the floating point type corresponding to each normalized reading interval into an integer type, and recording the reading reliability of the integer type corresponding to each reading interval.
[0138] In one embodiment, the read reliability of the floating-point type corresponding to each read interval after normalization is converted into an integer type, including: reading the storage bit upper limit from the main controller of the memory; using the storage bit upper limit to calculate n quantization points; using the storage bit upper limit to calculate the maximum amplitude; using the n quantization points, the maximum amplitude and the read reliability of the floating-point type corresponding to each read interval after normalization, construct a piecewise sign function; solving the piecewise sign function to obtain the read reliability of the integer type corresponding to each read interval.
[0139] S104: If the hard decoding of any read operation of the memory fails, the read operation is decoded and error corrected using the integer type read reliability corresponding to each read interval.
[0140] In one implementation, the function values with equal spacing are calculated according to the first formula; and the n quantization points with non-uniform distribution are determined based on the function values with equal spacing; wherein the first formula is: ; Represents the quantized point x i The corresponding function value, m represents the upper limit of the storage bit, i=1,2,…,n. Figure 3 As shown, there are multiple function values at equal intervals on the Y axis, and the corresponding X axis values are non-uniformly distributed. The larger the Y axis value, the denser the X axis value distribution, and the smaller the Y axis value, the sparser the X axis value distribution. In this way, non-uniform n quantization points are achieved.
[0141] In one embodiment, the distance between two adjacent points is calculated using the storage bit upper limit and n, including: calculating the distance between two adjacent points according to a second formula; wherein the second formula is: D=(m-1) / n; D represents the distance, m represents the storage bit upper limit, and n represents the number of quantization points.
[0142] In one embodiment, the piecewise sign function is: ;q 1 ,q 2 ,…,q n Represents n quantization points, i=1,2,…,n, It indicates the reading reliability of the floating-point type corresponding to each reading interval after normalization. sign() is the sign function used to identify the positive and negative of q(y). magn indicates the maximum amplitude.
[0143] In one implementation, the maximum amplitude is calculated using the storage bit upper limit, including: calculating the maximum amplitude according to a third formula; wherein the third formula is: magn=2 m-1 -1; magn represents the maximum magnitude, and m represents the upper limit of storage bits.
[0144] In one implementation, recording the read reliability of the integer type corresponding to each read interval includes: generating a log-likelihood ratio table including the read reliability of the integer type corresponding to each read interval.
[0145] In one embodiment, the read operation is decoded and error corrected using the integer type read reliability corresponding to each read interval, including: determining a read voltage and a corresponding read offset corresponding to a storage unit read by the read operation; reading the storage unit a preset number of times using the read voltage and the read offset to obtain a read result; querying the read reliability of the integer type corresponding to the read result; and decoding and error correcting the read operation based on the queried integer type read reliability.
[0146] In one implementation, querying the read reliability of the integer type corresponding to the read result includes: using the log-likelihood ratio value corresponding to the queried read result as the read reliability of the integer type corresponding to the read result in a log-likelihood ratio table corresponding to a preset number.
[0147] In one embodiment, if the decoding error correction fails, the preset number is adjusted if the maximum adjustment number is not reached, and the steps are performed based on the adjusted preset number: the storage unit is read a preset number of times using the read voltage and the read offset to obtain a read result; the read reliability of the integer type corresponding to the read result is queried; and the read operation is decoded and corrected based on the read reliability of the integer type queried. In this way, cyclic decoding error correction can be achieved. If the decoding error correction is successful, the data read by the read operation is fed back to the corresponding client. If the decoding error correction fails, the corresponding data recovery operation is performed if the maximum adjustment number is reached.
[0148] In one embodiment, the method further includes: calculating the probability of decoding error correction failure within a period of time; and if the probability of decoding error correction failure is greater than a preset probability threshold, adjusting the read operation voltage, the first read offset and / or the second read offset, thereby reducing the probability of decoding error correction failure.
[0149] It can be seen that, after calculating the read reliability of the floating-point type corresponding to the plurality of read intervals according to the default read operation voltage, the first read offset and the second read offset, the read reliability of the floating-point type corresponding to each read interval is normalized according to the preset storage bit upper limit, so that the amplitude of the read reliability of the floating-point type is constrained to the storage bit upper limit, and then the read reliability of the floating-point type corresponding to each read interval after the normalization is converted to an integer type, and the read reliability of the integer type corresponding to each read interval is recorded; if the hard decoding of any read operation of the memory fails, the read reliability of the integer type corresponding to each read interval is used to decode and correct the read operation. This scheme constrains the amplitude of the read reliability of the floating-point type to the storage bit upper limit set by the hardware; and the number of read intervals is calculated according to the default read operation voltage, the first read offset and the second read offset, and more quantization points can be taken in the area with a smaller LLR amplitude, and a smaller number of quantization points can be taken in the area with a larger LLR value, thereby improving the soft decoding capability and success rate after the hard decoding of the read operation fails.
[0150] It should be noted that NAND flash read recovery technology relies on ECC (Error Correction Code), such as the current mainstream LDPC (Low Density Parity Check), including hard decoding and soft decoding of LDPC codes. LDPC encoding is performed before data is written to the flash memory. When reading, the data read from the flash memory will first be recovered by performing LDPC hard decoding operations. When the number of bits with read errors is within the decoding error correction range of the LDPC code, that is, the RBER is less than the decoding error tolerance, the decoding operation can successfully decode and send the data to the host. However, when the threshold voltage is shifted or widened, the overlap area between the two adjacent states increases or the original read voltage axis is not accurate enough, so that the read RBER (Raw Bit Error Rate) exceeds the error correction capability of LDPC, the data cannot be recovered by hard decoding, and the SSD (Solid State Drives) master will perform LDPC soft decoding to recover the data.
[0151] Soft decoding requires NAND flash memory to support reread operations. It performs left and right offset reads on the offset axis based on the original voltage axis. After multiple reads, the threshold voltage axis is divided into multiple intervals. Take a voltage axis as an example. Figure 2 The original voltage axis RL is used to perform conventional reading, and the left and right offset voltage axis is performed. and The voltage axis is divided into four intervals, which can be represented by the results of three readings. If the three reading results are the same, that is, they are located in the non-overlapping areas on both sides (111 or 000 areas), the read result of the storage unit is considered to have a high reliability; if the three reading results are different, it is considered that the bit data may fall into the overlapping area (101 or 001 area). For each interval, the log-likelihood ratio (LLR) is used to identify the reliability of each interval, which is expressed as:
[0152]
[0153] The reliability of an interval is specifically: the ratio of the probability of writing 0 to the probability of writing 1 to the interval. The larger the amplitude of the LLR value, the higher the reliability of the interval; conversely, the smaller the amplitude of the LLR, the closer it is to 0, the probability of writing 0 and writing 1 in the interval is similar, the greater the degree of doubt, that is, the higher the probability of error. The SSD master control maintains an LLR table corresponding to the LLR value of each interval. When performing soft decoding, the results of multiple reads are used to determine which interval the current storage unit falls into, and then the corresponding LLR value is obtained by looking up the table, and then soft decoding of LDPC is performed.
[0154] The configuration of LLR has a great influence on the decoding results of soft decoding. Accurate LLR configuration can not only improve the error correction capability of LDPC soft decoding, but also effectively reduce the number of decoding iterations of LDPC code and reduce the reading delay. For the overlapping area of two state threshold voltages, since this area is the main area where read errors occur, the accuracy of LLR configuration in this area has a greater impact on the decoding results, and the offset value and The choice of also affects the calculation of LLR. Due to hardware limitations, when configuring the LLR table, the actual calculated floating point number is quantized with a finite number of integers and stored in the LLR table for soft decoding. The quantization operation reduces the accuracy of the LLR representation, thereby reducing the performance of LDPC soft decoding.
[0155] In the operation of converting floating-point numbers to integers, you can use rounding up or down, or rounding operations; when the actual LLR value is greater than the maximum value represented by the finite bit, directly perform the clipping operation, that is, convert the calculated floating-point number Substitute the following formula:
[0156] This converts a floating point number to an integer, Express Perform rounding. Indicates the maximum amplitude of integers represented by finite-bit hardware. If the hardware uses Bit representation, then , The first bit is the sign bit.
[0157] If the above formula (2) does not directly Instead of performing the operation, the LLR calculated for all intervals is first linearly changed:
[0158]
[0159] and is a parameter in linear variation, Usually take 1, It can be adjusted according to different NAND, and the parameter requirements can be adjusted so that no The quantitative formula is modified as follows:
[0160]
[0161] Due to the flash memory reading characteristics, the overlapping interval between two adjacent states is an area with high error incidence. The LLR with a small amplitude actually calculated has a great impact on the decoding result. Formula (2) directly performs the rounding operation; the scheme in formula (4) first linearly changes the floating point number and amplifies all the calculated LLR values. No special processing is performed on the LLR with a small amplitude, especially when the floating point number difference is small. The difference of LLR in different regions is eliminated by the rounding operation.
[0162] Accordingly, this embodiment provides a quantization scheme for LLR corresponding to soft decoding in SSD read operation. This scheme takes into account the decoding characteristics of LDPC and the characteristics of the LLR values actually calculated in the flash memory, and adopts the idea of non-uniform quantization to quantize the actually calculated LLR floating point numbers, thereby constructing an LLR table. On the basis of this scheme, considering the characteristics of LDPC, the requirements for the offset voltage configuration of the left and right offset read in soft decoding are given accordingly.
[0163] LDPC code is currently commonly used in SSD master control. LDPC code is an error correction code with excellent error correction performance. Its characteristic is that the check matrix has a low density. The check matrix of LDPC code is The sparse matrix of the check matrix has M rows corresponding to M check nodes and N columns corresponding to N variable nodes. The decoding of LDPC codes is usually an iterative message passing between variable nodes and check nodes. Each iteration in the decoding algorithm includes three parts: updating variable nodes, updating check nodes and making decisions. The update of check nodes is the most complicated and is completed by the following formula:
[0164] Indicates the calculated The variable node is passed to the The LLR value of the check node, In the last iteration, The variable nodes are from all except The LLR values obtained by the remaining check nodes connected to it, that is, , It is The set of all check nodes connected to the variable node, Represents taking a node from this collection To simplify the calculation, Written in two parts, sign and magnitude, so as to calculate them separately, let:
[0165]
[0166] in , is the sign function, indicating its positive or negative; represents its amplitude. Therefore, the update formula (5) is rewritten as:
[0167]
[0168] in:
[0169]
[0170] In the mainstream SSD master control implementation, the command is:
[0171]
[0172] That is to use Functional characteristics , Substituting formula (9) into formula (7), the update formula is further simplified to:
[0173]
[0174] The above formula (10) is actually the check node update formula of the minimum sum algorithm (MSA) () which is most commonly used in the master control.
[0175] From the formula (9) in the principle of the above LDPC code minimum sum decoding algorithm, we can see that compared with the actual sum-product decoding, the minimum sum decoding algorithm is to put the sum operation in use Instead, the LLR with the smallest amplitude dominates the update of the check node. In addition, the LLR value is usually smaller in the overlapping area where the error of NAND flash reading is prone to occur. The above two points show that the LLR value with a smaller amplitude has an important impact on LDPC decoding. Therefore, the core idea of the non-uniform quantization scheme proposed in the present invention is to take more quantization points in the area with a smaller LLR amplitude and take a smaller number of quantization points in the area with a larger LLR value.
[0176] If the hardware is limited, use If the LLR value is represented by bits, the maximum amplitude of the LLR is:
[0177]
[0178] The highest bit in the bit is the sign bit. It is represented by an integer. The amplitudes are optional, including the amplitude 0. Therefore, the present invention adopts n-bit non-uniform quantization for LLR. , calculated from the floating point number To integer The quantization process of adopts the following scheme, which is specifically expressed as follows:
[0179]
[0180] express Quantitative points, is a symbolic function, identifying The positive and negative Yes The formula for the changes that are made.
[0181] Based on the above quantification formula, the quantification case proposed in this embodiment is divided into two parts. One part is The other part is the determination of the quantitative point. Since the minimum sum algorithm is simplified based on function, Function has The smaller, The larger the The decrease of The characteristic of rapid increase, therefore, the present invention utilizes Function to determine the quantization point.
[0182] The quantization scheme is based on the idea of equally spaced linear approximation, that is, equally spaced points are selected in the Y-axis direction, and the corresponding X-axis is the selected quantization point. Specifically, for hardware limitations, In the LLR configuration of 100 bits, the highest bit is the sign bit, and the effective bits of the amplitude are Position, in Take the upper equal spacing Points, ,Right now:
[0183]
[0184] like Figure 3 middle Settings , Therefore, the corresponding The value range of .because hour ,but Function along Symmetric, so in this embodiment it is defined as , so the corresponding The value point is Furthermore, in this embodiment, the calculated The division interval of is defined as the quantization interval. Figure 3 As shown, there are multiple function values at equal intervals on the Y axis, and the corresponding X axis values are non-uniformly distributed. The larger the Y axis value, the denser the X axis value distribution, and the smaller the Y axis value, the sparser the X axis value distribution. In this way, non-uniform quantization is achieved.
[0185]
[0186] Based on the above-mentioned quantization point determination scheme, in this embodiment, The calculation is as follows:
[0187]
[0188] is a vector of all floating-point values actually calculated, It is the maximum value of all floating point values, so The actual calculated Value in Amplitude The normalized range is obtained. By using the calculated quantization point, formula (12) can be used to perform the quantization operation from the LLR floating point number to a finite integer.
[0189] In LDPC code decoding, if LLR=0, it means that the initial probability of writing 0 and writing 1 at this point is the same. In encoding, this variable node is called "erased". In the update formula of the check node in minimum sum decoding, it can be seen that the amplitude is the minimum amplitude of all variable nodes connected to it. If a variable node connected to it is erased, the remaining check nodes update their own LLR values to 0 in this iteration, and the LLR information of the remaining variable nodes of the check node cannot be quickly and directly transmitted, which will increase the probability of decoding failure. In addition, according to the concept of stop set in LDPC code, erasing nodes in the stop set will affect the correct decoding of the variable nodes on the entire stop set. Therefore, the value of 0 should be avoided in the initial configuration of LLR. This can be done through the offset and to avoid this problem.
[0190] From formula (12), we can get that hour, ,Depend on and From formula (15), we can see that to avoid LLR being 0 after quantization, we need to satisfy:
[0191]
[0192] Adjust the offset and , so that the actual calculated floating point LLR value must satisfy:
[0193] yes The inverse function of , and has mathematical properties: , which can be calculated by looking up the table.
[0194] In an example, a specific implementation step may include:
[0195] 1) Determine the voltage axis offset value: obtain the NAND threshold voltage distribution through testing and adjust the offset and Under the current offset setting, all floating-point values actually calculated satisfy formula (17), thus determining and Each voltage axis contains a pair of offset values, and the calculated offset values can be stored in the master.
[0196] 2) Calculate the LLR value based on the actual test results: and With the threshold voltage distribution, calculate the LLR floating point value of each interval on the threshold voltage axis. Figure 2 As shown, for each voltage axis offset, 4 intervals are divided after reading. If the flash memory page currently being read contains voltage axis, the threshold voltage axis is divided into The LLR value of each interval is calculated according to formula (1), which is recorded as .
[0197] 3) According to the hardware limitation requirements, the master provides the value of m and calculates the quantization point in the quantization scheme: If the hardware limit LLR storage bit is The first bit is the sign bit, indicating positive or negative. Function in axis Take the upper equal spacing Points, , the distance between each two points is .Right now:
[0198]
[0199] based on Determine ; Look up the function table to obtain According to formula (14), the quantization point can be obtained .
[0200] 4) Normalization : For the floating point LLR vector calculated in step 2 , use formula (15) to calculate the quantized result: .
[0201] 5) Quantize the floating point number to an integer: Using the quantization point calculated in step 3) and the normalized LLR floating point value calculated in step 4), use formula (12) to calculate the quantized integer LLR value and store it in the LLR table maintained in the master control.
[0202] 6) When the SSD reads data, if both normal reading and hard decoding after rereading fail, soft decoding will be performed. Soft decoding will perform multiple read operations such as normal reading and left and right offsets. The left and right offsets are relative to the voltage axis during normal reading. The voltage axis offset value is obtained from the main control. and Get the new voltage axis ( and ) to perform multiple reads, and use the read results to indicate which interval of the threshold voltage axis the voltage of the currently read storage cell is located in, that is, to obtain the interval index value. Use the index value to obtain the corresponding LLR value from the LLR table for LDPC soft decoding. For details, please refer to Figure 4 .
[0203] 7) The above LLR calculation is performed offline outside the SSD disk. Based on the results of pre-measured threshold voltage distribution, an LLR table is constructed after calculation and stored in the DDR of the master controller. Therefore, the above calculation operation will not increase the computational complexity and latency of the SSD read operation.
[0204] In another example, if the hardware limits , and the amplitude can only be represented using 3 bits, , then calculate the right side of inequality (17) by looking up the table , that is, the voltage axis offset value and The setting makes the deviation of the calculated actual floating-point value not too large, and the maximum value of all calculated floating-point values does not exceed 20 times the minimum value; according to the actual NAND test results, calculate the LLR value of each interval, assuming that there are four intervals of LLR in the LLR floating-point vector: , where the maximum value among all interval values is 13.5. Calculate the quantization point according to formula 3) and formula (18): Insert 7 points, namely: ,check The function table is: . For the amplitudes of the four floating point numbers given in this example Normalized, calculated by formula (15) is [1.66, 3, 0.35, 0.43]. The corresponding formula (12) determines the quantized LLR value to be: [-6, 7, -2, 3].
[0205] It should be noted that the result obtained after quantization in the original algorithm formula (2) is [-7,7,-2,2]. Compared with formula (2), for the amplitude exceeding of and After quantization, a slight distinction is made. , if the rounding operation in formula (2) is adopted, the same amplitude is obtained, which is also distinguished in this embodiment.
[0206] The LLR value is the input information of the SSD read operation entering the soft decoding after the LDPC hard decoding in the master fails, indicating the reliability prior probability information obtained from multiple reads. Accurate LLR configuration can effectively improve the error correction capability and efficiency of LDPC soft decoding. However, in hardware implementation, some prior information will be lost when converting floating-point numbers to integers. This embodiment utilizes the basic characteristics of LDPC decoding and the LLR configuration principle of error-prone positions in SSD read operations, and proposes a quantization design scheme for LLR based on the hardware limitations in the master. This embodiment adopts a non-uniform quantization scheme to quantize the actual calculated LLR floating-point value into an integer value whose amplitude value does not exceed the hardware limit. The proposed non-uniform quantization scheme utilizes the decoding function of the LDPC code, selecting more quantization intervals when the LLR is small, and selecting fewer quantization intervals when the LLR is large. Both experiments and academic research have confirmed the effectiveness of non-uniform quantization in LDPC code decoding. Therefore, compared with the solution of directly rounding floating point numbers, the non-uniform quantization of this solution is more reasonable and can retain more of the reliability prior information actually calculated, thereby effectively improving the performance of LDPC soft decoding.
[0207] The non-uniform quantization in this scheme directly adopts the iterative function in LDPC decoding and utilizes the idea of equidistant linear approximation, which is more suitable for the LDPC soft decoding scheme. In addition, based on this quantization scheme, the voltage axis offset of the soft decoding offset reading is also restricted, with the aim of reasonably configuring and eliminating the occurrence of "erasure".
[0208] A data processing device provided by an embodiment of the present invention is introduced below. The data processing device described below can be referenced to other embodiments described in this document.
[0209] The embodiment of the present invention discloses a data processing device, which is applied to a memory, including:
[0210] A calculation module, used for calculating the read reliability of the floating-point type corresponding to the plurality of read intervals respectively according to a default read operation voltage, a first read offset and a second read offset;
[0211] A normalization module, used to normalize the read reliability of the floating-point type corresponding to each read interval according to a preset storage bit upper limit;
[0212] A conversion module, used to convert the reading reliability of the floating point type corresponding to each reading interval after normalization into an integer type, and record the reading reliability of the integer type corresponding to each reading interval;
[0213] The read processing module is used to decode and correct the read operation by using the integer type read reliability corresponding to each read interval if the hard decoding of any read operation of the memory fails.
[0214] In one embodiment, the computing module is specifically configured to:
[0215] Determine K read voltage axes according to the read operation voltage, the first read offset and the second read offset;
[0216] Calculate the product of the number of intervals X and K corresponding to each reading voltage axis to obtain XK reading intervals;
[0217] Calculate the read reliability of the floating-point type corresponding to each of the XK read intervals.
[0218] In one implementation, the normalization module is specifically used for:
[0219] Determine the maximum value among the read reliability of XK floating point types;
[0220] Calculate the ratios of the read reliability of XK floating-point types to the maximum value respectively, and obtain XK ratios;
[0221] According to the XK ratios and the upper limit of the storage bit, the read reliability of the floating-point type corresponding to the XK read intervals after normalization is calculated.
[0222] In one implementation, the normalization module is specifically used for:
[0223] Subtract one from the upper limit of the storage bit to get the target value;
[0224] The product of the target value and the XK ratios is calculated to obtain the read reliability of the floating-point type corresponding to the XK read intervals after normalization.
[0225] In one embodiment, the computing module is specifically configured to:
[0226] The ratios of the probability of writing character 0 to the probability of writing character 1 in the XK read intervals are calculated respectively, and the corresponding ratios are used as the read reliability of the floating-point type corresponding to the XK read intervals respectively.
[0227] In one implementation, the conversion module is specifically configured to:
[0228] The upper limit of the storage bit is obtained by reading from the main controller of the memory;
[0229] The n quantization points are obtained by calculating the upper limit of the storage bit;
[0230] The maximum value is calculated using the upper limit of the storage bit;
[0231] The segmented symbol function is constructed by using the reading reliability of the floating point type corresponding to each reading interval after n quantization points, the maximum amplitude and normalization processing;
[0232] Solve the piecewise symbol function to obtain the integer type reading reliability corresponding to each reading interval.
[0233] In one implementation, the conversion module is specifically configured to:
[0234] According to the first formula, the function values with equal spacing are calculated;
[0235] Determine n quantization points with non-uniform distribution based on equally spaced function values;
[0236] Among them, the first formula is: ; Represents the quantized point x i The corresponding function value, m represents the upper limit of the storage bit, i=1,2,…,n.
[0237] In one implementation, the conversion module is specifically configured to:
[0238] The distance between two adjacent points is calculated according to the second formula;
[0239] The second formula is: D=(m-1) / n; D represents the spacing, m represents the upper limit of the storage bit, and n represents the number of quantization points.
[0240] In one embodiment, the piecewise sign function is:
[0241] ;q 1 ,q 2 ,…,q n Represents n quantization points, i=1,2,…,n, It indicates the reading reliability of the floating-point type corresponding to each reading interval after normalization. sign() is the sign function used to identify the positive and negative of q(y). magn indicates the maximum amplitude.
[0242] In one implementation, the conversion module is specifically configured to:
[0243] The maximum amplitude is calculated according to the third formula;
[0244] Among them, the third formula is: magn=2 m-1 -1; magn represents the maximum magnitude, and m represents the upper limit of storage bits.
[0245] In one implementation, the conversion module is specifically configured to:
[0246] A log-likelihood ratio table including integer-type read reliability corresponding to each read interval is generated.
[0247] In one implementation, the read processing module is specifically used to:
[0248] Determine a read voltage and a corresponding read offset corresponding to a storage cell read by a read operation;
[0249] Reading the storage unit a preset number of times using the read voltage and the read offset to obtain a read result;
[0250] Query the read reliability of the integer type corresponding to the read result;
[0251] The read operation is decoded and corrected based on the read reliability of the queried integer type.
[0252] In one implementation, the read processing module is specifically used to:
[0253] In the log-likelihood ratio table corresponding to the preset number, the log-likelihood ratio value corresponding to the queried reading result is used as the integer type reading reliability corresponding to the reading result.
[0254] In one embodiment, it further includes:
[0255] The loop module is used for adjusting the preset number if the decoding and error correction fails and the maximum adjustment number is not reached, and executing the steps based on the adjusted preset number: reading the storage unit a preset number of times using the read voltage and the read offset to obtain the read result; querying the read reliability of the integer type corresponding to the read result; and decoding and error correcting the read operation based on the query of the read reliability of the integer type.
[0256] In one embodiment, it further includes:
[0257] The decoding success module is used to feed back the data read by the read operation to the corresponding client if the decoding error correction is successful.
[0258] In one embodiment, it further includes:
[0259] The decoding failure module is used to perform corresponding data recovery operations if the decoding error correction fails and the maximum number of adjustment times is reached.
[0260] In one embodiment, it further includes:
[0261] The adjustment module is used to count the decoding error correction failure probability within a period of time; if the decoding error correction failure probability is greater than a preset probability threshold, the read operation voltage, the first read offset and / or the second read offset are adjusted.
[0262] Among them, for more specific working processes of each module and unit in this embodiment, reference can be made to the corresponding contents disclosed in the aforementioned embodiments, which will not be repeated here.
[0263] It can be seen that this embodiment provides a data processing device, which constrains the amplitude of the floating-point type read reliability to the storage bit upper limit set by the hardware; and the number of read intervals is calculated based on the default read operation voltage, the first read offset and the second read offset. More quantization points can be taken in the area with smaller LLR amplitude, and a small number of quantization points can be taken in the area with larger LLR value, thereby improving the soft decoding capability and success rate after the hard decoding of the read operation fails.
[0264] An electronic device provided by an embodiment of the present invention is introduced below. The electronic device described below can be referenced to other embodiments described in this document.
[0265] See also Figure 5 As shown, an embodiment of the present invention discloses an electronic device, including:
[0266] Memory 501, used for storing computer programs;
[0267] The processor 502 is used to execute the computer program to implement the method disclosed in any of the above embodiments.
[0268] In this embodiment, when the processor executes the computer program stored in the memory, the following steps can be specifically implemented: according to the default read operation voltage, the first read offset and the second read offset, the read reliability of the floating-point type corresponding to the multiple read intervals is calculated; according to the preset storage bit upper limit, the read reliability of the floating-point type corresponding to each read interval is normalized; the read reliability of the floating-point type corresponding to each read interval after the normalization is converted into an integer type, and the read reliability of the integer type corresponding to each read interval is recorded; if the hard decoding of any read operation of the memory fails, the read operation is decoded and corrected using the read reliability of the integer type corresponding to each read interval.
[0269] In this embodiment, when the processor executes the computer program stored in the memory, the following steps can be specifically implemented: determining K read voltage axes according to the read operation voltage, the first read offset, and the second read offset; calculating the product of the number of intervals X and K corresponding to each read voltage axis to obtain XK read intervals; calculating the read reliability of the floating-point type corresponding to the XK read intervals.
[0270] In this embodiment, when the processor executes the computer program stored in the memory, the following steps may be specifically implemented: determining the maximum value among the read reliabilities of XK floating-point types; calculating the ratios of the read reliabilities of the XK floating-point types to the maximum value to obtain XK ratios; and calculating the read reliabilities of the floating-point types corresponding to the XK read intervals after normalization based on the XK ratios and the upper limit of the storage bit.
[0271] In this embodiment, when the processor executes the computer program stored in the memory, the following steps can be specifically implemented: subtract one from the upper limit of the storage bit to obtain a target value; calculate the product of the target value and XK ratios to obtain the read reliability of the floating-point type corresponding to the normalized XK read intervals.
[0272] In this embodiment, when the processor executes the computer program stored in the memory, the following steps can be specifically implemented: respectively calculate the ratio of the probability of writing character 0 to the probability of writing character 1 in XK read intervals, and use the corresponding ratio as the reading reliability of the floating-point type corresponding to the XK read intervals respectively.
[0273] In this embodiment, when the processor executes the computer program stored in the memory, the following steps can be specifically implemented: reading from the main controller of the memory to obtain the storage bit upper limit; using the storage bit upper limit to calculate n quantization points; using the storage bit upper limit to calculate the maximum amplitude; using the n quantization points, the maximum amplitude and the read reliability of the floating-point type corresponding to each read interval after normalization, construct a piecewise symbol function; solve the piecewise symbol function to obtain the read reliability of the integer type corresponding to each read interval.
[0274] In this embodiment, when the processor executes the computer program stored in the memory, the following steps can be specifically implemented: the spacing between two adjacent points is calculated according to the second formula; wherein the second formula is: D=(m-1) / n; D represents the spacing, m represents the upper limit of the storage bit, and n represents the number of quantization points.
[0275] In this embodiment, when the processor executes the computer program stored in the memory, the following steps may be specifically implemented: the maximum amplitude is calculated according to the third formula; wherein the third formula is: magn=2 m-1 -1; magn represents the maximum magnitude, and m represents the upper limit of storage bits.
[0276] In this embodiment, when the processor executes the computer program stored in the memory, the following steps may be specifically implemented: generating a log-likelihood ratio table including integer-type read reliability corresponding to each read interval.
[0277] In this embodiment, when the processor executes the computer program stored in the memory, the following steps can be specifically implemented: determining a read voltage and a corresponding read offset corresponding to a storage unit read by a read operation; reading the storage unit a preset number of times using the read voltage and the read offset to obtain a read result; querying a read reliability of an integer type corresponding to the read result; and decoding and correcting the read operation based on the queried read reliability of the integer type.
[0278] In this embodiment, when the processor executes the computer program stored in the memory, the following steps can be specifically implemented: in a log-likelihood ratio table corresponding to a preset number, the log-likelihood ratio value corresponding to the queried reading result is used as the read reliability of the integer type corresponding to the reading result.
[0279] In this embodiment, when the processor executes the computer program stored in the memory, the following steps can be specifically implemented: if the decoding and error correction fails, the preset number is adjusted if the maximum adjustment number is not reached, and the steps are performed based on the adjusted preset number: the storage unit is read a preset number of times using the read voltage and the read offset to obtain a read result; the read reliability of the integer type corresponding to the read result is queried; and the read operation is decoded and error corrected based on the queried read reliability of the integer type.
[0280] In this embodiment, when the processor executes the computer program stored in the memory, the following steps may be specifically implemented: if the decoding error correction is successful, the data read by the read operation is fed back to the corresponding client.
[0281] In this embodiment, when the processor executes the computer program stored in the memory, the following steps may be specifically implemented: if decoding error correction fails, then when the maximum number of adjustments is reached, a corresponding data recovery operation is performed.
[0282] In this embodiment, when the processor executes the computer program stored in the memory, the following steps can be specifically implemented: counting the probability of decoding error correction failure within a period of time; if the probability of decoding error correction failure is greater than a preset probability threshold, adjusting the read operation voltage, the first read offset and / or the second read offset.
[0283] Furthermore, an embodiment of the present invention also provides an electronic device. The electronic device can be Figure 6 The server shown can also be Figure 7 Terminal shown. Figure 6 and Figure 7 All of them are structural diagrams of electronic devices according to an exemplary embodiment, and the contents in the diagrams cannot be regarded as any limitation on the scope of application of the present invention.
[0284] Figure 6 A schematic diagram of the structure of a server provided in an embodiment of the present invention. The server may specifically include: at least one processor, at least one memory, a power supply, a communication interface, an input / output interface, and a communication bus. The memory is used to store a computer program, and the computer program is loaded and executed by the processor to implement the relevant steps in the data processing disclosed in any of the aforementioned embodiments.
[0285] In this embodiment, the power supply is used to provide working voltage for each hardware device on the server; the communication interface can create a data transmission channel between the server and external devices, and the communication protocol it follows is any communication protocol that can be applied to the technical solution of the present invention, and is not specifically limited here; the input and output interface is used to obtain external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs and is not specifically limited here.
[0286] In addition, the memory as a carrier for resource storage can be a read-only memory, random access memory, disk or CD, etc. The resources stored thereon include operating system, computer programs and data, etc. The storage method can be temporary storage or permanent storage.
[0287] The operating system is used to manage and control the hardware devices and computer programs on the server to realize the operation and processing of the data in the memory by the processor, and it can be Windows Server, Netware, Unix, Linux, etc. In addition to computer programs that can be used to complete the data processing method disclosed in any of the above embodiments, the computer program can also further include computer programs that can be used to complete other specific tasks. In addition to data such as application update information, the data can also include data such as application developer information.
[0288] Figure 7 A schematic diagram of the structure of a terminal provided in an embodiment of the present invention, wherein the terminal may specifically include but is not limited to a smart phone, a tablet computer, a laptop computer or a desktop computer.
[0289] Generally, the terminal in this embodiment includes: a processor and a memory.
[0290] Among them, the processor may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor may be implemented in at least one hardware form of DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). The processor may also include a main processor and a coprocessor. The main processor is a processor for processing data in the awake state, also known as a CPU (Central Processing Unit); the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor may be integrated with a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor may also include an AI (Artificial Intelligence) processor, which is used to process computing operations related to machine learning.
[0291] The memory may include one or more computer non-volatile storage media, which may be non-transitory. The memory may also include high-speed random access memory, and non-volatile memory, such as one or more disk storage devices, flash memory storage devices. In this embodiment, the memory is at least used to store the following computer program, wherein, after the computer program is loaded and executed by the processor, it can implement the relevant steps in the data processing method performed by the terminal side disclosed in any of the aforementioned embodiments. In addition, the resources stored in the memory may also include an operating system and data, etc., and the storage method may be temporary storage or permanent storage. Among them, the operating system may include Windows, Unix, Linux, etc. The data may include, but is not limited to, update information of the application.
[0292] In some embodiments, the terminal may also include a display screen, an input and output interface, a communication interface, a sensor, a power supply, and a communication bus.
[0293] Those skilled in the art will understand that Figure 7 The structure shown in the figure does not constitute a limitation on the terminal, and may include more or fewer components than those shown in the figure.
[0294] A nonvolatile storage medium provided in an embodiment of the present invention is introduced below. The nonvolatile storage medium described below and other embodiments described herein may be cross-referenced.
[0295] A non-volatile storage medium for storing a computer program, wherein the computer program, when executed by a processor, implements the data processing method disclosed in the above-mentioned embodiment. The non-volatile storage medium is a computer-readable non-volatile storage medium, which, as a carrier for storing resources, may be a read-only memory, a random access memory, a disk or an optical disk, etc. The resources stored thereon include an operating system, a computer program and data, etc., and the storage method may be temporary storage or permanent storage.
[0296] A computer program product provided by an embodiment of the present invention is introduced below. The computer program product described below can be referenced to other embodiments described in this document.
[0297] A computer program product comprises a computer program / instruction, which implements the steps of the aforementioned disclosed data processing method when executed by a processor.
[0298] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.
[0299] The steps of the method or algorithm described in conjunction with the embodiments disclosed herein may be implemented directly using hardware, a software module executed by a processor, or a combination of the two. The software module may be placed in a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of non-volatile storage medium known in the art.
[0300] Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.
Claims
1. A data processing method, characterized in that: Applied to memory, including: Calculating the read reliability of the floating-point type corresponding to the plurality of read intervals according to the default read operation voltage, the first read offset and the second read offset; According to the preset storage bit upper limit, the read reliability of the floating point type corresponding to each read interval is normalized; Convert the read reliability of the floating point type corresponding to each read interval after normalization into an integer type, and record the read reliability of the integer type corresponding to each read interval; If hard decoding of any read operation of the memory fails, the read operation is decoded and error corrected using the integer-type read reliability corresponding to each read interval.
2. The method according to claim 1, characterized in that According to the default read operation voltage, the first read offset and the second read offset, the read reliability of the floating point type corresponding to the plurality of read intervals is calculated, including: Determine K read voltage axes according to the read operation voltage, the first read offset and the second read offset; Calculate the product of the number of intervals X and K corresponding to each reading voltage axis to obtain XK reading intervals; Calculate the read reliability of the floating-point type corresponding to each of the XK read intervals.
3. The method according to claim 2, characterized in that According to the preset storage bit upper limit, the read reliability of the floating-point type corresponding to each read interval is normalized, including: Determine the maximum value among the read reliability of XK floating point types; Calculate the ratios of the read reliability of XK floating point types to the maximum value respectively, and obtain XK ratios; According to the XK ratios and the upper limit of the storage bit, the read reliability of the floating-point type corresponding to the XK read intervals after normalization is calculated.
4. The method according to claim 3, characterized in that: According to the XK ratios and the storage bit upper limit, the read reliability of the floating-point type corresponding to the XK read intervals after normalization is calculated, including: Subtract one from the upper limit of the storage bit to obtain a target value; The product of the target value and the XK ratios is calculated to obtain the read reliability of the floating-point type corresponding to the normalized XK read intervals.
5. The method according to claim 2, characterized in that: Calculate the read reliability of the floating-point type corresponding to each of the XK read intervals, including: The ratios of the probability of writing character 0 to the probability of writing character 1 in the XK read intervals are calculated respectively, and the corresponding ratios are used as the read reliability of the floating-point type corresponding to the XK read intervals respectively.
6. The method according to claim 1, characterized in that Convert the read reliability of the floating-point type corresponding to each read interval after normalization into an integer type, including: Reading the storage bit upper limit from the main controller of the memory; Calculate n quantization points using the storage bit upper limit; Calculating a maximum amplitude using the storage bit upper limit; A piecewise symbol function is constructed by using the n quantization points, the maximum amplitude and the reading reliability of the floating point type corresponding to each reading interval after normalization; The piecewise symbol function is solved to obtain the integer type reading reliability corresponding to each reading interval.
7. The method according to claim 6, characterized in that The n quantization points are obtained by calculating the upper limit of the storage bit, including: Calculate the distance between two adjacent points using the storage bit upper limit and n; According to the first formula, the function values with equal spacing are calculated; Determine n quantization points with non-uniform distribution based on equally spaced function values; Among them, the first formula is: ; Represents the quantized point x i The corresponding function value, m represents the upper limit of the storage bit, i=1,2,…,n.
8. The method according to claim 7, characterized in that Calculating the distance between two adjacent points using the storage bit upper limit and n includes: The distance between two adjacent points is calculated according to the second formula; The second formula is: D=(m-1) / n; D represents the spacing, m represents the upper limit of the storage bit, and n represents the number of quantization points.
9. The method according to claim 6, characterized in that The piecewise symbol function is: ;q1,q2,…,q n Represents n quantization points, i=1,2,…,n, It indicates the reading reliability of the floating-point type corresponding to each reading interval after normalization processing, sign() is a sign function used to identify the positive and negative of q(y), and magn indicates the maximum amplitude.
10. The method according to claim 6, characterized in that The maximum amplitude is calculated using the storage bit upper limit, including: The maximum amplitude is calculated according to the third formula; Wherein, the third formula is: magn=2 m-1 -1; magn represents the maximum magnitude, and m represents the upper limit of the storage bit.
11. The method according to claim 1, characterized in that: Record the read reliability of the integer type corresponding to each read interval, including: A log-likelihood ratio table including integer-type read reliability corresponding to each read interval is generated.
12. The method according to any one of claims 1 to 11, characterized in that: Using the integer type read reliability corresponding to each read interval, the read operation is decoded and error corrected, including: Determining a read voltage and a corresponding read offset corresponding to a storage unit read by the read operation; Reading the storage unit a preset number of times using the read voltage and the read offset to obtain a read result; Query the read reliability of the integer type corresponding to the read result; The read operation is decoded and error corrected based on the queried read reliability of the integer type.
13. The method according to claim 12, characterized in that Querying the read reliability of the integer type corresponding to the read result includes: In the log-likelihood ratio table corresponding to the preset number, the log-likelihood ratio value corresponding to the read result queried is used as the integer type read reliability corresponding to the read result.
14. The method according to claim 12, characterized in that Also includes: If the decoding error correction fails, the preset number is adjusted if the maximum adjustment number is not reached, and the steps are performed based on the adjusted preset number: the storage unit is read a preset number of times using the read voltage and the read offset to obtain a read result; and a read reliability of an integer type corresponding to the read result is queried; The read operation is decoded and error corrected based on the queried read reliability of the integer type.
15. The method according to claim 14, characterized in that Also includes: If the decoding and error correction are successful, the data read by the read operation is fed back to the corresponding client.
16. The method according to claim 14, characterized in that Also includes: If the decoding error correction fails, the corresponding data recovery operation is performed when the maximum number of adjustments is reached.
17. The method according to any one of claims 1 to 11, characterized in that Also includes: Count the probability of decoding error correction failure within a period of time; If the decoding error correction failure probability is greater than a preset probability threshold, the read operation voltage, the first read offset and / or the second read offset are adjusted.
18. A data processing device, characterized in that: Applied to memory, including: A calculation module, used for calculating the read reliability of the floating-point type corresponding to the plurality of read intervals respectively according to a default read operation voltage, a first read offset and a second read offset; A normalization module, used to normalize the read reliability of the floating-point type corresponding to each read interval according to a preset storage bit upper limit; A conversion module, used to convert the reading reliability of the floating point type corresponding to each reading interval after normalization into an integer type, and record the reading reliability of the integer type corresponding to each reading interval; The read processing module is used to decode and correct the read operation by using the integer type read reliability corresponding to each read interval if the hard decoding of any read operation of the memory fails.
19. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to execute the computer program to implement the method according to any one of claims 1 to 17.
20. A non-volatile storage medium, characterized in that: Used to store a computer program, wherein when the computer program is executed by a processor, the method according to any one of claims 1 to 17 is implemented.
21. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instructions are executed by a processor, the method according to any one of claims 1 to 17 is implemented.
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