A storage and computing architecture for basic linear algebra subroutines and its implementation method

By designing a basic linear algebra subprogram memory architecture that uses H-tree interconnection, the problem of BLAS being limited in data-intensive operations is solved, efficient floating-point number operations and complex functions are realized, and the needs of scientific computing are met.

CN119357123BActive Publication Date: 2025-04-18XIANGTAN UNIV
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Patent Information

Application Number
CN202411919354.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-12-25
Publication Date
2025-04-18
Estimated Expiration
2044-12-25

AI Technical Summary

Technical Problem

Existing basic linear algebra subroutines (BLAS) are limited by CPU and GPU's limited memory bandwidth when performing data-intensive operations, and the CIM architecture faces challenges in supporting floating-point operations and complex functions.

Method used

A basic linear algebra subprogram storage architecture is designed, and multiple processing engines and processing units are used to interconnect H-tree. It realizes efficient matrix operations through multiplication and accumulation operations of floating-point numbers and shift accumulators, supporting high-precision floating-point numbers and complex functions.

Benefits of technology

It effectively reduces data mobility and communication overhead, improves the performance of BLAS functions, can efficiently meet scientific computing needs, and realizes complex operations such as matrix transposition, subtraction and division without the need for additional module hardware support.

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Abstract

The present invention discloses a storage and calculation architecture of a basic linear algebra subroutine and an implementation method thereof, wherein the storage and calculation architecture comprises a plurality of processing engines PE interconnected by an H-tree, each processing engine comprises a plurality of processing units CU interconnected by an H-tree, each processing unit comprises a plurality of arrays, each array comprises a set of input registers and index registers, an index calculation unit, a delay unit and a non-volatile memory-based Crossbar array equipped with a set of peripheral components. The present invention designs corresponding data flows and execution mechanisms for each BLAS function, breaks through the fixed operator limitation of the traditional storage and calculation integrated architecture, expands the potential of the existing peripheral modules, and maps complex operations such as matrix transposition, subtraction and division to shift accumulators without the need for additional module hardware support, which can efficiently meet the needs of scientific computing.
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Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a storage and calculation architecture of a basic linear algebra subroutine and an implementation method thereof. Background Art

[0002] Basic Linear Algebra Subroutines (BLAS) are a basic software library for linear algebra operations and are widely used in numerical computing in fields such as scientific computing and machine learning. Existing BLAS acceleration mainly relies on CPUs and GPUs. Many operations in BLAS are data-intensive, so they are limited by the limited memory bandwidth of CPUs and GPUs. Computation-in-Memory (CIM) technology can effectively alleviate the memory wall bottleneck and is particularly suitable for accelerating data-intensive applications, especially BLAS. Deploying BLAS to CIM accelerators can minimize data movement during large-scale matrix operations and effectively reduce the communication overhead with the CPU or GPU. In addition, the CIM architecture itself has highly parallel computing capabilities, which can greatly improve the performance of BLAS functions. Although CIM architectures have great potential in accelerating BLAS, they also face two severe challenges: supporting floating-point operations and supporting complex functions. Summary of the invention

[0003] In order to solve the above technical problems, the present invention provides a storage and computing architecture of basic linear algebra subroutines with a simple structure and a wide range of applications, and provides an implementation method of the storage and computing architecture of basic linear algebra subroutines with a simple algorithm.

[0004] The technical solution of the present invention to solve the above technical problems is: a storage and calculation architecture of a basic linear algebra subroutine, including multiple processing engines PE interconnected by an H-tree, each processing engine including multiple processing units CU interconnected by an H-tree, each processing unit including multiple arrays, each array including a group of input registers and exponent registers, an exponent calculation unit, a delay unit and a Crossbar array based on a non-volatile memory equipped with a group of peripheral components, the exponent calculation unit, the delay unit and the Crossbar array are used to implement multiplication and accumulation operations of floating-point numbers, and the peripheral components include a sense amplifier, a sample-and-hold circuit, an analog-to-digital converter and a shift accumulator; the multiple arrays receive instructions in each working cycle in a single instruction multiple data stream manner and perform corresponding operations.

[0005] In the storage and computing architecture of the above basic linear algebra subroutines, matrices are directly mapped to different PEs, and the sub-matrices in each PE are further divided into blocks and stored in different CUs. The blocks are combined together through the nodes of the H tree; in the CU, the data is horizontally divided, and each array stores a row of the matrix. Different matrices can be mapped in the same PE or CU to meet various matrix calculation requirements; when performing matrix multiplication and accumulation operations, the matrix in the PE is decomposed into multiple blocks and mapped to different CUs, and the outputs of two blocks in the same column need to be accumulated.

[0006] In the storage and computing architecture of the above basic linear algebra subroutine, the floating-point numbers in the array are divided into the exponent part and the mantissa part, which are stored in the exponent register and the crossbar array respectively; for the sign bit, negative numbers are represented by setting the bias constant to the mantissa, thereby eliminating the need to store the sign bit; the input register is used to receive the data to be processed and pre-decompose it into the exponent and mantissa to facilitate subsequent calculations.

[0007] The storage and computing architecture of the above basic linear algebra subroutines includes the following functions: SCAL, DOT, ASUM, NRM2, GEMV, GEMM, TRSV, TRSM, GER, SYR, SYR2, SYRK and SYR2K.

[0008] A method for implementing a storage and computing architecture of a basic linear algebra subroutine comprises the following steps:

[0009] S1: Input data into the storage and computing architecture, determine the function that needs to be executed on the input data, if the SCAL function needs to be executed, enter S2; if the DOT, ASUM and NRM2 functions need to be executed, enter S3; if the GEMV and GEMM functions need to be executed, enter S4; if the TRSV and TRSM functions need to be executed, enter S5; if the GER, SYR and SYR2 functions need to be executed, enter S6; if the SYRK and SYR2K functions need to be executed, enter S7;

[0010] S2: execute SCAL function;

[0011] The vector is regarded as a matrix with N rows and 1 column, which means that the elements of the vector are distributed in different arrays. Therefore, each array performs floating-point multiplication operations directly in parallel with its own input registers. The floating-point multiplication results are stored by the output registers of the CU or the on-chip buffer of the PE for subsequent operations.

[0012] S3: execute DOT, ASUM and NRM2 functions;

[0013] S4: Execute GEMV and GEMM functions;

[0014] S5: execute TRSV and TRSM functions;

[0015] S6: execute GER, SYR and SYR2 functions;

[0016] S7: Execute SYRK and SYR2K functions.

[0017] The implementation method of the storage and computing architecture of the above basic linear algebra subroutine, in the step S3, when executing the DOT function, it is assumed that each CU is configured with 4×4 arrays, and the input register of each array stores a 4-bit mantissa; the node acts as a shift accumulator of the array, and performs alignment operations by using the shift accumulator, and is extended to perform floating-point addition. Each node receives data from the array or the previous node and performs accumulation operations;

[0018] The ASUM function and the NRM2 function are considered as sub-operations of the DOT function; the ASUM function calculates the sum of the elements in all vectors. When the ASUM function is executed, the corresponding data is read from each array and the sum operation is performed using the ripple pipeline;

[0019] When executing the NRM2 function, each array first performs a read operation and feeds the read data back into its input register, the vector itself performs the DOT function to obtain an intermediate result, and then sends the intermediate result to the coprocessor or CPU for square root calculation.

[0020] The implementation method of the storage and calculation architecture of the basic linear algebra subroutine is as follows: in step S4, when executing the GEMV function, the vector x = [ x 0, x 1, x 2, x 3] and y = [ y 0, y 1, y 2, y 3] First, we compare the scalar α and the scalar β Execute the SCAL function and obtain αx and βy As a result, x 0. x 1. x 2. x 3 is a vector x The elements in y 0. y 1. y 2. y 3 is a vector y The elements in ; then, the vector αx is loaded into the matrix AThe CU is then sent to the corresponding array to perform multiplication and accumulation operations in parallel, outputting a column vector αAx The elements of are the output results of the array; finally, the shift and addition modules of each array are used to βy Add to output column vector αAx When matrix A requires an additional transpose operation, each array is considered to store a column vector of matrix A.

[0021] The GEMM function is implemented based on the GEMV function by splitting the second input matrix into multiple column vectors and sequentially executing the GEMV function with the target matrix until all column vectors have been processed.

[0022] In the implementation method of the storage and calculation architecture of the above basic linear algebra subroutine, in step S5, the upper / lower triangular matrix is ​​solved by using forward / backward substitution, and the process of solving the upper triangular matrix is:

[0023] The first step is to read the element in row 4 and column 4. a 3,3 , and use the constant term vector b 3 Perform the division operation to obtain the solution of the first equation x 3;

[0024] The second step is to x 3 Feedback to the Matrix A In the implementation of the SCAL function, the constant term vector b i Subtract the corresponding row a i,3 x 3 and store the result in the corresponding register. The remaining elements not involved in the calculation will form a new upper triangular matrix.

[0025] Repeat step 1 to step 2 until all unknown variables are x i All are solved;

[0026] Use shift accumulators to support matrix subtraction and division operations. To obtain nm, keep the minuend n unchanged and take the complement of the subtrahend m. In this way, nm is converted into an addition operation of n and m's complement.

[0027] The implementation method of the storage and calculation architecture of the above basic linear algebra subroutine, in step S6, when executing the SYR function, the vector x With row vector y T Multiply them together to get the product matrix xy T, converts the product matrix into a combination of scalar multiplications of column vector elements. To perform the SYR function, the vector y First, the SCAL function is executed on the scalar α to obtain the vector αy , then the vector αy Send to vector in sequence x The input register of the CU where it is located is obtained column by column αxy T The calculation results of each calculation result are sent to the matrix A The corresponding columns of are added using the shift accumulator; when the vector αy After all elements of are processed, the result of the SYR function is obtained;

[0028] For the SYR2 function, the SYR function is a sub-operation of the SYR2 function. αxy T yes αyx T is the transpose of; in order to eliminate redundant calculations, αxy T The result is stored in the buffer and the row and column indices of the buffer are swapped. Finally, αyx T Add from the buffer to the corresponding element of the SYR function matrix to obtain the final result of the SYR2 function.

[0029] The implementation method of the storage and calculation architecture of the basic linear algebra subroutine described above, in step S7, when executing the SYR2K function, first calculate the matrix αB T and βC As a result, α and β are all scalars, B and C are matrices involved in the operation, and the GEMV function is used to obtain αAB T , and αAB T The column vector of βC Add the corresponding elements of to get the final result of the SYRK function; αAB T Write to the buffer and get the matrix by exchanging the index in the buffer αBA T The result; Finally, the buffer α BA T Elements and αAB T + βC Add the corresponding elements of to get the final result of the SYR2K function.

[0030] The beneficial effects of the present invention are as follows: the present invention proposes a storage and computing architecture for basic linear algebra subroutines, natively supports high-precision floating-point operations, designs corresponding data flows and execution mechanisms for each BLAS function, breaks through the fixed operator limitations of the traditional storage and computing integrated architecture, expands the potential of existing peripheral modules, and maps complex operations such as matrix transposition, subtraction and division to shift accumulators without the need for additional module hardware support, which can efficiently meet scientific computing needs. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 The diagram is a schematic diagram of the storage and computing architecture of the basic linear algebra subroutine of the present invention.

[0032] Figure 2 This is a schematic diagram of implementing floating-point operations in the present invention.

[0033] Figure 3 It is a schematic diagram of the ripple pipeline structure of the present invention.

[0034] Figure 4 The present invention implements the GEMV function execution flow chart.

[0035] Figure 5 The present invention implements a GEMV function execution flow chart for performing matrix transposition.

[0036] Figure 6 The present invention implements the TRSV function and the TRSM function execution flow chart.

[0037] Figure 7 The present invention implements the principle diagram of mapping division to a shift accumulator.

[0038] Figure 8 The present invention implements the GER function, SYR function, and SYR2 function execution flow chart.

[0039] Fig. 9 The present invention implements the SYR2K function execution flow chart. DETAILED DESCRIPTION

[0040] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0041] like Figure 1As shown, a storage and computing architecture of a basic linear algebra subroutine includes multiple processing engines PE interconnected by an H-tree, each processing engine includes multiple processing units CU interconnected by an H-tree, each processing unit includes multiple arrays, each array includes a group of input registers and exponent registers, an exponent calculation unit, a delay unit and a Crossbar array based on a non-volatile memory equipped with a group of peripheral components, the exponent calculation unit, the delay unit and the Crossbar array are used to implement multiplication and accumulation operations of floating-point numbers, the peripheral components include a sense amplifier SA, a sample-and-hold circuit S&H, an analog-to-digital converter ADC and a shift accumulator S&A; the multiple arrays receive instructions in each working cycle in a single instruction multiple data stream manner and execute corresponding operations.

[0042] The matrix is ​​directly mapped to different PEs. The submatrices in each PE are further divided into blocks and stored in different CUs. During the calculation process, the blocks are combined through the nodes of the H tree. In the CU, the data is horizontally divided, and each array stores a row of the matrix. Different matrices can be mapped in the same PE or CU to meet various matrix calculation requirements. When performing matrix multiplication and accumulation operations, the matrix in the PE is decomposed into multiple blocks and mapped to different CUs. The outputs of two blocks in the same column need to be accumulated. By using the H-tree topology with adders configured on the nodes, a simple and efficient addition tree can be implemented between CUs to effectively aggregate the calculation results of the blocks in the matrix.

[0043] like Figure 2 As shown, Figure 2 The CIM-based floating-point operation mechanism is described in the paper. The floating-point numbers in the array are divided into the exponent part and the mantissa part, which are stored in the exponent register and the crossbar array respectively. For the sign bit, the negative number is represented by setting the bias constant as the mantissa, thus eliminating the need to store the sign bit. The input register is used to receive the data to be processed and pre-decompose it into the exponent and mantissa to facilitate subsequent calculations.

[0044] 5-stage pipeline execution method based on memory floating-point operations:

[0045] 1. The exponent part stored in the input register (E in ) and the index register (E mem ) add the corresponding data in;

[0046] 2. Output the index of each row (E o ) are sent to the index comparison unit in the second stage to find their maximum value (E omax );

[0047] 3. In the third stage, the exponential offset calculation unit is used to calculate the previous exponential offset;

[0048] 4. According to the obtained exponential offset, the corresponding input signal will change, and the logic "0" will be filled into the low bit, so as to achieve exponential alignment;

[0049] 5. The Crossbar array receives the shifted data from the delay unit (M in ), and execute the mantissa in memory (M mem ) data to perform multiplication and accumulation operations.

[0050] The storage and computing architecture includes the following functions: SCAL, DOT, ASUM, NRM2, GEMV, GEMM, TRSV, TRSM, GER, SYR, SYR2, SYRK, and SYR2K.

[0051] A method for implementing a storage and computing architecture of a basic linear algebra subroutine comprises the following steps:

[0052] S1: Input data into the storage and computing architecture, determine the function that needs to be executed on the input data, if the SCAL function needs to be executed, enter S2; if the DOT, ASUM and NRM2 functions need to be executed, enter S3; if the GEMV and GEMM functions need to be executed, enter S4; if the TRSV and TRSM functions need to be executed, enter S5; if the GER, SYR and SYR2 functions need to be executed, enter S6; if the SYRK and SYR2K functions need to be executed, enter S7;

[0053] S2: Execute SCAL function.

[0054] A vector is considered as a matrix with N rows and 1 column, which means that the elements of the vector are distributed in different arrays. Therefore, each array performs floating-point multiplication operations directly in parallel with its own input registers. The floating-point multiplication results are stored by the output registers of the CU or the on-chip buffer of the PE for subsequent operations.

[0055] S3: Execute DOT, ASUM, and NRM2 functions.

[0056] For the DOT function, it is proposed as follows Figure 3 The ripple pipeline structure shown in the figure, when executing the DOT function, assumes that each CU is configured with 4×4 arrays, and the input register of each array stores a 4-bit mantissa; nodes 1, 2, 3, 4, and 5 are used as shift accumulators of the arrays, and are aligned by using the shift accumulators and extended to perform floating-point addition. Each node will receive data from the array or the previous node and perform accumulation operations. Figure 3In the figure, LSB and MSB represent the highest and lowest bits of the input data, respectively. Taking the top route as an example, in the first clock cycle, the two upper left arrays first perform the lowest bit operation, and the results are added at node 1, that is, (1×1.1+0×0.5=1.1). In the second clock cycle, the calculation result of the third array at the top is added to the calculation result of node 1, that is, (1.1+0×1.3=1.1). In the third clock cycle, the calculation result of the fourth array at the top is added to the calculation result of node 2, that is, (1.1+1×4.2=5.3). In the fourth clock cycle, the partial sum of the dot product operation of two adjacent rows is aggregated at node 4. Finally, in the fifth clock cycle, the calculation sum is accumulated through node 5 to obtain the final result.

[0057] The ASUM function and the NRM2 function are considered as sub-operations of the DOT function; the ASUM function calculates the sum of the elements in all vectors. When the ASUM function is executed, the corresponding data is read from each array and the summation operation is performed using the ripple pipeline.

[0058] When executing the NRM2 function, each array first performs a read operation and feeds the read data back into its input register, the vector itself performs the DOT function to obtain an intermediate result, and then sends the intermediate result to the coprocessor or CPU for square root calculation.

[0059] S4: Execute GEMV and GEMM functions.

[0060] like Figure 4 As shown, when executing the GEMV function, the vector x = [ x 0, x 1, x 2, x 3] and y = [ y 0, y 1, y 2, y 3] First, we compare the scalar α and the scalar β Execute the SCAL function and obtain αx and βy As a result, x 0. x 1. x 2. x 3 is a vector x The elements in y 0. y 1. y 2. y 3 is a vector y The elements in ; then, the vector αx is loaded into the matrix AThe CU is then sent to the corresponding array to perform multiplication and accumulation operations in parallel, outputting a column vector αAx The elements of are the output results of the array; finally, the shift and addition modules of each array are used to βy Add to output column vector αAx The result of the GEMV function is obtained above; when the matrix A requires an additional transposition operation, each array is regarded as storing the column vector of the matrix A; Figure 5 As shown, the present invention is implemented by ripple pipeline αA T x The calculation is to transpose the matrix A T Divide into N row vectors and use the vectors sequentially αx Execute the DOT function to obtain the elements of the output column vector one by one, and calculate the i List Αa T [i] x , integrating all column inputs is the matrix αA T x Finally, the elements of the output column vector are compared with the vector βy Add the corresponding elements of to get the result of the GEMV function that performs the matrix transposition αA T x+βy .

[0061] The GEMM function is implemented based on the GEMV function by splitting the second input matrix into multiple column vectors and sequentially executing the GEMV function with the target matrix until all column vectors have been processed.

[0062] S5: Execute TRSV and TRSM functions.

[0063] In step S5, the upper / lower triangular matrix is ​​solved by using forward / backward substitution, Figure 6 An example of solving an upper triangular matrix is ​​shown. The procedure for solving an upper triangular matrix is:

[0064] The first step is to read the element in row 4 and column 4. a 3,3 , and use the constant term vector b 3 Perform the division operation to obtain the solution of the first equation x 3;

[0065] The second step is to x 3 Feedback to the Matrix A In the implementation of the SCAL function, the constant term vector b iSubtract the corresponding row a i,3 x 3 and store the result in the corresponding register. The remaining elements not involved in the calculation will form a new upper triangular matrix.

[0066] Repeat step 1 to step 2 until all unknown variables are x i All are solved. TRSV is a matrix-vector operation; TRSM is a matrix-matrix operation; TRSM can be implemented by executing the TRSV function multiple times; the upper triangular matrix and the lower triangular matrix are solved in exactly the same way. The upper triangular matrix is ​​solved from the number in the lower right corner to the upper left corner, while the lower triangular matrix is ​​solved from the number in the upper left corner to the lower right corner. Here we only take the upper triangle as an example.

[0067] In order to avoid the hardware overhead caused by additional peripheral components, the present invention uses a shift accumulator to support matrix subtraction and division operations. In order to obtain nm, the minuend n is kept unchanged and the complement of the subtrahend m is taken. In this way, nm is converted into an addition operation of n and the complement of m. The implementation of the division operation mainly depends on the subtraction and shift operations, such as Figure 7 As shown. Step 1, calculate the difference between the remainder and the divisor; Step 2, check whether the calculation result is a non-negative number. If the value is negative, return to step 1, shift the quotient left by 1 bit, and set the new rightmost bit to "0"; otherwise, shift the quotient left by one bit and set the new rightmost bit to "1"; Step 3, shift the divisor register right by one bit, shift the divisor right by 1 bit, and check whether all calculation operations have been completed. If not, return to step 1 and continue execution.

[0068] S6: Execute GER, SYR, and SYR2 functions.

[0069] like Figure 8 As shown, when executing the SYR function, the vector x With row vector y T Multiply them together to get the product matrix xy T , in order to improve the parallelism of the computation, the product matrix is ​​converted into a combination of scalar multiplications of column vector elements. To execute the SYR function, the vector y First, the SCAL function is executed on the scalar α to obtain the vector αy , then the vector αy Send to vector in sequence x The input register of the CU where it is located is obtained column by column αxy T The calculation results of each calculation result are sent to the matrix A The corresponding columns of are added using the shift accumulator; when the vector αyAfter all elements of are processed, the result of the SYR function is obtained;

[0070] For the SYR2 function, the SYR function is a sub-operation of the SYR2 function. αxy T yes αyx T is the transpose of; in order to eliminate redundant calculations, αxy T The result is stored in the buffer and the row and column indices of the buffer are swapped. Finally, αyx T Add from the buffer to the corresponding element of the SYR function matrix, thus obtaining the final result of the SYR2 function;

[0071] The GER function is a subset of the SYR function and can be implemented in the same way.

[0072] S7: Execute SYRK and SYR2K functions.

[0073] like Fig. 9 As shown, when executing the SYR2K function, the matrix is ​​first calculated αB T and βC As a result, α and β are all scalars, B and C are matrices involved in the operation, and the GEMV function is used to obtain αAB T , and αAB T The column vector of βC Add the corresponding elements of to get the final result of the SYRK function; αAB T Write to the buffer and get the matrix by exchanging the index in the buffer αBA T The result; Finally, the buffer αBA T The elements are added to the corresponding elements of the matrix storing the intermediate results to obtain the final result of the SYR2K function.

Claims

1. A method for implementing a storage and computing architecture of a basic linear algebra subprogram, applied to the storage and computing architecture of a basic linear algebra subprogram, characterized in that: The storage and computing architecture of the basic linear algebra subroutine includes multiple processing engines PE interconnected by H-tree, each processing engine includes multiple processing units CU interconnected by H-tree, each processing unit includes multiple arrays, each array includes a group of input registers and exponent registers, an exponent calculation unit, a delay unit and a non-volatile memory-based Crossbar array equipped with a group of peripheral components, the exponent calculation unit, the delay unit and the Crossbar array are used to implement multiplication and accumulation operations of floating-point numbers, and the peripheral components include a sense amplifier, a sample-and-hold circuit, an analog-to-digital converter and a shift accumulator; the multiple arrays receive instructions in each working cycle in a single instruction multiple data stream mode and execute corresponding operations; The matrix is ​​directly mapped to different PEs. The sub-matrices in each PE are further divided into blocks and stored in different CUs. The blocks are combined together through the nodes of the H-tree. In the CU, the data is split horizontally, and each array stores a row of the matrix. Different matrices can be mapped in the same PE or CU to meet various matrix calculation requirements. When performing matrix multiplication and accumulation operations, the matrix in the PE is decomposed into multiple blocks and mapped to different CUs, and the outputs of two blocks in the same column need to be accumulated; The floating-point numbers in the array are divided into the exponent part and the mantissa part, which are stored in the exponent register and the crossbar array respectively; for the sign bit, the bias constant is set to the mantissa to represent negative numbers, thus eliminating the need to store the sign bit; the input register is used to receive the data to be processed and pre-decompose it into the exponent and mantissa to facilitate subsequent calculations; In the storage and computing architecture Includes the following functions: SCAL, DOT, ASUM, NRM2, GEMV, GEMM, TRSV, TRSM, GER, SYR, SYR2, SYRK, and SYR2K; When executing the DOT function, it is assumed that each CU is configured with 4×4 arrays, and the input register of each array stores a 4-bit mantissa; the node acts as the shift accumulator of the array, and the alignment operation is performed by using the shift accumulator, and it is extended to perform floating-point addition. Each node will receive data from the array or the previous node and perform the accumulation operation; The ASUM function and the NRM2 function are considered as sub-operations of the DOT function; the ASUM function calculates the sum of the elements in all vectors. When the ASUM function is executed, the corresponding data is read from each array and the sum operation is performed using the ripple pipeline; When executing the NRM2 function, each array first performs a read operation and feeds the read data back into its input register, the vector itself performs the DOT function to obtain an intermediate result, and then sends the intermediate result to the coprocessor or CPU for square root calculation.

2. The method for implementing the storage and computing architecture of the basic linear algebra subprogram according to claim 1, characterized in that: When executing the SCAL function, the vector is regarded as a matrix with N rows and 1 column, which means that the elements of the vector are distributed in different arrays. Therefore, each array performs floating-point multiplication operations directly in parallel with its own input registers. The floating-point multiplication results are stored by the output registers of the CU or the on-chip buffer of the PE for subsequent operations.

3. The method for implementing the storage and computing architecture of the basic linear algebra subprogram according to claim 1, characterized in that: When executing the GEMV function, the vector x = [ x 0, x 1, x 2, x 3] and y = [ y 0, y 1, y 2, y 3] First, we compare the scalar α and the scalar β Execute the SCAL function and obtain αx and βy As a result, x 0. x 1. x 2. x 3 is a vector x The elements in y 0. y 1. y 2. y 3 is a vector y The elements in ; then, the vector αx is loaded into the matrix A The CU is then sent to the corresponding array to perform multiplication and accumulation operations in parallel, outputting a column vector αAx The elements of are the output results of the array; finally, the shift and addition modules of each array are used to βy Add to output column vector αAx On the top, we get the result of the GEMV function; When matrix A requires an additional transpose operation, each array is treated as storing a column vector of matrix A; The GEMM function is implemented based on the GEMV function by splitting the second input matrix into multiple column vectors and sequentially executing the GEMV function with the target matrix until all column vectors have been processed.

4. The method for implementing the storage and computing architecture of the basic linear algebra subroutines according to claim 1, characterized in that: The process of executing the TRSV function is: The first step is to read the element in row 4 and column 4. a 3,3 , and use the constant term vector b 3 Perform the division operation to obtain the solution of the first equation x 3; The second step is to x 3 Feedback to the Matrix A In the implementation of the SCAL function, the constant term vector b i Subtract the corresponding row a i,3 x 3 and store the result in the corresponding register. The remaining elements not involved in the calculation will form a new upper triangular matrix. Repeat step 1 to step 2 until all unknown variables are x i All are solved; Use shift accumulators to support matrix subtraction and division operations. To obtain nm, keep the minuend n unchanged and take the complement of the subtrahend m. In this way, nm is converted into an addition operation of n and m's complement.

5. The method for implementing the storage and computing architecture of the basic linear algebra subroutines according to claim 1, characterized in that: When executing the SYR function, the vector x With row vector y T Multiply them together to get the product matrix xy T , converts the product matrix into a combination of scalar multiplications of column vector elements. To perform the SYR function, the vector y First, the SCAL function is executed on the scalar α to obtain the vector αy , then the vector αy Send to vector in sequence x The input register of the CU where it is located is obtained column by column αxy T The calculation results of each calculation result are sent to the matrix A The corresponding columns of are added using the shift accumulator; when the vector αy After all elements of are processed, the result of the SYR function is obtained; For the SYR2 function, the SYR function is a sub-operation of the SYR2 function. αxy T yes αyx T is the transpose of; in order to eliminate redundant calculations, αxy T The result is stored in the buffer and the row and column indices of the buffer are swapped. Finally, αyx T Add from the buffer to the corresponding element of the SYR function matrix to obtain the final result of the SYR2 function.

6. The method for implementing the storage and computing architecture of the basic linear algebra subroutines according to claim 1, characterized in that: When executing the SYRK and SYR2K functions, the matrix is ​​first calculated αB T and βC As a result, α and β are all scalars, B and C are matrices involved in the operation, and the GEMV function is used to obtain αAB T , and αAB T The column vector of βC Add the corresponding elements of to get the final result of the SYRK function; αAB T Write to the buffer and get the matrix by exchanging the index in the buffer αBA T The result; Finally, the buffer αBA T Elements and αAB T + βC Add the corresponding elements of to get the final result of the SYR2K function.

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Patent Citations

  • A GEMM (general matrix-matrix multiplication) high-performance realization method based on a domestic SW 26010 many-core CPU

    CN107168683A

  • Universal memory computing accelerator

    CN118550870A