SOC chip simulation verification method and device based on self-mailbox mechanism

Abstract

The invention relates to the technical field of chip verification, and discloses an SOC chip simulation verification method and device based on an autologous mailbox mechanism, and the method comprises the steps: obtaining the state of each storage unit in an SOC chip, and determining an idle storage unit according to the state of each storage unit; randomly selecting at least one idle storage unit from the idle storage units as a mailbox; receiving and / or sending the running state of the internal software program and the running state of the external excitation by using the mailbox; and performing simulation verification on the SOC chip according to the running state of the internal software program and the running state of the external excitation. According to the method, the free storage unit of the SOC chip is used as the mailbox, the chip area does not need to be increased, the internal software program of the SOC chip and the external excitation communicate with each other, and simulation verification of the SOC chip is achieved under the scene requirement that the internal software program and the external excitation cooperate with each other.

Description

Technical Field

[0001] The present invention relates to the technical field of chip verification, and in particular to a SOC chip simulation verification method and device based on a self-mailbox mechanism. Background Art

[0002] In the current system-on-chip (SOC) simulation verification, when encountering a scenario where the chip's internal central processing unit (CPU) software program and external stimuli in the simulation verification environment need to cooperate to complete the verification, the following two methods are often used: (1) Add a debugging module in the chip. The debugging module is connected to the CPU bus. The debugging module contains registers that can be accessed by both the CPU internal software program and the external stimulus. Information is sent by writing to these registers and received by reading these registers, so as to realize the communication between the CPU internal software program and the external stimulus and coordinate the internal and external operations. (2) The CPU writes data to the idle address through the program to notify itself of its current status. A bus parsing module is added to the simulation verification environment. The bus parsing module obtains the current status of the CPU internal program written to the idle address by parsing the bus action, and performs different external stimuli according to the different states of the CPU internal software program.

[0003] Method (1) adds a debugging module to the chip, which will increase the chip area and thus increase the chip cost. Method (2) can only allow the CPU internal software to send information to the external stimulus. The external stimulus cannot pass its own status information to the CPU, and the CPU internal software program cannot cooperate with the external stimulus to operate. Summary of the invention

[0004] In view of this, the present invention provides a SOC chip simulation verification method and device based on a self-mailbox mechanism to solve the problem of how to achieve mutual communication between the CPU internal software program and external stimulus without increasing the chip area.

[0005] In a first aspect, the present invention provides a SOC chip simulation verification method based on a self-mailbox mechanism, the method comprising: Obtain the status of each storage unit in the SOC chip, and determine the idle storage unit according to the status of each storage unit; Randomly selecting at least one free storage unit from the free storage units as a mailbox; Using the mailbox to receive and / or send the running status of the internal software program and the running status of the external stimulus; The SOC chip is simulated and verified according to the running status of the internal software program and the running status of the external stimulus.

[0006] The SOC chip simulation verification method based on the self-mailbox mechanism provided by the present invention utilizes the free storage unit of the SOC chip itself as a mailbox, without increasing the chip area, so that the internal software program of the SOC chip and the external stimulus can communicate with each other, and the simulation verification of the SOC chip is realized under the scenario requirements of the internal software program and the external stimulus cooperating with each other.

[0007] In an optional implementation, determining a free storage unit according to the status of each storage unit includes: If the storage unit does not participate in the simulation verification operation of the SOC chip, the storage unit is an idle storage unit; If the storage unit participates in the simulation verification operation of the SOC chip, the storage unit is an operating storage unit.

[0008] The SOC chip simulation verification method based on the self-mailbox mechanism provided by the present invention determines whether a storage unit is an idle storage unit by whether the storage unit participates in the operation of the SOC chip, thereby avoiding the storage unit as a mailbox from being mistakenly executed, resulting in simulation errors, and improving the stability and accuracy of the simulation verification.

[0009] In an optional implementation, the storage unit includes: a non-volatile memory, a volatile memory, and a register.

[0010] The SOC chip simulation verification method based on the self-mailbox mechanism provided by the present invention does not restrict the type of storage unit used as the mailbox, making the selection of the mailbox more flexible, avoiding the situation where there is no free storage unit available, and improving the reliability of the mailbox selection.

[0011] In an optional implementation, using a mailbox to receive and / or send the running status of an internal software program and the running status of an external stimulus includes: If the mailbox is a free storage unit, the mailbox includes a two-way mailbox; Using a two-way mailbox to receive the running status of the internal software program and the running status of the external stimulus; Use a two-way mailbox to send the operating status of external stimuli and the operating status of internal software programs.

[0012] In an optional implementation, using a mailbox to receive and / or send the running status of an internal software program and the running status of an external stimulus includes: If the mailbox includes two free storage units, the mailbox includes a first unidirectional mailbox and a second unidirectional mailbox with different data transmission directions; Using the first one-way mailbox to receive and send the running status of the internal software program; The operating status of the external stimulus is received and sent using the second one-way mailbox.

[0013] The SOC chip simulation verification method based on the self-mailbox mechanism provided by the present invention can send and receive internal software programs or external stimuli through a two-way mailbox or two one-way mailboxes, without limiting the working mode and number of the mailboxes, making the information interaction between the internal software program and the external stimuli more flexible and improving the reliability of the communication between the internal software program and the external stimuli.

[0014] In an optional implementation, using a mailbox to receive and / or send the running status of an internal software program and the running status of an external stimulus includes: If the mailbox includes three or more free storage units, the mailbox includes at least one unidirectional mailbox group and at least one bidirectional mailbox, and the unidirectional mailbox group includes two unidirectional mailboxes with different data transmission directions; According to the type of simulation verification, a one-way mailbox group or a two-way mailbox is selected to receive and / or send the running status of the internal software program and the running status of the external stimulus.

[0015] The SOC chip simulation verification method based on the self-mailbox mechanism provided by the present invention uses different mailboxes for different types of simulation verifications, which can avoid simulation errors caused by the storage unit used as a mailbox being run in a certain simulation verification, thereby improving the accuracy and reliability of the SOC chip simulation verification.

[0016] In a second aspect, the present invention provides a SOC chip simulation verification device based on a self-mailbox mechanism, the device comprising: The free storage unit determination module is used to obtain the status of each storage unit in the SOC chip and determine the free storage unit according to the status of each storage unit; A mailbox selection module, used for randomly selecting at least one free storage unit from the free storage units as a mailbox; The operation status interaction module is used to receive and / or send the operation status of the internal software program and the operation status of the external stimulus by using the mailbox; The simulation verification module is used to simulate and verify the SOC chip according to the running status of the internal software program and the running status of the external stimulus.

[0017] In a third aspect, the present invention provides a computer device, comprising: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the method of the first aspect or any corresponding embodiment thereof by executing the computer instructions.

[0018] In a fourth aspect, the present invention provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to cause a computer to execute the method of the first aspect or any corresponding embodiment thereof.

[0019] In a fifth aspect, the present invention provides a computer program product, comprising computer instructions for causing a computer to execute the method of the first aspect or any corresponding embodiment thereof. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0021] Figure 1 It is a flow chart of a SOC chip simulation verification method based on a self-mailbox mechanism according to an embodiment of the present invention; Figure 2 is a flow chart of another SOC chip simulation verification method based on a self-mailbox mechanism according to an embodiment of the present invention; Figure 3 It is a structural schematic diagram of a single mailbox mode in a SOC chip simulation verification method based on a self-mailbox mechanism according to an embodiment of the present invention; Figure 4 It is a structural schematic diagram of a dual mailbox mode in a SOC chip simulation verification method based on a self-mailbox mechanism according to an embodiment of the present invention; Figure 5 It is a structural schematic diagram of a multi-mailbox mode in a SOC chip simulation verification method based on a self-mailbox mechanism according to an embodiment of the present invention; Figure 6 is a structural block diagram of a SOC chip simulation and verification device based on a self-mailbox mechanism according to an embodiment of the present invention; Figure 7 It is a schematic diagram of the hardware structure of a computer device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0023] The embodiment of the present invention provides a SOC chip simulation verification method based on a self-mailbox mechanism, which uses an idle storage unit as a mailbox to achieve the effect of interaction between the internal software program of the SOC chip and the external stimulus without increasing the chip area.

[0024] According to an embodiment of the present invention, an embodiment of a SOC chip simulation verification method based on a self-mailbox mechanism is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0025] In this embodiment, a SOC chip simulation verification method based on a self-mailbox mechanism is provided, which can be used in the above-mentioned computer system. Figure 1 FIG. 1 is a flow chart of a SOC chip simulation verification method based on a self-mailbox mechanism according to an embodiment of the present invention. Figure 1 As shown, the process includes the following steps: Step S101, obtaining the status of each storage unit in the SOC chip, and determining the idle storage unit according to the status of each storage unit.

[0026] Specifically, the SOC chip includes multiple storage units. During the simulation and verification of the SOC chip, it is impossible for all storage units to participate in the simulation operation of the SOC chip. Therefore, the idle storage unit is determined according to the status of each storage unit in the SOC chip.

[0027] In some optional implementations, the storage unit includes: a non-volatile memory, a volatile memory, and a register.

[0028] Specifically, non-volatile memory includes but is not limited to: ROM, EEPROM, Flash, etc., volatile memory includes but is not limited to SRAM, DRAM, etc., registers can be various types of registers, and storage units can also be storage units inside any other chip.

[0029] The SOC chip simulation verification method based on the self-mailbox mechanism provided in this embodiment does not restrict the type of storage unit used as the mailbox, making the selection of the mailbox more flexible, avoiding the situation where there are no free storage units available, and improving the reliability of the mailbox selection.

[0030] Step S102: randomly select at least one free storage unit from the free storage units as a mailbox.

[0031] Specifically, according to different types of simulation verification requirements for SOC chips, at least one free storage unit is randomly selected from the free storage units as a mailbox, and the mailbox serves as an intermediate medium for information exchange between the internal software program and the external stimulus. Each storage unit has a unique address code, which is used to mark the location of the storage unit. The storage unit used as a mailbox is also determined by the address code. When a storage unit is selected as a mailbox, its address code will be transmitted to the central processing unit (CPU) of the SOC chip and the external stimulus device. The external stimulus device is usually a test platform, which is only used as an example, but not limited to this.

[0032] Step S103, using the mailbox to receive and / or send the running status of the internal software program and the running status of the external stimulus.

[0033] Specifically, the mailbox can receive the running status of the internal software program sent by the CPU in the SOC chip, and then send the running status of the internal software program to the external stimulus device. Similarly, the mailbox can receive the running status of the external stimulus sent by the external stimulus device, and send the running status of the external stimulus to the CPU of the SOC chip. This realizes the information interaction between the internal software program of the CPU in the SOC chip and the external stimulus.

[0034] Step S104, performing simulation verification on the SOC chip according to the running status of the internal software program and the running status of the external stimulus.

[0035] Specifically, the CPU in the SOC chip can make corresponding operations according to the running status of its own internal software program and the running status of the external stimulus; the external stimulus device can make corresponding operations according to the running status of the external stimulus and the running status of the software program inside the SOC chip, thereby realizing simulation verification in complex scenarios where the internal software program of the SOC chip and the external stimulus cooperate with each other.

[0036] The SOC chip simulation and verification method based on the self-mailbox mechanism provided in this embodiment utilizes the free storage unit of the SOC chip itself as a mailbox, without increasing the chip area, so that the internal software program of the SOC chip and the external stimulus can communicate with each other, and the simulation and verification of the SOC chip can be realized under the scenario requirements of the internal software program and the external stimulus cooperating with each other.

[0037] In this embodiment, a SOC chip simulation verification method based on a self-mailbox mechanism is provided, which can be used in the above-mentioned computer system. Figure 2 FIG. 1 is a flow chart of a SOC chip simulation verification method based on a self-mailbox mechanism according to an embodiment of the present invention. Figure 2 As shown, the process includes the following steps: Step S201, obtaining the status of each storage unit in the SOC chip, and determining the idle storage unit according to the status of each storage unit.

[0038] Specifically, determining the free storage unit according to the status of each storage unit in the above step S201 includes: Step S2011: If the storage unit does not participate in the simulation verification operation of the SOC chip, the storage unit is an idle storage unit.

[0039] Step S2012: If the storage unit participates in the simulation verification operation of the SOC chip, the storage unit is an operating storage unit.

[0040] Specifically, in different types of simulation verification, the storage units participating in the simulation operation of the SOC chip may be different. Therefore, according to the type of simulation verification, it is determined whether each storage unit participates in the simulation operation of the SOC chip. If it does not participate in the simulation verification operation of the SOC chip, the corresponding storage unit is an idle storage unit; if the storage unit participates in the simulation verification operation of the SOC chip, the corresponding storage unit is a running storage unit.

[0041] For example, if a certain storage unit stores internal data of a SOC chip, but the data is not used in a certain simulation verification, the storage unit is still identified as an idle storage unit.

[0042] The SOC chip simulation verification method based on the self-mailbox mechanism provided in this embodiment determines whether a storage unit is an idle storage unit by whether the storage unit participates in the operation of the SOC chip, thereby avoiding the storage unit used as a mailbox from being mistakenly executed, resulting in simulation errors, and improving the stability and accuracy of the simulation verification.

[0043] Step S202: randomly select at least one free storage unit from the free storage units as a mailbox. Figure 1 Step S102 of the illustrated embodiment will not be described in detail here.

[0044] Step S203: using the mailbox to receive and / or send the running status of the internal software program and the running status of the external stimulus.

[0045] Specifically, Figure 3 As shown, if the mailbox is an idle storage unit, the mailbox includes a two-way mailbox, and the above step S203 includes: Step a1, using a two-way mailbox to receive the running status of the internal software program and the running status of the external stimulus.

[0046] Specifically, if the mailbox is an idle storage unit, it is a single mailbox mode, and the single mailbox is a two-way mailbox. The CPU in the SOC chip and the external excitation device have read and write permissions for the two-way mailbox. The CPU in the SOC chip uses the internal software program to write the running status of the internal software program in the two-way mailbox, and the two-way mailbox receives the running status of the internal software program sent by the CPU; the external excitation device uses the external excitation to write the running status of the external excitation in the two-way mailbox, and the two-way mailbox receives the running status of the external excitation sent by the external excitation device, so that the two-way mailbox stores the running status of the internal software program of the SOC chip and the running status of the external excitation.

[0047] Step a2, using a two-way mailbox to send the running status of the external stimulus and the running status of the internal software program.

[0048] Specifically, the CPU of the SOC chip obtains the running status of the external stimulus by reading the two-way mailbox, and the external stimulus device obtains the running status of the internal software program by reading the two-way mailbox. The two-way mailbox sends the running status of the external stimulus to the CPU of the SOC chip, and the two-way mailbox sends the running status of the internal software program to the external stimulus device. The CPU of the SOC chip and the external stimulus device will send their own running status information to the two-way mailbox in a timely manner, and monitor the two-way mailbox in real time to see if there is any information sent to them by the other party.

[0049] Specifically, Figure 4 As shown, if the mailbox includes two free storage units, the mailbox includes a first unidirectional mailbox and a second unidirectional mailbox with different data transmission directions, and the above step S203 includes: Step b1, using the first one-way mailbox to receive and send the running status of the internal software program.

[0050] Specifically, if the mailbox includes two idle storage units, it is a dual mailbox mode, each idle storage unit is a unidirectional mailbox, and the data transmission directions of the two unidirectional mailboxes are different. The transmission direction of data in the first unidirectional mailbox is from the CPU in the SOC chip to the first unidirectional mailbox, and then from the first unidirectional mailbox to the external excitation device, so the first unidirectional mailbox can be used to receive the running status of the internal software program sent by the CPU, and send the running status of the internal software program to the external excitation device.

[0051] It should be noted that one-way mailboxes and two-way mailboxes have different requirements for storage units. When selecting, the free storage units are set according to the actual situation. For example, a storage unit stores the internal data of the SOC chip as a common storage medium, but these data do not participate in the simulation verification of the SOC chip. In this case, the CPU can perform read and write operations on the storage unit, but the external excitation device can only read the data therein to avoid the internal data from being modified by mistake. Therefore, the storage unit can only be used as a one-way mailbox, and its transmission direction is from the CPU of the SOC chip to the one-way mailbox, and then to the external excitation device. This is only an example, but not limited to this.

[0052] Step b2, using the second one-way mailbox to receive and send the operating status of the external stimulus.

[0053] Specifically, the data transmission direction in the second one-way mailbox is from the external excitation device to the second one-way mailbox, and then from the second one-way mailbox to the CPU in the SOC chip. Therefore, the second one-way mailbox can be used to receive the operating status of the external excitation sent by the external excitation device, and send the operating status of the external excitation to the CPU of the SOC chip.

[0054] The SOC chip simulation verification method based on the self-mailbox mechanism provided in this embodiment can send and receive internal software programs or external stimuli through a two-way mailbox or two unidirectional mailboxes, without limiting the working mode and number of mailboxes, making the information interaction between the internal software program and the external stimuli more flexible and improving the reliability of communication between the internal software program and the external stimuli.

[0055] Specifically, Figure 5 As shown, if the mailbox includes three or more free storage units, the mailbox includes at least one unidirectional mailbox group and at least one bidirectional mailbox, and the unidirectional mailbox group includes two unidirectional mailboxes with different data transmission directions. The above step S203 includes: According to the type of simulation verification, a one-way mailbox group or a two-way mailbox is selected to receive and / or send the running status of the internal software program and the running status of the external stimulus.

[0056] Specifically, if the mailbox includes three or more free storage units, it is a multi-mailbox mode, and the mailbox includes at least one unidirectional mailbox group and at least one bidirectional mailbox, and the unidirectional mailbox group includes two unidirectional mailboxes with different data transmission directions. According to the type of simulation verification, different mailboxes can be selected for use in different verification items. The selected mailbox can be a bidirectional mailbox or a unidirectional mailbox with two different data transmission directions. The method of using the bidirectional mailbox refers to the process recorded in step a1 and step a2, and the method of using the unidirectional mailboxes with two different data transmission directions refers to the process recorded in steps b1 and b2, which will not be repeated here.

[0057] The SOC chip simulation verification method based on the self-mailbox mechanism provided in this embodiment uses different mailboxes for different types of simulation verifications, which can avoid simulation errors caused by the storage unit used as a mailbox being run in a certain simulation verification, thereby improving the accuracy and reliability of the SOC chip simulation verification.

[0058] Step S204: Perform simulation verification on the SOC chip according to the running status of the internal software program and the running status of the external stimulus. Figure 1 Step S104 of the illustrated embodiment will not be described in detail here.

[0059] The SOC chip simulation and verification method based on the self-mailbox mechanism provided in this embodiment utilizes the free storage unit of the SOC chip itself as a mailbox, without increasing the chip area, so that the internal software program of the SOC chip and the external stimulus can communicate with each other, and the simulation and verification of the SOC chip can be realized under the scenario requirements of the internal software program and the external stimulus cooperating with each other.

[0060] In this embodiment, a SOC chip simulation verification device based on a self-mailbox mechanism is also provided, which is used to implement the above-mentioned embodiments and preferred implementation modes, and will not be repeated hereafter. As used below, the term "module" can implement a combination of software and / or hardware of a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.

[0061] This embodiment provides a SOC chip simulation verification device based on a self-mailbox mechanism, such as Figure 6 As shown, including: The free storage unit determination module 601 is used to obtain the status of each storage unit in the SOC chip and determine the free storage unit according to the status of each storage unit.

[0062] The mailbox selection module 602 is used to randomly select at least one free storage unit from the free storage units as a mailbox.

[0063] The running status interaction module 603 is used to receive and / or send the running status of the internal software program and the running status of the external stimulus by using the mailbox.

[0064] The simulation verification module 604 is used to perform simulation verification on the SOC chip according to the running status of the internal software program and the running status of the external stimulus.

[0065] In some optional implementations, the free storage unit determination module 601 includes: The idle determination unit is used to determine that if the storage unit does not participate in the simulation verification operation of the SOC chip, the storage unit is an idle storage unit.

[0066] The operation determination unit is used to determine that if the storage unit participates in the simulation verification operation of the SOC chip, the storage unit is an operation storage unit.

[0067] In some optional implementations, if the mailbox is an idle storage unit, the mailbox includes a two-way mailbox, and the operation status interaction module 603 includes: The running status receiving unit is used to receive the running status of the internal software program and the running status of the external stimulus by using a two-way mailbox.

[0068] The running status sending unit is used to send the running status of the external stimulus and the running status of the internal software program by using a two-way mailbox.

[0069] In some optional implementations, if the mailbox includes two free storage units, the mailbox includes a first unidirectional mailbox and a second unidirectional mailbox with different data transmission directions, and the operation status interaction module 603 includes: The first data transmission unit is used to receive and send the running status of the internal software program by using the first one-way mailbox.

[0070] The second data transmission unit is used to receive and send the operating status of the external stimulus by using the second one-way mailbox.

[0071] In some optional implementations, if the mailbox includes three or more free storage units, the mailbox includes at least one unidirectional mailbox group and at least one bidirectional mailbox, the unidirectional mailbox group includes two unidirectional mailboxes with different data transmission directions, and the operation status interaction module 603 includes: The mailbox selection unit is used to select a one-way mailbox group or a two-way mailbox to receive and / or send the running status of the internal software program and the running status of the external stimulus according to the type of simulation verification.

[0072] The further functional description of each of the above modules and units is the same as that of the above corresponding embodiments and will not be repeated here.

[0073] The SOC chip simulation and verification device based on the self-mailbox mechanism in this embodiment is presented in the form of a functional unit, where the unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that executes one or more software or fixed programs, and / or other devices that can provide the above functions.

[0074] The embodiment of the present invention also provides a computer device having the above Figure 6 The SOC chip simulation and verification device based on the self-mailbox mechanism is shown.

[0075] See also Figure 7 , Figure 7 is a schematic diagram of the structure of a computer device provided by an optional embodiment of the present invention, such as Figure 7 As shown, the computer device includes: one or more processors 10, a memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. Various components are connected to each other using different buses for communication, and can be installed on a common mainboard or installed in other ways as needed. The processor can process the instructions executed in the computer device, including instructions stored in or on the memory to display the graphical information of the GUI on an external input / output device (such as, a display device coupled to the interface). In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Similarly, multiple computer devices can be connected, and each device provides some necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Figure 7 A processor 10 is taken as an example.

[0076] The processor 10 may be a central processing unit, a network processor or a combination thereof. The processor 10 may further include a hardware chip. The hardware chip may be a dedicated integrated circuit, a programmable logic device or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general purpose array logic or any combination thereof.

[0077] The memory 20 stores instructions executable by at least one processor 10, so that the at least one processor 10 executes the method shown in the above embodiment.

[0078] The memory 20 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function; the data storage area may store data created according to the use of the computer device, etc. In addition, the memory 20 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some optional embodiments, the memory 20 may optionally include a memory remotely arranged relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0079] The memory 20 may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a flash memory, a hard disk or a solid state drive; the memory 20 may also include a combination of the above types of memory.

[0080] The computer device further comprises a communication interface 30 for the computer device to communicate with other devices or a communication network.

[0081] The embodiment of the present invention also provides a computer-readable storage medium. The method according to the embodiment of the present invention can be implemented in hardware, firmware, or can be implemented as a computer code that can be recorded in a storage medium, or can be implemented as a computer code that is originally stored in a remote storage medium or a non-temporary machine-readable storage medium and will be stored in a local storage medium through a network download, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid-state hard disk, etc.; further, the storage medium can also include a combination of the above types of memories. It can be understood that a computer, a processor, a microprocessor controller, or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor, or hardware, the method shown in the above embodiment is implemented.

[0082] A part of the present invention may be applied as a computer program product, such as a computer program instruction, which, when executed by a computer, can call or provide the method and / or technical solution according to the present invention through the operation of the computer. Those skilled in the art should understand that the existence of the computer program instruction in a computer-readable medium includes, but is not limited to, a source file, an executable file, an installation package file, etc., and accordingly, the way in which the computer program instruction is executed by the computer includes, but is not limited to: the computer directly executes the instruction, or the computer compiles the instruction and then executes the corresponding compiled program, or the computer reads and executes the instruction, or the computer reads and installs the instruction and then executes the corresponding installed program. Here, the computer-readable medium may be any available computer-readable storage medium or communication medium accessible to the computer.

[0083] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A SOC chip simulation verification method based on a self-mailbox mechanism, characterized in that: The method comprises: Obtain the status of each storage unit in the SOC chip, and determine the idle storage unit according to the status of each storage unit; Randomly selecting at least one free storage unit from the free storage units as a mailbox; Using the mailbox to receive and / or send the running status of the internal software program and the running status of the external stimulus; The SOC chip is simulated and verified according to the running status of the internal software program and the running status of the external stimulus.

2. The method according to claim 1, characterized in that Determining a free storage unit according to the status of each storage unit includes: If the storage unit does not participate in the simulation verification operation of the SOC chip, the storage unit is an idle storage unit; If the storage unit participates in the simulation verification operation of the SOC chip, the storage unit is an operation storage unit.

3. The method according to claim 1 or 2, characterized in that: The storage unit includes: a non-volatile memory, a volatile memory, and a register.

4. The method according to claim 1, characterized in that: Receiving and / or sending the operating status of the internal software program and the operating status of the external stimulus by using the mailbox includes: If the mailbox is a free storage unit, the mailbox includes a two-way mailbox; Using the two-way mailbox to receive the running status of the internal software program and the running status of the external stimulus; The two-way mailbox is used to send the operating status of the external stimulus and the operating status of the internal software program.

5. The method according to claim 1, characterized in that Receiving and / or sending the operating status of the internal software program and the operating status of the external stimulus by using the mailbox includes: If the mailbox includes two free storage units, the mailbox includes a first unidirectional mailbox and a second unidirectional mailbox with different data transmission directions; Using the first one-way mailbox to receive and send the running status of the internal software program; The second one-way mailbox is used to receive and send the operating status of the external stimulus.

6. The method according to claim 5, characterized in that Receiving and / or sending the operating status of the internal software program and the operating status of the external stimulus by using the mailbox includes: If the mailbox includes three or more free storage units, the mailbox includes at least one unidirectional mailbox group and at least one bidirectional mailbox, and the unidirectional mailbox group includes two unidirectional mailboxes with different data transmission directions; According to the type of simulation verification, a one-way mailbox group or a two-way mailbox is selected to receive and / or send the running status of the internal software program and the running status of the external stimulus.

7. A SOC chip simulation verification device based on a self-mailbox mechanism, characterized in that: The device comprises: The free storage unit determination module is used to obtain the status of each storage unit in the SOC chip and determine the free storage unit according to the status of each storage unit; A mailbox selection module, used for randomly selecting at least one free storage unit from the free storage units as a mailbox; A running status interaction module, used to receive and / or send the running status of the internal software program and the running status of the external stimulus by using the mailbox; The simulation verification module is used to perform simulation verification on the SOC chip according to the running state of the internal software program and the running state of the external stimulus.

8. A computer device, characterized in that: include: A memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the method according to any one of claims 1 to 6 by executing the computer instructions.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a computer to execute the method according to any one of claims 1 to 6.

10. A computer program product, characterized in that The method comprises computer instructions for causing a computer to execute the method according to any one of claims 1 to 6.

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