Inverter flyback reactive power optimization method and device

Abstract

The invention relates to an inverter flyback reactive power optimization method and device, and belongs to the technical field of inverter control. According to the inverter flyback reactive power optimization method and device provided by the invention, the voltage and current of the direct current side are acquired through the primary side chip; acquiring peak power Pop and power grid voltage and angle acquired by a secondary side chip; judging whether the setting instruction is current leading voltage or lags or neither, and calculating a primary side MOS tube switching period Ts1, a lagging switching period Ts2 or an active power switching period Ts of the corresponding current leading voltage; and the primary side MOS tube is controlled according to a calculation result. Therefore, proper reactive power can be provided, the power grid voltage can be more stabilized, the power grid magnetic field can be balanced, current burrs caused by a previous method are reduced, the current waveform smoothness is improved, and reactive power errors meet the national standard.

Description

Technical Field

[0001] The invention relates to the technical field of inverter control, and in particular to a flyback reactive power optimization method for an inverter. Background Art

[0002] In the prior art, the inverter control method is prone to current glitches, the smoothness of the current waveform is poor, and there is also a problem that the error of reactive power is large and does not meet national standards.

[0003] Therefore, how to provide an inverter control method that improves the smoothness of the current waveform and makes the reactive power error meet the national standard has become an urgent problem to be solved in the field. Summary of the invention

[0004] The purpose of the present invention is to overcome the shortcomings of the above-mentioned prior art and provide a flyback inverter reactive power optimization method which improves the smoothness of the current waveform and makes the reactive power error meet the national standard.

[0005] In order to achieve the above-mentioned purpose, the inverter flyback type reactive power optimization method of the present invention comprises:

[0006] (1) The primary chip collects the DC side voltage and current;

[0007] (2) Real-time tracking based on the step-size perturbation method to obtain the peak power Pop;

[0008] (3) Obtain the grid voltage and angle collected by the secondary chip;

[0009] (4) The primary chip obtains a setting instruction;

[0010] (5) Determine whether the setting instruction is that the current leads the voltage. If so, calculate the primary MOS tube switching period Ts1 of the current leading the voltage. If not, proceed to step (6);

[0011] (6) determining whether the setting instruction is current lagging voltage, if so, calculating the primary MOS tube switching period Ts2 of the current lagging voltage, if not, calculating the primary MOS tube switching period Ts of the active power;

[0012] (7) Control the primary MOS tube according to the calculation results.

[0013] In the inverter flyback reactive power optimization method, the step (4) is specifically as follows:

[0014] The secondary chip obtains user settings;

[0015] The primary chip obtains a setting instruction from the secondary chip, where the setting instruction includes the user setting;

[0016] The primary chip periodically obtains the grid voltage and frequency from the secondary chip.

[0017] In the inverter flyback reactive power optimization method, the primary MOS tube switching period Ts1 at which the current leads the voltage is calculated is specifically calculated by using the following formula:

[0018]

[0019] The primary MOS tube switching period Ts2 for calculating the current lag voltage is specifically calculated by using the following formula:

[0020]

[0021] The calculation of the active power primary MOS tube switching period Ts is specifically to calculate Ts using the following formula:

[0022]

[0023] Among them, Lp is the transformer inductance, Pop is the peak power, a is the grid angle, b is the angle offset, Upv is the DC side voltage, and d is the opening duty cycle.

[0024] In the inverter flyback reactive power optimization method, the step (7) is specifically as follows: the primary chip outputs PWM through a timer according to the calculation result to control the primary MOS tube to be turned on.

[0025] The present invention also provides an inverter flyback type reactive power optimization device, which comprises:

[0026] The secondary chip is used to collect grid voltage and angle;

[0027] The primary chip is used to collect the DC side voltage and current; track in real time according to the step perturbation method to obtain the peak power Pop; obtain the setting instruction; judge the setting instruction, if the current leads the voltage, calculate the primary MOS tube switching period Ts1 of the current leading the voltage; if not, calculate the primary MOS tube switching period Ts2 of the current lagging the voltage; if neither, calculate the active power primary MOS tube switching period Ts; and control the primary MOS tube according to the calculation result.

[0028] In the inverter flyback type reactive power optimization device,

[0029] The secondary chip is also used to obtain user settings;

[0030] The primary chip is used to obtain a setting instruction from the secondary chip, and the setting instruction includes the user setting;

[0031] It is also used to obtain the grid voltage and frequency from the secondary chip at a regular time.

[0032] In the inverter flyback reactive power optimization device, the primary MOS tube switching period Ts1 at which the current leads the voltage is calculated is specifically calculated by using the following formula:

[0033]

[0034] The primary MOS tube switching period Ts2 for calculating the current lag voltage is specifically calculated by using the following formula:

[0035]

[0036] The calculation of the active power primary MOS tube switching period Ts is specifically to calculate Ts using the following formula:

[0037]

[0038] Among them, Lp is the transformer inductance, Pop is the peak power, a is the grid angle, b is the angle offset, Upv is the DC side voltage, and d is the opening duty cycle.

[0039] In the inverter flyback reactive power optimization device, the primary chip is specifically used to output PWM through a timer according to the calculation result to control the conduction of the primary MOS tube.

[0040] The inverter flyback reactive power optimization method and device of the present invention are adopted, and the DC side voltage and current are collected through the primary chip; the peak power Pop and the grid voltage and angle collected by the secondary chip are obtained; it is determined whether the setting instruction is the current leading voltage or lagging or neither, and the corresponding primary MOS tube switching cycle Ts1, lagging switching cycle Ts2 or active power switching cycle Ts of the current leading voltage are calculated; and then the primary MOS tube is controlled according to the calculation result. Thus, appropriate reactive power can be provided, the grid voltage can be more stabilized, the grid magnetic field can be balanced, the current burrs caused by the previous method can be reduced, the current waveform smoothness can be improved, and the reactive power error can meet the national standard. The method and device of the present invention are simple to implement and the application cost is low. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 It is a schematic flow chart of the inverter flyback type reactive power optimization method of the present invention;

[0042] Figure 2 It is a structural schematic diagram of the inverter flyback type reactive power optimization device of the present invention;

[0043] Figure 3It is a schematic diagram of the voltage and current waveforms in phase;

[0044] Figure 4 for Figure 3 Analyzer data display diagram of waveform;

[0045] Figure 5 It is a waveform diagram showing that the current leads the voltage;

[0046] Figure 6 for Figure 5 Analyzer data display diagram of waveform;

[0047] Figure 7 It is a waveform diagram of current lagging voltage;

[0048] Figure 8 for Figure 7 Analyzer data display of waveform. DETAILED DESCRIPTION

[0049] In order to more clearly understand the technical content of the present invention, the following embodiments are given in detail.

[0050] See also Figure 1 , which is a schematic flow chart of the inverter flyback reactive power optimization method of the present invention.

[0051] In one embodiment, the inverter flyback reactive power optimization method of the present invention includes:

[0052] (1) The primary chip collects the DC side voltage and current;

[0053] (2) Real-time tracking based on the step-size perturbation method to obtain the peak power Pop;

[0054] (3) Obtain the grid voltage and angle collected by the secondary chip;

[0055] (4) The primary chip obtains a setting instruction;

[0056] (5) Determine whether the setting instruction is that the current leads the voltage. If so, calculate the primary MOS tube switching period Ts1 of the current leading the voltage. If not, proceed to step (6);

[0057] (6) determining whether the setting instruction is current lagging voltage, if so, calculating the primary MOS tube switching period Ts2 of the current lagging voltage, if not, calculating the primary MOS tube switching period Ts of the active power;

[0058] (7) Control the primary MOS tube according to the calculation results.

[0059] In a preferred embodiment, the step (4) is specifically:

[0060] The secondary chip obtains user settings;

[0061] The primary chip obtains a setting instruction from the secondary chip, where the setting instruction includes the user setting;

[0062] The primary chip periodically obtains the grid voltage and frequency from the secondary chip.

[0063] In a further preferred embodiment, the calculation of the primary MOS tube switching period Ts1 in which the current leads the voltage is specifically performed by using the following formula to calculate Ts1:

[0064]

[0065] The primary MOS tube switching period Ts2 for calculating the current lag voltage is specifically calculated by using the following formula:

[0066]

[0067] The calculation of the active power primary MOS tube switching period Ts is specifically to calculate Ts using the following formula:

[0068]

[0069] Among them, Lp is the transformer inductance, Pop is the peak power, a is the grid angle, b is the angle offset, Upv is the DC side voltage, and d is the opening duty cycle.

[0070] In a more preferred embodiment, the step (7) is specifically as follows: the primary chip outputs PWM through a timer according to the calculation result to control the primary MOS tube to be turned on.

[0071] The present invention also provides an inverter flyback type reactive power optimization device. In one embodiment, Figure 2 As shown, the device comprises:

[0072] The secondary chip is used to collect grid voltage and angle;

[0073] The primary chip is used to collect the DC side voltage and current; track in real time according to the step perturbation method to obtain the peak power Pop; obtain the setting instruction; judge the setting instruction, if the current leads the voltage, calculate the primary MOS tube switching period Ts1 of the current leading the voltage; if not, calculate the primary MOS tube switching period Ts2 of the current lagging the voltage; if neither, calculate the active power primary MOS tube switching period Ts; and control the primary MOS tube according to the calculation result.

[0074] In a preferred embodiment, the secondary chip is also used to obtain user settings;

[0075] The primary chip is used to obtain setting instructions from the secondary chip, and the setting instructions include the user settings; and is also used to obtain the grid voltage and frequency from the secondary chip at a regular interval.

[0076] In a further preferred embodiment, the calculation of the primary MOS tube switching period Ts1 in which the current leads the voltage is specifically performed by using the following formula to calculate Ts1:

[0077]

[0078] The primary MOS tube switching period Ts2 for calculating the current lag voltage is specifically calculated by using the following formula:

[0079]

[0080] The calculation of the active power primary MOS tube switching period Ts is specifically to calculate Ts using the following formula:

[0081]

[0082] Among them, Lp is the transformer inductance, Pop is the peak power, a is the grid angle, b is the angle offset, Upv is the DC side voltage, and d is the opening duty cycle.

[0083] In a more preferred embodiment, the primary chip is specifically used to control the conduction of the primary MOS tube by outputting PWM through a timer according to the calculation result.

[0084] In practical applications, the implementation logic of the present invention is based on the basic principle of active power: the primary chip of the inverter calculates the switching period Ts and duty cycle d of the MOS tube according to the collected grid voltage, grid voltage angle, DC side voltage and peak power obtained by MPPT tracking, and finally outputs PWM through the timer to control the opening of the primary MOS tube. Taking the power factor as 1 and the voltage and current in phase as an example, the waveforms of the grid voltage and current are as follows: Figure 3 The corresponding analyzer data is shown in Figure 4 shown.

[0085] The basic principle of reactive power is: to achieve current leading and lagging behind voltage, the current and voltage need to be staggered by a certain angle, defined as offset angle b. By calculating Ts and offset angle b as above, the switching period Ts1 when the current leads the voltage and the switching period Ts2 when the current lags the voltage are recalculated. Taking the power factor of +0.9 and the current leading the voltage as an example, the waveforms of the grid voltage and current are as follows: Figure 5 The corresponding analyzer data is shown in Figure 6 As shown. Figure 7 The waveforms of the grid voltage and current are shown with a power factor of -0.9 and current lagging behind voltage. The corresponding analyzer data are as follows: Figure 8 shown.

[0086] Through the above experimental data, it can be found that the inverter flyback reactive power optimization method and device of the present invention are adopted, and the DC side voltage and current are collected through the primary chip; the peak power Pop and the grid voltage and angle collected by the secondary chip are obtained; it is determined whether the setting instruction is the current leading voltage or lagging or neither, and the corresponding primary MOS tube switching cycle Ts1, lagging switching cycle Ts2 or active power switching cycle Ts of the current leading voltage are calculated; and then the primary MOS tube is controlled according to the calculation result. Thus, appropriate reactive power can be provided, the grid voltage can be more stabilized, the grid magnetic field can be balanced, the current burrs caused by the previous method can be reduced, the current waveform smoothness can be improved, and the reactive power error can meet the national standard. In addition, the method and device of the present invention are simple to implement and the application cost is low.

[0087] In this specification, the present invention has been described with reference to specific embodiments thereof. However, it is apparent that various modifications and variations may be made without departing from the spirit and scope of the present invention. Therefore, the specification and drawings should be regarded as illustrative rather than restrictive.

Claims

1. A method for optimizing flyback reactive power of an inverter, characterized in that: The method includes: (1) The primary chip collects the DC side voltage and current; (2) Real-time tracking based on the step-size perturbation method to obtain the peak power Pop; (3) Obtain the grid voltage and angle collected by the secondary chip; (4) The primary chip obtains a setting instruction; (5) Determine whether the setting instruction is that the current leads the voltage. If so, calculate the primary MOS tube switching period Ts1 of the current leading the voltage. If not, proceed to step (6); (6) determining whether the setting instruction is current lagging voltage, if so, calculating the primary MOS tube switching period Ts2 of the current lagging voltage, if not, calculating the primary MOS tube switching period Ts of the active power; (7) Control the primary MOS tube according to the calculation results.

2. The inverter flyback reactive power optimization method according to claim 1, characterized in that: The step (4) is specifically as follows: The secondary chip obtains user settings; The primary chip obtains a setting instruction from the secondary chip, where the setting instruction includes the user setting; The primary chip periodically obtains the grid voltage and frequency from the secondary chip.

3. The inverter flyback reactive power optimization method according to claim 2, characterized in that: The calculation of the primary MOS tube switching period Ts1 in which the current leads the voltage is specifically performed by using the following formula to calculate Ts1: The primary MOS tube switching period Ts2 for calculating the current lag voltage is specifically calculated by using the following formula: The calculation of the active power primary MOS tube switching period Ts is specifically to calculate Ts using the following formula: Among them, Lp is the transformer inductance, Pop is the peak power, a is the grid angle, b is the angle offset, Upv is the DC side voltage, and d is the opening duty cycle.

4. The inverter flyback reactive power optimization method according to claim 3, characterized in that: The step (7) is specifically as follows: the primary chip outputs PWM through a timer according to the calculation result to control the primary MOS tube to be turned on.

5. An inverter flyback type reactive power optimization device, characterized in that: include: The secondary chip is used to collect grid voltage and angle; The primary chip is used to collect the DC side voltage and current; According to the step-size perturbation method, real-time tracking is performed to obtain the peak power Pop; Obtaining a setting instruction; judging the setting instruction, if the current leads the voltage, calculating the primary MOS tube switching period Ts1 of the current leading the voltage; If the current lags the voltage, then calculate the primary MOS tube switching period Ts2 of the current lag voltage; if neither is the case, then calculate the active power primary MOS tube switching period Ts; And control the primary MOS tube according to the calculation results.

6. The inverter flyback type reactive power optimization device according to claim 5, characterized in that: The secondary chip is also used to obtain user settings; The primary chip is used to obtain setting instructions from the secondary chip, and the setting instructions include the user settings; and is also used to obtain the grid voltage and frequency from the secondary chip at a regular interval.

7. The inverter flyback type reactive power optimization device according to claim 6, characterized in that: The calculation of the primary MOS tube switching period Ts1 in which the current leads the voltage is specifically performed by using the following formula to calculate Ts1: The primary MOS tube switching period Ts2 for calculating the current lag voltage is specifically calculated by using the following formula: The calculation of the active power primary MOS tube switching period Ts is specifically to calculate Ts using the following formula: Among them, Lp is the transformer inductance, Pop is the peak power, a is the grid angle, b is the angle offset, Upv is the DC side voltage, and d is the opening duty cycle.

8. The inverter flyback type reactive power optimization device according to claim 7, characterized in that: The primary chip is specifically used to output PWM through a timer according to the calculation result to control the primary MOS tube to be turned on.

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