Sparse modular multilevel matrix converter topology, design and control method

Abstract

The invention provides a sparse modular multilevel matrix converter topology, a design method and a control method. The topology has three-phase symmetry of an input side and an output side. The design method aims at reserving the conventional M3C function and performance and reducing the cost, and comprises the following steps: setting the input side alternating current frequency and the output side alternating current frequency of a matrix converter to be in an integer frequency division relationship; through a control mode of phase coordination on two sides, the utilization rate of direct-current voltage is improved, and the modulation wave amplitude of each bridge arm is reduced; and determining that the number of the bridge arm sub-modules is less than that of the conventional M3C based on the modulation wave amplitude. Through the phase coordination technology, the number of the bridge arm sub-modules is reduced on the basis of reserving the conventional M3C function and performance, so that the cost is reduced, and the operation efficiency is improved to a certain extent.

Description

Technical Field

[0001] The present invention relates to the field of electronic power and control, and in particular to a sparse modular multi-level matrix converter topology, design and control method. Background Art

[0002] my country has a vast territory and abundant offshore wind energy resources, which have great development potential. In recent years, the focus of wind power development has gradually shifted from onshore to offshore. With the increasing installed capacity and transmission distance of offshore wind farms, how to achieve economical and reliable transmission of offshore wind power has become a key issue that needs to be solved urgently. Some scholars have found that the problem of traditional industrial frequency AC transmission and high-voltage DC transmission can be overcome by using frequency-divided AC transmission.

[0003] As the core of low-frequency AC transmission technology, the key role of the inverter is to convert the low-frequency electricity generated by wind power into industrial frequency electricity so that it can be smoothly integrated into the power grid. At the same time, it can also convert industrial frequency electricity into low-frequency electricity to meet specific transmission needs. With the continuous improvement of the voltage level and transmission capacity of the transmission line, the research on high-voltage and large-capacity inverters in the field of low-frequency transmission is particularly important. Among the many types of inverters, the AC-AC matrix converter has attracted much attention due to its unique advantages. This converter not only eliminates the intermediate DC link, but also has a more compact structure and is easy to implement modular design, making it perform well in high-voltage and large-capacity application scenarios. In addition, the AC-AC matrix converter also has the characteristics of bidirectional energy flow, and the low-order harmonic content of the output voltage and output current is small, thereby ensuring the high efficiency and stability of power conversion. Among the AC-AC matrix converters, the modular multi-level matrix converter has great application prospects in the field of high-voltage and large-capacity power conversion due to its advantages such as high modularity and strong expansibility.

[0004] As the transmission capacity of low-frequency AC systems continues to increase, M3C faces limitations in high-voltage and high-power applications. These limitations are mainly due to factors such as capacitor capacitance, capacitor withstand voltage, and switch device withstand voltage. In order to overcome these limitations, a common solution is to increase the number of bridge arm submodules. By adding submodules, the withstand voltage and power handling capabilities of M3C can be effectively improved, thereby adapting to higher voltage and higher power application scenarios, but this comes with high costs. Summary of the invention

[0005] In view of the defects in the prior art, the object of the present invention is to provide a sparse modular multi-level matrix converter topology, design and control method.

[0006] According to one aspect of the present invention, there is provided a sparse modular multi-level matrix converter topology, the topology having three-phase symmetry on the input and output sides;

[0007] From the perspective of the input side, the 9 bridge arms are divided into 3 sub-converters, namely, the A-phase sub-converter including the Aa, Ab, and Ac bridge arms, the B-phase sub-converter including the Ba, Bb, and Bc bridge arms, and the C-phase sub-converter including the Ca, Cb, and Cc bridge arms;

[0008] From the perspective of the output side, the 9 bridge arms are also divided into 3 sub-converters, namely, the a-phase sub-converter including the Aa, Ba, and Ca bridge arms, the b-phase sub-converter including the Ab, Bb, and Cb bridge arms, and the c-phase sub-converter including the Ac, Bc, and Cc bridge arms;

[0009] Each phase input side is provided with an equivalent resistance and inductance, each phase output side is provided with an equivalent resistance and inductance, and each bridge arm has a bridge arm resistance and inductance;

[0010] The number of submodules of the bridge arm of at least one phase converter is less than the number of submodules of the bridge arm of the corresponding phase converter of the conventional M3C.

[0011] Preferably, the working principle of the topology is specifically as follows:

[0012] When the system is running stably, the circulating current of the matrix converter topology is completely suppressed, and the voltage drop caused by the current flowing through the resistor and inductor is ignored. At this time, the voltage and current on the input side and the output side are three-phase symmetrical sinusoidal waves, and the input and output currents are evenly distributed in each phase, that is, they meet the following conditions:

[0013] u xy =u ix -u oy =U im cos(w i t+θ i )-U om cos(w o t+θ o )

[0014]

[0015] where u ix 、u iy are the input and output side AC voltages respectively; i ix 、i iy are the input and output side AC currents respectively; i xy 、u xy are the current and voltage on the bridge arm xy respectively; U im , U om Respectively represent the amplitude of input and output voltage; I im ,I om Respectively represent the amplitude of input and output current; w i 、w oRespectively represent the angular velocity of the input and output sides; θ i ,θ o Respectively represent the initial phases of input and output voltages; Respectively represent the power factor angles on the input and output sides;

[0016] Preferably, the mathematical decoupling model of the topology is specifically:

[0017] The voltage equation of the topology in the rectangular coordinate system is obtained by Kirchhoff's voltage law:

[0018]

[0019] where u ix 、i ix are the input side voltage and current respectively; u oy 、i oy are the output side voltage and current respectively; i xy 、u xy， Where x = A, B, C; y = a, b, c are bridge arm voltage and current respectively; R is , R os , L is , L os are the equivalent resistance and inductance of the input system side and the output system side respectively; R0 and L0 are the resistance and inductance of the bridge arm, u OO’ Respectively represent the neutral point voltage difference between the three-phase voltage on the input side and the three-phase voltage on the output side;

[0020] The voltage equation of the topology in the rectangular coordinate system is subjected to double αβ0 transformation to obtain the equivalent circuit diagrams of the input, output and circulating sides; wherein the αβ0 transformation coefficient matrix under equal power transformation is:

[0021]

[0022] The double αβ0 transformation process is:

[0023]

[0024] The voltage equation of the topology in the rectangular coordinate system is applied with the double αβ0 transformation to obtain the voltage equation in the double αβ0 coordinate system:

[0025]

[0026] Among them, i αα 、i αβ 、i βα 、i ββ 、i 0α 、i 0β 、i α0 、iβ0 、i 00 is the current component of the bridge arm current after double αβ0 transformation; u αα 、u αβ 、u βα 、u ββ 、u 0α 、u 0β 、u α0 、u β0 、u 00 is the voltage component of the bridge arm voltage after double αβ0 transformation;

[0027] Based on the three-phase symmetry of the input and output sides of the topology, the simplified equation is obtained:

[0028]

[0029] Based on the simplified equations, the 8th-order decoupled mathematical equations describing the input side, output side, and circulation side are obtained respectively: the decoupled mathematical equation on the input side is:

[0030]

[0031] The decoupling mathematical equation on the output side is:

[0032]

[0033] The decoupling mathematical equation on the circulation side is:

[0034]

[0035] u 00 =-3u OO'

[0036] Where L' i , L' o , R' i , R' o The definition is as follows:

[0037]

[0038]

[0039] According to a second aspect of the present invention, a design method for a sparse modular multi-level matrix converter topology is provided, wherein the design method is aimed at retaining conventional M3C functions and performance and reducing costs, and comprises the steps of:

[0040] Setting the AC frequencies on the input side and the output side of the matrix converter to an integer division relationship;

[0041] Based on the integer frequency division relationship, the utilization rate of the DC voltage is improved and the modulation wave amplitude of each bridge arm is reduced through the control method of phase coordination on both sides;

[0042] It is determined based on the modulation wave amplitude that the number of bridge arm sub-modules is less than the number of bridge arm sub-modules of the conventional M3C.

[0043] Preferably, the control method of phase coordination on both sides is used to improve the utilization rate of the DC voltage, reduce the modulation wave amplitude of each bridge arm, and determine that the number of bridge arm submodules is less than the number of bridge arm submodules of the conventional M3C based on the modulation wave amplitude, including:

[0044] When the system is running stably, the sparse modular multilevel matrix converter modulation wave u ref , specifically:

[0045] u ref =m i sin(w i t+θ i )-m o sin(w o t+θ o )

[0046] where w i 、w o are the AC frequencies at the input and output sides, θ i ,θ o are the AC frequencies at the input and output sides respectively; m i 、m o are the voltage modulation ratios on the input and output sides of the frequency-divided AC transmission system, m i =U im / NU c , m o =U om / NU c , where N is the number of bridge arm submodules and Uc is the rated voltage of the submodule capacitor.

[0047] Based on the three-phase symmetry of the input and output side systems, the phases of the input side AC voltage and the output side AC voltage are defined. Phase A on the input side is wt, phase B is wt-120°, phase C is wt+120°, and phase a on the output side is b phase Phase c is

[0048] The minimum value of the modulation wave amplitude of each bridge arm is obtained by traversal. For sub-converter A, when the initial phase angle of the output voltage is equal to When the modulation wave amplitudes of the three bridge arms reach the minimum value at the same time; for sub-converter B, when the phase angle is equal to When the modulation wave amplitudes of the three bridge arms reach the minimum value at the same time; for sub-converter C, when the phase angle is equal to When , the modulation wave amplitudes of the three bridge arms reach the minimum value;

[0049] It is concluded from the traversal process that changing the initial phase angle of the voltage can change the amplitude of the modulation wave of the three-phase sub-converter;

[0050] Based on the conclusion and the proportional relationship between the modulation wave amplitude and the number of bridge arm submodules, it is determined that reducing the number of bridge arm submodules accordingly can improve the utilization rate of the DC voltage and retain the original conventional M3C functions and performance.

[0051] Preferably, the design method is applicable when there is a frequency division relationship between the input and output side systems.

[0052] According to a third aspect of the present invention, a control method for a sparse modular multi-level matrix converter topology is provided, wherein an outer loop control of a fixed DC capacitor voltage is adopted on the input side, and an outer loop control of a fixed active and reactive power is adopted on the output side, the two outer loop controls provide the required reference value input for the current inner loop control, and the outer loop control and the current inner loop control together constitute a dual closed-loop vector control; bridge arm capacitor voltage balancing control, circulating current suppression, and sub-module capacitor voltage balancing control are added to the dual closed-loop vector control to achieve a balance of capacitor voltages between bridge arms of each sub-converter.

[0053] Preferably, the mathematical model of the current inner loop control is specifically:

[0054] Determine the transformation matrix from the αβ0 coordinate system to the dq coordinate system, specifically:

[0055]

[0056]

[0057] where w i 、w o Respectively represent the input and output side AC angular frequencies, Represent the transformation matrices of the input side and the output side respectively;

[0058] Applying the transformation matrix to the decoupled model in the αβ0 coordinate system and simplifying it yields:

[0059]

[0060]

[0061] where u d0 、u q0 is the αβ axis component of the input side AC voltage after αβ0 / dq transformation; u0d 、u 0q is the αβ axis component of the output side AC voltage after αβ0 / dq transformation; u id 、u iq is the dq axis component of the input side AC voltage; i id 、i iq is the dq axis component of the input side AC current; u od 、u oq is the dq axis component of the output side AC voltage; i od 、i oq is the dq-axis component of the AC current at the output side.

[0062] The mathematical model of the input and output sides of the sM3C in the dq coordinate system is obtained by Laplace transformation on both sides of the simplified equation, which is:

[0063]

[0064]

[0065] s is the operation factor in the complex frequency domain after Laplace transform.

[0066] Preferably, the current inner loop control is specifically:

[0067]

[0068]

[0069] where u d0_ref 、u q0_ref It is the reference value output by the inner loop control of the input current; u 0d_ref 、u 0q_ref k is the reference value output by the output current inner loop control; p , k i PI controller parameters used for current inner loop control; i id_ref 、i iq_ref Current reference value provided for input side outer loop control; i od_ref 、i oq_ref Current reference value provided for output side outer loop control;

[0070] Income d0_ref 、u q0_ref 、u 0d_ref 、u 0q_ref Then transform it back to the αβ0 coordinate system through the inverse αβ0 / dq transformation.

[0071] Preferably, the input side adopts an outer loop control of a fixed DC capacitor voltage, and the output side adopts an outer loop control of a fixed active and reactive power, and the two outer loop controls provide the required reference value input for the current inner loop control, including:

[0072] The relationship between the bridge arm capacitor voltage and the bridge arm power is as follows:

[0073]

[0074] Among them U cxy is the sum of the capacitor voltages of all submodules in the xy bridge arm; P xy is the active power on the xy bridge arm; U c0 is the rated value of the submodule capacitor voltage; N is the number of submodules of the bridge arm of the B and C phase subconverters; N' is the number of submodules of the bridge arm of the A phase subconverter; C is the submodule capacitor value;

[0075] Applying double αβ0 transformation to the relationship between the bridge arm capacitor voltage and the bridge arm power yields:

[0076]

[0077] If U cxy =NU c0 or N'U c0 Established, that is, when the voltage of each bridge arm capacitor is controlled, the relationship between the bridge arm capacitor voltage and the bridge arm power after the double αβ0 transformation is changed to:

[0078]

[0079] Control U c00 The quantity is (2+N' / N)U c0 , so that the voltage of each bridge arm capacitor is balanced, and P 00 The difference between the active power flowing into and out of the converter:

[0080]

[0081] P out As a disturbance term, P in The following relationship is satisfied:

[0082]

[0083] where u id 、i id P is the d-axis component of the input side AC voltage and current. in Substitute P 00 get:

[0084]

[0085] From this design:

[0086]

[0087] From the instantaneous power theory in the dq coordinate system, we can know that the expressions of active and reactive power when the system is running stably are:

[0088]

[0089] From the expressions of active and reactive power, it is determined that the control of active power and reactive power can be achieved by controlling the active and reactive components of the system current, that is:

[0090]

[0091] The constant power control model is obtained as:

[0092]

[0093] Preferably, the circulation suppression is performed directly in the αβ0 coordinate system, including:

[0094]

[0095] where u αα_ref 、u αβ_ref 、u βα_ref 、u ββ_ref is the output of the circulation suppression control link; i αα_ref 、i αβ_ref 、i βα_ref 、i ββ_ref is the output of the following bridge arm capacitor voltage balance control link; i αα 、i αβ 、i βα 、i ββ is the bridge arm current i xy The current obtained after double αβ0 transformation;

[0096] Income αα_ref 、u αβ_ref 、u βα_ref 、u ββ_ref Together with the value obtained by the αβ0 / dq inverse transformation of the current inner loop control output, it constitutes the reference value of the bridge arm voltage in the αβ0 coordinate system. After the double αβ0 inverse transformation, the reference value of the bridge arm voltage in the abc coordinate system can be obtained and applied to the generation of the modulation wave signal.

[0097] 12. The control method of a sparse modular multi-level matrix converter topology according to claim 7, characterized in that the balanced control of the bridge arm capacitor voltage is achieved by injecting a circulating current capable of balancing the power of each bridge arm within the sub-converter and between the sub-converters, specifically:

[0098]

[0099] where i αα_ref 、i αβ_ref 、i βα_ref 、i ββ_ref is the output of the bridge arm capacitor voltage balance control link; U cαα , U cβα , U cαβ , U cββ , U c0α , U c0β , U cα0 , U cβ0 They are the total capacitance voltage of the bridge arm U cxy Obtained after double αβ0 transformation; K1, K2, K3 are known constants.

[0100] Preferably, the submodule capacitor voltage balancing control is achieved by adjusting the duty cycle of the modulation voltage of each submodule respectively.

[0101] Compared with the prior art, the embodiments of the present invention have at least one of the following beneficial effects:

[0102] The sparse modular multilevel matrix converter topology and design method in the embodiment of the present invention reduces the number of bridge arm submodules while retaining the conventional M3C functions and performance through phase coordination technology, thereby reducing costs and improving operating efficiency to a certain extent.

[0103] The control method of the sparse modular multilevel matrix converter topology in the embodiment of the present invention has been verified by simulation, and each control link (dual closed-loop control, circulating current suppression, capacitor voltage balancing control link) can achieve the control target, thereby ensuring that the sparse modular multilevel matrix converter has excellent input and output characteristics. BRIEF DESCRIPTION OF THE DRAWINGS

[0104] Other features, objects and advantages of the present invention will become more apparent from the detailed description of non-limiting embodiments made with reference to the following drawings:

[0105] Figure 1 4 is a topology architecture diagram of a sparse modular multi-level matrix converter topology (hereinafter referred to as sM3C) in an embodiment of the present invention;

[0106] Figure 2 sM3C overall closed-loop control strategy block diagram in an embodiment of the present invention;

[0107] Figure 3 is a curve diagram showing the variation of the modulation wave amplitude of a single-phase sub-converter with the phase angle in the phase coordination technology in an embodiment of the present invention;

[0108] Figure 4 is a curve diagram showing the variation of the modulation wave amplitude of the three-phase sub-converter with the phase angle in the phase coordination technology in the embodiment of the present invention;

[0109] Figure 5 4 is a sub-converter architecture diagram of the sM3C in an embodiment of the present invention from the perspective of the input side / output side;

[0110] Figure 6 is the mathematical model of sM3C in the dq coordinate system in the embodiment of the present invention;

[0111] Figure 7 It is a block diagram of the input-side current inner loop controller of the sM3C in an embodiment of the present invention;

[0112] Figure 8 It is a block diagram of the output side current inner loop controller of the sM3C in an embodiment of the present invention;

[0113] Fig. 9 It is a block diagram of the input side constant voltage outer loop controller of the sM3C in an embodiment of the present invention;

[0114] Fig.10 It is a block diagram of the output side constant power outer loop controller of the sM3C in an embodiment of the present invention;

[0115] Fig.11 This is a block diagram of the capacitor voltage balancing control of the sM3C submodule in an embodiment of the present invention;

[0116] Fig.12 (a) and (b) are respectively the AC voltage and current curves on the power frequency side of the frequency-divided power transmission system in the implementation scheme of the present invention;

[0117] Fig.12 (c) and (d) are respectively the AC voltage and current curves on the frequency division side of the frequency division power transmission system in the implementation scheme of the present invention;

[0118] Fig.13 (a) and (b) are respectively the results of the AC current spectrum analysis on the power frequency side and the divided frequency side of the divided frequency transmission system in the embodiment of the present invention;

[0119] Fig.14 (a) and (b) are the AC voltage and current curves of the sM3C bridge arm Aa in the embodiment of the present invention, respectively;

[0120] Fig.15 (a) and (b) are control effect curves of the voltage outer loop on the input side and the power outer loop on the output side of the sM3C in the implementation scheme of the present invention respectively;

[0121] Fig.15(c) and (d) are respectively the current inner loop control effect curves of the sM3C input side and output side in the implementation scheme of the present invention;

[0122] Fig.16 This is the sM3C capacitor voltage balancing control result curve in the implementation scheme of the present invention;

[0123] Fig.17 This is the capacitor voltage control result curve of each submodule of sM3C in the implementation scheme of the present invention. DETAILED DESCRIPTION

[0124] The present invention is described in detail below in conjunction with specific embodiments. The following embodiments will help those skilled in the art to further understand the present invention, but are not intended to limit the present invention in any form. It should be noted that, for those of ordinary skill in the art, several variations and improvements may be made without departing from the concept of the present invention. These all belong to the protection scope of the present invention.

[0125] In one embodiment of the present invention, a sparse modular multilevel matrix converter topology (sM3C) is provided. The sparse modular multilevel matrix converter topology is optimized for the purpose of retaining the functions and performance of a conventional M3C and reducing the cost.

[0126] Further, in a preferred embodiment, a detailed topology is provided. The sM3C topology is as follows: Figure 1 As shown, suppose the input side voltage and current are u ix 、i ix , the output voltage and current are u oy 、i oy , the bridge arm voltage and current are i xy 、u xy (where x=A,B,C; y=a,b,c). R is , R os , L is , L os are the equivalent resistance and inductance of the input system side and the output system side, respectively; R0 and L0 are the resistance and inductance of the bridge arm; O and O' represent the neutral points of the three-phase voltage on the input side and the three-phase voltage on the output side, respectively. Figure 5It is an sM3C topology from the perspective of the input side / output side. This topology has three-phase symmetry on the input and output sides. From the perspective of the input side, the 9 bridge arms can be divided into 3 sub-converters, namely, the A-phase sub-converter (including the Aa, Ab, and Ac bridge arms), the B-phase sub-converter (including the Ba, Bb, and Bc bridge arms), and the C-phase sub-converter (including the Ca, Cb, and Cc bridge arms). From the perspective of the output side, the 3 sub-converters can also be divided. At this time, the 3 sub-converters are the a-phase sub-converter (including the Aa, Ba, and Ca bridge arms), the b-phase sub-converter (including the Ab, Bb, and Cb bridge arms), and the c-phase sub-converter (including the Ac, Bc, and Cc bridge arms). Among them, the number of sub-modules of the bridge arm of at least one phase converter is less than the number of bridge arm sub-modules of the corresponding phase converter of the conventional M3C.

[0127] Based on the same inventive concept, in other embodiments of the present invention, a design method for a sparse modular multi-level matrix converter topology is provided, and the design steps are as follows:

[0128] Step 1, setting the AC frequencies at the input side and the output side of the matrix converter to an integer division relationship;

[0129] Step 2, based on the integer frequency division relationship of the step, the utilization rate of the DC voltage is improved and the modulation wave amplitude of each bridge arm is reduced through the control method of phase coordination on both sides;

[0130] Step 3: Based on the modulation wave amplitude in step 2, determine that the number of bridge arm submodules is less than the number of bridge arm submodules of a conventional M3C.

[0131] In this embodiment, by coordinating the phases on both sides of the frequency-divided AC system, the bridge arm modulation wave amplitude is optimized on the conventional M3C topology structure, thereby providing a low-cost, high-efficiency, and high-reliability sM3C.

[0132] In a preferred embodiment of the present invention, a preferred solution of step 2 and step 3 in the above embodiment is provided, that is, the principle of converter optimization design based on phase coordination, which is specifically as follows:

[0133] When the system is running stably, the expression of sM3C modulation wave is as follows:

[0134] u ref =m i sin(w i t+θ i )-m o sin(w o t+θ o ) (1)

[0135] where w i 、w o are the AC frequencies at the input and output sides, θ i,θ o are the AC frequencies at the input and output sides respectively; m i 、m o They are the voltage modulation ratios on the input and output sides of the divided-frequency AC transmission system, respectively. This value is related to the amplitude of the AC voltage.

[0136] It should be noted that this phase coordination design method is applicable when there is a frequency division relationship between the input and output systems.

[0137] Furthermore, in a preferred embodiment, a triple frequency relationship is taken as an example for description.

[0138] Considering the three-phase symmetry of the input and output side systems, the phases of the input side AC voltage and the output side AC voltage are defined as shown in the following table.

[0139] Table 1 Input side and output side AC voltage phase

[0140]

[0141] This embodiment uses a traversal method to find the minimum value of the modulation wave amplitude of each bridge arm. Taking the Aa bridge arm as an example, the initial phase angle When the modulation amplitude changes between 0 and 2π, The period varies between 1.5398 and 2, such as Figure 3 shown.

[0142] For bridge arm Aa, the initial phase angle equal When (k=0,±1,±2,…), the amplitude of the modulated wave can reach the minimum value; similarly, for bridge arm Ab, when the phase angle is equal to When the amplitude of the modulated wave can reach the minimum value; for the bridge arm Ac, the initial phase angle is equal to When , the amplitude of the modulation wave can reach the minimum value; In summary, for sub-converter A, when the initial phase angle of the output side voltage is equal to When , the modulation wave amplitudes of the three bridge arms reach the minimum at the same time.

[0143] The same analysis can also be applied to sub-converters B and C. When the phase angle is equal to When the phase angle is equal to When , the modulation wave amplitudes of the three bridge arms of sub-converter C reach the minimum value.

[0144] Depend on Figure 4It can be seen that the amplitude of the modulation wave of the three-phase sub-converter can be changed by changing the initial phase angle of the voltage. For a certain bridge arm, the reduction of the modulation wave amplitude means that the number of bridge arm sub-modules can be reduced accordingly, thereby improving the utilization rate of the DC voltage. Since the three-phase voltages on the input and output sides are coupled with each other in the bridge arm, the modulation wave of the three-phase sub-converter cannot simultaneously obtain the minimum value. The following are two possible optimal results.

[0145] Initial phase angle equal The change of modulation wave amplitude is shown in the following table.

[0146] Table 2 Table of changes in the amplitude of the modulation wave

[0147]

[0148] Initial phase angle equal The change of modulation wave amplitude is shown in the following table.

[0149] Table 3 Table of changes in the amplitude of the modulation wave

[0150]

[0151] From Table 2, we know that the initial phase angle When the modulation wave amplitude of phase A is equal to π3, the modulation wave amplitude of phase A will be reduced by 23.02%, which means that theoretically the number of submodules of the three bridge arms of phase A can be saved by 23% on the original basis, which will greatly reduce the construction cost of the converter station. The designed sM3C topology is as follows Figure 1 shown.

[0152] Based on the sparse modular multi-level matrix converter topology obtained by the optimization design method in the above embodiment, in a preferred embodiment of the present invention, an sM3C working principle is provided. Specifically,

[0153] Assume that when the system is running stably, the circulating current in sM3C is completely suppressed, and the voltage drop caused by the current flowing through the resistor and inductor is very small and can be ignored. At this time, the voltage and current on the input and output sides are three-phase symmetrical sinusoidal waves, and the input and output currents are evenly distributed in each phase, that is, they meet the following conditions:

[0154] u xy =u ix -u oy =U im cos(w i t+θ i )-U om cos(w o t+θ o) (2)

[0155]

[0156] where u ix 、u iy are the input and output side AC voltages respectively; i ix 、i iy are the input and output side AC currents respectively; i xy 、u xy are the current and voltage on the bridge arm xy respectively; U im , U om Respectively represent the amplitude of input and output voltage; I im ,I om Respectively represent the amplitude of input and output current; w i 、w o Respectively represent the angular velocity of the input and output sides; θ i ,θ o Respectively represent the initial phases of input and output voltages; Respectively represent the power factor angle of the input and output sides; respectively define the voltage modulation ratio m of the input and output sides i 、m o for:

[0157] m i =U im / NU c (4)

[0158] m o =U om / NU c (5)

[0159] Where N is the number of bridge arm submodules, U c is the rated voltage of the submodule capacitor.

[0160] Based on the sparse modular multi-level matrix converter topology obtained by the optimization design method of the above embodiment, in a preferred embodiment of the present invention, a mathematical decoupling model of the topology is provided, specifically:

[0161] The voltage equation of the sparse modular multilevel matrix converter topology sM3C in the rectangular coordinate system is obtained by Kirchhoff's voltage law:

[0162]

[0163] where u ix 、i ix are the input side voltage and current respectively; u oy 、i oy are the output side voltage and current respectively; i xy 、uxy , where x = A, B, C; y = a, b, c are the bridge arm voltage and current respectively; R is , R os , L is , L os are the equivalent resistance and inductance of the input system side and the output system side respectively; R0 and L0 are the resistance and inductance of the bridge arm, u OO’ Respectively represent the neutral point voltage difference between the three-phase voltage on the input side and the three-phase voltage on the output side;

[0164] Through the analysis of the basic operating principle of sM3C, it can be seen that both the bridge arm voltage and current are composed of multiple frequency components including input frequency and output component. In order to achieve frequency decoupling, it is necessary to perform double αβ0 transformation on the mathematical model in the rectangular coordinate system to further obtain the equivalent circuit diagram of the input, output and circulating sides. The αβ0 transformation coefficient matrix under equal power conversion is shown as follows:

[0165]

[0166] The double αβ0 transformation process is shown below.

[0167]

[0168] Applying double αβ0 transformation to equation (6) yields the voltage equation in the double αβ0 coordinate system:

[0169]

[0170] Among them, i αα 、i αβ 、i βα 、i ββ 、i 0α 、i 0β 、i α0 、i β0 、i 00 is the current component of the bridge arm current after double αβ0 transformation; u αα 、u αβ 、u βα 、u ββ 、u 0α 、u 0β 、u α0 、u β0 、u 00 It is the voltage component of the bridge arm voltage after double αβ0 transformation.

[0171] The above formula describes the mathematical model of sM3C in the double αβ0 coordinate system. Assuming that the input and output systems are three-phase symmetrical, formula (9) can be further simplified as follows:

[0172]

[0173] From formula (10), we can get the 8th-order decoupled mathematical equations describing the input side, output side, and circulation side respectively. Among them, the input side is:

[0174]

[0175] The output side is:

[0176]

[0177] The circulation side is:

[0178]

[0179] u 00 =-3u OO' (14)

[0180] Where L' i , L' o , R' i , R' o The definition is as follows:

[0181]

[0182] Based on the same inventive concept, in another embodiment of the present invention, a control method for a sparse modular multi-level matrix converter topology is provided, such as Figure 2 As shown, an outer loop control of a fixed DC capacitor voltage is adopted on the input side, and an outer loop control of a fixed active and reactive power is adopted on the output side. The two outer loop controls provide the required reference value input for the current inner loop control. The outer loop control and the current inner loop control together constitute a double closed-loop vector control; bridge arm capacitor voltage balancing control, circulating current suppression, and sub-module capacitor voltage balancing control are added to the double closed-loop vector control to achieve the balance of capacitor voltages between the bridge arms of each sub-converter.

[0183] In order to avoid the difficulty in ensuring the steady-state zero-static error characteristic and good dynamic performance of the controller when the controlled quantity is an AC quantity, in a preferred embodiment of the present invention, the design of the current inner loop is realized by dq transformation on the basis of realizing the frequency decoupling of the input side and the output side by double αβ0 transformation. Specifically, the control model design process of the current inner loop is as follows:

[0184] The transformation matrix from the αβ0 coordinate system to the dq coordinate system is shown in equations (6) and (7).

[0185]

[0186] In the formula, is the transformation matrix of the input side angular velocity from the αβ0 coordinate system to the dq coordinate system, is the transformation matrix of the output side angular velocity from the αβ0 coordinate system to the dq coordinate system;

[0187] Applying the above transformation to the decoupled model obtained in the αβ0 coordinate system and simplifying it, we can obtain

[0188]

[0189] Performing Laplace transformation on both sides of the equation yields the mathematical model of the input and output sides of sM3C in the dq coordinate system, as Figure 6 shown.

[0190]

[0191] In another preferred embodiment of the present invention, sM3C can adopt a dq decoupled current inner loop control method, and the structure of the current inner loop controller is as follows, which can be seen in Figure 7 , Figure 8 :

[0192]

[0193] where u d0_ref 、u q0_ref It is the reference value output by the inner loop control of the input current; u 0d_ref 、u 0q_ref k is the reference value output by the output current inner loop control; p , k i PI controller parameters used for current inner loop control; i id_ref 、i iq_ref Current reference value provided for input side outer loop control; i od_ref 、i oq_ref The current reference value provided for the output side outer loop control.

[0194] Income d0_ref 、u q0_ref 、u 0d_ref 、u 0q_ref Then transform it back to the αβ0 coordinate system through the inverse αβ0 / dq transformation.

[0195] In another preferred embodiment of the present invention, the outer loop controller of sM3C will provide the required reference value input for the current inner loop control, and the outer loop control and the current inner loop together constitute a double closed-loop vector control. The present invention adopts an outer loop control strategy of fixed DC capacitor voltage on the input side and an outer loop control strategy of fixed active and reactive power on the output side. Among them, the outer loop control strategy of fixed DC capacitor voltage on the input side is adopted, such as Fig. 9 As shown, specifically:

[0196] In sM3C, the relationship between the bridge arm capacitor voltage and the bridge arm power is shown in formula (25).

[0197]

[0198] Among them U cxy is the sum of the capacitor voltages of all submodules in the xy bridge arm, P xy is the active power on the xy bridge arm; U c0 is the rated voltage of the submodule capacitor, N is the number of submodules in the bridge arm of the B and C phase subconverters, N' is the number of submodules in the bridge arm of the A phase subconverter, and C is the capacitance of the submodule. Applying double αβ0 transformation to equation (14) yields:

[0199]

[0200] If U cxy =NU c0 or N'U c0 When the capacitor voltage of each bridge arm is controlled, equation (26) becomes:

[0201]

[0202] From formula (27), we can see that in order to control the balance of the capacitor voltage of each bridge arm, it is necessary to control U c00 The quantity is (2+N' / N)U c0 .

[0203] Furthermore, an outer loop control strategy of fixed active and reactive power is adopted on the output side, such as Fig.10 As shown, specifically:

[0204] According to formula (26), we get:

[0205]

[0206] P 00 is the difference between the active power flowing into and out of the converter. In formula (28), P out can be regarded as a disturbance term and not considered. in The following relationship is satisfied:

[0207]

[0208] where u id 、i id is the d-axis component of the input side AC voltage and current. Substituting equation (29) into equation (28), we get:

[0209]

[0210] From this design:

[0211]

[0212] From the instantaneous power theory in the dq coordinate system, we can know that the expressions of active and reactive power when the system is running stably are:

[0213]

[0214] From formula (32), it can be seen that by controlling the active and reactive components of the system current, the active power and reactive power can be controlled, that is:

[0215]

[0216] The constant power control model is as follows:

[0217]

[0218] During the operation of sM3C, the voltage of the submodule capacitor will fluctuate with the charging and discharging of the capacitor element, and the bridge arm power will also fluctuate, forming a circulating current in the loop. The frequency structure of the internal circulating current of sM3C is very complex and cannot be directly converted into a DC quantity for control. Therefore, in a preferred embodiment of the present invention, the circulating current suppression control of sM3C is directly performed in the αβ0 coordinate system.

[0219]

[0220] where u αα_ref 、u αβ_ref 、u βα_ref 、u ββ_ref is the output of the circulation suppression control link; i αα_ref 、i αβ_ref 、i βα_ref 、i ββ_ref is the output of the following bridge arm capacitor voltage balance control link; i αα 、i αβ 、i βα 、i ββ is the bridge arm current i xy The current obtained after double αβ0 conversion.

[0221] Income αα_ref 、u αβ_ref 、u βα_ref 、u ββ_ref Together with the value obtained by the αβ0 / dq inverse transformation of the current inner loop control output, it constitutes the reference value of the bridge arm voltage in the αβ0 coordinate system. After the double αβ0 inverse transformation, the reference value of the bridge arm voltage in the abc coordinate system can be obtained and applied to the generation of the modulation wave signal.

[0222] In formula (26), U cαα , Ucαβ , U cβα , U cββ , U c0α , U c0β , U cα0 , U cβ0 These eight quantities respectively reflect the fluctuations of the bridge arm capacitor voltage within the same sub-converter and between sub-converters. cαα , U cαβ , U cβα , U cββ represents the unbalanced voltage of capacitors within the same sub-converter, while U c0α , U c0β , U cα0 , U cβ0 represents the imbalance of capacitor voltages between different sub-converters. During system operation, these eight quantities need to be controlled to 0 to reduce the fluctuation of capacitor voltage. In one embodiment of the present invention, the balanced control of bridge arm capacitor voltage is achieved by injecting a circulating current that can balance the power of each bridge arm within the sub-converter and between the sub-converters. Fig.11 , the injected circulation expression is shown in formula (36):

[0223]

[0224] where i αα_ref 、i αβ_ref 、i βα_ref 、i ββ_ref is the output of the bridge arm capacitor voltage balance control link; U cαα , U cβα , U cαβ , U cββ , U c0α , U c0β , U cα0 , U cβ0 They are the total capacitance voltage of the bridge arm U cxy Obtained after double αβ0 transformation; K1, K2, K3 are known constants.

[0225] In addition to the balanced control of the bridge arm capacitor, due to the inconsistency of parameters such as the switching action time of the submodule, the DC side capacitor value and the internal active power loss, the capacitor voltages of each submodule still have differences. Specifically, there may be inconsistencies in the submodule capacitor voltages between the three-phase bridge arms, and there may also be differences in the capacitor voltages of each submodule inside each bridge arm. In order to achieve the balance of the submodule capacitor voltages between phases and within phases, in one embodiment of the present invention, it is achieved by adjusting the duty cycle of the modulation voltage of each submodule respectively. The submodule capacitor voltage balancing control strategy is consistent with the strategy commonly used in modular multi-level converters.

[0226] In order to further verify the feasibility and effect of the sparse modular multi-level matrix converter topology and control method in the above embodiment, in a specific embodiment of the present invention, based on Figure 1 The sM3C structure shown in the figure uses MATLAB / Simulink software to build an AC-AC frequency conversion system, and simulation verification is carried out on this topology. The simulation parameters are shown in the following table.

[0227]

[0228] Under the working conditions shown in the table above, when the system is running stably, the AC voltage and current waveforms on the input and output sides are both sinusoidal waves, of which the AC phase voltage amplitude is 8.165kV, which is consistent with the set value; the fundamental frequencies of the AC current on the input side and the AC current on the output side are 50Hz and 50 / 3Hz respectively, and the current harmonic distortion rates are 0.25% and 0.80% respectively, and the harmonic components contained are relatively small, such as Fig.12 , Fig.13 shown.

[0229] Fig.14 The waveforms of the bridge arm current (Figure a) and the bridge arm voltage (Figure b) are shown. The spectrum analysis results show that the main frequency components of the bridge arm current and the bridge arm voltage are 50Hz and 50 / 3Hz, which are the same as the theoretical analysis results.

[0230] Fig.15 It is the control result of the double closed-loop vector. From the relevant design links in the above embodiment, it can be seen that the input side outer loop adopts constant voltage control. When the voltage of all bridge arm capacitors is equal to the rated value, U c00 The component will be equal to (2+N' / N) times U c0 , i.e. 57.5kV, in order to obtain the current reference value required for the input side current inner loop control;

[0231] The output side outer loop adopts constant power control, which requires controlling the output side active power to 1MW and reactive power to 0. Fig.15 (a) and (b) show the results of outer loop control, where both the voltage component and the power component are well controlled. Fig.15 (c) and (d) are the dq components of the input side AC current and the output side AC current. The simulation results show that under the action of the current inner loop, both can track the reference value well.

[0232] From the capacitor voltage balance control design process, we can know that U cαα , U cαβ , U cβα , U cββ , U c0α , U c0β , U cα0 , U cβ0These 8 quantities need to be controlled to 0 to achieve capacitor voltage balance. Some results are as follows: Fig.16 shown.

[0233] Fig.17 The figure shows the fluctuation of the capacitor voltage of the seven submodules of the bridge arm Aa. The reference value of each submodule capacitor voltage is 2.5kV. After the bridge arm capacitor voltage balance control and the submodule capacitor voltage balance control, the submodule capacitor voltage always fluctuates around the reference value.

[0234] The above describes the specific embodiments of the present invention. It should be understood that the present invention is not limited to the above specific embodiments, and those skilled in the art can make various modifications or variations within the scope of the claims, which does not affect the essence of the present invention. The above preferred features can be used in any combination without conflicting with each other.

Claims

1. A sparse modular multi-level matrix converter topology, characterized in that: The topology has three-phase symmetry on the input and output sides; From the perspective of the input side, the 9 bridge arms are divided into 3 sub-converters, namely, the A-phase sub-converter including the Aa, Ab, and Ac bridge arms, the B-phase sub-converter including the Ba, Bb, and Bc bridge arms, and the C-phase sub-converter including the Ca, Cb, and Cc bridge arms; From the perspective of the output side, the 9 bridge arms are also divided into 3 sub-converters, namely, the a-phase sub-converter including the Aa, Ba, and Ca bridge arms, the b-phase sub-converter including the Ab, Bb, and Cb bridge arms, and the c-phase sub-converter including the Ac, Bc, and Cc bridge arms; Each phase input side is provided with an equivalent resistance and inductance, each phase output side is provided with an equivalent resistance and inductance, and each bridge arm has a bridge arm resistance and inductance; The number of submodules of the bridge arm of at least one phase converter is less than the number of submodules of the bridge arm of the corresponding phase converter of the conventional M3C.

2. A sparse modular multi-level matrix converter topology according to claim 1, characterized in that: The working principle of the topology is as follows: When the system is running stably, the circulating current of the matrix converter topology is completely suppressed, and the voltage drop caused by the current flowing through the resistor and inductor is ignored. At this time, the voltage and current on the input side and the output side are three-phase symmetrical sinusoidal waves, and the input and output currents are evenly distributed in each phase, that is, they meet the following conditions: u xy =u ix -u oy =U im cos(w i t+θ i )-U om cos(w o t+θ o ) where u ix 、u iy are the input and output side AC voltages respectively; i ix 、i iy are the input and output side AC currents respectively; i xy 、u xy are the current and voltage on the bridge arm xy respectively; U im , U om Respectively represent the amplitude of input and output voltage; I im ,I om Respectively represent the amplitude of input and output current; w i 、w o Represent the angular velocities of the input and output sides respectively; θ i ,θ o Respectively represent the initial phases of input and output voltages; Represent the power factor angles on the input and output sides respectively.

3. A sparse modular multi-level matrix converter topology according to claim 1, characterized in that: The mathematical decoupling model of the topology is specifically: The voltage equation of the topology in the rectangular coordinate system is obtained by Kirchhoff's voltage law: where u ix 、i ix are the input side voltage and current respectively; u oy 、i oy are the output side voltage and current respectively; i xy 、u xy， Where x = A, B, C; y = a, b, c are bridge arm voltage and current respectively; R is , R os , L is , L os are the equivalent resistance and inductance of the input system side and the output system side respectively; R0 and L0 are the resistance and inductance of the bridge arm, u OO’ Respectively represent the neutral point voltage difference between the three-phase voltage on the input side and the three-phase voltage on the output side; The voltage equation of the topology in the rectangular coordinate system is subjected to double αβ0 transformation to obtain the equivalent circuit diagrams of the input, output and circulating sides; wherein the αβ0 transformation coefficient matrix under equal power transformation is: The double αβ0 transformation process is: The voltage equation of the topology in the rectangular coordinate system is applied with the double αβ0 transformation to obtain the voltage equation in the double αβ0 coordinate system: Among them, i αα 、i αβ 、i βα 、i ββ 、i 0α 、i 0β 、i α0 、i β0 、i 00 is the current component of the bridge arm current after double αβ0 transformation; u αα 、u αβ 、u βα 、u ββ 、u 0α 、u 0β 、u α0 、u β0 、u 00 is the voltage component of the bridge arm voltage after double αβ0 transformation; Based on the three-phase symmetry of the input and output sides of the topology, the simplified equation is obtained: Based on the simplified equations, the 8th-order decoupled mathematical equations describing the input side, output side, and circulation side are obtained respectively: the decoupled mathematical equation on the input side is: The decoupling mathematical equation on the output side is: The decoupling mathematical equation on the circulation side is: and 00 =-3u OO' Where L' i , L' o , R i ', R' o The definition is as follows:

4. A design method for a sparse modular multi-level matrix converter topology, characterized in that: The design method aims to retain the conventional M3C functions and performance and reduce costs, and includes the following steps: Setting the AC frequencies on the input side and the output side of the matrix converter to an integer division relationship; Based on the integer frequency division relationship, the utilization rate of the DC voltage is improved and the modulation wave amplitude of each bridge arm is reduced through the control method of phase coordination on both sides; Based on the modulation wave amplitude, it is determined that the number of bridge arm sub-modules is less than the number of bridge arm sub-modules of the conventional M3C.

5. The design method of a sparse modular multi-level matrix converter topology according to claim 4, characterized in that: The control method of phase coordination on both sides is used to improve the utilization rate of the DC voltage, reduce the modulation wave amplitude of each bridge arm, and determine that the number of bridge arm submodules is less than the number of bridge arm submodules of the conventional M3C based on the modulation wave amplitude, including: When the system is running stably, the sparse modular multilevel matrix converter modulation wave u ref , specifically: you ref =m i sin(w i t+θ i )-m o sin(w o t+θ o ) where w i 、w o are the AC frequencies at the input and output sides, θ i ,θ o are the AC frequencies at the input and output sides respectively; m i 、m o are the voltage modulation ratios on the input and output sides of the frequency-divided AC transmission system, m i =U im / NU c , m o =U om / NU c , where N is the number of bridge arm submodules, and Uc is the rated voltage of the submodule capacitor; Based on the three-phase symmetry of the input and output side systems, the phases of the input side AC voltage and the output side AC voltage are defined. Phase A on the input side is wt, phase B is wt-120°, phase C is wt+120°, and phase a on the output side is b phase Phase c is The minimum value of the modulation wave amplitude of each bridge arm is obtained by traversal. For sub-converter A, when the initial phase angle of the output voltage is equal to When the modulation wave amplitudes of the three bridge arms reach the minimum value at the same time; for sub-converter B, when the phase angle is equal to When the modulation wave amplitudes of the three bridge arms reach the minimum value at the same time; for sub-converter C, when the phase angle is equal to When , the modulation wave amplitudes of the three bridge arms reach the minimum value; It is concluded from the traversal process that changing the initial phase angle of the voltage can change the amplitude of the modulation wave of the three-phase sub-converter; Based on the conclusion and the proportional relationship between the modulation wave amplitude and the number of bridge arm submodules, it is determined that reducing the number of bridge arm submodules accordingly can improve the utilization rate of the DC voltage and retain the original conventional M3C functions and performance.

6. A design method for a sparse modular multi-level matrix converter topology according to any one of claims 4-5, characterized in that: The design method is applicable when there is a frequency division relationship between the input and output side systems.

7. A control method for a sparse modular multi-level matrix converter topology, characterized in that: The input side adopts outer loop control of fixed DC capacitor voltage, and the output side adopts outer loop control of fixed active and reactive power. The two outer loop controls provide the required reference value input for the current inner loop control. The outer loop control and the current inner loop control together constitute a double closed-loop vector control; bridge arm capacitor voltage balancing control, circulating current suppression, and sub-module capacitor voltage balancing control are added to the double closed-loop vector control to achieve the balance of capacitor voltage between the bridge arms of each sub-converter.

8. The control method of a sparse modular multi-level matrix converter topology according to claim 7, characterized in that: The mathematical model of the current inner loop control is specifically: Determine the transformation matrix from the αβ0 coordinate system to the dq coordinate system, specifically: where w i 、w o Respectively represent the input and output side AC angular frequencies, Represent the transformation matrices of the input side and the output side respectively; Applying the transformation matrix to the decoupled model in the αβ0 coordinate system and simplifying it yields: where u d0 、u q0 is the αβ axis component of the input side AC voltage after αβ0 / dq transformation; u 0d 、u 0q is the αβ axis component of the output side AC voltage after αβ0 / dq transformation; u id 、u iq is the dq axis component of the input side AC voltage; i id 、i iq is the dq axis component of the input side AC current; u od 、u oq is the dq axis component of the output side AC voltage; i od 、i oq is the dq-axis component of the AC current at the output side; The mathematical model of the input and output sides of the sM3C in the dq coordinate system is obtained by Laplace transformation on both sides of the simplified equation, which is: s is the operation factor in the complex frequency domain after Laplace transform.

9. The control method of a sparse modular multi-level matrix converter topology according to claim 8, characterized in that: The current inner loop control is specifically as follows: where u d0_ref 、u q0_ref It is the reference value output by the inner loop control of the input current; u 0d_ref 、u 0q_ref k is the reference value output by the output current inner loop control; p , k i PI controller parameters used for current inner loop control; i id_ref 、i iq_ref Current reference value provided for input side outer loop control; i od_ref 、i oq_ref Current reference value provided for output side outer loop control; Income d0_ref 、u q0_ref 、u 0d_ref 、u 0q_ref Then transform it back to the αβ0 coordinate system through the inverse αβ0 / dq transformation.

10. The control method of a sparse modular multi-level matrix converter topology according to claim 9, characterized in that: The input side adopts the outer loop control of the fixed DC capacitor voltage, and the output side adopts the outer loop control of the fixed active and reactive power. The two outer loop controls provide the required reference value input for the current inner loop control, including: The relationship between the bridge arm capacitor voltage and the bridge arm power is as follows: Among them U cxy is the sum of the capacitor voltages of all submodules in the xy bridge arm; P xy is the active power on the xy bridge arm; U c0 is the rated value of the submodule capacitor voltage; N is the number of submodules of the bridge arm of the B and C phase subconverters; N' is the number of submodules of the bridge arm of the A phase subconverter; C is the submodule capacitor value; Applying double αβ0 transformation to the relationship between the bridge arm capacitor voltage and the bridge arm power yields: If U cxy =NU c0 or N'U c0 Established, that is, when the voltage of each bridge arm capacitor is controlled, the relationship between the bridge arm capacitor voltage and the bridge arm power after the double αβ0 transformation is changed to: Control U c00 The quantity is (2+N' / N)U c0 , so that the voltage of each bridge arm capacitor is balanced, and P 00 The difference between the active power flowing into and out of the converter: P out As a disturbance term, P in The following relationship is satisfied: where u id 、i id P is the d-axis component of the input side AC voltage and current. in Substitute P 00 get: From this design: From the instantaneous power theory in the dq coordinate system, we can know that the expressions of active and reactive power when the system is running stably are: From the expressions of active and reactive power, it is determined that the control of active power and reactive power can be achieved by controlling the active and reactive components of the system current, that is: The constant power control model is obtained as:

11. The control method of a sparse modular multi-level matrix converter topology according to claim 7, characterized in that: The circulation suppression is directly performed in the αβ0 coordinate system, including: where u αα_ref 、u αβ_ref 、u βα_ref 、u ββ_ref is the output of the circulation suppression control link; i αα_ref 、i αβ_ref 、i βα_ref 、i ββ_ref is the output of the following bridge arm capacitor voltage balance control link; i αα 、i αβ 、i βα 、i ββ is the bridge arm current i xy The current obtained after double αβ0 transformation; Income αα_ref 、u αβ_ref 、u βα_ref 、u ββ_ref Together with the value obtained by the αβ0 / dq inverse transformation of the current inner loop control output, it constitutes the reference value of the bridge arm voltage in the αβ0 coordinate system. After the double αβ0 inverse transformation, the reference value of the bridge arm voltage in the abc coordinate system can be obtained and applied to the generation of the modulation wave signal.

12. The control method of a sparse modular multi-level matrix converter topology according to claim 7, characterized in that: The balanced control of the bridge arm capacitor voltage is achieved by injecting a circulating current that can balance the power of each bridge arm within the sub-converter and between the sub-converters, specifically: where i αα_ref 、i αβ_ref 、i βα_ref 、i ββ_ref is the output of the bridge arm capacitor voltage balance control link; U cαα , U cβα , U cαβ , U cββ , U c0α , U c0β , U cα0 , U cβ0 They are the total capacitance voltage of the bridge arm U cxy Obtained after double αβ0 transformation; K1, K2, K3 are known constants.

13. The control method of a sparse modular multi-level matrix converter topology according to claim 7, characterized in that: The submodule capacitor voltage balancing control is achieved by adjusting the duty cycle of the modulation voltage of each submodule respectively.

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