High-speed optical coupling isolator applied to CAN bus

Abstract

A high-speed optical coupling isolator applied to a CAN bus belongs to the technical field of bus circuit application, and comprises a power supply module, a data input circuit, a first optical coupling isolation circuit, a second optical coupling isolation circuit, a processing circuit, an output circuit and an isolation circuit, the power supply module, the data input circuit, the first optical coupler isolation circuit, the second optical coupler isolation circuit, the processing circuit, the output circuit and the isolation circuit are installed in the element box and are electrically connected. Isolation of the CANBus can be realized by means of a pure hardware circuit, adaptive baud rate communication can be realized, a sequential circuit formed by a logic gate circuit is matched with a high-speed optocoupler for driving and control, equivalently, the same signal isolation transmission effect of capacitance isolation or magnetic coupling isolation is realized by means of the optical communication characteristic of the optocoupler, and meanwhile, the CANBus can be effectively isolated. A sequential circuit formed by a designed special logic gate circuit equivalently realizes a circuit control function in an isolation special chip scheme.

Description

Technical Field

[0001] The present invention relates to the technical field of CAN circuits, and in particular to a high-speed optical coupler isolator applied to a CANbus bus. Background Art

[0002] CANbus is a type of fieldbus technology, commonly used for data exchange between controllers of industrial equipment or automotive products. CANbus has the advantages of fast data transmission, saving wiring harnesses and reducing weight, high reliability, enhanced information integration capabilities, interoperability and interchangeability, reduced wiring costs, improved system stability, and strong anti-interference capabilities. In practical applications, bus technology generally supports multi-device connection. Due to the long communication distance, there will be electrical mismatches between devices connected to the CANbus, causing communication anomalies; the common solution is to electrically isolate the devices that are interfered with, including communication isolation.

[0003] In the prior art, the CANbus isolation technology used is based on a dedicated chip solution (such as ADI's chip) and uses capacitive coupling or magnetic coupling technology inside the chip to isolate communication signals. Although it can achieve the function of electrical isolation of communication signals, in actual applications, if the product is used in a large motor or in a strong magnetic field environment, communication data transmission abnormalities will still occur. Specifically, because capacitive coupling or magnetic coupling is easily interfered by strong electric or magnetic fields, and because the signal conduction principles of the two are the same, it is difficult to completely avoid interference, so its application still has certain limitations. Summary of the invention

[0004] In order to overcome the existing isolation technology for CANbus bus applications, which has the disadvantages as described in the background due to technical limitations, the present invention provides a high-speed optocoupler isolator for CANbus bus applications that isolates the digital signal part of the CANbus bus through a high-speed optocoupler under the joint action of relevant circuits, utilizes the characteristic that the optical communication principle is not disturbed by strong electric fields and strong magnetic fields, and combines a specially designed logic gate timing circuit to solve the defects of the prior art, providing favorable technical support for the reliable transmission of bus data between various devices.

[0005] The technical solution adopted by the present invention to solve its technical problem is: A high-speed optocoupler isolator for CANbus bus application, including a power module, and also having a data input circuit, a first optocoupler isolation circuit, a second optocoupler isolation circuit, a processing circuit, an output circuit, and an isolation circuit; the power module, the data input circuit, the first optocoupler isolation circuit, the second optocoupler isolation circuit, the processing circuit, the output circuit, and the isolation circuit are installed in a component box, and the power output end of the power module is electrically connected to the power input end of the data input circuit, the first optocoupler isolation circuit, the second optocoupler isolation circuit, the processing circuit, the output circuit, and the isolation circuit; the signal input end of the data input circuit and the bus signal output end of the working device are electrically connected. The end is electrically connected, the signal output end of the output circuit is electrically connected to the signal input end of the vehicle central control system; the signal interaction end of the data input circuit is electrically connected to the signal input interaction end of the first optocoupler isolation circuit and the signal input interaction end of the isolation circuit respectively, the signal output interaction end of the first optocoupler isolation circuit and the second optocoupler isolation circuit are electrically connected to the first signal input interaction end of the processing circuit and the output circuit respectively; the signal output interaction end of the processing circuit is electrically connected to the second signal input interaction end of the output circuit respectively; the signal output interaction end of the isolation circuit is electrically connected to the signal input interaction end of the second optocoupler isolation circuit respectively.

[0006] Furthermore, the data input circuit includes electrically connected capacitors, resistors, a CANbus transceiver chip, and a logic OR gate circuit chip; the VCC port and VIO port of the CANbus transceiver chip are connected to one end of the first capacitor, the VCC port of the logic OR gate circuit chip, one end of the second capacitor, and one end of the third capacitor; the other end of the first capacitor is connected to the other end of the second capacitor, the other end of the third capacitor, one end of the resistor, the GND port of the logic OR gate circuit chip, the STB port and the GND port of the CANbus transceiver chip; the Y port of the logic OR gate circuit chip is connected to the TXD port of the CANbus transceiver chip; and the other end of the resistor is connected to the B port of the logic OR gate circuit chip.

[0007] Furthermore, the first optocoupler isolation circuit includes an electrically connected capacitor, a resistor, and a high-speed optocoupler, the + port of the high-speed optocoupler is connected to one end of the first resistor, the other end of the first resistor is connected to one end of the first capacitor, one end of the second capacitor, one end of the second resistor, one end of the third resistor, and the VCC port of the high-speed optocoupler, the Ve port of the high-speed optocoupler U7 is connected to the other end of the second resistor, the VD port of the high-speed optocoupler is connected to the other end of the third resistor, and the GND port of the high-speed optocoupler is connected to the other end of the first capacitor and the other end of the second capacitor.

[0008] Furthermore, the second optocoupler isolation circuit includes an electrically connected capacitor, a resistor, and a high-speed optocoupler, the + port of the high-speed optocoupler is connected to one end of the first resistor, one end of the first capacitor, one end of the second capacitor, one end of the second resistor, one end of the third resistor, and a VCC port of the high-speed optocoupler, the Ve port of the high-speed optocoupler is connected to the other end of the second resistor, the VD port of the high-speed optocoupler is connected to the other end of the third resistor, and the VDD port of the high-speed optocoupler is connected to the other end of the first capacitor and the other end of the second capacitor.

[0009] Furthermore, the isolation circuit includes electrically connected capacitors, resistors, logic OR gate circuit chips, and transistors; the VCC port of the logic OR gate circuit chip is connected to one end of the first capacitor and one end of the first resistor; the other end of the first capacitor is connected to one end of the second capacitor, one end of the third resistor, the emitter of the transistor, and the GND port of the logic OR gate circuit chip; one end of the second resistor is connected to the A port of the logic OR gate circuit chip; the other end of the first resistor is connected to the B port of the logic OR gate circuit chip and the collector of the transistor; the other end of the third resistor is connected to one end of the fourth resistor and the other end of the second capacitor.

[0010] Furthermore, the processing circuit includes electrically connected capacitors, resistors, logic OR gate circuit chips, and transistors, wherein the A port of the logic OR gate circuit chip is connected to one end of the first resistor, the VCC port of the logic OR gate circuit chip is connected to one end of the first resistor and one end of the second resistor, the GND port of the logic OR gate circuit chip is connected to the other end of the first capacitor, one end of the third resistor, the emitter of the transistor, and one end of the second capacitor, the B port of the logic OR gate circuit chip is connected to the other end of the second resistor and the collector of the transistor, and the base of the transistor is connected to the other end of the third resistor, one end of the fourth resistor, and the other end of the second capacitor.

[0011] Furthermore, the output circuit includes electrically connected capacitors, resistors, logic OR gate circuit chips, and a CANbus transceiver chip; the VCC port of the logic OR gate circuit chip is connected to one end of the first capacitor, one end of the second capacitor, the VCC port and VIO port of the CANbus transceiver chip, one end of the second capacitor, and one end of the third capacitor; the other end of the first capacitor is connected to the GND port of the logic OR gate circuit chip, one end of the resistor, the other end of the second capacitor, the other end of the third capacitor, the GND port of the CANbus transceiver chip, and the STB port; the other end of the resistor is connected to the B port of the logic OR gate circuit chip.

[0012] The beneficial effects of the present invention are as follows: the present invention can achieve the isolation of the CANbus bus by relying on pure hardware circuits, and can achieve adaptive baud rate communication. Specifically, the timing circuit composed of logic gate circuits cooperates with high-speed optocouplers for driving and control, which is equivalent to utilizing the optical communication characteristics of optocouplers to achieve the same signal isolation and transmission effect as capacitive isolation or magnetic coupling isolation. At the same time, the timing circuit composed of specially designed logic gate circuits is equivalent to achieving the circuit control function inside the isolation dedicated chip solution. The present invention solves the defects of the prior art and provides favorable technical support for the reliable transmission of bus data between devices. In summary, the present invention has good application prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0014] Figure 1 It is a structural block diagram of the present invention.

[0015] Figure 2 It is a circuit diagram of the present invention. DETAILED DESCRIPTION

[0016] Figure 1 , 2 As shown, a high-speed optocoupler isolator for CANbus bus application includes a power module 1, and also has a data input circuit 2, a first optocoupler isolation circuit 3, a second optocoupler isolation circuit 4, a processing circuit 5 and an output circuit 6, and an isolation circuit 7; the power module 1, the data input circuit 2, the first optocoupler isolation circuit 3, the second optocoupler isolation circuit 4, the processing circuit 5 and the output circuit 6, and the isolation circuit 7 are installed on a circuit board in a component box.

[0017] Figure 1 , 2As shown, the data input circuit includes capacitors C21, C15, C24, a resistor R13, a CANbus transceiver chip U6, and a logic OR gate circuit chip U4 connected via circuit board wiring. Pin 3 of the VCC port and pin 5 of the CANbus transceiver chip U6 are connected to one end of the first capacitor C21, pin 3 of the VCC port of the logic OR gate circuit chip, one end of the second capacitor C15, and one end of the third capacitor C24. The other end of the first capacitor C21 is connected to the other end of the second capacitor C15, the other end of the third capacitor C24, one end of the resistor R13, pin 3 of the GND port of the logic OR gate circuit chip U4, pin 8 of the STB port, and pin 2 of the GND port of the CANbus transceiver chip U6. Pin 4 of the Y port of the logic OR gate circuit chip U4 is connected to pin 1 of the TXD port of the CANbus transceiver chip U6. The other end of the resistor R13 is connected to pin 2 of the B port of the logic OR gate circuit chip U4. The first optocoupler isolation circuit includes C18 and C20, resistors R14, R13, R16, and a high-speed optocoupler U7 connected via circuit board wiring. Pin 2 of the + port of the high-speed optocoupler U7 is connected to one end of the first resistor R13, the other end of the first resistor R13 is connected to one end of the first capacitor C20, one end of the second capacitor C18, one end of the second resistor R14, one end of the third resistor R16, and pin 8 of the VCC port of the high-speed optocoupler U7, pin 7 of the Ve port of the high-speed optocoupler U7 is connected to the other end of the second resistor R14, pin 6 of the VD port of the high-speed optocoupler U7 is connected to the other end of the third resistor R16, and pin 5 of the GND port of the high-speed optocoupler U7 is connected to the other end of the first capacitor C20 and the other end of the second capacitor C18. The second optocoupler isolation circuit includes capacitors C28 and C29, resistors R24, R28, R26, and a high-speed optocoupler U10 connected via circuit board wiring. Pin 2 of the + port of the high-speed optocoupler U10 is connected to one end of the first resistor R24, one end of the first capacitor C29, one end of the second capacitor C28, one end of the second resistor R29, one end of the third resistor R26, and pin 8 of the VCC port of the high-speed optocoupler U10. Pin 7 of the Ve port of the high-speed optocoupler U10 is connected to the other end of the second resistor R29. Pin 6 of the VD port of the high-speed optocoupler U10 is connected to the other end of the third resistor R16. Pin 5 of the GND port of the high-speed optocoupler U10 is connected to the other end of the first capacitor C29 and the other end of the second capacitor C28.

[0018] Figure 1 , 2As shown, the isolation circuit includes capacitors C31 and C27 connected via circuit board wiring, resistors R18, R20, R27, R25, a logic OR gate circuit chip U9, and a transistor Q7. Pin 5 of the VCC port of the logic OR gate circuit chip U9 is connected to one end of the first capacitor side C27 and one end of the first resistor R20, the other end of the first capacitor C27 is connected to one end of the second capacitor C31, one end of the third resistor R27, the emitter of the transistor Q7, and pin 3 of the GND port of the logic OR gate circuit chip U9, one end of the second resistor R18 is connected to pin 1 of the A port of the logic OR gate circuit chip U9, the other end of the first resistor R20 is connected to pin 2 of the B port of the logic OR gate circuit chip U9 and the collector of the transistor Q7, and the other end of the third resistor R27 is connected to one end of the fourth resistor R25 and the other end of the second capacitor C31. The processing circuit includes capacitors C25 and C30 connected via circuit board wiring, resistors R17, R19, R21, and R22, a logic OR gate circuit chip U8, and a transistor Q6. Pin 1 of the A port of the logic OR gate circuit chip U8 is connected to one end of the first resistor R17, pin 5 of the VCC port of the logic OR gate circuit chip U8 is connected to one end of the second resistor R19, pin 3 of the GND port of the logic OR gate circuit chip U8 is connected to the other end of the first capacitor C25, one end of the third resistor R22, the emitter of the transistor Q6, and one end of the second capacitor C30, pin 2 of the B port of the logic OR gate circuit chip U8 is connected to the other end of the second resistor R19 and the collector of the transistor Q4, and the base of the transistor Q4 is connected to the other end of the third resistor R22, one end of the fourth resistor R21, and the other end of the second capacitor C30. The output circuit includes capacitors C14, C19, and C23, a resistor R12, a logic OR gate circuit chip U3, and a CANbus transceiver chip U5 connected via circuit board wiring. Pin 5 of the VCC port of the logic OR gate circuit chip U3 is connected to one end of the first capacitor C14, one end of the second capacitor C19, pin 3 of the VCC port and pin 5 of the VIO port of the CANbus transceiver chip U5, one end of the second capacitor C19, and one end of the third capacitor C23. The other end of the first capacitor C14 is connected to pin 3 of the GND port of the logic OR gate circuit chip U3, one end of the resistor R12, the other end of the second capacitor C19, the other end of the third capacitor C23, pin 2 of the GND port of the CANbus transceiver chip U5, and pin 8 of the STB port. The other end of the resistor R12 is connected to pin 2 of the B port of the logic OR gate circuit chip U3.

[0019] Figure 1 , 2As shown, the power output end of the power module and the two ends of the power input end capacitor C15 of the data input circuit, the two ends of the power input end capacitor C18 of the first optocoupler isolation circuit, the two ends of the power input end capacitor C28 of the second optocoupler isolation circuit, the two ends of the power input end capacitor C25 of the processing circuit, the two ends of the power input end capacitor C14 of the output circuit, and the two ends of the power input end capacitor C27 of the isolation circuit are connected via wires. Pin 1 of the logic OR gate circuit chip U4 and the other end of the resistor R16, the other end of the resistor R25, and the 6th pin of the high-speed optocoupler U7 are connected via wires. Pin 4 of the CANbus transceiver chip U5 and the other end of the resistor R17 are connected via wires. Pin 3 of the high-speed optocoupler U7 and the 4th pin of the logic OR gate circuit chip U4 are connected via wires, and pin 6 of the high-speed optocoupler U10 and the other end of the resistor R21 and the 1st pin of the logic OR gate circuit chip U3 are connected via wires. The signal input end of the data input circuit, the 6th and 7th pins of the CANbus transceiver chip U6, are connected to the bus signal output end of the working equipment of the previous process (such as the temperature sensor on the vehicle, etc.) through a data line, and the signal output end of the output circuit, the 7th pins of the CANbus transceiver chip U5, are connected to the signal input end of the vehicle's central control system through a data line.

[0020] Figure 1 , 2As shown, the power output end of the power module outputs a stable DC 5V power supply and enters the power input end of the data input circuit, the first optocoupler isolation circuit, the second optocoupler isolation circuit, the processing circuit, the output circuit, and the isolation circuit, and then the above power supply is powered on. The working principle of the circuit of the present invention is as follows. After the CANbus bus signal output by the working equipment of the previous process enters the 6th and 7th pins of the CANbus transceiver chip U6 chip, the CANbus transceiver chip U6 converts the signal received from the bus into a TTL level, and outputs it from its 4th pin to the 1st pin of the logic or gate circuit chip U9. At the same time, the 2nd pin of the logic or gate circuit chip U9 receives the level signal of the collector of the inverter Q7. This signal comes from the 6th pin output of the high-speed optocoupler U7, and the 6th pin level of the high-speed optocoupler U7 is logically opposite. The 6th pin output signal of the high-speed optocoupler U7 is connected here because the sending signal of the CANbus bus needs to be fed back to the receiving end, that is, to perform logic arbitration inside the CANbus transceiver chip U5. If the arbitration passes, this bit of data is valid. If the arbitration fails, this bit of data is invalid. The output signal of the logic OR gate circuit chip U9 is output to the 3rd pin of the high-speed optocoupler U10 through the 4th pin. In order to make the electrical logic of the two sides of the high-speed optocoupler U10 consistent, a 5V pull-up power supply is connected to the 2nd pin of the high-speed optocoupler U10 for power supply. After processing, the signal is coupled by the photoelectric signal of the high-speed optocoupler U10, and the digital signals on both sides (the output signal level of the 4th pin of the U9 chip and the input signal level of the 1st pin of the U3 chip) are electrically isolated. The level signal output by the 6th pin of the high-speed optocoupler U10 is sent to the 1st pin of the logic OR gate circuit chip U3, and the 2nd pin of the logic OR gate circuit chip U3 is directly grounded. The 2nd pin is grounded because the pin is not required to participate in the logic operation. The data output by the 4th pin of the logic OR gate circuit chip U3 directly enters the 1st pin of the CANbus transceiver chip U5 as an input signal. The CANbus transceiver chip U5 will convert the level signal of the 1st pin into a specific electrical signal that conforms to the CANbus bus (output CANbus bus differential signal, which is shown in the 7th pin of the U5 chip as the CANH signal and the 6th pin as the CANL signal). At this time, the signal is received by the CANbus transceiver chip U6, and then passes through the logic OR gate circuit chip U8 and the inverter Q8, the operation and isolation of the high-speed optocoupler U7, and then output to the signal input terminal of the CANbus transceiver chip U5 through the logic OR gate circuit chip U3, completing the isolation and transmission of the CANbus bus signal.Similarly, when the signal is transmitted from one side to the other, it also goes through the same calculation and isolation process as mentioned above; specifically, pins 6 and 7 of the CANbus transceiver chip U5 receive signals from the CANbus bus, convert them into TTL level signals, output them from pin 4 of U5, and connect to pin 1A of the logic OR gate chip U8. At the same time, pin 2B of U8 is connected to the collector of the inverter Q6. The U8 chip calculates the input signals A and B, and outputs them to pin 3 of the high-speed optocoupler U7 through pin 4 Y. After optical isolation of U7, it is output from its pin 6 to pin 1 of the U4 chip. Pins 1 and 2 of the logic OR gate chip U4 calculate, and output signals to pin 1 of the U6 chip through pin 4 Y. The CANbus transceiver U6 converts the signal received at its pin 1 into CANH and CANL signals that meet the characteristics of the CANbus bus. Figure 2 Among them, capacitors C14, C15, C18, C19, C20, C21, C23, C24, C25, C27, C28, and C29 mainly play the role of power supply filtering. The logic or gate circuit chips U3, U4, U8, and U9 are used to perform logic or operation on the signals input from the A and B pins, and then output them through the Y pin. Resistors R12, R13, R22, and R27 play a pull-down role. Resistors R17, R18, R21, R25, R15, and R24 play a current limiting role. Resistors R14, R16, R19, R20, R23, and R26 play a pull-up role. The CANbus transceiver chips U5 and U6 are mainly used to convert the digital signals of the CAN controller into specific level signals on the CANbus bus. The high-speed optocouplers U7 and U10 are used to perform photoelectric isolation on digital signals, and the maximum conversion speed can reach 10M. The role of transistors Q6 and Q7 is to reverse the input signal level. The role of capacitors C30 and C31 is filtering. Through the above, the present invention can rely on pure hardware circuits to achieve the isolation of the CANbus bus, and can achieve adaptive baud rate communication. Specifically, the timing circuit composed of logic gate circuits cooperates with high-speed optocouplers for driving and control, which is equivalent to utilizing the optical communication characteristics of optocouplers to achieve the same signal isolation transmission effect of capacitive isolation or magnetic coupling isolation. At the same time, the timing circuit composed of specially designed logic gate circuits is equivalent to realizing the circuit control function inside the isolation dedicated chip solution. The present invention solves the defects of the prior art and provides favorable technical support for the reliable transmission of bus data between various devices.

[0021] It should be noted that although the above content has shown and described an embodiment of the present invention, the implementation method does not only include an independent technical solution. This narrative method of the specification is only for the sake of clarity. For ordinary technicians in this field, it can be understood that various changes, modifications, substitutions and modifications can be made to these embodiments without departing from the principle and spirit of the present invention to form other implementation methods that can be understood by those skilled in the art. Therefore, the scope of protection of the present invention is defined by the attached claims and their equivalents.

Claims

1. A high-speed optocoupler isolator for CANbus bus application, including a power module, characterized in that: It also has a data input circuit, a first optocoupler isolation circuit, a second optocoupler isolation circuit, a processing circuit, an output circuit, and an isolation circuit; the power module, the data input circuit, the first optocoupler isolation circuit, the second optocoupler isolation circuit, the processing circuit, the output circuit, and the isolation circuit are installed in a component box, and the power output end of the power module is electrically connected to the power input end of the data input circuit, the first optocoupler isolation circuit, the second optocoupler isolation circuit, the processing circuit, the output circuit, and the isolation circuit; the signal input end of the data input circuit is electrically connected to the bus signal output end of the working equipment, and the signal output end of the output circuit is electrically connected to the signal input end of the vehicle central control system; the signal interaction end of the data input circuit is electrically connected to the signal input interaction end of the first optocoupler isolation circuit and the signal input interaction end of the isolation circuit, respectively, and the signal output interaction ends of the first optocoupler isolation circuit and the second optocoupler isolation circuit are electrically connected to the first signal input interaction end of the processing circuit and the output circuit respectively; the signal output interaction end of the processing circuit is electrically connected to the second signal input interaction end of the output circuit respectively; the signal output interaction end of the isolation circuit is electrically connected to the signal input interaction end of the second optocoupler isolation circuit respectively.

2. A high-speed optocoupler isolator for CANbus application according to claim 1, characterized in that: The data input circuit includes an electrically connected capacitor, a resistor, a CANbus transceiver chip, and a logic OR gate circuit chip. The VCC port and VIO port of the CANbus transceiver chip are connected to one end of the first capacitor, the VCC port of the logic OR gate circuit chip, one end of the second capacitor, and one end of the third capacitor. The other end of the first capacitor is connected to the other end of the second capacitor, the other end of the third capacitor, one end of the resistor, the GND port of the logic OR gate circuit chip, the STB port and the GND port of the CANbus transceiver chip. The Y port of the logic OR gate circuit chip is connected to the TXD port of the CANbus transceiver chip. The other end of the resistor is connected to the B port of the logic OR gate circuit chip.

3. The high-speed optocoupler isolator for CANbus application according to claim 1, characterized in that: The first optocoupler isolation circuit includes an electrically connected capacitor, a resistor, and a high-speed optocoupler, the + port of the high-speed optocoupler is connected to one end of the first resistor, the other end of the first resistor is connected to one end of the first capacitor, one end of the second capacitor, one end of the second resistor, one end of the third resistor, and the VCC port of the high-speed optocoupler, the Ve port of the high-speed optocoupler U7 is connected to the other end of the second resistor, the VD port of the high-speed optocoupler is connected to the other end of the third resistor, and the GND port of the high-speed optocoupler is connected to the other end of the first capacitor and the other end of the second capacitor.

4. The high-speed optocoupler isolator for CANbus application according to claim 1, characterized in that: The second optocoupler isolation circuit includes an electrically connected capacitor, a resistor, and a high-speed optocoupler. The + port of the high-speed optocoupler is connected to one end of the first resistor, one end of the first capacitor, one end of the second capacitor, one end of the second resistor, one end of the third resistor, and the VCC port of the high-speed optocoupler. The Ve port of the high-speed optocoupler is connected to the other end of the second resistor. The VD port of the high-speed optocoupler is connected to the other end of the third resistor. The VDD port of the high-speed optocoupler is connected to the other end of the first capacitor and the other end of the second capacitor.

5. The high-speed optocoupler isolator for CANbus application according to claim 1, characterized in that: The isolation circuit includes an electrically connected capacitor, a resistor, a logic OR gate circuit chip, and a transistor. The VCC port of the logic OR gate circuit chip is connected to one end of the first capacitor and one end of the first resistor. The other end of the first capacitor is connected to one end of the second capacitor, one end of the third resistor, the emitter of the transistor, and the GND port of the logic OR gate circuit chip. One end of the second resistor is connected to the A port of the logic OR gate circuit chip. The other end of the first resistor is connected to the B port of the logic OR gate circuit chip and the collector of the transistor. The other end of the third resistor is connected to one end of the fourth resistor and the other end of the second capacitor.

6. The high-speed optocoupler isolator for CANbus application according to claim 1, characterized in that: The processing circuit includes an electrically connected capacitor, a resistor, a logic OR gate circuit chip, and a transistor. The A port of the logic OR gate circuit chip is connected to one end of the first resistor, the VCC port of the logic OR gate circuit chip is connected to one end of the first resistor and one end of the second resistor, the GND port of the logic OR gate circuit chip is connected to the other end of the first capacitor, one end of the third resistor, the emitter of the transistor, and one end of the second capacitor, the B port of the logic OR gate circuit chip is connected to the other end of the second resistor and the collector of the transistor, and the base of the transistor is connected to the other end of the third resistor, one end of the fourth resistor, and the other end of the second capacitor.

7. The high-speed optocoupler isolator for CANbus application according to claim 1, characterized in that: The output circuit includes an electrically connected capacitor, a resistor, a logic OR gate circuit chip, and a CANbus transceiver chip. The VCC port of the logic OR gate circuit chip is connected to one end of the first capacitor, one end of the second capacitor, the VCC port and VIO port of the CANbus transceiver chip, one end of the second capacitor, and one end of the third capacitor. The other end of the first capacitor is connected to the GND port of the logic OR gate circuit chip, one end of the resistor, the other end of the second capacitor, the other end of the third capacitor, the GND port of the CANbus transceiver chip, and the STB port. The other end of the resistor is connected to the B port of the logic OR gate circuit chip.

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