Signal digitization methods, devices, computer storage media, and digital PET systems

Abstract

The present application discloses a signal digitization method, device, computer storage medium and digital PET system. The signal digitization method includes: generating counting step signals in multiple channels respectively, the waveform of the counting step signals is shown as the amplitude increasing in a step-by-step manner with the number of microelements of the photoelectric conversion device being excited; delaying the counting step signal in at least one channel; sampling the counting step signals in sequence, determining the time series corresponding to each state change in the counting step signal; restoring the counting step signal according to the time series. The present application can directly and accurately record the time series of incident photon excitation, realize direct digitization of incident photons and read them out in the form of digital signals, preserve the original information of the incident photon sequence to the greatest extent, save additional external digitization devices, and improve system performance while further reducing costs.

Description

Technical Field

[0001] The present invention relates to the field of medical imaging technology, and in particular to a signal digitization method, device, computer storage medium and digital PET system. Background Art

[0002] In the traditional PET (Positron emission tomography) digitization process, PMT (Photomultiplier tube) is used to convert the visible light signal converted by the scintillation crystal into an analog electrical signal, and then the signal is filtered, shaped, amplified, integrated and coincidentally processed through a matching logic circuit, and the coincidence event is further sent to the computer in a digital form for image reconstruction.

[0003] Compared with traditional PET, digital PET technology uses more efficient SiPM (Silicon photomultiplier) for photoelectric conversion, and adopts multi-voltage threshold sampling (MVT) method to digitize the signal directly at the source of pulse sampling, and then uses software algorithms to replace traditional analog circuits to extract information and reconstruct images. Figure 1 As shown, since the scintillation pulse signal in PET often has a relatively fast rising edge and a relatively slow falling edge, in the MVT sampling method, the time information of the input scintillation pulse waveform crossing the set threshold is usually obtained through TDC (Time to digital converter). One TDC in each channel is used to convert the time (T1, T2, T3, T4) when the scintillation pulse crosses the corresponding threshold (V1, V2, V3, V4) on the rising edge, and the other TDC is used to convert the time (T5, T6, T7, T8) when the scintillation pulse is lower than the threshold on the falling edge, so as to reconstruct the waveform information of the scintillation pulse according to the corresponding voltage-time pairs (V1, T1), (V2, T2), (V3, T3), (V4, T4), (V4, T5), (V3, T6), (V2, T7), (V1, T8).

[0004] In the existing digital PET technology, SiPM is a photodetector based on integrated circuits, which includes an array of several single photon avalanche diodes (also known as Micro Cells, MCs) and corresponding auxiliary circuits, where each MC is a photoelectric sensing pixel. SiPM uses a bias voltage to make the MC work in Geiger mode. The state of each MC is only 1 or 0, which is essentially a digital signal. However, in actual operation, the binary signals of hundreds to thousands of MCs are accumulated to form an analog scintillation pulse signal output, and the final signal is digitized by the MVT method outside the SiPM. This process cannot recover the time series of incident photons from the scintillation signal, resulting in the physical limit of system performance being difficult to break through; on the other hand, the electronic components used in the digital circuit supporting the MVT method are still relatively large, and there is still room for further optimization. The overall processing efficiency, system power consumption and cost of the system still have room for improvement. Summary of the invention

[0005] Based on this, it is necessary to provide a signal digitization method, device, computer storage medium and digital PET system to address at least one technical problem existing in the traditional solution.

[0006] According to the first aspect of the present application, a signal digitization method is provided, comprising: generating counting step signals in multiple channels respectively, wherein the waveform of the counting step signals exhibits an amplitude that increases in a step-like manner with the number of microelements of the excited photoelectric conversion device; delaying the counting step signal in at least one of the channels; sampling the counting step signals in sequence to determine the time series corresponding to each state change in the counting step signal; and restoring the counting step signal according to the time series.

[0007] According to an embodiment of the present application, generating a counting step signal includes: outputting a unit step signal when an impulse response signal meets a trigger condition; and generating a counting step signal based on the unit step signal.

[0008] According to one embodiment of the present application, when the pulse response signal meets the trigger condition, outputting a unit step signal includes: comparing the pulse response signal with a trigger threshold; and in response to the comparison result that the pulse response signal is not less than the trigger threshold, outputting a unit step signal.

[0009] According to one embodiment of the present application, the unit step signal maintains a 0 output state when the microelement of the photoelectric conversion device is not excited, and when the microelement is excited, the amplitude of the unit step signal rises by one unit and maintains the amplitude.

[0010] According to one embodiment of the present application, the trigger condition includes: presetting a voltage, and when the pulse response signal is greater than the preset voltage, it is determined that the trigger condition is met, and the unit step signal is output; or presetting a waveform feature, and when the waveform feature of the pulse response signal meets the preset waveform feature, it is determined that the trigger condition is met, and the unit step signal is output.

[0011] According to an embodiment of the present application, the preset waveform characteristics include: the maximum voltage of the waveform reaches a preset voltage threshold, the current amplitude of the waveform reaches a preset current threshold, or the accumulated voltage of the waveform reaches a preset amplitude.

[0012] According to an embodiment of the present application, generating a counting step signal based on the unit step signal includes: performing addition processing on the unit step signal to generate the counting step signal.

[0013] According to one embodiment of the present application, the unit step signal is summed, including: a plurality of the unit step signals are summed up through an in-phase proportional addition circuit and then output to generate the counting step signal; or the unit step signals corresponding to different rows and columns are respectively summed up through an addition circuit and then output to generate the counting step signal; or corresponding delays are set for each unit step signal, and then summed up to form the counting step signal.

[0014] According to one embodiment of the present application, when the microelement of the photoelectric conversion device is not excited, the amplitude of the counting step signal remains at 0; when one of the microelement is excited, the amplitude of the counting step signal rises by one unit and maintains the amplitude; when n of the microelement are excited, the amplitude of the counting step signal rises by n units and maintains the amplitude, where n is a positive integer.

[0015] According to one embodiment of the present application, delaying the counting step signal in at least one of the channels includes: synchronously receiving the counting step signals in multiple channels; comparing the initial time of each counting step signal, and outputting the counting step signals with the same initial time after delay.

[0016] According to an embodiment of the present application, delaying the counting step signal in at least one of the channels includes: setting a plurality of delay channels; and outputting the counting step signal in each of the channels after delaying.

[0017] According to one embodiment of the present application, delaying the counting step signal in at least one of the channels includes: synchronously receiving the counting step signals in multiple channels; outputting the counting step signals in multiple channels after delay; comparing the initial time of the counting step signals in each of the channels, and selecting and outputting the counting step signals in the order of the initial time.

[0018] According to one embodiment of the present application, the counting step signal is sampled in sequence to determine the time series corresponding to each state change in the counting step signal, including: recording the time point and the number of jumps when the amplitude in the counting step signal jumps; and forming a time series with the time point information of the jump according to the number of jumps.

[0019] According to an embodiment of the present application, the time series includes: time point information corresponding to each jump of the counting step signal, jump count information formed by statistics of all time point information, and source physical address information corresponding to each counting step signal.

[0020] According to an embodiment of the present application, restoring the counting step signal according to the time series includes: determining a physical model corresponding to the counting step signal; and restoring the counting step signal according to the physical model and the time series.

[0021] According to an embodiment of the present application, after restoring the counting step signal according to the time series, the signal digitization method further includes: outputting a reset signal to clear the pulse response signal.

[0022] According to a second aspect of the present application, a signal digitization device is provided, comprising: a counting step signal generating unit, the counting step signal generating unit being configured to generate a counting step signal, the waveform of the counting step signal showing an amplitude that increases in a step-like manner with the number of microelements of the photoelectric conversion device being excited; a delay unit, the delay unit being configured to delay the counting step signal in at least one channel so that each counting step signal is output at a staggered peak; a sampling unit, the sampling unit being configured to sample the counting step signal and determine a time series corresponding to each state change in the counting step signal; and a reconstruction unit, the reconstruction unit being configured to restore the counting step signal according to the time series.

[0023] According to one embodiment of the present application, the counting step signal generating unit includes: multiple detection modules, used to generate a pulse response signal when a photon is detected, and output a unit step signal when the pulse response signal reaches a trigger condition; a signal processing module, respectively connected to the multiple detection modules, for generating a counting step signal based on the unit step signal.

[0024] According to one embodiment of the present application, the detection module includes: a photon detection submodule, which is used to generate a pulse response signal when a photon is detected; a threshold comparison submodule, which is connected to the photon detection submodule and is used to output the unit step signal when the pulse response signal reaches a trigger condition.

[0025] According to one embodiment of the present application, the trigger condition includes: presetting a voltage, and when the pulse response signal is greater than the preset voltage, it is determined that the trigger condition is met, and the unit step signal is output; or presetting a waveform feature, and when the waveform feature of the pulse response signal meets the preset waveform feature, it is determined that the trigger condition is met, and the unit step signal is output.

[0026] According to an embodiment of the present application, the preset waveform characteristics include: the maximum voltage reaches a preset voltage threshold, the current amplitude reaches a preset current threshold, or the accumulated voltage reaches a preset amplitude.

[0027] According to one embodiment of the present application, the photon detection submodule includes: a single-photon avalanche diode, the cathode of which is connected to an external reverse bias voltage; a quenching tube, the drain of which is connected to the anode of the single-photon avalanche diode, the source of which is grounded, and the gate of which is connected to an external DC voltage.

[0028] According to an embodiment of the present application, the signal processing module includes: an in-phase proportional addition circuit, which is respectively connected to the plurality of detection modules and is used to perform addition processing on the unit step signal to generate the counting step signal.

[0029] According to an embodiment of the present application, the plurality of detection modules are respectively connected to the signal input end of the in-phase proportional addition circuit through corresponding input resistors, wherein the resistance value of each input resistor is the same.

[0030] According to one embodiment of the present application, the in-phase proportional addition circuit includes an operational amplifier, a feedback resistor and a grounding resistor, wherein the output end of each detection module is connected to the input resistor one-to-one and connected to the positive input end of the operational amplifier, one end of the feedback resistor is connected to the positive input end of the operational amplifier, the other end of the feedback resistor is connected to the output end of the operational amplifier, and the negative input end of the operational amplifier is grounded through the grounding resistor.

[0031] According to one embodiment of the present application, the delay unit includes: a first storage module, configured to receive and store counting step signals, and sort them according to the start time information of each counting step signal; a delay module, configured to delay and output corresponding overlapping counting step signals.

[0032] According to one embodiment of the present application, the delay unit includes: a first storage module, configured to receive and store counting step signals, and sort them according to the start time information of each counting step signal; a delay module, configured to delay and output the corresponding overlapping counting step signals; and a control module, which is connected to multiple delay modules and configured to select and output the time series in multiple channels in batches.

[0033] According to an embodiment of the present application, the delay unit includes: a delay module configured to delay the counting step signals in different channels and then output them according to a preset time interval.

[0034] According to one embodiment of the present application, the sampling unit includes a TDC and a second storage module, the TDC is configured to record the time information of each jump in the amplitude of the counting step signal, and the second storage module is configured to match the time information and the corresponding channel number / address information, store and output it.

[0035] According to an embodiment of the present application, the signal digitization device further includes: a reset module, configured to output a reset signal to clear the pulse response signal.

[0036] According to one embodiment of the present application, the reconstruction unit includes: a modeling module, used to determine the physical model corresponding to the counting step signal; a data processing module, connected to the modeling module, configured to perform signal recovery processing on the time series based on the physical model to restore the counting step signal.

[0037] According to an embodiment of the present application, the reconstruction unit further includes: a data conversion module, connected to the data processing module, and configured to convert the counting step signal into unit time counting information.

[0038] According to a third aspect of the present application, there is provided a computer storage medium on which a computer program is stored, and when the computer program is executed by a processor, the steps of the signal digitization method as described in any one of the above are implemented.

[0039] According to a fourth aspect of the present application, a computer program product is provided, comprising a computer program or instructions, wherein when the computer program or instructions are executed by a processor, the steps of the signal digitization method as described in any one of the above are implemented.

[0040] According to a fifth aspect of the present application, a digital PET system is provided, comprising a signal digitization device as described in any one of the above items.

[0041] The signal digitization method, device, computer storage medium and digital PET system provided by the present application replace the analog output scintillation pulse signal in the prior art with a counting step signal, and output the counting step signal in a staggered and orderly manner through a delay unit, so that the incident photon sequence can be sampled directly and accurately, and the time series of incident photon excitation can be recorded, so that the incident photons can be directly digitized and read out in the form of digital signals, thereby preserving the original information of the incident photon sequence to the greatest extent, avoiding the complex process of integrating the signal output by the microelement into an analog scintillation pulse signal output and then sampling it, saving additional external digitization devices, and improving system performance while further reducing costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the implementation methods of this specification or the technical solutions in the prior art, the drawings required for use in the implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some implementation methods recorded in this specification. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0043] Figure 1 A schematic diagram of digitizing a scintillation pulse signal in the prior art;

[0044] Figure 2 This is a flow chart of a signal digitization method in one of the embodiments of the present application;

[0045] Figure 3 A schematic diagram of a flow chart of generating a counting step signal in one embodiment of the present application;

[0046] Figure 4 This is a schematic diagram of a unit step signal in one of the embodiments of the present application;

[0047] Figure 5 This is a schematic diagram of a process for delaying a signal in one embodiment of the present application;

[0048] Figure 6 This is a schematic diagram of a flow chart of delaying a signal in another embodiment of the present application;

[0049] Figure 7 This is a schematic diagram of a flow chart of delaying a signal in another embodiment of the present application;

[0050] Figure 8 This is a schematic diagram of the process of collecting and forming a time series in one of the embodiments of the present application;

[0051] Fig. 9 This is a schematic diagram of a process for restoring a counting step signal in one embodiment of the present application;

[0052] Fig.10 This is a schematic diagram of the structure of a signal digitization device in one of the embodiments of the present application;

[0053] Fig.11 This is a schematic diagram of the structure of a photoelectric conversion device in a signal digitization device in one of the embodiments of the present application;

[0054] Fig.12 Based on Figure 8 A schematic diagram of the structure of a signal processing module in a signal digitizing device;

[0055] Fig.13 This is a schematic diagram of the structure of a delay unit of a signal digitization device in one of the embodiments of the present application;

[0056] Fig.14 Based on Fig.13 A schematic structural diagram of a delay unit of a signal digitization device according to an embodiment;

[0057] Fig.15 This is a schematic diagram of the structure of a delay unit of a signal digitization device in another embodiment of the present application;

[0058] Fig.16 This is a structural schematic diagram of a delay unit of a signal digitization device in another embodiment of the present application;

[0059] Fig.17 This is a schematic diagram of the structure of a reconstruction unit of a signal digitization device in one embodiment of the present application;

[0060] Fig.18 A schematic diagram of a digitization system for implementing a signal digitization method in another embodiment of the present application;

[0061] Fig.19 This is a diagram of the internal structure of a computer device in one of the embodiments of the present application. DETAILED DESCRIPTION

[0062] In order to make the above-mentioned purposes, features and advantages of the present application more understandable, the specific implementation methods of the present application are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific embodiments disclosed below.

[0063] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly fixed to the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. "Substantially equal" or "substantially equal" as used herein means that the difference between the two is within an error range that is considered equivalent in the art. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only.

[0064] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing specific embodiments and are not intended to limit this application. The terms "and / or" or "and / or" used herein include any and all combinations of one or more of the related listed items.

[0065] In the existing digital PET technology, SiPM with better photoelectric conversion performance is usually used as the photoelectric conversion device. SiPM uses the method of applying bias voltage to make each microelement work in Geiger mode. In actual operation, the binary signals generated by hundreds to thousands of microelements are accumulated to form an analog scintillation pulse signal output, and then the SiPM signal is digitized and reconstructed by devices / instruments other than SiPM, such as ADC (Analog-to-digital converter) sampling circuit, multiple voltage threshold (Multiple Voltage Threshold, MVT) acquisition card / chip, so as to extract the charge amount and arrival time information of the original SiPM signal, which is used to infer the total number and arrival time of the incident photons. However, the existing technology essentially treats the binary signal (microelement has only two states of 0 and 1) in the microelement as an analog signal, adds it, and then digitizes it. The digital-analog-digital conversion process will cause the original information of the incident photon sequence to be lost, and the incident photon time series cannot be recovered from the analog SiPM signal. In addition, the binary signals of hundreds to thousands of MCs are accumulated to form an analog signal output, which requires a series of analog signal processing circuits and analog-to-digital conversion circuits outside the SiPM to complete the digitization and reconstruction of the final signal. The circuit is still relatively complex, making it difficult to further reduce power consumption and volume, and making it difficult to further improve system performance.

[0066] In response to the technical problems existing in the prior art, the present application proposes a signal digitization method, device and supporting applications that can at least further improve system performance.

[0067] In some embodiments, the signal digitization method can be performed by a signal digitization device. For example, the signal digitization method can be partially or completely stored in a storage device (such as a built-in storage module of the detection device or an external storage device) in the form of a program or instruction, and the program or instruction can implement the signal digitization method when it is executed. The signal digitization device disclosed in the present application for implementing the above-mentioned signal digitization method can be a device with a large amount of computing resources (for example, a computer, a server, cloud computing, etc.), or a device with limited computing resources (for example, an FPGA (Field Programmable Gate Array) chip board, an ASIC (Application-Specific Integrated Circuit) chip board, and other hardware circuits).

[0068] Some preferred embodiments of the present application are described below with reference to the accompanying drawings. It should be noted that the following description is for illustrative purposes and is not intended to limit the scope of protection of the present application.

[0069] Figure 2 This is a flowchart of a signal digitization method in one embodiment of the present application. In one embodiment, the signal digitization method 200 may include the following steps 210 to 270.

[0070] Step 210: Multiple channels generate counting step signals respectively, and the waveform of the counting step signal shows that the amplitude increases in a step-like manner along with the number of micro-elements of the photoelectric conversion device being excited.

[0071] Typically, a counting step signal is generated by a silicon photomultiplier (SiPM). The SiPM includes multiple microelements, each of which can be excited in response to an incident high-energy photon and output a unit step signal. For example, the SiPM can include an array of several single photon avalanche diodes (Single Photon Avalanche Diode) or avalanche diodes (APD) and corresponding auxiliary circuits. At this time, each single photon avalanche diode or avalanche diode and its corresponding electronic components form a microelement. How to generate a counting step signal through the unit step signal output by many microelements of the SiPM will be further explained below in conjunction with the circuit structure in the device embodiment, and will not be repeated here.

[0072] The waveform of the counting step signal shows that the amplitude increases in a step-by-step manner with the number of microelements of the excited photoelectric conversion device. For example, when the microelement is not excited, it always maintains a 0 voltage output state; when a microelement is excited, the amplitude of the counting step signal rises by one unit and maintains the amplitude. For example, the voltage amplitude rises by one unit is 4mV, and the amplitude of the counting step signal is equal to the amplitude of the unit step signal. When n microelements are excited, the amplitude of the counting step signal rises by n units and maintains the amplitude. In other words, at a certain time t, the total amplitude of the counting step signal divided by the amplitude of the unit step signal represents the total number of microelements excited in the SiPM as of time t.

[0073] In this embodiment, the counting step signal includes the number information of the excited micro-elements, or includes the number information of the generated unit step signals, and different statistical methods can be used to obtain the counting step signal based on the unit step signal. For example, a counter can be used to count the received counting step signals to obtain the number of unit step signals, or the amplitude of the received counting step signal can be converted to obtain the number of unit step signals.

[0074] Step 230: Delay the count step signal in at least one channel.

[0075] Since the waveform of the counting step signal shows a step-like increase, and there may be multiple microelements in the same detector that generate pulse responses, there will be a certain amount of time overlap when the counting step signal is output. When multiple channels output counting step signals at the same time, it will cause signal superposition and identification difficulties. In order to accurately identify and collect all counting step signals, delay processing is performed on the counting step signals in one or more channels so that the output times of each counting step signal are staggered, thereby avoiding erroneous counting or sampling. As an example, the time difference or time interval corresponding to each counting step signal can be obtained through a delay module, and then the time difference or time interval can be superimposed on the counting step signal, so that the relative output time of the counting step signal in each channel is postponed by different time differences, thereby achieving the purpose of staggering each counting step signal. For a specific description of setting the time difference, please refer to the present application. Figure 5-Figure 7 as well as Figure 13-Figure 15 The description of part will not be repeated here.

[0076] In some embodiments, performing delay processing on at least one count step signal refers to performing delay processing on one channel, a part of the channels, all the channels, or a part of the count step signals in several channels, for example, performing delay processing on the remaining count step signals except the first channel, or at least one of the count step signals generated at the same time, so that the remaining count step signals or at least one of the remaining count step signals are staggered with the first count step signal. The staggering means that the starting jump time points of the count step signals are spaced apart so that they can be identified and accurately sampled by the sampling unit.

[0077] Step 250: Sample each counting step signal in sequence to determine the time series corresponding to each state change in the counting step signal.

[0078] Since the counting step signal is formed by multiple unit step signals, the waveform shows that as the number of unit step signals increases, the amplitude of the waveform corresponding to each jump increases by one unit amplitude, and the waveform is stepped as a whole. Therefore, unlike the flicker pulse with a relatively fast rising edge and a slow falling edge in the prior art, the counting step signal has a clear amplitude jump point, and the time information of the signal amplitude jump can be recorded by a time-to-digital converter (TDC), and then the time information corresponding to each jump point is output in the form of a time series. For example, a certain counting step signal contains 9 jumps in total, and the amplitude of each jump is a unit amplitude, such as 3mV, but the time corresponding to each jump can be evenly distributed or not evenly distributed, for example, the time corresponding to the 9 jumps is 10ps, 25ps, 35ps, 45ps, 60ps, 80ps, 90ps, 110ps and 120ps, respectively. When the counting step signal is sampled, the output time series is the time information sequence corresponding to each jump.

[0079] Step 270: Restore the counting step signal information according to the time series.

[0080] In the present application, for different types of high-energy photons, such as gamma photons or neutrons, the amplitudes of unit step signals generated by different types of microelements in SiPM may be different. For example, for gamma photons, the amplitude of the unit step signal may be 3mV, and for neutrons, the amplitude of the unit step signal may be 5mV. The specific amplitude can be determined based on preliminary experiments. What technical personnel in this field need to understand is that once the corresponding parameters such as the type of high-energy photons, SiPM production process, material, and microelement quenching type are determined, the amplitude of the unit step signal generated after a single microelement is excited is fixed accordingly, and will not be repeated here.

[0081] After the amplitude of the unit step signal is determined based on experiments and prior physical models, the counting step signal information can be restored based on the time series information collected in the above steps. That is, computer software can be used to increase the signal waveform by one unit amplitude and maintain it at each amplitude jump time point until the next jump time point, and then increase the signal waveform by one unit amplitude and maintain it until the last jump time point.

[0082] In order to further understand the signal digitization method provided by the present application, the following will be combined with the attached Figure 3-Figure 9 Provide explanation.

[0083] like Figure 3 As shown, the generating of the counting step signal may further include the following steps 211 to 212 .

[0084] Step 211: When the impulse response signal meets the trigger condition, a unit step signal is output.

[0085] In the absence of photon incidence, dark counts are not considered, and the micro-elements in the micro-element array of the SiPM are in an unexcited state (equivalent to 0 in binary). When a photon sequence is incident on the SiPM, some of the micro-elements will be excited (equivalent to 1 in binary) and generate a pulse response signal. In this embodiment, a trigger condition is set to assist in determining whether the micro-element has received a photon. When the pulse response signal meets the trigger condition, it is determined that the micro-element has received a photon and outputs a unit step signal. By pre-setting the trigger condition, the problem of erroneous output of the micro-element due to noise interference and other conditions can be reduced.

[0086] In some specific embodiments, the trigger condition can be set according to different application scenarios. For example, a preset voltage can be set on the microelement, and the photon reacts with the microelement after being incident to generate a pulse response signal. When the pulse response signal is greater than the preset voltage, the trigger condition is determined to be met and a unit step signal is output; or the trigger condition is determined to be met when the waveform of the pulse response signal meets the preset characteristics, such as when the maximum voltage reaches a preset voltage threshold, the current amplitude reaches a preset current threshold, or the accumulated voltage reaches a certain amplitude, a unit step signal is output.

[0087] More specifically, when the voltage is preset, the microelement can be connected to a comparison module, and the preset voltage of the comparison module is provided by a digital-to-analog converter integrated on the microelement chip. When the microelement detects a photon, it outputs a pulse response signal, which is transmitted to the comparison module. When the amplitude of the pulse response signal reaches the preset voltage, the comparison module outputs a unit step signal. Similarly, when the current threshold or a certain amplitude is preset, it can be realized by a corresponding electronic device, which is easy to implement by those skilled in the art based on the enlightenment of this application, and will not be repeated here.

[0088] The output unit step signal has the following characteristics: when the microelement is not excited, it always maintains a 0 voltage output state; when a microelement is excited, the amplitude of the unit step signal rises by one unit and maintains the amplitude, for example, the voltage amplitude rises by one unit to 3mV or 4mV.

[0089] Specifically, when the impulse response signal meets the trigger condition, outputting the unit step signal may include the following steps 2111 to 2112 .

[0090] Step 2111: Compare the impulse response signal with the trigger threshold.

[0091] In this embodiment, a trigger threshold can be set, and the trigger threshold can be compared with the size of the pulse response signal to assist in determining whether the microelement has received a valid photon. For example, when applied to gamma photon detection, the amplitude of the pulse response signal generated by a single gamma photon is often the same. The trigger threshold can be set to be slightly lower than the amplitude through a digital-to-analog converter, and the pulse response signal output by the microelement is input into the comparison module and compared with the trigger threshold preset in the comparison module.

[0092] Step 2112: In response to the comparison result that the impulse response signal is not less than the trigger threshold, output a unit step signal.

[0093] When the pulse response signal is greater than or equal to the trigger threshold, it can be determined that the pulse response signal meets the trigger condition, that is, in this embodiment, the comparison result that the pulse response signal is greater than or equal to the trigger threshold can be defined as the trigger condition. In response to the comparison result that the pulse response signal is greater than or equal to the trigger threshold, a unit step signal can be output. Specifically, when any microelement detects a photon, an impulse response signal is output. In a specific implementation, the trigger threshold can be a trigger voltage V t The pulse response signal is transmitted to the comparator. When the amplitude of the pulse response signal reaches the trigger voltage V t When , the comparator outputs a unit step signal.

[0094] Step 212: Generate a counting step signal based on the unit step signal.

[0095] Usually, SiPM contains an m×n (m and n are both non-zero natural numbers) micro-element array and corresponding auxiliary circuits. Each micro-element will generate a corresponding pulse response signal after detecting a photon, and a unit step signal will be output when the pulse response signal meets the trigger condition. Therefore, the micro-element array can output multiple unit step signals during detection.

[0096] A counting step signal is formed when multiple unit step signals are output in a certain form. For example, the unit step signals output by each microelement are summed up through an in-phase proportional adding circuit and then output to form a counting step signal; or the unit step signals output by the microelement corresponding to a row or a column are summed up through an adding circuit and then output to form a counting step signal; or the unit step signals output by each microelement are first set with a corresponding delay, and then directly summed up to form a counting step signal. For how to output a counting step signal through an adding circuit, please refer to the embodiment of the device of this application, which will not be repeated here.

[0097] In one embodiment, the step of generating a counting step signal based on a unit step signal may specifically include performing sum processing on the unit step signal to obtain a counting step signal. The characteristics of the generated counting step signal will be combined with Figure 4 Further description. Figure 4 In the figure, when the microelement is not excited, it always maintains a 0 voltage output state, and the counting step signal also has no output, which is manifested as the amplitude is always 0 before time t1; when a microelement is excited, the microelement outputs a unit step signal, and the amplitude of the unit step signal is, for example, 4mV. At this time, the amplitude of the counting step signal also rises by one unit and maintains the amplitude, which is equal to the amplitude of the unit step signal, that is, at time t1, the amplitude of the counting step signal rises to n1; when two microelements are excited, the amplitude of the counting step signal rises by two units and maintains the amplitude, that is, at time t2, the amplitude of the counting step signal rises to n2; similarly, at times t3 and t4, the amplitude of the counting step signal rises to n3 and n4 respectively. It is worth noting that in the present application, the moment when the microelement is excited is by default the moment when the counting step signal jumps. The same microelement cannot be excited twice at the same moment. If two or more microelements are excited at the same moment, the amplitude of the counting step signal will rise by multiple amplitudes and be maintained accordingly.

[0098] Furthermore, the following will further describe how to delay the counting step signal in at least one channel in conjunction with specific embodiments.

[0099] like Figure 5 As shown, according to an embodiment of the present application, delaying a counting step signal in at least one channel may include steps 231 to 233.

[0100] Step 231: synchronously receive count step signals in multiple channels.

[0101] During actual acquisition, there are often multiple detectors, each of which may include multiple SiPM arrays, each SiPM array has multiple SiPM channels, and the SiPM of each channel includes multiple microelement arrays. The microelement array corresponding to a single channel generates a counting step signal, and the multiple counting step signals generated by multiple channels can be sent to the delay unit separately. The delay unit stores and sorts the counting step signals received within a period of time.

[0102] It should be understood by those skilled in the art that the period of time mentioned is a period of time selected according to the processing capability of the delay unit itself, during which the delay unit can smoothly receive a certain amount of counting step signals and can use its own logical computing capability to sort, filter and delay the received counting step signals. All counting step signal data are processed in batches, and the timing in each batch of data is staggered, so as to ensure the smooth operation of the system.

[0103] Step 233: compare the initial times of the counting step signals, and output the counting step signals with the same initial time after delay.

[0104] After the delay unit receives multiple counting step signals, the delay unit sorts them according to the timing of the received counting step signals and determines whether there is any timing overlap of the counting step signals. If there is a timing overlap, the delay unit delays the overlapping counting step signals and the subsequent counting step signals in turn, and outputs the delayed counting step signals in sequence; if it is determined that there is no timing overlap, the counting step signals are directly outputted in order.

[0105] Alternatively, if there is a timing overlap, the delay unit will delay the overlapping counting step signals in turn, and output the overlapping counting step signals after other counting step signals in the same time period are output. Since the counting step signals generated by each channel can be marked with different channel addresses, the original channel and time information can be accurately restored according to the address information and time information after the delayed output.

[0106] According to another embodiment of the present application, Figure 6 As shown, delaying the counting step signal in at least one channel may include steps 231 ′ to 233 ′.

[0107] Step 231 ′: Set up multiple delay channels.

[0108] A plurality of delay channels may be arranged in parallel, and each delay channel may receive the generated counting step signal.

[0109] Step 233 ′: delay the counting step signal in each channel and then output it.

[0110] In this step, each delay channel is subjected to a preset delay, and the preset delay can ensure that the signal to be sampled is staggered and output in each delay channel according to a preset time interval. Specifically, for example, a total of four delay channels are included, and the first channel to the fourth channel are output according to a preset 10ns interval, that is, the signal in the first channel is output within 0-10ns, the signal in the second channel is output within 10-20ns, the signal in the third channel is output within 20-30ns, and the signal in the fourth channel is output within 30-40ns, wherein, for example, the first channel receives a counting step signal at the 20th second, but this is not the output time of the first channel, then the first channel automatically delays the counting step signal received at the 20th second by 20ns, and then outputs it within the interval of 40-50ns. Setting in sequence can ensure that the signals in each channel are smoothly output at off-peak times, and ensure the accuracy of signal acquisition and the fluency of the system.

[0111] According to another embodiment of the present application, Figure 7 As shown, delaying the counting step signal in at least one channel may include steps 231 ″ to 235 ″.

[0112] Step 231 ″: synchronously receive counting step signals in multiple channels.

[0113] For this step, please refer to the description of step 231 above, which will not be repeated here.

[0114] Step 233 ”: the counting step signals in the multiple channels are output after being delayed.

[0115] For this step, please refer to the description of the above step 233 ′, which will not be repeated here.

[0116] Step 235 ”: compare the initial time of the counting step signal in each channel, and select and output the counting step signal in the order of the initial time.

[0117] In this step, a storage module can be used to centrally receive counting step signals sent by multiple channels, and multiple counting step signals received within a time period are sorted in the storage module, and channel outputs corresponding to different channels are selected according to the time sequence of the counting step signals, that is, the signal in the front time is output first, the signal in the back time is output later, and the signals with the same time are delayed and output at staggered times.

[0118] Furthermore, if Figure 8 As shown, directly sampling the counting step signal and determining the time series corresponding to each state change in the counting step signal may further include the following steps 251 to 252.

[0119] Step 251: Record the time point and the number of times the amplitude of the count step signal changes.

[0120] The waveform of the scintillation pulse in the prior art has a relatively fast rising edge and a slow falling edge, and the waveform is in the form of continuous change. Different from the prior art, the counting step signal has a clear amplitude jump point, which is manifested in the waveform as the number of unit step signals increases, and the amplitude of the waveform corresponding to each jump increases by one unit amplitude, and the waveform is stepped as a whole. Therefore, the time information of the signal amplitude jump can be directly recorded through the time-to-digital converter (TDC), and then the time information corresponding to each jump point is output in sequence. The number of recorded jump times is the number of times the amplitude of the counting step signal jumps.

[0121] Step 252: Form the transition time information into a time series according to the transition times.

[0122] Since TDC can record the time information at the moment when the signal amplitude changes, the time information recorded after collecting a complete counting step signal is arranged in chronological order to form a time series to be output. The time series contains at least three aspects of information: the time point information corresponding to each jump of the counting step signal, the number of jumps formed by the statistics of all time point information, and the physical address information corresponding to each SiPM.

[0123] Furthermore, if Fig. 9 As shown, restoring the counting step signal according to the time series may further include the following steps 271 to 272.

[0124] Step 271: Determine the physical model corresponding to the counting step signal.

[0125] For different types of high-energy photons, such as gamma photons or neutrons, the amplitudes of unit step signals generated by different types of microelements in SiPM may be different. For example, for gamma photons, the amplitude of the unit step signal may be 3mV, and for neutrons, the amplitude of the unit step signal may be 5mV. The specific amplitude can be determined based on preliminary experiments. What technical personnel in this field need to understand is that once the corresponding parameters such as the type of high-energy photons, SiPM production process, material, and microelement quenching type are determined, the amplitude of the unit step signal generated after a single microelement is excited will be fixed accordingly.

[0126] Therefore, the physical model satisfied by the counting step signal can be determined based on the type of high-energy photons (such as gamma photons, neutrons), the production process of SiPM (such as PN junction design, packaging, etc.), the micro-element material (such as avalanche diodes, single-photon avalanche diodes, etc.), the matching quenching method (such as resistor quenching or transistor-controlled quenching, etc.), and the unit step signal output circuit and other corresponding parameters. Once the relevant parameters are determined, the amplitude of each jump in the counting step signal can be determined based on the physical model. The physical model can be determined through a large number of experiments, prior knowledge or simulation.

[0127] Step 272: Restore the count step signal according to the physical model and the time series.

[0128] After determining the amplitude of the unit step signal, the counting step signal information can be restored according to the time series information collected in the above steps. For example, computer software can be used to increase the signal waveform by one unit amplitude and maintain it at each amplitude jump time point until the next jump time point, and then increase the signal waveform by one unit amplitude and maintain it until the last jump time point.

[0129] Since the counting step signal contains the quantity information of the received unit step signals, the digital processing method can be used to realize the direct digitization of the SiPM incident photon sequence.

[0130] The signal digitization method provided by the present application can directly and accurately digitize and output the counting step signal information, and no longer needs to set multiple thresholds to collect analog scintillation pulse signals, thus saving additional external digitization devices and preserving the original information of the incident photon sequence to the greatest extent. The external computer can digitize the sampling signal in combination with the prior information of the incident photon sequence, and accurately reconstruct the time series of the incident photons through an algorithm.

[0131] In a further embodiment of the present application, after the count step signal is digitized and the digitized sampling signal is output, the signal digitization method may further include: outputting a reset signal to clear the pulse response signal. That is, after the current SiPM detection process is completed, a reset signal is output to clear all micro-element counts and wait for the next detection.

[0132] The above-mentioned signal digitization method provided by the present application replaces the analog output scintillation pulse signal in the prior art by counting step signals, and outputs the signal at a staggered peak through a delay unit, so that the incident photon sequence can be sampled directly and accurately, and the time series of incident photon excitation can be recorded, so as to realize direct digitization of the incident photons and read them out in the form of digital signals, thereby preserving the original information of the incident photon sequence to the greatest extent, avoiding the complex process of integrating the signal output by the microelement into an analog scintillation pulse signal output and then sampling it, saving additional external digitization devices, and improving the system performance while further reducing the cost.

[0133] Based on the description of the above-mentioned signal digitization method embodiment, the present application also provides a fast, accurate and stable signal digitization device. The device may include a device (including a distributed system), software (application), module, component, server, client, etc. using the method described in the embodiment of this specification and a device combined with necessary implementation hardware. Based on the same innovative concept, the device in one or more embodiments provided in the embodiment of the present application is as described in the following embodiments. Since the implementation scheme and method of the device to solve the problem are similar, the implementation of the specific device in the embodiment of this specification can refer to the implementation of the aforementioned method, and the repetitions will not be repeated. As used below, the term "module" or "module" can implement a combination of software and / or hardware for predetermined functions. Although the device described in the following embodiments is preferably implemented in software, it is also possible to implement hardware, or a combination of software and hardware.

[0134] Fig.10 This is a structural schematic diagram of a signal digitization device in one of the embodiments of the present application. In one of the embodiments, the signal digitization device may include a counting step signal generating unit 80, a delay unit 60, a sampling unit 90 and a reconstruction unit (not shown in the figure), wherein the counting step signal generating unit 80 is configured to generate a counting step signal, and the waveform of the counting step signal exhibits an amplitude that increases in a step-by-step manner with the number of microelements of the excited photoelectric conversion device; the delay unit 60 is configured to delay the counting step signal in at least one channel so that each counting step signal is output at a staggered peak; the sampling unit 90 is configured to sample the counting step signal and determine the time series corresponding to each state change in the counting step signal; and the reconstruction unit is configured to restore the counting step signal according to the time series.

[0135] More specifically, the counting step signal generating unit 80 may include a plurality of detection modules 810 and a signal processing module 820, wherein the plurality of detection modules 810 may generate an impulse response signal when a photon is detected, and the detection module 810 may also output a unit step signal when the impulse response signal reaches a trigger condition. In practical applications, the plurality of detection modules 810 in the signal digitizing device may be arranged in an m×n array (m and n are both positive integers).

[0136] In the absence of photon incidence, dark counts are not considered, and the detection module 810 is in an unexcited state (i.e., equivalent to an output of 0 in binary). When a photon sequence incident signal is digitized, the detection module 810 that receives the photon will be excited (i.e., equivalent to an output of 1 in binary) and generate a pulse response signal. In this embodiment, by setting a trigger condition, it is possible to assist in determining whether the detection module 810 has received a photon. When the pulse response signal meets the trigger condition, it is determined that the detection module 810 has received a photon and outputs a unit step signal. By presetting the trigger condition, the problem of erroneous output of the detection module 810 due to noise interference and the like can be reduced.

[0137] In some specific embodiments, the trigger condition can be set according to different application scenarios. For example, a trigger threshold can be set corresponding to the microelement in the detection module 810, such as a preset trigger voltage, and the photon reacts with the microelement after the incident to generate a pulse response signal. When the pulse response signal is greater than the preset trigger voltage, the trigger condition is determined to be met, and the detection module outputs a unit step signal; it can be determined that the trigger condition is met when the waveform of the pulse response signal meets the preset characteristics, such as the maximum voltage reaches the preset trigger threshold, the current amplitude reaches the preset trigger threshold, or the cumulative voltage reaches a certain amplitude, etc. This is easy for a person skilled in the art to think of based on the enlightenment of this application, and will not be listed one by one here.

[0138] The signal processing module 820 is connected to the plurality of detection modules 810 respectively, and the signal processing module 820 is configured to generate a counting step signal based on the unit step signal.

[0139] When multiple detection modules 810 detect photons, they output multiple unit step signals respectively. Usually, SiPM includes an m×n (m, n are both positive integers) micro-element array and corresponding auxiliary circuits. Each micro-element will generate a corresponding pulse response signal after detecting a photon, and a unit step signal will be output when the pulse response signal meets the trigger condition. Therefore, the detection module array can output multiple unit step signals during detection. After multiple unit step signals are output in a certain form, a counting step signal is formed. For example, after each detection module 810 outputs a unit step signal, the signal processing module 820 adds the unit step signals through the in-phase proportional addition circuit and outputs the counting step signal; or the signal processing module 820 adds the unit step signals correspondingly output by a row or a column of the detection module 810 through the addition circuit and outputs the counting step signal; or the unit step signals output by each detection module are first set with a corresponding delay, and then directly added through the signal processing module 820 to form a counting step signal.

[0140] The delay unit 60 is configured to delay the counting step signal in at least one channel. More specifically, the counting step signals in multiple channels can be synchronously received through the delay unit, and then the initial time of each counting step signal can be compared, and the counting step signals with the same initial time can be delayed and output; for another example, multiple delay channels can be set, and the counting step signals in each channel can be delayed and output through the delay unit; for another example, the counting step signals in multiple channels can be synchronously received, and the counting step signals in multiple channels can be delayed and output through the delay unit, and then the initial time of the counting step signals in each channel can be compared, and the counting step signals can be selected and output in the order of the initial time. The above specific implementation methods will be described in conjunction with the following. Figure 13-Figure 16 Further details.

[0141] The sampling unit 90 is connected to the delay unit 60, and is used to digitize the count step signal and output a digitized sampling signal. Since the count step signal contains the quantity information of the received unit step signal, the sampling unit 90 can use the digitization method described in the above embodiment to realize the direct digitization of the SiPM incident photon sequence.

[0142] Fig.11 This is a schematic diagram of the structure of the detection module 810 in one of the embodiments of the present application. In one of the embodiments, the detection module 810 may include a photon detection submodule 8110 and a threshold comparison submodule 8120.

[0143] The photon detection submodule 8110 can be used to generate a pulse response signal when a photon is detected. Fig.11The photon detection submodule 8110 may include a single photon avalanche diode D1 and a quenching tube Q1. The cathode of the single photon avalanche diode D1 is connected to the reverse bias voltage input externally, the anode of the single photon avalanche diode D1 is connected to the ground via the quenching tube Q1, the drain of the quenching tube Q1 is connected to the anode of the single photon avalanche diode D1, the source of the quenching tube Q1 is grounded, and the gate of the quenching tube Q1 is connected to the external DC voltage V q , DC voltage V q Can be used to control the pulse width of the quench tube.

[0144] The threshold comparison submodule 8120 may be connected to the photon detection submodule 8110, and the threshold comparison submodule 8120 may be used to output a unit step signal when the pulse response signal reaches a trigger condition. Fig.11 In the embodiment, the threshold comparison submodule 8120 may include a second comparator U1. The output end of the photon detection submodule 8110 may be connected to the positive input end of the second comparator U1, and the negative input end of the second comparator U1 may be connected to the external input trigger voltage V t .

[0145] When the single photon avalanche diode D1 detects a photon, it will generate a pulse response signal. The pulse response signal is transmitted to the positive input terminal of the second comparator U1, and the second comparator U1 combines the pulse response signal and the trigger voltage V t When the amplitude of the pulse response signal reaches the trigger voltage V t When the second comparator U1 outputs a unit step signal V ij , where i and j represent the number of rows and columns in the microelement array, respectively, and j=1, 2, 3, ..., N. The trigger voltage V of the plurality of detection modules 810 t can be the same, and the trigger voltages V t Both can be provided by a digital-to-analog converter (DAC) integrated on-chip.

[0146] Fig.12 8 is a schematic diagram of the structure of the signal processing module 820 in one embodiment of the present application. In one embodiment, the signal processing module 820 may include an in-phase proportional addition circuit 8210 .

[0147] The in-phase proportional adding circuit 8210 can be connected to N detection modules 810 respectively. The in-phase proportional adding circuit 8210 can be used to add the unit step signal output by any detection module 810 to generate a counting step signal.

[0148] In one embodiment, the output ends of the plurality of detection modules 810 can be connected to a plurality of input resistors 8220 (shown as R1, R2, . . . , R N ) is connected to the signal input terminal of the in-phase proportional addition circuit 8210. Fig.12 The in-phase proportional adding circuit 8210 may include an operational amplifier U2, a feedback resistor R f and grounding resistance Rs. The unit step signals output by the N detection modules 810 can be V i1 、V i2 , ..., V iN The output terminals of the N detection modules 810 are connected to the input resistors R1, R2, ..., R N Connect to the positive input terminal of operational amplifier U2, feedback resistor R f One end is connected to the positive input terminal of the operational amplifier U2, and the feedback resistor R f The other end is connected to the output end of the operational amplifier U2, and the negative input end of the operational amplifier U2 is grounded through the grounding resistor Rs.

[0149] The operational amplifier U2 can perform sum operation on multiple unit step signals and output a counting step signal Vo. Specifically, the counting step signal Vo=R f ×(V i1 / R1+V i2 / R2+V i3 / R3+...V iN / R N ), which is equivalent to multiplying the unit step signal output by each detection module 810 by a ratio and outputting it. Among them, the resistance values ​​of the N input resistors 8220 are the same, so the unit step signal output by each detection module 810 is multiplied by the same ratio, which can ensure that the voltage input to the in-phase proportional addition circuit 8210 of each detection module 810 is the same. Due to the different arrival times of photons, the unit step signal output by each detection module 810 has a time difference. Therefore, a counting step signal with an amplitude that changes with time will be generated at the output end of the in-phase proportional addition circuit 8210. For example, if the two detection modules 810 are triggered at 1ns and 2ns respectively, the in-phase proportional addition circuit 8210 outputs and maintains a counting step signal with a unit amplitude of A0 at 1ns, and at 2ns, the unit step signal output by the second triggered detection module 810 is added, then the counting step signal amplitude output by the in-phase proportional addition circuit 8210 at 2ns becomes 2A0, thereby forming a stepped counting step signal.

[0150] In a specific embodiment, the signal digitization device includes detection modules 810 arranged in a 32×32 square pattern (e.g. Fig.11As shown, N=32), the total number of detection modules 810 is 32×32=1024. After each detection module 810 converts the pulse response signal into a unit step signal of a digital logic high level, the 1024 detection modules 810 are connected to the in-phase proportional addition circuit 8210, and the unit step signal is converted into a counting step signal through the in-phase proportional addition circuit 8210. If the power supply of the in-phase proportional addition circuit 8210 is 4.1V, the voltage range output by the in-phase proportional addition circuit 210 is 0-4.1V. When the number of triggered detection modules 810 ranges from 0 to 1024, A0=4.1V÷1024≈4mV. Alternatively, it can also be in the form of rows, for example, the unit step signals output by 32 detection modules 810 in each row are summed and output separately.

[0151] Fig.13 This is a connection diagram of a delay unit 60, a counting step signal generating unit 80 and a sampling unit 90 implemented in one embodiment of the present application. The delay unit 60 may include a first storage module 610 and a delay module 620; the sampling unit 90 includes a TDC and a second storage module.

[0152] An input end of the first storage module 610 is connected to the output end of the signal processing module corresponding to multiple channels, and is used to receive the output counting step signal. The output end of the first storage module 610 is connected to the input end of the delay module 620. The first storage module 610 is configured to receive and store the counting step signals sent by each signal processing module 820, and sort them according to the starting time information of each counting step signal. For the counting step signals with timing overlap, they are delayed and output through the delay module 620.

[0153] The delay module 620 can be configured according to the above-mentioned Figure 5-Figure 7 The method described in the embodiment delays the corresponding overlapping counting step signals and then outputs them. Through the cooperation of the storage module and the delay module, the staggered and orderly output of the counting step signals can be achieved, which will not be described in detail here.

[0154] The storage module can use a FIFO (First Input First Output) memory, which is connected to the first TDC. The FIFO memory can be used to collect the counting step signals for stacking and storage. The FIFO memory is a first-in-first-out dual-port buffer, that is, the first data to enter it is the first to be removed. For counting step signals with time overlap, a time delay is added through a delay module before output, so that continuous data streams can be cached to prevent data loss during machine entry and storage operations.

[0155] Since the counting step signal has an obvious amplitude jump point, it is shown in the waveform that as the number of unit step signals increases, the amplitude of the waveform corresponding to each jump increases by one unit amplitude, and the waveform is stepped as a whole. Therefore, in this embodiment, the counting step signal generated by the counting step signal generating unit 80 can be delayed and sequentially input into the sampling unit 90, and the time information of each amplitude jump in the counting step signal is recorded by the TDC in the sampling unit, and then the time information corresponding to each jump point is sent and stored in the second storage module, and the second storage module matches the above time series and information such as channel number / address and outputs them in a packaged form.

[0156] Since TDC can record the time information at the moment when the signal amplitude changes, the time information recorded after collecting a complete counting step signal is arranged in chronological order to form a time series to be output. The time series contains at least three aspects of information: the time point information corresponding to each jump of the counting step signal, the number of jumps formed by the statistics of all time point information, and the physical address information corresponding to each SiPM.

[0157] Fig.14 Based on Fig.13 The structural diagram of the delay unit 60, the counting step signal generating unit 80 and the sampling unit 90 of the embodiment, Fig.14 In the embodiment Fig.13 Modules similar or identical to the embodiments are not described here, and only the Fig.13 The difference between the embodiments. Fig.14 In the embodiment, the delay unit 60 can be formed into multiple paths, each of which includes a storage module 610 and a delay module 620, and the storage module 610 and the delay module 620 are connected. Fig.13 The connection in the embodiment is similar, except that the output ends of the delay modules 620 corresponding to the multiple channels are respectively connected to the same control module 630, so that the time series in the multiple channels can be selected and output to the sampling unit 90 in batches through the control module 630, thereby alleviating the problem of low processing efficiency that may be caused when the same delay module corresponds to multiple counting step signal generating units, making the system signal processing smoother.

[0158] Fig.15This is a structural diagram of a delay unit 60' and a sampling unit 90 in another embodiment of the present application. In this embodiment, the delay unit 60' only includes a delay module 620'. Except for the first channel, each of the other channels is provided with a delay module 620'. Each delay module 620' is provided with a preset delay. The preset delay can ensure that the signal to be sampled is staggered and output in each delay channel according to the preset time interval. Specifically, for example, the first channel to the fourth channel are output according to the preset 10ns interval, that is, the signal in the first channel is output within 0-10ns, the signal in the second channel is output within 10-20ns, the signal in the third channel is output within 20-30ns, and the signal in the fourth channel is output within 30-40ns. For example, the first channel receives a counting step signal at the 20th second, but this is not the output time of the first channel. Then, the first channel automatically delays the counting step signal received at the 20th second by 20ns and outputs it within the interval of 40-50ns. Setting them up in sequence can ensure that the signals in each channel are output smoothly at staggered peaks, thus guaranteeing the accuracy of signal acquisition and the smoothness of the system.

[0159] Fig.16 This is a schematic diagram of the structure of a delay unit 60" and a sampling unit 90 in another embodiment of the present application. In this embodiment, the delay unit 60" includes a delay module 620" and a selection unit 630". Except for the first channel, a delay module 620" is set in each of the other channels. Each delay module 620" is set with a preset delay. The preset delay can ensure that the signal to be sampled is output in each delay channel in an interlaced manner according to a preset time interval. The selection unit 630" centrally receives the counting step signals sent by multiple channels, and sorts the multiple counting step signals received in a time period in the selection unit 630", and selects the channel output corresponding to different channels according to the time sequence of the counting step signals, that is, the signal in front of the time is output first, and the signal in the back of the time is output later, and the signals with the same time are delayed and output at different peaks, thereby ensuring that the signals in each channel are smoothly output at different peaks, ensuring the accuracy of signal acquisition and the fluency of the system.

[0160] In one embodiment, the signal digitization device may further include a reset module, which may be used to output a reset signal to clear the pulse response signal. After the TDC and the storage module have completed their work and output a time series frame (each channel outputs a Gray code with a length of about 30 bits), the reset module may output a reset signal to clear all counts of the detection module 810 to wait for the next detection work.

[0161] Fig.17Schematic diagram of the structure of a reconstruction unit 50 of a signal digitization device in one embodiment of the present application. The reconstruction unit 50 of the signal digitization device may include a modeling module 510 and a data processing module 520 .

[0162] The modeling module 510 can be used to determine the physical model corresponding to the count step signal. The data processing module 520 can be connected to the modeling module 510, and the data processing module 520 can be used to perform signal recovery processing on the digital sampling signal based on the physical model to restore the count step signal.

[0163] According to the embodiment of the above-mentioned signal digitization device, it can be known that the counting step signal obeys the physical model. The voltage amplitude of the counting step signal is the number of counts × A0. The modeling module 510 can set the corresponding physical model according to the characteristics of the counting step signal. For example, the counting step signal can be represented by a step-shaped exponential model or an approximate linear function model. Furthermore, the data processing module 520 can perform signal recovery processing on the digitized sampling signal based on the physical model determined by the modeling module 510 through signal processing methods such as fitting algorithms and neural network algorithms, and recover the counting step signal from the time series of the digitized sampling signal.

[0164] In one embodiment, the reconstruction unit 50 may further include a data conversion module 530. The data conversion module 530 may be connected to the data processing module 520, and the data conversion module 530 may be used to convert the counting step signal into unit time counting information.

[0165] It is worth noting that the signal digitization device provided in the present application may also include a transmission unit. The transmission unit may be used to transmit the acquired digital sampling signal. The signal digitization device may read the digital sampling signal of the sampling unit through the transmission unit. After acquiring the digital sampling signal, the reconstruction unit 50 may analyze the signal characteristics of the counting step signal through prior information, such as a priori physical model, so as to reconstruct the digitized signal according to the prior information and restore the counting step signal. For example, according to the function or shape model that the counting step signal conforms to, the digitized sampling signal is reconstructed and the counting step signal is restored. Furthermore, the counting step signal is transformed to obtain unit time counting information. The digitized sampling signal may refer to the digitized sampling signal acquired by the sampling unit in the above-mentioned embodiment.

[0166] The above-mentioned signal digitization device provided in the present application generates a counting step signal to replace the analog output scintillation pulse signal in the prior art, so that the incident photon sequence can be directly sampled with TDC, and the time series of incident photon excitation can be recorded, so as to realize direct digitization of the incident photons and read them out in the form of digital signals, thereby preserving the original information of the incident photon sequence to the greatest extent, avoiding the complex process of integrating the signal output by the microelement into an analog scintillation pulse signal output and then sampling it, saving additional external digitization devices, and improving the system performance while further reducing the cost.

[0167] The above-mentioned signal digitization device reconstructs the digital sampling signal according to the prior information, preserves the original information of the incident photon sequence to the greatest extent, accurately restores the incident photon time series, and realizes the digital reconstruction of the counting step signal without losing the photon detection efficiency.

[0168] It should be understood that Figure 10-Figure 17 The device and its modules shown can be implemented in various ways. For example, in some embodiments, the device and its modules can be implemented by hardware, software, or a combination of software and hardware. Among them, the hardware part can be implemented using dedicated logic; the software part can be stored in a memory and executed by an appropriate instruction execution device, such as a microprocessor or a dedicated design hardware. Those skilled in the art will understand that the above methods and devices can be implemented using computer executable instructions and / or included in a processor control code, such as a carrier medium such as a disk, CD or DVD-ROM, a programmable memory such as a read-only memory (firmware), or a data carrier such as an optical or electronic signal carrier. Such code is provided on the carrier medium such as a disk, CD or DVD-ROM, a programmable memory such as a read-only memory (firmware), or a data carrier such as an optical or electronic signal carrier. The device and its modules of the present application specification can not only be implemented by hardware circuits such as ultra-large-scale integrated circuits or gate arrays, semiconductors such as logic chips, transistors, etc., or programmable hardware devices such as field programmable gate arrays, programmable logic devices, etc., but can also be implemented by software executed by various types of processors, and can also be implemented by a combination of the above hardware circuits and software (for example, firmware).

[0169] It should be noted that the above description of the modules is only for convenience of description and does not limit the specification of this application to the scope of the embodiments. It is understandable that for those skilled in the art, after understanding the principle of the device, it is possible to arbitrarily combine the modules or form a subsystem to connect with other modules without deviating from this principle. For example, the modules can share a storage module, or each module can have its own storage module. Such variations are within the scope of protection of this specification.

[0170] Fig.18This is a schematic diagram of a signal digitization system for implementing a signal digitization method in one embodiment of the present application. Fig.18 The signal digitization system S00 may include a processing component S20, which further includes one or more processors, and a memory resource represented by a memory S22 for storing instructions executable by the processor of the processing component S20, such as an application. The application stored in the memory S22 may include one or more instructions, and each module corresponds to a set of instructions. In addition, the processing component S20 is configured to execute instructions to perform the above-mentioned signal digitization method.

[0171] The operations and / or methods implemented by one processor described in the embodiments of this specification may also be implemented jointly or independently by multiple processors. For example, if in the specification of this application, the processor of the processing device executes step 1 and step 2, it should be understood that step 1 and step 2 may also be executed jointly or independently by two different processors of the processing device (for example, the first processor executes step 1, the second processor executes step 2, or the first and second processors execute step 1 and step 2 jointly).

[0172] The signal digitization system S00 may further include: a power supply component S24 configured to perform power management of the signal digitization system S00; a wired or wireless network interface S26 configured to connect the signal digitization system S00 to a network; and an input / output (I / O) interface S28. The signal digitization system S00 may operate based on an operating system stored in the memory S22, such as Windows Server, Mac OS X, Unix, Linux, FreeBSD, or the like.

[0173] In an exemplary embodiment, a computer-readable storage medium including instructions is also provided, such as a memory S22 including instructions, and the above instructions can be executed by a processor of the signal digitization system S00 to complete the above method. The storage medium can be a computer-readable storage medium, for example, the computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.

[0174] In an exemplary embodiment, a computer program product is further provided. The computer program product includes instructions. The instructions can be executed by a processor of the signal digitization system S00 to implement the above method.

[0175] In one embodiment, a computer device is provided. The computer device may be a server, and its internal structure diagram may be as follows: Fig.19 As shown, Fig.19This is an internal structure diagram of a computer device in one of the embodiments of the present application. The computer device includes a processor, a memory and a network interface connected via a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store data related to users and tasks used in the above-mentioned signal digitization method. The network interface of the computer device is used to communicate with an external terminal via a network connection. When the computer program is executed by the processor, a signal digitization method is implemented.

[0176] Those skilled in the art will understand that Fig.19 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0177] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, etc., but are not limited to this.

[0178] Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the hardware + program embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0179] It should be noted that the above-mentioned devices, electronic devices, servers, etc. may also include other implementation methods according to the description of the method embodiments, and the specific implementation methods may refer to the description of the relevant method embodiments. At the same time, the new embodiments composed of the mutual combination of the features between the various methods and device, equipment, and server embodiments still fall within the scope of implementation covered by this application, and will not be described one by one here.

[0180] In the description of this specification, the descriptions with reference to the terms "one embodiment", "an embodiment", and / or "some embodiments", "some embodiments", "other embodiments", "ideal embodiments", etc., mean that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example, and certain features, structures or characteristics in one or more embodiments of this specification may be appropriately combined.

[0181] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0182] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

[0183] The basic concepts have been described herein. It is obvious to those skilled in the art that the above detailed disclosure is merely an example and does not constitute a limitation of this specification. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements and amendments to this specification. Such modifications, improvements and amendments are suggested in this specification, so such modifications, improvements and amendments still fall within the spirit and scope of the exemplary embodiments of this specification.

[0184] In addition, it will be understood by those skilled in the art that various aspects of this specification may be illustrated and described by a number of patentable categories or situations, including any new and useful process, machine, product or combination of substances, or any new and useful improvements thereto. Accordingly, various aspects of this specification may be performed entirely by hardware, entirely by software (including firmware, resident software, microcode, etc.), or by a combination of hardware and software. The above hardware or software may be referred to as "data blocks", "modules", "engines", "modules", "components" or "systems". In addition, various aspects of this specification may be represented as a computer product located in one or more computer-readable media, which includes computer-readable program code.

[0185] A computer storage medium may include a propagated data signal containing computer program code, for example, in baseband or as part of a carrier wave. The propagated signal may be in a variety of forms, including electromagnetic, optical, etc., or a suitable combination. A computer storage medium may be any computer-readable medium other than a computer-readable storage medium, which can be connected to an instruction execution system, device or apparatus to communicate, propagate or transmit the program for use. The program code on the computer storage medium may be transmitted via any suitable medium, including radio, cable, fiber optic cable, RF, or similar media, or any combination of the above media.

[0186] The computer program codes required for the operation of the various parts of this specification can be written in any one or more programming languages, including object-oriented programming languages ​​such as Java, Scala, Smalltalk, Eiffel, JADE, Emerald, C++, C#, VB.NET, Python, etc., conventional procedural programming languages ​​such as C language, Visual Basic, Fortran 3003, Perl, COBOL 3002, PHP, ABAP, dynamic programming languages ​​such as Python, Ruby and Groovy, or other programming languages. The program code can be run entirely on the user's computer, or run on the user's computer as a separate software package, or run partly on the user's computer and partly on a remote computer, or run entirely on a remote computer or server. In the latter case, the remote computer can be connected to the user's computer through any network form, such as a local area network (LAN) or a wide area network (WAN), or connected to an external computer (e.g., via the Internet), or in a cloud computing environment, or used as a service such as software as a service (SaaS).

[0187] In addition, unless explicitly stated in the claims, the order of the processing elements and sequences described in this specification, the use of alphanumeric characters, or the use of other names are not intended to limit the order of the processes and methods of this specification. Although the above disclosure discusses some invention embodiments that are currently considered useful through various examples, it should be understood that such details are only for illustrative purposes, and the attached claims are not limited to the disclosed embodiments. On the contrary, the claims are intended to cover all modifications and equivalent combinations that are consistent with the essence and scope of the embodiments of this specification. For example, although the system components described above can be implemented by hardware devices, they can also be implemented only by software solutions, such as installing the described system on an existing server or mobile device.

[0188] Similarly, it should be noted that in order to simplify the description disclosed in this specification and thus help understand one or more embodiments of the invention, in the above description of the embodiments of this specification, multiple features are sometimes combined into one embodiment, figure or description thereof. However, this disclosure method does not mean that the features required by the subject matter of this specification are more than the features mentioned in the claims. In fact, the features of the embodiments are less than all the features of the single embodiment disclosed above.

[0189] In some embodiments, numbers describing the number of components and attributes are used. It should be understood that such numbers used in the description of the embodiments are modified by the modifiers "about", "approximately" or "substantially" in some examples. Unless otherwise specified, "about", "approximately" or "substantially" indicate that the numbers are allowed to vary by ±20%. Accordingly, in some embodiments, the numerical parameters used in the specification and claims are approximate values, which may change according to the required features of individual embodiments. In some embodiments, the numerical parameters should take into account the specified significant digits and adopt the general method of retaining the digits. Although the numerical domains and parameters used to confirm the breadth of the range in some embodiments of this specification are approximate values, in specific embodiments, the setting of such numerical values ​​is as accurate as possible within the feasible range.

[0190] Each patent, patent application, patent application publication, and other materials, such as articles, books, specifications, publications, documents, etc., cited in this specification is hereby incorporated by reference in its entirety. Except for application history documents that are inconsistent with or conflicting with the contents of this specification, documents that limit the broadest scope of the claims of this specification (currently or later attached to this specification) are also excluded. It should be noted that if the descriptions, definitions, and / or use of terms in the materials attached to this specification are inconsistent or conflicting with the contents described in this specification, the descriptions, definitions, and / or use of terms in this specification shall prevail.

[0191] Finally, it should be understood that the embodiments described in this specification are only used to illustrate the principles of the embodiments of this specification. Other variations may also fall within the scope of this specification. Therefore, as an example and not a limitation, alternative configurations of the embodiments of this specification may be considered consistent with the teachings of this specification. Accordingly, the embodiments of this specification are not limited to the embodiments explicitly introduced and described in this specification.

Claims

1. A signal digitization method, characterized in that: include: The multiple channels respectively generate counting step signals, wherein the waveform of the counting step signals is characterized in that the amplitude increases in a step-wise manner along with the number of micro-elements of the photoelectric conversion device being excited; delaying the count step signal in at least one of the channels; The counting step signal is sampled sequentially, and a time series corresponding to each state change in the counting step signal is directly determined through a time-to-digital converter, wherein the time series includes: time point information corresponding to each jump of the counting step signal, jump number information formed by statistics of all time point information, and source physical address information corresponding to each counting step signal; The count step signal is restored according to the time series.

2. The signal digitization method according to claim 1, characterized in that: The generating a counting step signal comprises: When the impulse response signal meets the trigger condition, a unit step signal is output; A count step signal is generated based on the unit step signal.

3. The signal digitization method according to claim 2, characterized in that: When the impulse response signal meets the trigger condition, a unit step signal is output, including: comparing the impulse response signal with a trigger threshold; In response to a comparison result that the impulse response signal is not less than the trigger threshold, a unit step signal is output.

4. The signal digitization method according to claim 3, characterized in that: When the micro-element of the photoelectric conversion device is not excited, the unit step signal maintains a 0 output state. When the micro-element is excited, the amplitude of the unit step signal increases by one unit and maintains the amplitude.

5. The signal digitization method according to claim 3, characterized in that: The trigger conditions include: A voltage is preset, and when the pulse response signal is greater than the preset voltage, it is determined that a trigger condition is met, and the unit step signal is output; or A waveform feature is preset, and when the waveform feature of the impulse response signal meets the preset waveform feature, it is determined that a trigger condition is met, and the unit step signal is output.

6. The signal digitization method according to claim 5, characterized in that: The preset waveform features include: The maximum voltage value of the waveform reaches a preset voltage threshold, the current amplitude of the waveform reaches a preset current threshold, or the accumulated voltage of the waveform reaches a preset amplitude.

7. The signal digitization method according to claim 2, characterized in that: The generating a counting step signal based on the unit step signal comprises: The unit step signal is summed to generate the counting step signal.

8. The signal digitization method according to claim 7, characterized in that: The unit step signal is summed up, comprising: A plurality of the unit step signals are added together by an in-phase proportional adding circuit and then output to generate the counting step signal; or The unit step signals outputted corresponding to different rows and columns are respectively added up by an adding circuit and then outputted to generate the counting step signal; or A corresponding delay is set for each unit step signal, and then the delays are added together to form the counting step signal.

9. The signal digitization method according to claim 8, characterized in that: When the microelement of the photoelectric conversion device is not excited, the amplitude of the counting step signal remains at 0. When one of the microelement is excited, the amplitude of the counting step signal increases by one unit and maintains the amplitude. When n of the microelement are excited, the amplitude of the counting step signal increases by n units and maintains the amplitude, where n is a positive integer.

10. The signal digitization method according to claim 1, characterized in that: The delaying of the counting step signal in at least one of the channels comprises: synchronously receiving the counting step signals in a plurality of the channels; The initial times of the counting step signals are compared, and the counting step signals with the same initial time are output after being delayed.

11. The signal digitization method according to claim 1, characterized in that: The delaying of the counting step signal in at least one of the channels comprises: Set up multiple delay channels; The counting step signal in each of the channels is delayed and then output.

12. The signal digitization method according to claim 1, characterized in that: The delaying of the counting step signal in at least one of the channels comprises: synchronously receiving the counting step signals in a plurality of the channels; The counting step signals in the plurality of channels are output after being delayed; The initial times of the counting step signals in the channels are compared, and the counting step signals are selected and outputted in the order of the initial times.

13. The signal digitization method according to claim 1, characterized in that: The sequentially sampling the counting step signal to determine a time series corresponding to each state change in the counting step signal includes: Recording the time point and number of times the amplitude of the counting step signal changes; The time point information of the jump is formed into a time series according to the number of jumps.

14. The signal digitization method according to claim 1, characterized in that: The restoring the counting step signal according to the time series comprises: Determine the physical model corresponding to the counting step signal; The count step signal is restored according to the physical model and the time series.

15. The signal digitization method according to claim 2, characterized in that: After restoring the count step signal according to the time series, the signal digitization method further includes: Output a reset signal to clear the pulse response signal.

16. A signal digitizing device, characterized in that: include: A counting step signal generating unit, wherein the counting step signal generating unit is configured to generate a counting step signal, wherein the waveform of the counting step signal is characterized in that the amplitude increases in a step-like manner as the number of micro-elements of the photoelectric conversion device being excited increases; A delay unit, wherein the delay unit is configured to delay the counting step signal in at least one channel so that each counting step signal is output at a staggered peak; A sampling unit, the sampling unit is configured to sample the counting step signal, and directly determine the time series corresponding to each state change in the counting step signal through a time-to-digital converter, the time series including: time point information corresponding to each jump of the counting step signal, jump number information formed by statistics of all time point information, and source physical address information corresponding to each counting step signal; as well as A reconstruction unit is configured to restore the counting step signal according to the time series.

17. The signal digitizing device according to claim 16, characterized in that: The counting step signal generating unit comprises: A plurality of detection modules, used to generate an impulse response signal when a photon is detected, and output a unit step signal when the impulse response signal reaches a trigger condition; The signal processing modules are respectively connected to the plurality of detection modules and are used to generate a counting step signal based on the unit step signal.

18. The signal digitizing device according to claim 17, characterized in that: The detection module comprises: A photon detection submodule, for generating a pulse response signal when a photon is detected; The threshold comparison submodule is connected to the photon detection submodule and is used to output the unit step signal when the pulse response signal reaches a trigger condition.

19. The signal digitizing device according to claim 17, characterized in that: The trigger conditions include: A voltage is preset, and when the pulse response signal is greater than the preset voltage, it is determined that the trigger condition is met, and the unit step signal is output; or A waveform feature is preset, and when the waveform feature of the impulse response signal meets the preset waveform feature, it is determined that the trigger condition is met, and the unit step signal is output.

20. The signal digitizing device according to claim 19, characterized in that: The preset waveform features include: The maximum voltage reaches a preset voltage threshold, the current amplitude reaches a preset current threshold, or the accumulated voltage reaches a preset amplitude.

21. The signal digitizing device according to claim 18, characterized in that: The photon detection submodule comprises: A single-photon avalanche diode, wherein the cathode of the single-photon avalanche diode is connected to an externally input reverse bias voltage; A quenching tube, wherein the drain of the quenching tube is connected to the anode of the single-photon avalanche diode, the source of the quenching tube is grounded, and the gate of the quenching tube is connected to an externally inputted DC voltage.

22. The signal digitizing device according to claim 17, characterized in that: The signal processing module comprises: The in-phase proportional adding circuit is connected to the plurality of detection modules respectively, and is used for performing sum processing on the unit step signal to generate the counting step signal.

23. The signal digitizing device according to claim 22, characterized in that: The plurality of detection modules are respectively connected to the signal input end of the in-phase proportional addition circuit through corresponding input resistors, wherein the resistance value of each input resistor is the same.

24. The signal digitizing device according to claim 23, characterized in that: The in-phase proportional addition circuit includes an operational amplifier, a feedback resistor and a grounding resistor, wherein the output end of each detection module is connected to the input resistor one-to-one and connected to the positive input end of the operational amplifier, one end of the feedback resistor is connected to the positive input end of the operational amplifier, the other end of the feedback resistor is connected to the output end of the operational amplifier, and the negative input end of the operational amplifier is grounded through the grounding resistor.

25. The signal digitizing device according to claim 16, characterized in that: The delay unit comprises: A first storage module is configured to receive and store the counting step signals, and to sort the counting step signals according to the start time information of each counting step signal; The delay module is configured to delay corresponding overlapping counting step signals and then output them.

26. The signal digitizing device according to claim 16, characterized in that: The delay unit comprises: A first storage module is configured to receive and store the counting step signals, and to sort the counting step signals according to the start time information of each counting step signal; A delay module configured to delay and output corresponding overlapping counting step signals; and A control module is connected to the multiple delay modules and is configured to gate and output the time series in the multiple channels in batches.

27. The signal digitizing device according to claim 16, characterized in that: The delay unit comprises: The delay module is configured to delay the counting step signals in different channels and then output them according to a preset time interval.

28. The signal digitizing device according to claim 16, characterized in that: The sampling unit includes a time-to-digital converter and a second storage module. The time-to-digital converter is configured to record the time information of each jump in the amplitude of the counting step signal. The second storage module is configured to match the time information and the corresponding channel number / address information, store and output it.

29. The signal digitizing device according to claim 18, characterized in that: The signal digitization device also includes: The reset module is used to output a reset signal to clear the pulse response signal.

30. The signal digitizing device according to claim 16, characterized in that: The reconstruction unit comprises: A modeling module, used for determining a physical model corresponding to the counting step signal; The data processing module is connected to the modeling module and is configured to perform signal recovery processing on the time series based on the physical model to restore the counting step signal.

31. The signal digitizing device according to claim 30, characterized in that: The reconstruction unit also includes: The data conversion module is connected to the data processing module and is used to convert the counting step signal into unit time counting information.

32. A computer storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the signal digitization method according to any one of claims 1 to 15 are implemented.

33. A computer program product, characterized in that The method comprises a computer program or an instruction, wherein the computer program or the instruction, when executed by a processor, implements the steps of the signal digitization method according to any one of claims 1 to 15.

34. A digital PET system, characterized in that: Comprising the signal digitizing device as claimed in any one of claims 16-31.

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