Preparation method of back contact solar cell and photovoltaic module

Abstract

The invention relates to a preparation method of a back contact solar cell and a photovoltaic module, and the preparation method comprises the steps: providing a silicon substrate which comprises a first surface and a second surface, and the first surface comprises a first region and a second region; forming a tunneling oxide layer, a doped semiconductor layer and a laser barrier layer on the first surface; performing laser removal on the laser barrier layer in the first region and the doped semiconductor layer and the tunneling oxide layer at the adjacent positions of the first region and the second region; texturing treatment and etching treatment are carried out on the silicon substrate, the doped semiconductor layer and the tunneling oxide layer located in the first region and the laser barrier layer located in the second region are removed, an isolation region is formed at the position where the first region is adjacent to the second region, the isolation region comprises a groove, and textured structures are formed on the side wall and the bottom wall of the groove and the second surface. The preparation process of the battery can be simplified, the probability of electric leakage of the battery is reduced, the manufacturing efficiency and the yield of the battery are improved, and the reliability of the battery is improved.

Description

Technical Field

[0001] The present application relates to the field of photovoltaic technology, and in particular to a method for preparing a back-contact solar cell and a photovoltaic module. Background Art

[0002] Solar cells, also known as photovoltaic cells, are semiconductor devices that convert sunlight directly into electrical energy. As they are green and environmentally friendly products that do not cause environmental pollution, and solar energy is a renewable resource, solar cells are a new type of battery with broad development prospects.

[0003] Back contact (BC) cell is an advanced design used to improve the efficiency of solar cells. Its core design concept is to place all the metal electrodes of the cell on the back of the cell, thereby ensuring that the front of the cell is not blocked by any metal grid lines, thereby maximizing the area of ​​the cell that absorbs sunlight, reducing optical losses and improving photoelectric conversion efficiency.

[0004] However, because all metal electrodes are arranged on the back of the battery cell, the patterning process of the back of the BC battery is complicated and difficult, and leakage problems are prone to occur on the back, which affects the conversion efficiency of the BC battery and restricts the development of the BC battery. Summary of the invention

[0005] Based on this, the present application provides a method for preparing a back-contact solar cell and a photovoltaic module to simplify the preparation process of the back-contact solar cell and improve the preparation efficiency, while reducing the probability of leakage of the back-contact solar cell and improving the reliability of the back-contact solar cell, thereby improving the reliability of the photovoltaic module.

[0006] The embodiment of the first aspect of the present application provides a method for preparing a back-contact solar cell, comprising:

[0007] Providing a silicon substrate, the silicon substrate comprising a first surface and a second surface arranged opposite to each other, the silicon substrate comprising first regions and second regions distributed alternately;

[0008] forming a tunneling oxide layer, a doped semiconductor layer and a laser blocking layer in sequence on the first surface, wherein the doping type of the doped semiconductor layer is opposite to the doping type of the silicon substrate;

[0009] Performing laser removal on the laser blocking layer located in the first region and the doped semiconductor layer and the tunnel oxide layer at a position adjacent to the first region and the second region;

[0010] The silicon substrate is subjected to texturing and etching treatments to remove the doped semiconductor layer, the tunneling oxide layer and the laser blocking layer located in the first region to expose the first surface located in the first region and the doped semiconductor layer located in the second region, and an isolation region is formed at a position adjacent to the first region and the second region, and the isolation region includes a groove extending from the first surface into the silicon substrate, and a textured structure is formed on the side walls and bottom walls of the groove and the second surface.

[0011] In one embodiment, the step of laser removing the laser blocking layer located in the first region and the doped semiconductor layer and the tunnel oxide layer at the position where the first region and the second region are adjacent comprises:

[0012] Using a first laser to remove the laser blocking layer located in the first area;

[0013] A second laser is used to remove the doped semiconductor layer and the tunneling oxide layer at a position adjacent to the first region and the second region; the energy of the second laser is greater than the energy of the first laser.

[0014] In one embodiment, the step of sequentially forming a tunneling oxide layer, a doped semiconductor layer and a laser blocking layer on the first surface includes:

[0015] forming a tunneling oxide layer and an intrinsic amorphous silicon layer in sequence on the first surface;

[0016] The intrinsic amorphous silicon layer is doped by a diffusion process to form a doped semiconductor layer, a first oxide layer located on a side of the doped semiconductor layer away from the silicon substrate, and a second oxide layer located on the second surface, wherein the first oxide layer is the laser blocking layer.

[0017] In one embodiment, the step of performing texturing and etching on the silicon substrate comprises:

[0018] Performing a first acid etching treatment on the second surface of the silicon substrate to remove the second oxide layer on the second surface;

[0019] Performing a texturing process on the first surface and the second surface of the silicon substrate, removing the doped semiconductor layer located in the first region, and forming an isolation region at a position adjacent to the first region and the second region, wherein the isolation region includes a groove extending from the first surface into the silicon substrate, and a texturing structure is formed on the sidewall and bottom wall of the groove and the second surface;

[0020] A second acid etching process is performed on a side of the first surface away from the silicon substrate to remove the tunneling oxide layer located in the first area and the laser blocking layer located in the second area to expose the first surface located in the first area and the doped semiconductor layer located in the second area.

[0021] In one embodiment, the step of performing a first acid etching treatment on the second surface of the silicon substrate to remove the second oxide layer on the second surface includes:

[0022] The second surface of the silicon substrate is chain-cleaned using a first acid solution to remove the second oxide layer on the second surface; the mass percentage of the first acid solution is 8%wt-15%wt, and the cleaning time is 60s-240s.

[0023] In one embodiment, the step of performing a second acid etching treatment on a side of the first surface away from the silicon substrate comprises:

[0024] A second acid solution is used to clean the side of the first surface away from the silicon substrate to remove the tunneling oxide layer located in the first area and the laser blocking layer located in the second area to expose the first surface located in the first area and the doped semiconductor layer located in the second area, the mass percentage of the second acid solution is 1%wt~8%wt, and the cleaning time is 60s~240s.

[0025] In one of the embodiments, in the texturing treatment of the first surface and the second surface of the silicon substrate, the texturing treatment temperature is 70° C. to 90° C., and the texturing treatment time is 300 s to 480 s.

[0026] In one embodiment, the preparation method further comprises:

[0027] forming a first passivation anti-reflection layer on a side of the first surface away from the silicon substrate, the first passivation anti-reflection layer covering the doped semiconductor layer, the groove and the exposed first surface; and forming a second passivation anti-reflection layer on the second surface;

[0028] A first electrode and a second electrode are formed on the first passivation anti-reflection layer; the first electrode is located in the first region, and one end of the first electrode close to the silicon substrate penetrates through the first passivation anti-reflection layer and extends into the silicon substrate; the second electrode is located in the second region, and one end of the second electrode close to the silicon substrate penetrates through the first passivation anti-reflection layer and extends into the doped semiconductor layer.

[0029] In one embodiment, the step of forming a first electrode and a second electrode on the first passivation anti-reflection layer includes:

[0030] forming a first electrode on the first passivation anti-reflection layer located in the first region, wherein one end of the first electrode close to the silicon substrate penetrates through the first passivation anti-reflection layer and penetrates into the silicon substrate, and in the thickness direction of the silicon substrate, a distance between one end of the first electrode penetrating into the silicon substrate and the first surface is less than a depth of the groove;

[0031] A second electrode is formed on the first passivation anti-reflection layer located in the second region, and one end of the second electrode close to the silicon substrate penetrates through the first passivation anti-reflection layer and extends into the doped semiconductor layer.

[0032] A photovoltaic module provided by an embodiment of the second aspect of the present application includes a back-contact solar cell manufactured by the method for preparing a back-contact solar cell described in any of the above embodiments.

[0033] The method for preparing the above-mentioned back-contact solar cell performs laser removal on the laser blocking layer located in the first region and the doped semiconductor layer and the tunneling oxide layer at the adjacent position of the first region and the second region, that is, uses laser to pattern the laser blocking layer, the doped semiconductor layer and the tunneling oxide layer, which can simplify the patterning process and difficulty, and is beneficial to improving the preparation efficiency of the back-contact solar cell. Moreover, the laser blocking layer can absorb the energy of the laser, which can reduce the damage of the laser etching to the silicon substrate, and is beneficial to improving the yield and reliability of the back-contact solar cell.

[0034] By performing texturing and etching on the silicon substrate, the doped semiconductor layer, the tunneling oxide layer and the laser blocking layer in the first region are removed to expose the first surface in the first region and the doped semiconductor layer in the second region, and an isolation region is formed at a position adjacent to the first region and the second region, and the isolation region includes a groove extending from the first surface into the silicon substrate, and a velvet structure is formed on the side walls and bottom walls of the groove and the second surface. That is to say, the texturing treatment and the etching treatment are combined to separate the first region and the second region, and at the same time, a velvet structure is formed on the side walls and bottom walls of the groove and the second surface, which can simplify the patterning process on the first surface side of the silicon substrate and reduce the probability of leakage of the back-contact solar cell, thereby improving the preparation efficiency and yield rate of the back-contact solar cell and improving the reliability of the back-contact solar cell.

[0035] In addition, while forming the grooves on the first surface, damage to the first surface caused by laser etching can be removed, thereby further improving the yield and reliability of the back contact solar cell.

[0036] In addition, forming a suede structure on the sidewalls and bottom wall of the groove can be beneficial to the production of subsequent film layers, improve the film formation quality of subsequent film layers, and help improve the yield and reliability of back-contact solar cells.

[0037] In summary, the present application can simplify the preparation process of back-contact solar cells, while reducing the probability of leakage of back-contact solar cells, which is beneficial to improving the production efficiency and yield rate of back-contact solar cells and improving the reliability of back-contact solar cells. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] FIG. 1 is a first flow chart of a method for preparing a back-contact solar cell provided in one embodiment of the present application.

[0039] FIG. 2 is a second flow chart of a method for preparing a back-contact solar cell provided in an embodiment of the present application.

[0040] FIG. 3 is a third flow chart of a method for preparing a back-contact solar cell provided in an embodiment of the present application.

[0041] FIG. 4 is a fourth flow chart of a method for preparing a back-contact solar cell provided in an embodiment of the present application.

[0042] FIG. 5 is a fifth flow chart of a method for preparing a back-contact solar cell provided in an embodiment of the present application.

[0043] FIG. 6 is a sixth flow chart of a method for preparing a back-contact solar cell provided in an embodiment of the present application.

[0044] FIG. 7 is a process flow chart of a method for preparing a back-contact solar cell provided in one embodiment of the present application.

[0045] FIG8 is a schematic diagram of the structure of a back-contact solar cell provided in one embodiment of the present application.

[0046] Description of reference numerals:

[0047] 11. Silicon substrate; 111. First surface; 111a. First region; 111b. Second region; 111c. Isolation region; 112. Second surface; 113. Groove; 12. Tunneling oxide layer; 13a. Intrinsic amorphous silicon layer; 13. Doped semiconductor layer; 14. Laser blocking layer; 14a. First oxide layer; 14b. Second oxide layer; 151. First passivation anti-reflection layer; 152. Second passivation anti-reflection layer; 15a. Passivation layer; 15b. Anti-reflection layer; 16. First electrode; 17. Second electrode; 18. Suede structure. DETAILED DESCRIPTION

[0048] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific embodiments disclosed below.

[0049] In the description of the present application, it should be understood that if the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. appear, the orientation or position relationship indicated by these terms is based on the orientation or position relationship shown in the accompanying drawings, which is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.

[0050] In addition, if the terms "first" or "second" appear, these terms are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, if the term "plurality" appears, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0051] In this application, unless otherwise clearly specified and limited, if the terms "installed", "connected", "connected", "fixed" and the like appear, these terms should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integrated connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to the specific circumstances.

[0052] In the present application, unless otherwise clearly specified and limited, if there is a description that a first feature is "above" or "below" a second feature, etc., or similar descriptions appear, it may mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediate medium. Moreover, the first feature being "above", "above" and "above" the second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. The first feature being "below", "below" and "below" the second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0053] It should be noted that if an element is referred to as being "fixed to" or "disposed on" another element, it may be directly on the other element or there may be a central element. If an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. If any, the terms "vertical", "horizontal", "upper", "lower", "left", "right" and similar expressions used in this application are for illustrative purposes only and do not represent the only implementation method.

[0054] Solar cells, also known as photovoltaic cells, are semiconductor devices that convert sunlight directly into electrical energy. As they are green and environmentally friendly products that do not cause environmental pollution, and solar energy is a renewable resource, solar cells are a new type of battery with broad development prospects.

[0055] Back contact (BC) cell is an advanced design used to improve the efficiency of solar cells. Its core design concept is to place all the metal electrodes of the cell on the back of the cell, thereby ensuring that the front of the cell is not blocked by any metal grid lines, thereby maximizing the area of ​​the cell that absorbs sunlight, reducing optical losses and improving photoelectric conversion efficiency.

[0056] However, because all metal electrodes are arranged on the back of the battery cell, the patterning process of the back of the BC battery is complicated and difficult, and leakage problems are prone to occur on the back, which affects the conversion efficiency of the BC battery and restricts the development of the BC battery.

[0057] Based on the above technical problems, the present application provides a back-contact solar cell and its preparation method and photovoltaic module to simplify the preparation process of the back-contact solar cell and improve the preparation efficiency, while reducing the probability of leakage of the back-contact solar cell and improving the reliability of the back-contact solar cell.

[0058] In the first aspect, referring to FIG. 1 , a method for preparing a back-contact solar cell provided by an embodiment of the present application includes:

[0059] S10, providing a silicon substrate 11, wherein the silicon substrate 11 includes a first surface 111 and a second surface 112 arranged opposite to each other, and the silicon substrate 11 includes first regions 111a and second regions 111b distributed alternately;

[0060] Specifically, the silicon substrate 11 can be chemically cleaned to remove metal ions, impurity ions and damage on the first surface 111 and the second surface 112 of the silicon substrate 11. For example, the silicon substrate 11 can be cleaned with an alkaline solution at a cleaning temperature of 50°C to 70°C, and the alkaline solution includes at least one of an NH4OH solution, a NaOH solution and a KoH solution; the first surface 111 is a backlight surface, and the second surface 112 is a light-receiving surface; the silicon substrate 11 can be a P-type silicon substrate 11 or an N-type silicon substrate 11.

[0061] S20, forming a tunneling oxide layer 12, a doped semiconductor layer 13 and a laser blocking layer 14 in sequence on the first surface 111, wherein the doping type of the doped semiconductor layer 13 is opposite to the doping type of the silicon substrate 11;

[0062] S30, performing laser removal on the laser blocking layer 14 located in the first region 111a and the doped semiconductor layer 13 and the tunneling oxide layer 12 located at the adjacent positions of the first region 111a and the second region 111b;

[0063] S40, performing texturing and etching on the silicon substrate 11 to remove the doped semiconductor layer 13 and the tunneling oxide layer 12 located in the first area 111a and the laser blocking layer 14 located in the second area 111b to expose the first surface 111 located in the first area 111a and the doped semiconductor layer 13 located in the second area 111b, and forming an isolation region 111c at a position adjacent to the first area 111a and the second area 111b, and the isolation region 111c includes a groove 113 extending from the first surface 111 into the silicon substrate 11, and a texturing structure 18 is formed on the side walls and bottom walls of the groove 113 and the second surface 112.

[0064] The method for preparing a back-contact solar cell provided in an embodiment of the present application performs laser removal on the laser blocking layer 14 located in the first region 111a and the doped semiconductor layer 13 and the tunneling oxide layer 12 at the adjacent positions of the first region 111a and the second region 111b, that is, the laser blocking layer 14, the doped semiconductor layer 13 and the tunneling oxide layer 12 are patterned by laser, which can simplify the patterning process and difficulty, and is beneficial to improving the preparation efficiency of the back-contact solar cell. Moreover, the laser blocking layer 14 can absorb the energy of the laser, which can reduce the damage of the laser etching to the silicon substrate 11, and is beneficial to improving the yield and reliability of the back-contact solar cell. The silicon substrate 11 is subjected to a texturing treatment and an etching treatment to remove the doped semiconductor layer 13 located in the first area 111a, the tunneling oxide layer 12 and the laser blocking layer 14 located in the second area 111b, so as to expose the first surface 111 located in the first area 111a and the doped semiconductor layer 13 located in the second area 111b, and an isolation area 111c is formed at a position where the first area 111a and the second area 111b are adjacent, and the isolation area 111c includes a groove 113 extending from the first surface 111 into the silicon substrate 11, and a textured structure 18 is formed on the side wall and the bottom wall of the groove 113 and the second surface 112. That is, the texturing treatment and the etching treatment are combined to separate the first area 111a from the second area 111b, The formation of the velvet structure 18 on the sidewalls and bottom wall of the groove 113 and the second surface 112 can simplify the patterning process on the first surface 111 side of the silicon substrate 11, and at the same time can reduce the probability of leakage of the back contact solar cell, which is beneficial to improve the preparation efficiency and yield rate of the back contact solar cell, and improve the reliability of the back contact solar cell; in addition, while forming the groove 113 on the first surface 111, the damage caused by laser etching to the first surface 111 can be removed, which can further improve the yield rate and reliability of the back contact solar cell; in addition, the formation of the velvet structure 18 on the sidewalls and bottom wall of the groove 113 can be beneficial to the preparation of subsequent film layers, improve the film formation quality of subsequent film layers, and improve the yield rate and reliability of the back contact solar cell. In summary, the present application can simplify the preparation process of the back contact solar cell, and at the same time reduce the probability of leakage of the back contact solar cell, which is beneficial to improve the preparation efficiency and yield rate of the back contact solar cell, and improve the reliability of the back contact solar cell.

[0065] 2 and 7 , in one embodiment, in S30, laser removal is performed on the laser blocking layer 14 located in the first region 111 a and the doped semiconductor layer 13 and the tunneling oxide layer 12 located at the adjacent positions of the first region 111 a and the second region 111 b, specifically including:

[0066] S310, using a first laser to remove the laser blocking layer 14 located in the first area 111a;

[0067] Specifically, the average power of the first laser is 20W to 100W;

[0068] S320, using a second laser to remove the doped semiconductor layer 13 and the tunneling oxide layer 12 at the position adjacent to the first region 111a and the second region 111b; the energy of the second laser is greater than the energy of the first laser.

[0069] Specifically, the average power of the second laser is 50W to 100W.

[0070] In the above process, the laser blocking layer 14 located in the first area 111a is removed by a first laser, and the doped semiconductor layer 13 and the tunneling oxide layer 12 at the adjacent position of the first area 111a and the second area 111b are removed by a second laser, and the energy of the second laser is greater than the energy of the first laser; that is, lasers with different energies are used to perform patterning treatments on the doped semiconductor layer 13, the tunneling oxide layer 12 and the laser blocking layer 14 in batches, so that the patterning processing efficiency and the patterning accuracy can be improved, which is beneficial to improving the manufacturing efficiency and yield rate of back-contact solar cells, and further beneficial to improving the reliability of back-contact solar cells.

[0071] 3 and 7 , in one embodiment, in S20 , a tunneling oxide layer 12 , a doped semiconductor layer 13 and a laser blocking layer 14 are sequentially formed on the first surface 111 , specifically including:

[0072] S210, forming a tunneling oxide layer 12 and an intrinsic amorphous silicon layer 13a in sequence on the first surface 111;

[0073] Specifically, high temperature oxidation, nitric acid oxidation or ozone oxidation can be used to form a tunneling oxide layer 12 on the first surface 111, and the thickness of the tunneling oxide layer 12 can be 1nm to 3nm; low pressure chemical vapor deposition, plasma enhanced chemical vapor deposition, physical vapor deposition, catalytic chemical vapor deposition, atomic layer deposition or hot filamentation vapor deposition can be used to form an intrinsic amorphous silicon layer 13a on the side of the tunneling oxide layer 12 away from the silicon substrate 11.

[0074] S220, doping the intrinsic amorphous silicon layer 13a by a diffusion process to form a doped semiconductor layer 13, a first oxide layer 14a located on a side of the doped semiconductor layer 13 away from the silicon substrate 11, and a second oxide layer 14b located on the second surface 112, wherein the first oxide layer 14a is a laser blocking layer 14.

[0075] Specifically, the intrinsic amorphous silicon layer 13a can be doped by high temperature ion diffusion, and a doped semiconductor layer 13 and a first oxide layer 14a as a laser blocking layer 14 are formed on the side of the tunnel oxide layer 12 away from the silicon substrate 11, and a second oxide layer 14b is formed on the second surface 112. Both the first oxide layer 14a and the second oxide layer 14b can be silicate glass layers. The thickness of the doped semiconductor layer 13 is 80nm to 300nm, and the doping concentration of the doped semiconductor layer 13 can be 1E20cm -3 ~1E21cm -3 Preferably, the doping concentration of the doped semiconductor layer 13 is 3E20 cm-3.

[0076] In the above process, a tunneling oxide layer 12 and an intrinsic amorphous silicon layer 13a are sequentially formed on the first surface 111, and the intrinsic amorphous silicon layer 13a is doped using a diffusion process. While the doped semiconductor layer 13 is formed, a first oxide layer 14a serving as a laser blocking layer 14 is formed on the side of the doped semiconductor layer 13 away from the silicon substrate 11. In this way, there is no need to prepare the laser blocking layer 14 separately, which is beneficial for simplifying the preparation process of the back-contact solar cell and improving the production efficiency of the back-contact solar cell.

[0077] Referring to FIG. 4 and FIG. 7 , in one embodiment, in S40 , the silicon substrate 11 is subjected to a texturing process and an etching process, which specifically includes:

[0078] S410, performing a first acid etching process on the second surface 112 of the silicon substrate 11 to remove the second oxide layer 14b of the second surface 112;

[0079] S420, performing a texturing process on the first surface 111 and the second surface 112 of the silicon substrate 11, removing the doped semiconductor layer 13 located in the first region 111a, and forming an isolation region 111c at a position adjacent to the first region 111a and the second region 111b, wherein the isolation region 111c includes a groove 113 extending from the first surface 111 into the silicon substrate 11, and a texturing structure 18 is formed on the sidewall and bottom wall of the groove 113 and the second surface 112;

[0080] S430, performing a second acid etching treatment on a side of the first surface 111 away from the silicon substrate 11 to remove the tunneling oxide layer 12 located in the first area 111a and the laser blocking layer 14 located in the second area 111b, so as to expose the first surface 111 located in the first area 111a and the doped semiconductor layer 13 located in the second area 111b.

[0081] In the above process, the second surface 112 of the silicon substrate 11 is subjected to a first acid etching treatment to remove the second oxide layer 14b of the second surface 112, so that the first surface 111 and the second surface 112 of the silicon substrate 11 are simultaneously subjected to a texturing treatment; during the texturing process, the laser blocking layer 14 can protect the doped semiconductor layer 13 and the tunneling oxide layer 12 located in the second region 111b, and while the velvet structure 18 is formed on the second surface 112, the doped semiconductor layer 13 located in the first region 111a can be removed, and a groove 113 with the velvet structure 18 is formed on the first surface 111 to separate the first region 111a and the second region 111b, so that there is no need to etch the doped semiconductor layer located in the first region 111a separately in the subsequent process. 13; utilizing the similar material properties of the laser blocking layer 14 and the tunneling oxide layer 12, a second acid etching treatment is performed on the side of the first surface 111 away from the silicon substrate 11, and the tunneling oxide layer 12 located in the first area 111a and the laser blocking layer 14 located in the second area 111b are removed simultaneously, the first surface 111 located in the first area 111a and the doped semiconductor layer 13 located in the second area 111b are exposed, and the first area 111a is separated from the second area 111b, so that the manufacturing process of the back contact solar cell can be simplified, and the probability of leakage of the back contact solar cell can be reduced, which is beneficial to improving the manufacturing efficiency and yield rate of the back contact solar cell, and further beneficial to improving the reliability of the back contact solar cell.

[0082] In one embodiment, in S410, performing a first acid etching process on the second surface 112 of the silicon substrate 11 to remove the second oxide layer 14b of the second surface 112 specifically includes:

[0083] The second surface 112 of the silicon substrate 11 is chain cleaned with a first acid solution to remove the second oxide layer 14b of the second surface 112; the mass percentage of the first acid solution is 8%wt-15%wt, and the cleaning time is 60s-240s.

[0084] Specifically, the first acid solution may be a hydrofluoric acid solution, the mass percentage of the first acid solution may be 8%wt, 9%wt, 10%wt, 11%wt, 12%wt, 13%wt, 14%wt or 15%wt, and the cleaning time may be 60s to 80s, 80s to 100s, 100s to 120s, 120s to 140s, 140s to 160s, 160s to 190s or 190s to 240s.

[0085] In this way, the second oxide layer 14b of the second surface 112 can be removed while avoiding the removal of the laser blocking layer 14, so as to facilitate the simultaneous texturing of the first surface 111 and the second surface 112 of the silicon substrate 11, and utilize the laser blocking layer 14 to protect the doped semiconductor layer 13 and the tunneling oxide layer 12 located in the second area 111b during the texturing process.

[0086] In one embodiment, in S430, performing a second acid etching process on a side of the first surface 111 away from the silicon substrate 11 includes:

[0087] A second acid solution is used to clean the side of the first surface 111 away from the silicon substrate 11 to remove the tunneling oxide layer 12 located in the first area 111a and the laser blocking layer 14 located in the second area 111b to expose the first surface 111 located in the first area 111a and the doped semiconductor layer 13 located in the second area 111b. The mass percentage of the second acid solution is 1%wt~8%wt, and the cleaning time is 60s~240s.

[0088] Specifically, the second acid solution may be a hydrofluoric acid solution, the mass percentage of the second acid solution may be 1%wt, 2%wt, 3%wt, 4%wt, 5%wt, 6%wt, 6%wt or 7%wt, and the cleaning time may be 60s to 80s, 80s to 100s, 100s to 120s, 120s to 140s, 140s to 160s, 160s to 190s or 190s to 240s.

[0089] In this way, it can be ensured that the tunneling oxide layer 12 located in the first area 111a and the laser blocking layer 14 located in the second area 111b are removed, so that the tunneling oxide layer 12 and the doped semiconductor layer 13 are only located in the second area 111b, so that the first area 111a and the second area 111b are effectively separated, thereby reducing the probability of leakage of the back contact solar cell, which is beneficial to improving the manufacturing efficiency and yield rate of the back contact solar cell, and further beneficial to improving the reliability of the back contact solar cell.

[0090] In one embodiment, in S420, in the texturing process of the first surface 111 and the second surface 112 of the silicon substrate 11, the texturing process temperature is 70° C. to 90° C., and the texturing process time is 300 s to 480 s.

[0091] The texturing liquid can be a mixed solution of NaOH, ADDI and H2O, or a mixed solution of KOH, ADDI and H2O. The temperature of the texturing treatment can be 70℃, 75℃, 80℃, 85℃ or 90℃, and the texturing treatment time can be 300s-350s, 350s-400s, 400s-450s or 450s-480s. The temperature and time of the texturing treatment can be selected according to the actual situation.

[0092] Referring to FIG. 5 and FIG. 7 , in one embodiment, the preparation method further comprises:

[0093] S50, forming a first passivation anti-reflection layer 151 on a side of the first surface 111 away from the silicon substrate 11, the first passivation anti-reflection layer 151 covers the doped semiconductor layer 13, the groove 113 and the exposed first surface 111; forming a second passivation anti-reflection layer 152 on the second surface 112;

[0094] Specifically, the first passivation anti-reflection layer 151 and the second passivation anti-reflection layer 152 may both include a passivation layer 15a and an anti-reflection layer 15b located on the side of the passivation layer 15a away from the silicon substrate 11; the passivation layer 15a may be deposited by plasma enhanced atomic layer deposition (PEALD for short), atomic layer deposition (ALD) or physical vapor deposition (PVD for short); the passivation layer 15a may be aluminum oxide; the thickness of the passivation layer 15a may be 3nm to 10nm; the anti-reflection layer 15b includes at least one of silicon nitride, silicon oxide and silicon oxynitride; the thickness of the anti-reflection layer 15b may be 70nm to 100nm; the refractive index of the anti-reflection layer 15b is 2.0 to 2.4%.

[0095] S60, forming a first electrode 16 and a second electrode 17 on the first passivation anti-reflection layer 151; the first electrode 16 is located in the first region 111a, and one end of the first electrode 16 close to the silicon substrate 11 passes through the first passivation anti-reflection layer 151 and extends into the silicon substrate 11; the second electrode 17 is located in the second region 111b, and one end of the second electrode 17 close to the silicon substrate 11 passes through the first passivation anti-reflection layer 151 and extends into the doped semiconductor layer 13.

[0096] A printing process and a sintering process can be used to form a first electrode 16 located in the first area 111a and a second electrode 17 located in the second area 111b on the first passivation anti-reflection layer 151, and an end of the first electrode 16 close to the silicon substrate 11 passes through the first passivation anti-reflection layer 151 and penetrates into the silicon substrate 11, and an end of the second electrode 17 close to the silicon substrate 11 passes through the first passivation anti-reflection layer 151 and penetrates into the doped semiconductor layer 13, so that the first electrode 16 and the silicon substrate 11, and the second electrode 17 and the doped semiconductor layer 13 form good contact, which is beneficial to improving the conversion efficiency of the back contact solar cell.

[0097] 6 and 7 , in one embodiment, in S60 , forming a first electrode 16 and a second electrode 17 on the first passivation anti-reflection layer 151 specifically includes:

[0098] S610, forming a first electrode 16 on the first passivation anti-reflection layer 151 located in the first region 111a, wherein one end of the first electrode 16 close to the silicon substrate 11 passes through the first passivation anti-reflection layer 151 and penetrates into the silicon substrate 11, and in the thickness direction of the silicon substrate 11, a distance L between one end of the first electrode 16 penetrating into the silicon substrate 11 and the first surface 111 is less than a depth S of the groove 113;

[0099] S620 , forming a second electrode 17 on the first passivation anti-reflection layer 151 located in the second region 111 b , wherein one end of the second electrode 17 close to the silicon substrate 11 penetrates through the first passivation anti-reflection layer 151 and extends deep into the doped semiconductor layer 13 .

[0100] In the above process, the first electrode 16 and the second electrode 17 are formed step by step, so that in the thickness direction of the silicon substrate 11, the distance between one end of the first electrode 16 penetrating into the silicon substrate 11 and the first surface 111 is less than the depth of the groove 113, and the end of the second electrode 17 close to the silicon substrate 11 passes through the first passivation anti-reflection layer 151 and penetrates into the doped semiconductor layer 13. In this way, the groove 113 can effectively separate the end of the first electrode 16 penetrating into the silicon substrate 11 from the tunneling oxide layer 12 and the doped semiconductor layer 13 located in the second area 111b, thereby reducing the recombination of carriers in the area close to the end of the first electrode 16 penetrating into the silicon substrate 11, thereby ensuring the conversion efficiency of the back contact solar cell.

[0101] In the second aspect, a back-contact solar cell provided in one embodiment of the present application is manufactured using the method for manufacturing a back-contact solar cell in any of the above embodiments, thereby reducing the probability of leakage of the back-contact solar cell and improving the reliability of the back-contact solar cell.

[0102] Referring to FIG8 , in a third aspect, an embodiment of the present application provides a back-contact solar cell, comprising a silicon substrate 11, a tunneling oxide layer 12 and a doped semiconductor layer 13, wherein the silicon substrate 11 comprises a first surface 111 and a second surface 112 arranged opposite to each other, the silicon substrate 11 comprises first regions 111a and second regions 111b which are alternately distributed, an isolation region 111c is provided at a position adjacent to the first region 111a and the second region 111b, the isolation region 111c comprises a groove 113 extending from the first surface 111 into the silicon substrate 11, and a velvet structure 18 is provided on the sidewall, the bottom wall and the second surface 112 of the groove 113; the tunneling oxide layer 12 is located in the second region 111b and is arranged on the first surface 111; the doped semiconductor layer 13 is arranged on a side of the tunneling oxide layer 12 away from the silicon substrate 11.

[0103] In the back contact solar cell provided by the embodiment of the present application, the silicon substrate 11 includes a first region 111a and a second region 111b that are alternately distributed, and an isolation region 111c is provided at the adjacent position of the first region 111a and the second region 111b, so that the isolation region 111c includes a groove 113 that extends from the first surface 111 into the silicon substrate 11, and the side wall, bottom wall and second surface 112 of the groove 113 are provided with a velvet structure 18; in this way, the groove 113 can separate the first region 111a and the second region 111b, thereby reducing the probability of leakage of the back contact solar cell and improving the reliability of the back contact solar cell; in addition, the side wall and bottom wall of the groove 113 are provided with a velvet structure 18, which can be beneficial to improving the deposition of subsequent film layers and improving the quality of subsequent deposited film layers, thereby facilitating the improvement of the conversion efficiency of the back contact solar cell. In addition, the second surface 112 is provided with a velvet structure 18, which can improve the light utilization rate of the back contact solar cell, thereby facilitating the improvement of the conversion efficiency of the back contact solar cell. In summary, the embodiments of the present application can reduce the probability of leakage of back-contact solar cells, which is beneficial to improving the conversion efficiency of back-contact solar cells and improving the reliability of back-contact solar cells.

[0104] Referring to Figure 8, in one embodiment, the back-contact solar cell also includes a first passivation anti-reflection layer 151, a second passivation anti-reflection layer 152, a first electrode 16 and a second electrode 17; the first passivation anti-reflection layer 151 covers the doped semiconductor layer 13, the groove 113 and the first surface 111 located in the first area 111a; the second passivation anti-reflection layer 152 covers the second surface 112; the first electrode 16 and the second electrode 17 are both arranged on the first passivation anti-reflection layer 151; the first electrode 16 is located in the first area 111a, and one end of the first electrode 16 close to the silicon substrate 11 passes through the first passivation anti-reflection layer 151 and penetrates into the silicon substrate 11; the second electrode 17 is located in the second area 111b, and one end of the second electrode 17 close to the silicon substrate 11 passes through the first passivation anti-reflection layer 151 and penetrates into the doped semiconductor layer 13.

[0105] In this way, by providing the first passivation anti-reflection layer 151 and the second passivation anti-reflection layer 152, the surface recombination of carriers can be reduced, the reflection loss of light can be reduced, and the conversion efficiency of the back-contact solar cell can be improved. In addition, by allowing the end of the first electrode 16 close to the silicon substrate 11 to pass through the first passivation anti-reflection layer 151 and penetrate into the silicon substrate 11; the end of the second electrode 17 close to the silicon substrate 11 to pass through the first passivation anti-reflection layer 151 and penetrate into the doped semiconductor layer 13, the first electrode 16 and the silicon substrate 11, and the second electrode 17 and the doped semiconductor layer 13 can form good contacts, which is beneficial to improving the conversion efficiency of the back-contact solar cell.

[0106] 7 and 8 , in one embodiment, in the thickness direction of the silicon substrate 11 , a distance L between one end of the first electrode 16 that penetrates into the silicon substrate 11 and the first surface 111 is smaller than a depth S of the groove 113 .

[0107] In this way, the groove 113 can effectively separate the end of the first electrode 16 that penetrates into the silicon substrate 11 from the tunneling oxide layer 12 and the doped semiconductor layer 13 located in the second area 111b, reducing the recombination of carriers in the area near the end of the first electrode 16 that penetrates into the silicon substrate 11, thereby ensuring the conversion efficiency of the back-contact solar cell.

[0108] In one embodiment, the depth of the groove 113 is 1um to 10um in the thickness direction of the silicon substrate 11. Specifically, the depth of the groove 113 can be 1um to 3um, 3um to 6um, 6um to 10um, or any value between 1um and 10um. The depth of the groove 113 can be selected according to actual conditions and is not particularly limited here.

[0109] In this way, setting the depth of the groove 113 within this reasonable range can avoid the groove 113 being too small, resulting in the groove 113 being unable to effectively play an isolation effect, and can also avoid the groove 113 being too deep, resulting in the strength of the silicon substrate 11 at the groove 113 being greatly reduced, thereby reducing the risk of cracks in the process of manufacturing back-contact solar cells.

[0110] In one embodiment, the width of the groove 113 is 30um to 60um. Specifically, the width of the groove 113 can be 30um, 35um, 48um, 52um, 55um, 58um, 60um or any value between 30um and 60um. The width of the groove 113 can be selected according to actual conditions and is not particularly limited here.

[0111] Thus, by setting the width of the groove 113 within this reasonable range, on the one hand, it is possible to avoid the width of the groove 113 being too small to isolate the doped semiconductor layer 13 located in the second area 111b and the first surface 111 located in the first area 111a; on the other hand, it is possible to avoid the width of the groove 113 being too large to cause the ineffective area of ​​the back contact solar cell to be too large.

[0112] 8 , in one embodiment, the first passivation anti-reflection layer 151 and the second passivation anti-reflection layer 152 both include a passivation layer 15 a and an anti-reflection layer 15 b disposed on a side of the passivation layer 15 a away from the silicon substrate 11 .

[0113] In this way, by making the first passivation anti-reflection layer 151 and the second passivation anti-reflection layer 152 both include a passivation layer 15a and an anti-reflection layer 15b arranged on the side of the passivation layer 15a away from the silicon substrate 11, the surface recombination of carriers can be reduced, the reflection loss of light can be reduced, and the conversion efficiency of the back contact solar cell can be improved.

[0114] In a specific example, the material of the passivation layer 15a includes at least one of aluminum oxide, silicon oxide, silicon nitride, silicon oxynitride, and magnesium fluoride. The anti-reflection layer 15b includes at least one of silicon oxide, silicon nitride, silicon oxynitride, and magnesium fluoride.

[0115] In a specific example, the thickness of the passivation layer 15a may be 3 nm to 10 nm. Specifically, the thickness of the passivation layer 15a may be 3 nm, 5 nm, 7 nm, 8 nm, 10 nm or any value between 3 nm and 10 nm, and no special limitation is made herein.

[0116] Thus, by setting the thickness of the passivation layer 15a within this reasonable range, the passivation effect can be improved, thereby facilitating the improvement of the conversion efficiency of the back contact solar cell.

[0117] In a specific example, the thickness of the anti-reflection layer 15b may be 70nm to 110nm. Specifically, the thickness of the anti-reflection layer 15b may be 70nm, 75nm, 80nm, 85nm, 90nm, 95nm, 100nm or any value between 70nm and 110nm, without any special limitation.

[0118] Thus, by setting the thickness of the anti-reflection layer 15b within this reasonable range, the reflection of light can be reduced, and the light utilization rate of the back-contact solar cell can be improved, which is beneficial to improving the conversion efficiency of the back-contact solar cell.

[0119] In a specific example, the refractive index of the anti-reflection layer 15b is 2.0% to 2.4%. Specifically, the refractive index of the anti-reflection layer 15b can be 2.0%, 2.1%, 2.2%, 2.3%, 2.4% or any value between 2.0% and 2.4%, and is not particularly limited here.

[0120] In this way, by setting the refractive index of the anti-reflection layer 15b within this reasonable range, the light utilization rate of the back-contact solar cell is improved, which is beneficial to improving the conversion efficiency of the back-contact solar cell.

[0121] In a fourth aspect, an embodiment of the present application provides a photovoltaic module, comprising the back-contact solar cell in any of the above embodiments, so as to improve the reliability of the photovoltaic module and ensure the power generation of the photovoltaic module.

[0122] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0123] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A method for preparing a back contact solar cell, characterized in that: include: Providing a silicon substrate, the silicon substrate comprising a first surface and a second surface arranged opposite to each other, the silicon substrate comprising first regions and second regions distributed alternately; forming a tunneling oxide layer, a doped semiconductor layer and a laser blocking layer in sequence on the first surface, wherein the doping type of the doped semiconductor layer is opposite to the doping type of the silicon substrate; Performing laser removal on the laser blocking layer located in the first region and the doped semiconductor layer and the tunnel oxide layer at a position adjacent to the first region and the second region; The silicon substrate is subjected to texturing and etching treatments to remove the doped semiconductor layer, the tunneling oxide layer and the laser blocking layer located in the first region to expose the first surface located in the first region and the doped semiconductor layer located in the second region, and an isolation region is formed at a position adjacent to the first region and the second region, and the isolation region includes a groove extending from the first surface into the silicon substrate, and a textured structure is formed on the side walls and bottom walls of the groove and the second surface.

2. The method for preparing a back contact solar cell according to claim 1, characterized in that: The step of laser removing the laser blocking layer located in the first region and the doped semiconductor layer and the tunneling oxide layer at the position where the first region and the second region are adjacent comprises: Using a first laser to remove the laser blocking layer located in the first area; A second laser is used to remove the doped semiconductor layer and the tunneling oxide layer at a position adjacent to the first region and the second region; the energy of the second laser is greater than the energy of the first laser.

3. The method for preparing a back contact solar cell according to claim 1, characterized in that: The step of sequentially forming a tunneling oxide layer, a doped semiconductor layer and a laser blocking layer on the first surface comprises: forming a tunneling oxide layer and an intrinsic amorphous silicon layer in sequence on the first surface; The intrinsic amorphous silicon layer is doped by a diffusion process to form a doped semiconductor layer, a first oxide layer located on a side of the doped semiconductor layer away from the silicon substrate, and a second oxide layer located on the second surface, wherein the first oxide layer is the laser blocking layer.

4. The method for preparing a back contact solar cell according to claim 3, characterized in that: The step of performing texturing and etching on the silicon substrate comprises: Performing a first acid etching treatment on the second surface of the silicon substrate to remove the second oxide layer on the second surface; Performing a texturing process on the first surface and the second surface of the silicon substrate, removing the doped semiconductor layer located in the first region, and forming an isolation region at a position adjacent to the first region and the second region, wherein the isolation region includes a groove extending from the first surface into the silicon substrate, and a texturing structure is formed on the sidewall and bottom wall of the groove and the second surface; A second acid etching process is performed on a side of the first surface away from the silicon substrate to remove the tunneling oxide layer located in the first area and the laser blocking layer located in the second area to expose the first surface located in the first area and the doped semiconductor layer located in the second area.

5. The method for preparing a back contact solar cell according to claim 4, characterized in that: The step of performing a first acid etching treatment on the second surface of the silicon substrate to remove the second oxide layer on the second surface includes: The second surface of the silicon substrate is chain-cleaned using a first acid solution to remove the second oxide layer on the second surface; the mass percentage of the first acid solution is 8%wt-15%wt, and the cleaning time is 60s-240s.

6. The method for preparing a back contact solar cell according to claim 4, characterized in that: The step of performing a second acid etching treatment on a side of the first surface away from the silicon substrate comprises: A second acid solution is used to clean the side of the first surface away from the silicon substrate to remove the tunneling oxide layer located in the first area and the laser blocking layer located in the second area to expose the first surface located in the first area and the doped semiconductor layer located in the second area, the mass percentage of the second acid solution is 1%wt~8%wt, and the cleaning time is 60s~240s.

7. The method for preparing a back contact solar cell according to claim 4, characterized in that: In the texturing process for the first surface and the second surface of the silicon substrate, the temperature of the texturing process is 70° C. to 90° C., and the time of the texturing process is 300 s to 480 s.

8. The method for preparing a back contact solar cell according to any one of claims 1 to 7, characterized in that: The preparation method further comprises: forming a first passivation anti-reflection layer on a side of the first surface away from the silicon substrate, the first passivation anti-reflection layer covering the doped semiconductor layer, the groove and the exposed first surface; and forming a second passivation anti-reflection layer on the second surface; A first electrode and a second electrode are formed on the first passivation anti-reflection layer; the first electrode is located in the first region, and one end of the first electrode close to the silicon substrate penetrates through the first passivation anti-reflection layer and extends into the silicon substrate; the second electrode is located in the second region, and one end of the second electrode close to the silicon substrate penetrates through the first passivation anti-reflection layer and extends into the doped semiconductor layer.

9. The method for preparing a back contact solar cell according to claim 8, characterized in that: The step of forming a first electrode and a second electrode on the first passivation anti-reflection layer comprises: forming a first electrode on the first passivation anti-reflection layer located in the first region, wherein one end of the first electrode close to the silicon substrate penetrates through the first passivation anti-reflection layer and penetrates into the silicon substrate, and in the thickness direction of the silicon substrate, a distance between one end of the first electrode penetrating into the silicon substrate and the first surface is less than a depth of the groove; A second electrode is formed on the first passivation anti-reflection layer located in the second region, and one end of the second electrode close to the silicon substrate penetrates through the first passivation anti-reflection layer and extends into the doped semiconductor layer.

10. A photovoltaic module, characterized in that: It comprises a back-contact solar cell manufactured by the method for preparing a back-contact solar cell according to any one of claims 1 to 9.

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