Flexible charging control system and control method thereof, storage medium and computer device

Abstract

The application discloses a flexible charging control system and a control method thereof, a storage medium and computer equipment, and relates to the technical field of charging control. The system comprises: a switch assembly connected between a power grid and a load to be charged, comprising a plurality of phase line switching switches; a voltage sampling circuit connected with the output end of the switch assembly, used for detecting the output voltage of the power grid; a controller used for sending a control signal of the phase line switching switch; a logic self-locking circuit used for outputting a charging control signal when it is detected that the power grid does not output voltage and it is detected that the control signal of the phase line switching switch sent by the controller is only one valid; and a switch driving circuit used for controlling the phase line switching switch to be closed when only one control signal of the phase line switching switch and the charging control signal are received, so that only one phase line is connected with the load in the same charging period. The system can effectively improve the safety and reliability of the charging control system and reduce the complexity of system installation.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of charging control, in particular to a flexible charging control system, a control method thereof, a storage medium and a computer device. BACKGROUND

[0002] With the rapid development of the new energy industry, the popularity of new energy products (for example, electric vehicles) is also increasing, and the demand for energy (for example, electric energy) is also increasing. At present, after the laying of a three-phase charging network, there are still a large number of single-phase charging systems of electric vehicles on the market. When these single-phase charging system electric vehicles use a three-phase charging system charging pile, the problem of unbalanced three-phase load often occurs, causing the single-phase load of the power grid to be too heavy, the voltage output to be unstable, and even problems such as the burning of the distribution transformer.

[0003] In the traditional technology, the problem of unbalanced power grid load is mainly solved by a passive method. The passive method refers to grouping the charging piles when the charging piles are installed, and then adjusting the access phase sequence inside the charging pile to make the load power on the three phases close, so as to achieve power grid load balancing. However, the passive method cannot dynamically adjust the problem of unbalanced load, and needs to be implemented by setting a forbidden charging to guide users to charge at a specified location, which is difficult to achieve true balance and makes it difficult to improve the utilization rate of the power grid. Moreover, special treatment needs to be done on power distribution during the installation of the charging pile, thereby increasing the complexity of construction during the installation of the charging pile. SUMMARY

[0004] Therefore, the embodiments of the present application provide a flexible charging control system, a control method thereof, a storage medium and a computer device, which are mainly used to solve the technical problems of low power grid utilization rate, great safety hidden danger and high complexity of charging pile power distribution installation when charging the load of the single-phase charging system through the three-phase charging system.

[0005] According to one aspect of the present application, a flexible charging control system is provided, which comprises:

[0006] A switch assembly connected between the power grid side and the load to be charged, comprising a plurality of phase line switching switches, each phase line switching switch being connected in series between the power grid side of a phase line and the load;

[0007] A voltage sampling circuit connected to the output end of the switch assembly, for detecting the output voltage of the power grid;

[0008] A controller for issuing a control signal of the phase line switching switch;

[0009] a logic self-locking circuit, connected to the output of the voltage sampling circuit and the output of the controller, for outputting a charging control signal when detecting that the power grid does not output voltage and the control signal of the phase line switching switch sent by the controller is only one valid;

[0010] a switch driving circuit, connected to the output of the controller and the output of the logic self-locking circuit, for controlling the phase line switching switch to be closed when only receiving one control signal of the phase line switching switch and the charging control signal, so that only one phase line is connected to the load in the same charging period.

[0011] Optionally, the switch assembly includes three phase line switching switches, the first ends of the three phase line switching switches are respectively connected to three phase lines, and the second ends of the three phase line switching switches are connected together as the output of the switch assembly and the input of the voltage sampling circuit.

[0012] Optionally, the switch assembly further includes at least one main power switch, the main power switch is connected in series between a phase line and the load, for controlling the on-off between a phase line and the load.

[0013] Optionally, the output of the logic self-locking circuit is further connected to the input of the controller, and the logic self-locking circuit is further used for outputting a charging state signal to the controller.

[0014] Optionally, the logic self-locking circuit includes a first logic self-locking circuit and a second logic self-locking circuit, wherein the input of the first logic self-locking circuit is connected to the output of the controller, the output is connected to the enable end of the second logic self-locking circuit; the first logic self-locking circuit is used for receiving a plurality of control signals of the phase line switching switch, and outputting a charging enable signal when detecting that only one control signal of the phase line switching switch is valid; the input of the second logic self-locking circuit is connected to the output of the voltage sampling circuit, the enable end is connected to the output of the first logic self-locking circuit, and the output is connected to the input of the switch driving circuit; the second logic self-locking circuit is used for following and holding the voltage detection signal output by the voltage sampling circuit when receiving the charging enable signal, to obtain the charging control signal.

[0015] Optionally, the output of the second logic self-locking circuit includes a first output and a second output, the first output is connected to the input of the switch driving circuit, and the second output is connected to the input of the controller; the second logic self-locking circuit is used for outputting the charging control signal to the switch driving circuit and outputting a charging state signal to the controller.

[0016] Optionally, the switch assembly comprises a first phase line switching switch, a second phase line switching switch and a third phase line switching switch; the first logic self-locking circuit comprises a first exclusive OR gate circuit, a second exclusive OR gate circuit, a first AND gate circuit and a second AND gate circuit, wherein three input ends of the first exclusive OR gate circuit are connected with a first output end, a second output end and a third output end of the controller respectively; the first exclusive OR gate circuit is configured to receive control signals of the first phase line switching switch, the second phase line switching switch and the third phase line switching switch, and output a first logic operation signal; two input ends of the first AND gate circuit are connected with the first output end and the second output end of the controller respectively; the first AND gate circuit is configured to receive control signals of the first phase line switching switch and the second phase line switching switch, and output a second logic operation signal; two input ends of the second AND gate circuit are connected with the third output end of the controller and an output end of the first AND gate circuit respectively; the second AND gate circuit is configured to receive a control signal of the third phase line switching switch and the second logic operation signal, and output a third logic operation signal; two input ends of the second exclusive OR gate circuit are connected with an output end of the first exclusive OR gate circuit and an output end of the second AND gate circuit respectively, and an output end is connected with an enable end of the second logic self-locking circuit; the second exclusive OR gate circuit is configured to receive the first logic operation signal and the third logic operation signal, and output the charging enable signal.

[0017] Optionally, the first logic self-locking circuit further comprises at least one first delay circuit, wherein the first delay circuit is arranged between an output end of the controller and an input end of the first exclusive OR gate circuit; and / or the first delay circuit is arranged between the output end of the controller and an input end of the first AND gate circuit; and / or the first delay circuit is arranged between the output end of the controller and an input end of the second AND gate circuit; and / or the first delay circuit is arranged between an output end of the first exclusive OR gate circuit and an input end of the second exclusive OR gate circuit; and / or the first delay circuit is arranged between an output end of the second AND gate circuit and an input end of the second exclusive OR gate circuit.

[0018] Optionally, the second logic self-locking circuit comprises a D flip-flop, wherein a data input end of the D flip-flop is connected with an output end of the voltage sampling circuit, a clock signal input end and a clear enable end are connected with an output end of the first logic self-locking circuit respectively, and an output end is connected with an input end of the switch driving circuit; the D flip-flop is configured to follow and hold the voltage detection signal when receiving the charging enable signal, and output the charging control signal.

[0019] Optionally, the second logic self-locking circuit further comprises a third AND gate circuit and a fourth AND gate circuit, wherein two input ends of the third AND gate circuit are connected with an output end of the voltage sampling circuit and an output end of the first logic self-locking circuit respectively, and an output end is connected with a clock signal input end of the D flip-flop; the third AND gate circuit is used for receiving the voltage detection signal and the charging enable signal, and outputting a clock signal to the D flip-flop; two input ends of the fourth AND gate circuit are connected with the output end of the first logic self-locking circuit, and an output end is connected with a clear enable end of the D flip-flop; the fourth AND gate circuit is used for receiving the charging enable signal, and outputting a stop clear signal to the D flip-flop.

[0020] Optionally, the second logic self-locking circuit further comprises at least one second delay circuit, wherein the second delay circuit is arranged between the output end of the first logic self-locking circuit and the input end of the third AND gate circuit, and / or the second delay circuit is arranged between the output end of the voltage sampling circuit and the input end of the third AND gate circuit, and / or the second delay circuit is arranged between the output end of the voltage sampling circuit and the data input end of the D flip-flop, and / or the second delay circuit is arranged between the output end of the third AND gate circuit and the clock signal input end of the D flip-flop, and / or the second delay circuit is arranged between the output end of the fourth AND gate circuit and the clear enable end of the D flip-flop.

[0021] Optionally, the delay time of the second delay circuit arranged between the output end of the fourth AND gate circuit and the clear enable end of the D flip-flop is shorter than the delay time of the second delay circuit arranged between the output end of the third AND gate circuit and the clock signal input end of the D flip-flop.

[0022] Optionally, the switch driving circuit comprises a plurality of fifth AND gate circuits, wherein two input ends of the fifth AND gate circuit are connected with an output end of the logic self-locking circuit and an output end of the controller respectively, and an output end is connected with a control end of the phase line switching switch; the fifth AND gate circuit is used for outputting a switch driving signal to the control end of the phase line switching switch when receiving the charging control signal and the control signal of the phase line switching switch, so as to make the phase line switching switch closed, and make the phase line where the phase line switching switch is located connected with the load.

[0023] Optionally, the switch driving circuit further comprises at least one third delay circuit, wherein the third delay circuit is arranged between the output end of the logic self-locking circuit and the input end of the fifth AND gate circuit, and / or the third delay circuit is arranged between the output end of the controller and the input end of the fifth AND gate circuit.

[0024] Optionally, the voltage sampling circuit includes an optocoupler; the two input terminals of the optocoupler are respectively connected to the neutral line of the power grid and the output terminal of the switching assembly, and the output terminal is connected to the input terminal of the logic self-locking circuit; the optocoupler is used to convert the output voltage of the power grid into a voltage detection signal of the power grid and output it to the logic self-locking circuit.

[0025] Optionally, the optocoupler is an AC optocoupler or a DC optocoupler; when the optocoupler is a DC optocoupler, the voltage sampling circuit further includes a rectifier bridge circuit and a voltage regulator filter circuit, wherein the two input terminals of the rectifier bridge circuit are respectively connected to the neutral line of the power grid and the output terminal of the switching assembly, the output terminal of the rectifier bridge circuit is connected to the input terminal of the voltage regulator filter circuit, the output terminal of the voltage regulator filter circuit is connected to the two input terminals of the optocoupler, and the output terminal of the optocoupler is connected to the input terminal of the logic self-locking circuit.

[0026] Optionally, the system further includes a cloud server connected to the controller. The cloud server is used to generate phase line switching instructions based on the power of each phase line and send the phase line switching instructions to the controller, so that the controller generates a control signal for a phase line switching switch corresponding to the phase line switching instructions.

[0027] According to another aspect of this application, a flexible charging control method is provided, the method being applied in the flexible charging control system described in claim 1, the method comprising:

[0028] In response to load charging commands, real-time power data of each phase line on the grid side is obtained;

[0029] Based on the real-time power data of each phase line on the power grid side, a phase line switching strategy is determined, and a control signal for the phase line switching switch is generated according to the phase line switching strategy.

[0030] The control signal of the phase line switching switch is sent to the logic self-locking circuit and the switch driving circuit, so that the logic self-locking circuit and the switch driving circuit control the phase line switching switch to close according to the control signal of the phase line switching switch, so that only one phase line is connected to the load during the same charging period.

[0031] Optionally, the method further comprises: receiving the charging state signal output by the logic self-locking circuit; in the charging state, if it is detected that the charging state signal is an invalid signal, setting the control signals of all phase line switching switches to invalid signals to cut off the connection between all phase lines and the load; in the idle state, if it is detected that the charging state signal is a valid signal, setting the control signals of all phase line switching switches to invalid signals to cut off the connection between all phase lines and the load.

[0032] Optionally, the method further comprises: detecting the charging mode of the flexible charging control system, wherein the charging mode includes a single-phase charging mode and a multi-phase charging mode; in the charging state, if it is detected that the single-phase charging mode is selected, controlling one phase line switching switch in the switching assembly to be closed to enable only one phase line to be connected to the load in the same charging period; in the charging state, if it is detected that the multi-phase charging mode is selected, controlling multiple main power switches in the switching assembly to be closed to enable multiple phase lines to be connected to the load in the same charging period.

[0033] Optionally, the method further comprises: receiving the phase line switching instruction sent by the cloud controller, wherein the phase line switching instruction is generated by the cloud controller according to real-time power data of each phase line on the grid side; generating the control signal of the phase line switching switch according to the phase line switching instruction, and sending the control signal of the phase line switching switch to the logic self-locking circuit and the switching driving circuit, so that the logic self-locking circuit and the switching driving circuit control the phase line switching switch to be closed according to the control signal of the phase line switching switch, and enable only one phase line to be connected to the load in the same charging period.

[0034] Optionally, the method further comprises: monitoring the operation data of the grid side in real time, wherein the operation data includes state data of the phase line switching switch, voltage data and current data of the grid side; determining whether an operation fault occurs on the grid side according to the operation data of the grid side, wherein the operation fault includes at least one of grid voltage abnormality, overcurrent fault and short circuit fault; when it is detected that an operation fault occurs on the grid side, setting the control signals of all phase line switching switches to invalid signals to cut off the connection between the phase lines and the load.

[0035] According to still another aspect of the present application, a storage medium having a computer program stored thereon is provided, and the program is executed by a controller to implement the above flexible charging control method.

[0036] According to another aspect of the present application, a computer device is provided, comprising a storage medium, a controller, and a computer program stored in the storage medium and executable on the controller, wherein the controller implements the flexible charging control method when executing the program.

[0037] By the above technical solution, the flexible charging control system and the control method thereof, the storage medium and the computer device provided by the embodiments of the present application can switch any phase line to be connected with the load according to the load condition in the power grid, and only one phase line is connected with the load in the same charging period, so that the load in the charging network can be dynamically adjusted, the utilization rate of the power grid is improved, the security risks of the system are reduced, and the reliability and safety of the system are improved. By the hardware interlocking scheme, the risk of safety accidents in the case of short circuit of the switching device and failure of the software system is avoided, and the reliability of stable operation of the system is improved. The voltage sampling is directly used as the control signal of the interlocking, the feedback signal of the switching device is avoided, the high reliability requirement of the switching device is reduced, the safety and reliability of the system are improved, and the cost of the device is reduced. In addition, the above system only needs one set of switching components to realize phase line switching, reduces the complexity and power distribution installation difficulty of the system, reduces the cost of the system, and improves the safety and reliability of the system. Based on this, the above flexible charging control system can effectively reduce the charging risk caused by the unbalanced load of the charging network, so that the power distribution system of the charging pile can realize flexible control of power, and the complexity of system power distribution installation can be reduced.

[0038] The above description is only a summary of the technical solutions of the present application. In order to more clearly understand the technical means of the present application, the content of the specification can be implemented, and in order to make the above and other purposes, characteristics and advantages of the present application more obvious and easy to understand, the specific embodiments of the present application are described below. BRIEF DESCRIPTION OF DRAWINGS

[0039] The drawings described herein are used to provide further understanding of the present application, and form a part of the present application. The schematic embodiments of the present application and their descriptions are used to explain the present application, and do not constitute an improper limitation on the present application. In the drawings:

[0040] Figure 1 A circuit structure schematic diagram of a flexible charging control system provided by the prior art is shown;

[0041] Figure 2 A structure schematic diagram of a flexible charging control system provided by the embodiments of the present application is shown;

[0042] Figure 3A structural schematic diagram of a flexible charging control system is shown.

[0043] Figure 4 A structural schematic diagram of a flexible charging control system is shown.

[0044] Figure 5 A structural schematic diagram of a flexible charging control system is shown.

[0045] Figure 6 A circuit structural schematic diagram of a first self-locking circuit is shown.

[0046] Figure 7 A circuit structural schematic diagram of a second self-locking circuit is shown.

[0047] Figure 8 A circuit structural schematic diagram of a switch driving circuit is shown.

[0048] Figure 9 A circuit structural schematic diagram of a voltage sampling circuit is shown.

[0049] Figure 10 A circuit structural schematic diagram of another voltage sampling circuit is shown.

[0050] Figure 11 A structural schematic diagram of another flexible charging control system is shown.

[0051] Figure 12 A flow schematic diagram of a flexible charging control method is shown. DETAILED DESCRIPTION

[0052] Hereinafter, the present application will be described in detail with reference to the accompanying drawings and in conjunction with embodiments. It should be noted that the embodiments in the present application and the features in the embodiments can be combined with each other without conflict.

[0053] Reference Figure 1 , a system structural diagram of a charging control system in a conventional technology is provided to solve the unbalanced load of the power grid by a passive scheme. As shown in Figure 1As shown, by grouping the charging piles when the charging station is built, the load adjustment can be realized by different power grid configuration modes. For example, the charging piles in the three groups in the figure are all powered by the line where the K2 switch is located as a single-phase load, and the line of the three groups is connected to the three phase lines of L1, L2 and L3, respectively, when the load power of the three groups of charging piles is basically the same, the phase balance of the load is realized. To realize the load power of the three groups to be basically the same, it is necessary to guide the new vehicles to the group with lower load power at different times to balance. Therefore, this passive load balancing scheme needs to be grouped according to the configuration of the power grid during installation, and the capacity of each group needs to be carefully calculated and allocated, thereby improving the complexity of the power distribution system. And in the actual operation process of the charging station, there will still be the problem of excessive single-phase load, which needs to guide users to select charging piles in the unbalanced state, thereby improving the complexity of system use. In addition, the unbalanced power distribution makes the power grid system need to reserve enough power grid capacity for protection in order to consider safety, which will cause the power grid capacity of the power station to be underutilized, resulting in low power grid capacity utilization.

[0054] To solve the above problems, the embodiments of the present application will adopt an active load balancing scheme to realize efficient load balancing, thereby realizing flexible charging of the charging network, so as to improve the operation efficiency of the charging station, reduce the operation cost of the charging station, and improve the power grid capacity utilization. At the same time, the embodiments of the present application realize the switching of the switching device by designing a hardware self-locking logic control circuit and using a hardware self-locking mode, which can improve the reliability of the switching of the switching assembly and avoid short circuit faults caused by software faults or switching device failures. In addition, the active balancing scheme provided by the present application only needs one group of switching assemblies to control flexible charging, which reduces the complexity of system design and reduces product cost.

[0055] In one embodiment, as Figure 2As shown, a flexible charging control system is provided, which comprises: a switch assembly 10 connected between the power grid side and the load to be charged, including a plurality of phase line switching switches, each phase line switching switch being connected in series between the power grid side of a phase line and the load; a voltage sampling circuit 20 connected with the output end of the switch assembly 10, for detecting the output voltage of the power grid; a controller 30 for issuing control signals of the phase line switching switches; a logic self-locking circuit 40 connected with the output end of the voltage sampling circuit 20 and the output end of the controller 30, for outputting a charging control signal when it is detected that the power grid does not output voltage and the control signals of the phase line switching switches issued by the controller 30 are only one valid; and a switch driving circuit 50 connected with the output end of the controller 30 and the output end of the logic self-locking circuit 40, for controlling the phase line switching switch to be closed when only one control signal of the phase line switching switch and the charging control signal are received, so that only one phase line is connected with the load in the same charging period. In this embodiment, the voltage sampling circuit 20 can detect the phase voltage or line voltage output by the power grid, and output the charging control signal when it is detected that the power grid does not output phase voltage or line voltage and the control signals of the phase line switching switches issued by the controller 30 are only one valid.

[0056] Specifically, the switch assembly 10 is arranged between the power grid side and the load to be charged, and each phase line switching switch inside the switch assembly 10 is connected in series on a phase line, so as to realize the independent control function of the corresponding phase line. The voltage sampling circuit 20 is connected between the output end of the switch assembly 10 and the logic self-locking circuit 40, which can be used to monitor the voltage output by the power grid in real time and output the voltage detection result to the logic self-locking circuit 40. The controller 30 is connected with the logic self-locking circuit 40 and the switch driving circuit 50, which can be used to issue control signals of the phase line switching switches to the logic self-locking circuit 40 and the switch driving circuit 50 according to the preset logic, so as to control the switching state of the phase line switching switch through the logic self-locking circuit 40 and the switch driving circuit 50. The logic self-locking circuit 40 is connected between the voltage sampling circuit 20 and the controller 30, which can be used to detect whether the power grid has voltage output through the voltage sampling circuit 20, and when it is detected that the power grid has no voltage output and the controller 30 only outputs one valid control signal of the phase line switching switch, the logic self-locking circuit 40 will output a charging control signal to the switch driving circuit 50. Finally, the switch driving circuit 50 can control a phase line switching switch to be closed according to the two signals of the received control signal of the phase line switching switch and the charging control signal, so as to ensure that only one phase line is connected with the load in the same charging period, thereby realizing the flexible charging control of the power grid. It can be understood that the present embodiment is aimed at the single-phase charging load, and in this scenario, after the load is connected with the corresponding charging pile, the flexible charging control system inside the charging pile can ensure that only one phase line is connected with the load in the same charging period, thereby ensuring the safety and stability of the load charging.

[0057] The embodiment can avoid the risk of safety accidents in the case of short circuit of the switching device or unpredictable changes in the charging state of the software system failure, and improve the reliability of stable operation of the system. Meanwhile, by using the voltage sampling signal of the power grid as the control signal of the logic self-locking circuit, the feedback signal of the switching device can be avoided as the control signal, thereby reducing the high reliability requirement of the switching device, further improving the safety and reliability of the system, and reducing the cost of the device.

[0058] The flexible charging control system provided by the embodiment can switch any one phase line to be connected with the load according to the load condition in the power grid, and only one phase line is connected with the load in the same charging period, so that the load in the charging network can be dynamically adjusted, the safety hazard of the system is reduced, and the reliability and safety of the system are improved. In addition, the above-mentioned flexible charging control system only needs one set of switching components to realize phase line switching, reduces the complexity and power distribution installation difficulty of the system, reduces the cost of the system, and improves the safety and reliability of the system. Based on this, the above-mentioned flexible charging control system can effectively reduce the charging risk caused by the unbalanced load of the charging network, so that the power distribution system of the charging pile can realize flexible control of power, and the complexity of system power distribution installation can be reduced.

[0059] In one embodiment, as shown in Figure 3 The switching component 10 includes three phase line switching switches K2, K5 and K6, the first ends of the three phase line switching switches K2, K5 and K6 are connected with three phase lines L1, L2 and L3 respectively, and the second ends of the three phase line switching switches K2, K5 and K6 are connected together and connected with L1 as the output end of the switching component 10 and the input end of the voltage sampling circuit 20.

[0060] Specifically, in the embodiment, the three phase line switching switches K2, K5 and K6 are respectively connected in the three phase lines in the power grid. Among them, the first ends of the three phase line switching switches are directly connected with the corresponding phase lines, and the second ends are commonly connected to form a common output end connected with the input end of the voltage sampling circuit 20, so that the voltage sampling circuit can detect the voltage of the L1 phase line after the power grid passes through the switching component. The above-mentioned switching component only needs to use one set of switches to realize flexible control of multiple phase lines, which simplifies the system structure and reduces the cost. At the same time, due to the accurate control of the phase line switching switch, the system can operate more safely and reliably, and the fault risk caused by complex control logic or too many hardware components can be avoided.

[0061] This embodiment achieves flexible control of multiple phase lines on the grid side by employing a switching assembly containing three phase line switching switches. This not only reduces system complexity, the number of hardware components, and circuit costs, but also improves system safety and reliability by simplifying control logic. Furthermore, through real-time monitoring by the voltage sampling circuit, the system can promptly detect and respond to changes in grid-side voltage, further enhancing system response speed and stability.

[0062] In one embodiment, such as Figure 3 As shown, the switching assembly 10 also includes at least one main power switch K1, K2, K3, and K4. The main power switches are connected in series between the neutral line (N line) or a phase line and the load, used to control the on / off state between the N line or a phase line and the load, and can determine the on / off state of power supply for a single-phase load or a three-phase load. Main power switch K2 is connected in series between phase line L1 and the load, determining the on / off state of L1 during power supply. It also acts as a phase line switching switch, and together with K5 and K6, is controlled to selectively connect one phase to achieve phase balance control. Main power switch K1 is connected in series between the neutral line and the load, used to control the on / off state between the neutral line and the load. Main power switch K3 is connected in series between phase line L2 and the load, used to control the on / off state between phase line L2 and the load; main power switch K4 is connected in series between phase line L3 and the load, used to control the on / off state between phase line L3 and the load.

[0063] Specifically, the switching assembly also includes at least one main power switch, for example... Figure 3 K3 and K4 are included in the circuit. The main power switch is connected in series between a phase line and the load. Its main function is to independently control the on / off connection between its respective phase line and the load, thereby achieving accurate control of the grid-side output. In this embodiment, some switches in the switching assembly can have dual functions: they can act as phase line switching switches, participating in phase line switching control, or as main power switches, directly controlling the connection status of a specific phase line and the load. This design not only reduces hardware redundancy but also improves system flexibility and control efficiency.

[0064] In this embodiment, the phase-to-phase switching switch can be used to switch phases between the grid side and the load to achieve flexible power distribution; while the main power switch controls whether the lines transmitting power from the grid side to the load are connected. When load distribution is not required, the main power switch can be directly controlled to charge single-phase or three-phase loads. When load balancing is required, selective switching of the phase-to-phase switching switch can be used to connect the load to different phases, for example, the load can be charged only with L1, L2, or L3. The combined use of both allows the system to flexibly adjust the charging strategy according to different charging needs and grid conditions, thereby improving charging efficiency and system control flexibility.

[0065] The embodiment can effectively improve the flexibility and application range of the flexible charging control system by combining the dual functions of the phase line switching switch and the main power switch in the switch assembly. The independent control capability of the main power switch can enable the system to freely switch the working mode of the charging pile as needed, whether it is single-phase charging or multi-phase charging, and can flexibly respond, thereby meeting the charging needs in different scenarios. In addition, the shared design of the phase line switching switch and the main power switch can also reduce the waste of hardware resources and reduce the hardware cost of the system.

[0066] In one embodiment, as shown in Figure 4 The output end of the logic self-locking circuit 40 is also connected to the input end of the controller 30, wherein the logic self-locking circuit 40 is also used to output a charging state signal to the controller 30.

[0067] Specifically, the output end of the logic self-locking circuit can not only be connected to the input end of the switch driving circuit and be used to output a charging control signal to the switch driving circuit under certain conditions, but also be connected to the input end of the controller and be used to output a charging state signal to the controller. The charging state signal represents a comprehensive signal generated by the logic self-locking circuit according to the voltage sampling result, the control signal sent by the controller, and the circuit processing logic, which reflects whether the current charging system is in a safe and effective charging state, i.e., whether the power grid has no output voltage and only one of the control signals of the three phase line switching switches is valid. By sending the charging state signal to the controller, the controller can accurately control the charging process in combination with its own control logic. For example, when the controller receives an invalid charging state signal in the charging state or receives a valid charging state signal in the stop state, a protection mechanism can be triggered, such as disconnecting all phase line switching switches in the switch assembly, to avoid safety accidents.

[0068] The embodiment can achieve real-time feedback and closed-loop control of the charging state signal by connecting the output end of the logic self-locking circuit to the input end of the controller, thereby improving the accuracy of the phase line switching switch control and enabling the controller to respond more timely and accurately to external factors such as power grid voltage changes and load state adjustments, ensuring the safety and stability of the charging process.

[0069] In one embodiment, as shown in Figure 5As shown, the logic self-locking circuit 40 includes a first logic self-locking circuit 41 and a second logic self-locking circuit 42. The input terminal of the first logic self-locking circuit 41 is connected with the output terminal of the controller 30, and the output terminal is connected with the enable terminal of the second logic self-locking circuit 42. The first logic self-locking circuit 41 is used to receive the control signals of the plurality of phase switching switches, and output a charging enable signal to the second logic self-locking circuit 42 when it is detected that only one control signal of the phase switching switches is valid. The input terminal of the second logic self-locking circuit 42 is connected with the output terminal of the voltage sampling circuit 20, the enable terminal is connected with the output terminal of the first logic self-locking circuit 41, and the output terminal is connected with the input terminal of the switch driving circuit 50 and the input terminal of the controller 30. The second logic self-locking circuit 42 is used to follow and hold the voltage detection signal output by the voltage sampling circuit 20 to obtain a charging control signal when the charging enable signal is received. In this embodiment, the voltage detection signal output by the voltage sampling circuit 20 is a phase voltage detection signal or a line voltage detection signal.

[0070] Specifically, the first logic self-locking circuit is a front-stage logic judgment unit, the input terminal of which is directly connected with the output terminal of the controller, and is used to receive the control signals of the plurality of phase switching switches sent by the controller. When it is detected that only one control signal of the phase switching switches is valid, the first logic self-locking circuit outputs a charging enable signal to the enable terminal of the second logic self-locking circuit, so as to ensure that only one phase line is connected with the load at any time, thereby effectively avoiding the safety problems such as overload and short circuit caused by the simultaneous connection of a plurality of phase lines. Further, the second logic self-locking circuit is a rear-stage execution and protection unit, the input terminal of which is connected with the output terminal of the voltage sampling circuit, and is used to receive the real-time detection signal of the grid-side voltage. Meanwhile, the enable terminal receives the charging enable signal from the first logic self-locking circuit. Under the action of the charging enable signal, the second logic self-locking circuit follows and holds the voltage detection signal, and finally generates a charging control signal output to the switch driving circuit, so as to ensure that only when the grid-side voltage is not output and the charging condition is met, the corresponding phase switching switch will be driven to be closed, thereby improving the safety and stability of the system.

[0071] The embodiment effectively improves the safety and stability of the flexible charging control system, avoids the safety problems that may be caused by the simultaneous connection of a plurality of phase lines with the load, and ensures that the system can stably operate at any time. Moreover, by using the voltage detection signal as the self-locking control signal source, the dependence on the reliability of the switching device is effectively reduced, and the overall safety of the system is further improved.

[0072] In one embodiment, as Figure 5As shown, the output of the second logic self-locking circuit 42 includes a first output and a second output. The first output of the second logic self-locking circuit 42 is connected to the input of the switch driving circuit 50, and the second output of the second logic self-locking circuit 42 is connected to the input of the controller 30. In this embodiment, the second logic self-locking circuit 42 can be used to output a charging control signal to the switch driving circuit 50, and output a charging state signal to the controller 30.

[0073] Specifically, the second logic self-locking circuit has two independent outputs, i.e., a first output and a second output. The first output of the second logic self-locking circuit is connected to the input of the switch driving circuit, which can be used to output a charging control signal and control the operation of the switch driving circuit, thereby controlling the on-off of the phase line switching switch, so as to realize accurate control of the charging process. The second output of the second logic self-locking circuit is connected to the input of the controller, which can be used to output a charging state signal. The charging state signal is a comprehensive signal generated by the second logic self-locking circuit according to the voltage detection signal, the charging enable signal and the internal logic judgment, which reflects whether the control signal of the phase line switching switch sent by the controller of the current charging system is correct, whether the charging system is in a safe and effective charging state, i.e., whether there is no output voltage in the power grid and only one of the three phase line switching switches is in an effective state. The controller can understand the running condition of the charging system in real time by receiving the charging state signal, and make corresponding control adjustment according to the need. In this embodiment, the two outputs of the second logic self-locking circuit are independent and do not interfere with each other. This design ensures the stability and accuracy of the charging control signal and the charging state signal, and avoids the misoperation or failure caused by the incorrect configuration of the control signal of the phase line switching switch of the controller.

[0074] In one embodiment, the switch assembly includes a first phase line switching switch, a second phase line switching switch, and a third phase line switching switch. For example, with reference to Figure 3 The switch assembly 10 can include three phase line switching switches K2, K5 and K6. Further, with reference to Figure 6The first logic self-locking circuit comprises a first exclusive-OR gate circuit U2, a second exclusive-OR gate circuit U4, a first AND gate circuit U3A and a second AND gate circuit U3B. The three input terminals of the first exclusive-OR gate circuit U2 are connected with the first output terminal, the second output terminal and the third output terminal of the controller respectively, the first exclusive-OR gate circuit U2 is used for receiving the control signals MCU_RLY2_CTR, MCU_RLY6_CTR and MCU_RLY5_CTR of the first phase line switching switch, the second phase line switching switch and the third phase line switching switch and outputting a first logic operation signal. The two input terminals of the first AND gate circuit U3A are connected with the first output terminal and the second output terminal of the controller respectively, the first AND gate circuit U3A is used for receiving the control signals MCU_RLY2_CTR and MCU_RLY6_CTR of the first phase line switching switch and the second phase line switching switch and outputting a second logic operation signal. The two input terminals of the second AND gate circuit U3B are connected with the third output terminal of the controller and the output terminal of the first AND gate circuit U3A respectively, the second AND gate circuit U3B is used for receiving the control signal MCU_RLY5_CTR of the third phase line switching switch and the second logic operation signal and outputting a third logic operation signal. The two input terminals of the second exclusive-OR gate circuit U4 are connected with the output terminal of the first exclusive-OR gate circuit U2 and the output terminal of the second AND gate circuit U3B respectively, and the output terminal is connected with the enable terminal of the second logic self-locking circuit, the second exclusive-OR gate circuit U4 is used for receiving the first logic operation signal and the third logic operation signal and outputting a charging enable signal MCU_CTR.

[0075] Specifically, the three input terminals of the first exclusive-OR gate circuit U2 receive the control signals (MCU_RLY2_CTR, MCU_RLY6_CTR, MCU_RLY5_CTR) of the three phase line switching switches from the first, second and third output terminals of the controller. The characteristics of the exclusive-OR gate circuit make the output signal valid when there is an odd number of valid signals in the input signal. In order to achieve the purpose of outputting a valid signal only when one of the three input signals is valid, the first logic self-locking circuit further comprises the first AND gate circuit U3A, the second AND gate circuit U3B and the second exclusive-OR gate circuit U4, and these logic circuits are used in combination with the first exclusive-OR gate circuit U2 to realize the function of outputting the charging enable signal MCU_CTR only when one of the control signals of the three switching switches is valid.

[0076] The embodiment can realize accurate control of the multi-phase line switching switch by combining the XOR gate circuit and the AND gate circuit in the first logic self-locking circuit. The circuit can output the charging enable signal only when the control signal of the single-phase line switching switch is valid, thereby effectively avoiding the safety problem caused by the simultaneous connection of multiple phase lines to the load. In addition, the circuit can effectively reduce the complexity and design difficulty of the circuit by decomposing complex logic operations into simple logic operation units, thereby helping to reduce the circuit cost and improve the stability of the system.

[0077] In one embodiment, as shown in Figure 6 The first logic self-locking circuit further includes at least one first delay circuit. The first delay circuit can be arranged between at least one of the following positions: between the output end of the controller and the input end of the first XOR gate circuit U2; and / or, between the output end of the controller and the input end of the first AND gate circuit U3A; and / or, between the output end of the controller and the input end of the second AND gate circuit U3B; and / or, between the output end of the first XOR gate circuit U2 and the input end of the second XOR gate circuit U4; and / or, between the output end of the second AND gate circuit U3B and the input end of the second XOR gate circuit U4.

[0078] Specifically, the first delay circuit can include resistors and capacitors and the like. The number, connection mode and specification of the resistors and capacitors can be designed according to the actual function of the circuit, which is not limited here. It can be understood that the delay time of the first delay circuit can be obtained by setting the resistance and / or capacitance value in the circuit and testing the delay of the circuit. In the embodiment, the first delay circuit can be flexibly arranged on multiple key paths of the first logic self-locking circuit, for example, the first delay circuit can be symmetrically arranged between multiple input ends and multiple output ends of each two logic devices, so as to improve the consistency of the signal and enhance the reliability and safety of the system.

[0079] The embodiment can effectively improve the reliability and safety of the system by introducing the first delay circuit in the first logic self-locking circuit. The design of the delay circuit can provide the necessary response time for the logic device and reduce the risk of misoperation caused by transient voltage spikes or other unstable conditions. At the same time, by arranging the delay circuit on different paths and adjusting its delay time, the synchronization of the signal can be improved, thereby enhancing the stability and consistency of the system.

[0080] In one embodiment, as a supplement to the above embodiment of the first logic self-locking circuit, as shown in Figure 6The truth table of the logic devices in the first self-locking circuit is shown in Table 1. Among them, the first XOR gate circuit U2 and the second XOR gate circuit U4 are true (1) only when there are an odd number of true (1) values in the input, and the first AND gate circuit U3A and the second AND gate circuit U3B are true (1) only when all inputs are true (1).

[0081] Table 1

[0082] MUC_RLY2_CTR MUC_RLY6_CTR MUC_RLY5_CTR U2 U3A U3B U4 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 1 0 0 1 0 1 1 0 0 0 0 1 0 0 1 0 0 1 1 0 1 0 0 0 0 1 1 0 0 1 0 0 1 1 1 1 1 1 0

[0083] As can be seen from the above table, the first self-locking circuit outputs the charging enable signal MCU_CTR (valid value 1) only when the control signals MCU_RLY2_CTR, MCU_RLY6_CTR and MCU_RLY5_CTR of the three phase line switching switches have only one valid value (1), which ensures that the charging enable signal is output only when the control signals of the three phase line switching switches have only one valid value, so that only one phase line is connected to the load in the same charging period, avoiding the safety accident of accidental connection of two phase lines to the load causing short circuit, thereby improving the safety of the charging control system.

[0084] In one embodiment, as shown in Figure 7 The second logic self-locking circuit includes a D flip-flop U5. Among them, the data input end D of the D flip-flop is connected with the output end of the voltage sampling circuit, the clock signal input end CLK and the clear enable end / CLR are respectively connected with the output end of the first logic self-locking circuit, the output end Q is connected with the input end of the switch driving circuit, and the output end / Q is connected with the input end of the controller. In this embodiment, the D flip-flop U5 can be used to follow and hold the voltage detection signal L1_OUT_STATUS when receiving the charging enable signal MCU_CTR, and output the charging control signal RLY_ON_ALLOW and the charging state signal ALLOW_FB, which are opposite to each other. The charging control signal RLY_ON_ALLOW is used to indicate whether the switch driving circuit closes the switch, and the charging state signal ALLOW_FB is used to feedback the charging control state at this time to the controller, and the controller checks whether the charging system is being correctly controlled through the returned control state, thereby improving the safety of the system.

[0085] Specifically, the second logic self-locking circuit can adopt a D flip-flop U5 as a core logic control element. Among them, the data input end D of the D flip-flop U5 is connected to the output end of the voltage sampling circuit, used for receiving the voltage detection signal L1_OUT_STATUS. In this way, the voltage detection signal can be directly used as the control signal of the second logic self-locking circuit, instead of using the feedback signal of the switching device as the control signal, so as to ensure that the charging control signal is output only when there is no output voltage of the power grid, thereby reducing the reliability requirement of the switching device, avoiding false detection caused by failure of a single device, and improving the safety and reliability of the system. Further, the clock signal input end CLK and the clear enable end / CLR of the D flip-flop are connected with the output end of the first logic self-locking circuit, respectively. Among them, the clock signal input end CLK can receive the charging enable signal MCU_CTR from the first logic self-locking circuit, based on which the triggering action of the D flip-flop U5 will depend on the validity of the charging enable signal. At the same time, the clear enable end / CLR can also receive the charging enable signal MCU_CTR output by the first logic self-locking circuit, which can be used to keep the charging control signal generated by the D flip-flop in the current period in the valid state. That is, within a complete charging period, as long as the charging enable signal does not drop to low level, the D flip-flop will keep its output state unchanged and not be disturbed by other signals, thereby ensuring the validity of the charging control signal and controlling the switch on the phase line to be closed continuously. Further, the output end Q of the D flip-flop is connected with the input end of the switch driving circuit and is used to output the charging control signal RLY_ON_ALLOW to the switch driving circuit. In this embodiment, when the D flip-flop U5 receives a valid charging enable signal and detects that there is no voltage output of the power grid, it will output a charging control signal to control the corresponding phase line switching switch to be closed through the switch driving circuit, thereby starting the charging process.

[0086] In this embodiment, by adopting a D flip-flop as a core logic control device, accurate control of the charging control signal can be achieved. By taking the voltage detection signal as one of the control signals, the reliability requirement of the switching device can be reduced, thereby improving the safety and reliability of the system and reducing the circuit cost. In addition, the above circuit realizes complex logic operation function through the D flip-flop, without relying on software, which can avoid safety accidents caused by failure of the software system and improve the overall performance and safety of the system.

[0087] In one embodiment, as Figure 7As shown, the second logic self-locking circuit further comprises a third AND gate circuit U3C and a fourth AND gate circuit U3D. Two input terminals of the third AND gate circuit U3C are connected to the output terminal of the voltage sampling circuit and the output terminal of the first logic self-locking circuit respectively, and an output terminal is connected to the clock signal input terminal CLK of the D flip-flop. The third AND gate circuit U3C can be used to receive the voltage detection signal L1_OUT_STATUS and the charge enable signal MCU_CTR, and output a state change signal to the CLK clock signal input terminal of the D flip-flop. The state change signal is determined by the state of voltage detection and the state of MCU control. According to the state change signal, the input signal, i.e. the voltage detection signal, is output to the output terminal of the D flip-flop. Two input terminals of the fourth AND gate circuit U3D are connected to the output terminal of the first logic self-locking circuit, and an output terminal is connected to the clear enable terminal / CLR of the D flip-flop. The fourth AND gate circuit U3D can be used to receive the charge enable signal MCU_CTR, and output a stop clear signal to the D flip-flop to lock the state of the D flip-flop. Only when the MCU control signal transmitted by the charge enable signal MCU_CTR is charge on, the D flip-flop is opened, and the output signal can follow the input signal. When the MCU control signal transmitted by the charge enable signal MCU_CTR is charge off, the output of the D flip-flop does not follow the input signal, and the relay is prohibited from closing. The input of MCU_CTR as the enable terminal of the second logic self-locking circuit determines the charge enable signal MCU_CTR and the voltage detection signal L1_OUT_STATUS to be the same level through the control of the clock signal input terminal CLK and the clear enable terminal / CLR. When the charge control signal RLY_ON_ALLOW follows the voltage detection signal L1_OUT_STATUS, or when the charge enable signal MCU_CTR is opposite, the charge control signal RLY_ON_ALLOW is cleared and no longer follows L1_OUT_STATUS.

[0088] Specifically, the third AND gate circuit U3C can be used as a clock signal processing unit, and two input terminals thereof are connected to the output terminal of the voltage sampling circuit and the output terminal of the first logic self-locking circuit respectively. Based on this, the third AND gate circuit U3C can simultaneously receive the voltage detection signal L1_OUT_STATUS and the charge enable signal MCU_CTR. Only when the two signals simultaneously satisfy a certain condition, the third AND gate circuit U3C will output a valid clock signal to the clock signal input terminal CLK of the D flip-flop. In this way, it can be ensured that the voltage detection signal and the charge enable signal jointly determine the clock input signal, and control the timing of the charge control signal RLY_ON_ALLOW following the voltage detection signal L1_OUT_STATUS. The rising edge of the clock signal triggers the following, and once it starts to follow, the charge control signal RLY_ON_ALLOW is constant, and the subsequent signals of the clock signal will not affect it, unless the rising edge occurs again.

[0089] Further, the fourth AND gate circuit U3D can be used as a processing unit of the clear signal, and both of its input terminals are connected to the output terminal of the first logic self-locking circuit. Based on this, the fourth AND gate circuit U3D can be used to receive and process the charge enable signal MCU CTR from the first logic self-locking circuit to generate a stop clear signal. That is, when the first logic self-locking circuit sends a charge enable signal to start charging, the fourth AND gate circuit U3D will output a valid stop clear signal to the clear enable terminal / CLR of the D flip-flop, so as to ensure that the charge control signal sent by the D flip-flop is not cleared until the charge enable signal MCU CTR changes to the opposite level to end the charging. When the charging period ends, the stop clear signal of the fourth AND gate circuit U3D will control the charge control signal sent by the D flip-flop to be cleared and no longer follow the voltage detection signal L1 OUT STATUS. The charge enable signal MCU CTR controls the clear enable terminal / CLR of the D flip-flop through the fourth AND gate circuit U3D, which increases the reliability of the D flip-flop and avoids interference from noise signals.

[0090] In this embodiment, by adding the third AND gate circuit and the fourth AND gate circuit to the clock pin and the clear pin of the D flip-flop, the charge enable signal participates in the control of the clock signal input terminal CLK and the control of the clear enable terminal / CLR, which can effectively improve the accuracy of the charge enable signal input to the D flip-flop, effectively avoid the interference of noise signals, and ensure that the D flip-flop only performs state conversion when receiving correct clock signals and clear signals, so as to output more accurate and stable charge control signals.

[0091] In one embodiment, as shown in Figure 7 the second logic self-locking circuit further includes at least one second delay circuit, wherein the second delay circuit can be arranged at least one of the following positions: between the output terminal of the first logic self-locking circuit and the input terminal of the third AND gate circuit U3C, and / or between the output terminal of the voltage sampling circuit and the input terminal of the third AND gate circuit U3C, and / or between the output terminal of the voltage sampling circuit and the data input terminal D of the D flip-flop U5, and / or between the output terminal of the third AND gate circuit U3C and the clock signal input terminal CLK of the D flip-flop U5, and / or between the output terminal of the fourth AND gate circuit U3D and the clear enable terminal / CLR of the D flip-flop U5.

[0092] Specifically, the second delay circuit can include resistors and capacitors, etc. The number, connection mode and specification of the resistors and capacitors can be designed according to the actual function of the circuit, which is not limited here. It can be understood that the delay time of the second delay circuit can be obtained by setting the resistance and / or capacitance of the circuit and testing the delay of the circuit. In the embodiment, the second delay circuit can be flexibly arranged on the multiple critical paths of the second logic self-locking circuit, for example, the second delay circuit can be symmetrically arranged between the multiple inputs and multiple outputs of every two logic devices, so as to improve the consistency of the signals and enhance the reliability and safety of the system.

[0093] By arranging the second delay circuit in the second logic self-locking circuit, it can be ensured that the logic devices in the second self-locking circuit have enough time to respond after receiving the voltage detection signal and the charging enable signal, thereby helping to reduce the false operation caused by potential transient voltage spikes or other unstable conditions, so as to improve the reliability and safety of the system. Moreover, by arranging the second delay circuit on multiple paths in the second self-locking circuit, the signals from different paths can be synchronized. In addition, by appropriately adjusting the delay time of the delay circuit, it can be ensured that the signals are input to the D flip-flop in the correct order.

[0094] In one embodiment, as shown in FIG. 4, the delay time of the second delay circuit arranged between the output of the fourth AND gate circuit U3D and the clear enable end / CLR of the D flip-flop U5 is shorter than the delay time of the second delay circuit arranged between the output of the third AND gate circuit U3C and the clock signal input end CLK of the D flip-flop U5. Figure 7

[0095] Specifically, the delay time of the second delay circuit between the output of the fourth AND gate circuit U3D and the clear enable end / CLR of the D flip-flop U5 can be designed to be shorter than the delay time of the delay circuit between the output of the third AND gate circuit U3C and the clock signal input end CLK of the D flip-flop U5. In the embodiment, the stop clear signal (from the fourth AND gate circuit U3D) can be used to prevent the D flip-flop U5 from being accidentally cleared, thereby maintaining its current state. The clock signal (from the third AND gate circuit U3C) is used to trigger the state transition of the D flip-flop. By making the delay time of the stop clear signal shorter than the delay time of the clock signal, it can be ensured that the stop clear signal has reached and stably acts on the clear enable end of the D flip-flop before the D flip-flop performs state transition, thereby avoiding the problem of the D flip-flop being accidentally cleared due to the time difference of the signals.

[0096] ​The embodiment can effectively improve the stability and accuracy of the charging control signal by setting the time length of the second delay circuit and making it different on different paths. Moreover, the above design not only improves the working reliability of the D flip-flop, but also ensures that the charging control signal can be correctly processed and transmitted in the expected logical order, thereby improving the safety and stability of the system.

[0097] In one embodiment, as a supplement to the above-mentioned embodiment of the second self-locking circuit, as shown in Figure 7 The truth table of each logic device of the second self-locking circuit is shown in Table 2. Among them, the D flip-flop U5 can follow and hold the voltage detection signal L1_OUT_STATUS when the clock signal input end CLK and the clear enable end / CLR input high level, and output the charging control signal RLY_ON_ALLOW.

[0098] Table 2

[0099]

[0100] As can be seen from the above table, the second self-locking circuit only outputs the charging control signal RLY_ON_ALLOW when both the voltage detection signal L1_OUT_STATUS and the charging enable signal MCU_CTR are valid (value 1), thereby ensuring that only one of the three phase line switching switches is effective, and the charging control signal can be output only when the power grid does not output voltage, thereby controlling the corresponding phase line switching switch to be closed, so that only one phase line is connected with the load in the same charging period, thereby improving the safety of the charging control system.

[0101] In one embodiment, as shown in Figure 8 The switch driving circuit includes a plurality of fifth AND gate circuits U6A, U6B and U6C. Taking U6A as an example, the two input ends of the fifth AND gate circuit U6A are connected with the output end of the logic self-locking circuit and the output end of the controller respectively, and the output end of the fifth AND gate circuit U6A is connected with the control end of the phase line switching switch. Among them, the fifth AND gate circuit U6A can be used to output the switch driving signal RLY2_CTR to the control end of the phase line switching switch when receiving the charging control signal RLY_ON_ALLOW and the control signal MCU_RLY2_CTR of the phase line switching switch, so that the phase line switching switch is closed, and the phase line where the phase line switching switch is located is connected with the load. It can be understood that the connection mode and circuit function of the fifth AND gate circuits U6B and U6C are similar to U6A, which will not be described here.

[0102] Specifically, the switch driving circuit can realize accurate control of the plurality of phase line switching switches by integrating a plurality of fifth AND gate circuits. Taking the fifth AND gate circuit U6A as an example, two input ends thereof are connected to an output end of the logic self-locking circuit and an output end of the controller respectively. The logic self-locking circuit can be used to output a charging control signal RLY_ON_ALLOW, which indicates whether the current system allows charging operation; the controller is used to output a control signal MCU_RLY2_CTR of the phase line switching switch, which is used to indicate which phase line switching switch needs to be closed in the current system. Further, when the fifth AND gate circuit U6A simultaneously receives the charging control signal RLY_ON_ALLOW and the control signal MCU_RLY2_CTR of the phase line switching switch, the internal logic of the fifth AND gate circuit U6A will perform AND operation on the two signals, and output a switch driving signal RLY2_CTR to the control end of the phase line switching switch when the operation result is true. This signal will prompt the phase line switching switch to close rapidly, so that the phase line where the phase line switching switch is located is connected with the load, thereby realizing transmission of electric energy. In the embodiment, the fifth AND gate circuits U6B and U6C are similar to U6A in connection mode and circuit function, and they are respectively used to control the switching of the switching switches of other phase lines, which will not be described herein.

[0103] The embodiment can realize accurate control of the phase line switching switch by setting a plurality of fifth AND gate circuits in the switch driving circuit. The above switch driving circuit can ensure that the switching switch will output a switch driving signal and prompt the switching switch to act only when valid charging control signals and control signals of the phase line switching switch are received, thereby improving the accuracy and reliability of switch control, and avoiding problems of misoperation or signal interference of the switching switch. At the same time, since the plurality of fifth AND gate circuits can work in parallel, the entire switch driving circuit can efficiently process switching requirements of a plurality of phase lines, thereby improving the overall performance and stability of the system.

[0104] In one embodiment, as shown in Figure 8 The switch driving circuit further includes at least one third delay circuit, wherein the third delay circuit can be arranged at least one of the following positions: between the output end of the logic self-locking circuit and the input end of the fifth AND gate circuits U6A, U6B and U6C, and / or between the output end of the controller and the input end of the fifth AND gate circuits U6A, U6B and U6C.

[0105] Specifically, the third delay circuit can include resistors and capacitors, etc., wherein the number, connection mode and specification of the resistors and capacitors can be designed according to the actual function of the circuit, which is not specifically limited here. It can be understood that the delay time of the third delay circuit can be obtained by setting the resistance value and / or the capacitance value in the circuit and testing the delay of the circuit. In the embodiment, the third delay circuit can be flexibly arranged on multiple key paths of the switch driving circuit, for example, the third delay circuit can be symmetrically arranged between the input ends of the controller and the logic self-locking circuit and each AND gate circuit, so as to improve the consistency of the signals and enhance the reliability and safety of the system.

[0106] The embodiment can ensure that the fifth AND gate circuit has sufficient time to respond after receiving the control signal of the phase line switching switch and the charging control signal, thereby helping to reduce the misoperation caused by potential transient voltage peaks or other unstable conditions, so as to improve the reliability and safety of the system. Moreover, by arranging the third delay circuit at the input end of the fifth AND gate circuit, the signals from different paths can be synchronized. In addition, by appropriately adjusting the delay time of the delay circuit, the synchronization between different signals can be improved.

[0107] In one embodiment, as shown in Figure 9 The voltage sampling circuit includes an opto-coupler U44. Two input ends of the opto-coupler U44 are connected to the neutral line of the power grid and the output end of the switch assembly respectively, and the output end is connected to the input end of the logic self-locking circuit. The opto-coupler U44 can be used to convert the voltage between the output phase voltage of the power grid, i.e., L1_RLY_OUT and N_IN, into the voltage detection signal L1_OUT_STATUS of the power grid, and output to the logic self-locking circuit.

[0108] Specifically, the opto-coupler, as a special electronic component, can electrically isolate the input and output while transmitting the signals. In the embodiment, the two input ends of the opto-coupler U44 are connected to the neutral line (N_IN) of the power grid and the output end (L1_RLY_OUT) of the switch assembly respectively. Based on this, the opto-coupler U44 can monitor the output voltage between L1_RLY_OUT and N_IN of the power grid, i.e., the actual phase voltage on the power grid. When the voltage of the power grid enters the opto-coupler U44 through the two input ends, the device can convert the electrical signal into an optical signal by using the internal photoelectric effect, and then convert the optical signal into an electrical signal, thereby realizing the isolated transmission of the voltage. In this process, the output end of the opto-coupler U44 will generate a voltage detection signal L1_OUT_STATUS corresponding to the input voltage, and transmit this signal to the input end of the logic self-locking circuit for subsequent processing.

[0109] The embodiment can realize effective isolation between the high-voltage signal of the power grid and the low-voltage signal of the logic self-locking circuit by introducing the optoelectronic coupler in the voltage sampling circuit. In this way, not only is the low-voltage control circuit protected from high voltage, improving the safety of the system, but the converted voltage detection signal also has a low voltage level and good signal quality, facilitating subsequent processing by the logic self-locking circuit.

[0110] In one embodiment, the optoelectronic coupler can be an alternating current optoelectronic coupler or a direct current optoelectronic coupler. Among them, Figure 9 The voltage sampling circuit shown is a connection mode of an alternating current optoelectronic coupler, Figure 10 The voltage sampling circuit shown is a connection mode of a direct current optoelectronic coupler. Refer to Figure 10 When the optoelectronic coupler is a direct current optoelectronic coupler U45, the voltage sampling circuit further includes a rectifier bridge circuit and a voltage stabilizing and filtering circuit, two input ends of the rectifier bridge circuit are connected with the neutral line of the power grid and the output end of the switching assembly respectively, the output end of the rectifier bridge circuit is connected with the input end of the voltage stabilizing and filtering circuit, the output end of the voltage stabilizing and filtering circuit is connected with the two input ends of the optoelectronic coupler U45, and the output end of the optoelectronic coupler U45 is connected with the input end of the logic self-locking circuit. Among them, the optoelectronic coupler U45 can be used to convert the voltage between the output phase voltage of the power grid, i.e. L1_RLY_OUT and N_RLY_IN, into the voltage detection signal L1_OUT_STATUS of the power grid, and output to the logic self-locking circuit.

[0111] Specifically, the rectifier bridge circuit can be composed of diodes, and the voltage stabilizing and filtering circuit can be composed of resistors, capacitors, voltage stabilizing tubes and the like, for example, refer to Figure 10 The rectifier bridge circuit can be composed of diodes D100, and the voltage stabilizing and filtering circuit can be composed of resistors R650, R651, R652, R653, capacitors C493, C499, C501, TVS tube D101 and the like. In this embodiment, the rectifier bridge can be used to convert the input alternating voltage into unidirectional pulsating direct current voltage, thereby realizing the preliminary conversion from alternating current to direct current. Subsequently, the output end of the rectifier bridge circuit is connected with the input end of the voltage stabilizing and filtering circuit, and the voltage stabilizing and filtering circuit can be used to further process the rectified pulsating direct current voltage, including stabilizing the voltage level and filtering out unnecessary ripple and noise, etc., to generate a smooth and stable direct current voltage signal. The direct current voltage signal processed by the voltage stabilizing and filtering circuit is input to the two input ends of the direct current optoelectronic coupler U45. The optoelectronic coupler U45 can use the photoelectric conversion characteristic to convert the direct current voltage signal into the voltage detection signal L1_OUT_STATUS and output it to the input end of the logic self-locking circuit.

[0112] The voltage sampling circuit of the embodiment can improve the detection capability and processing effect of the voltage sampling circuit on the power grid voltage signal, thereby improving the stability and accuracy of the voltage detection signal, and further improving the safety and stability of the entire system.

[0113] In one embodiment, as shown in Figure 11 The flexible charging control system further includes a cloud server 60. The cloud server 60 is connected with the controller 30, and can be used to generate phase line switching instructions according to the power occupied by each phase line, and send the phase line switching instructions to the controller 30, so that the controller 30 generates control signals of the phase line switching switch corresponding to the phase line switching instructions.

[0114] Specifically, the cloud server 60 can communicate with the controller 30 in real time through network connection. In this process, the cloud server 60 can collect real-time power data of each phase line, which can reflect the load condition of different phase lines in the current charging network. Then, the cloud server 60 can process and analyze these power data using a preset algorithm to evaluate the balance state and potential risks of the current charging network. Then, based on the analysis result, the phase line switching instruction is generated, and the phase line switching instruction is sent to the controller through the network. Further, the controller 30 can generate corresponding phase line switching switch control signals after receiving the instruction. These control signals are then sent to the corresponding phase line switching switch to realize the switching operation of the phase line, so as to adjust the power distribution of the charging network and optimize the charging efficiency.

[0115] The embodiment introduces a cloud server, which can collect and analyze power data of the charging network in real time through the cloud server, and generate relatively accurate phase line switching instructions accordingly, thereby solving the charging risk problem caused by unbalanced charging network. In this way, not only the safety and stability of the charging system are improved, but also the power distribution of the charging network is optimized, the risks of overheating and overloading caused by unbalanced load are reduced, and the utilization rate of the overall power distribution capacity is improved.

[0116] In one embodiment, as shown in Figure 12 A flexible charging control method is provided, which can be applied to the flexible charging control system of any one of the above embodiments. The charging control method includes:

[0117] 101. In response to the load charging instruction, real-time power data of each phase line on the power grid side is obtained;

[0118] 102. According to the real-time power data of each phase line on the power grid side, a phase line switching strategy is determined, and control signals of the phase line switching switch are generated according to the phase line switching strategy;

[0119] 103. The control signals of the phase line switching switch are sent to the logic self-locking circuit and the switch driving circuit, so that the logic self-locking circuit and the switch driving circuit control the phase line switching switch to be closed according to the control signals of the phase line switching switch, so that only one phase line is connected with the load in the same charging period.

[0120] Specifically, when the system receives a load charging instruction, the controller can acquire the power data of each phase line at the grid side in real time through the built-in communication interface or sensor network in response to the load charging instruction. Subsequently, the controller can process and analyze the real-time acquired power data by using the built-in algorithm or logic. This process can include calculating the power difference of each phase line, identifying the overloaded or lightly loaded phase line, etc., to evaluate the power distribution state of the current grid side. Based on the above evaluation results, the controller can determine the current phase line switching strategy, i.e., decide which phase line is selected as the power supply phase line in the current charging period.

[0121] Further, after determining the phase line switching strategy, the controller can generate the corresponding control signals of the phase line switching switch, and send these control signals to the logic self-locking circuit and the switch driving circuit through the communication interface. Among them, the logic self-locking circuit can perform a series of safety checks and logical judgments after receiving the signals to ensure the legality and correctness of the control signals; the switch driving circuit can drive the corresponding phase line switching switch to perform closing operation according to the corresponding control signals and the charging control signals issued by the logic self-locking circuit, so as to realize the function that only one phase line is connected with the load in the same charging period.

[0122] It can be understood that the specific principle of the flexible charging control system controlling the closing of the phase line switch can be referred to the above embodiments of the flexible charging control system, which will not be described here.

[0123] The flexible charging control method provided by the embodiment can realize fine control of the charging process by monitoring the power data of each phase line of the grid in real time and formulating a phase line switching strategy based on these data. Moreover, by controlling the closing and opening of the phase line switching switch, it can be ensured that only one phase line is connected with the load in the same charging period. In this way, not only the risk of grid overload caused by power concentration is avoided, but also the utilization rate of power distribution capacity is improved.

[0124] In one embodiment, the flexible charging control method described above can further include the following steps: receiving the charging state signal output by the logic self-locking circuit; in the charging state, if it is detected that the charging state signal is an invalid signal, setting the control signals of all phase line switching switches to invalid signals to cut off the connection between all phase lines and the load; in the idle state, if it is detected that the charging state signal is a valid signal, setting the control signals of all phase line switching switches to invalid signals to cut off the connection between all phase lines and the load.

[0125] Specifically, in the flexible charging control system, the logic self-locking circuit, as a key circuit in the charging control process, can be used to monitor and feedback the actual working state of the charging pile to ensure the safe operation of the charging process. Specifically, in the charging state, the controller can continuously receive the charging state signal from the logic self-locking circuit. If it is detected that the charging state signal is an invalid signal, it means that there is an abnormality or potential safety risk in the current charging state, such as multiple phase line switching switches being closed at the same time. At this time, the controller can set the control signals of all phase line switching switches to invalid signals, thereby cutting off the connection between all phase lines and the load, to prevent potential safety hazards such as overcharging and short circuit caused by abnormal control signals.

[0126] Similarly, in the idle state, if the controller detects that the charging state signal from the logic self-locking circuit becomes a valid signal, it also indicates that the system may have an abnormality. In order to ensure safety, the controller can also set the control signals of all phase line switching switches to invalid signals to ensure that the connection between all phase lines and the load is cut off, thereby preventing any unintended charging operation from occurring.

[0127] The present embodiment can effectively improve the safety and reliability of the flexible charging control system by monitoring the charging state signal output by the logic self-locking circuit. Through the above-mentioned manner, the controller can timely detect and respond to control signal abnormalities caused by internal control logic errors, external interference or device failures, thereby rapidly cutting off the connection between all phase lines and the load to avoid potential charging safety accidents.

[0128] In one embodiment, the flexible charging control method described above can further include the following steps: detecting the charging mode of the flexible charging control system, wherein the charging mode includes a single-phase charging mode and a multi-phase charging mode; in the charging state, if it is detected that it is a single-phase charging mode, controlling one phase line switching switch in the switch assembly to be closed to enable only one phase line to be connected to the load in the same charging period; in the charging state, if it is detected that it is a multi-phase charging mode, controlling multiple main power switches in the switch assembly to be closed to enable multiple phase lines to be connected to the load in the same charging period.

[0129] Specifically, before or during charging, the controller can detect the current charging mode of the flexible charging control system in real time through the built-in sensors or communication interface. The charging mode can include single-phase charging mode and multi-phase charging mode, which can be applied to different charging scenarios and charging requirements. In this embodiment, in the charging state, if it is detected that the current charging mode is single-phase charging mode, the controller can control the phase line switching switch in the switch assembly to accurately control the phase line. Specifically, the controller can send a control signal of the phase line switching switch to the corresponding phase line switching switch, so that a certain phase line switching switch is closed, thereby ensuring that only one phase line is connected to the load in the same charging period. This single-phase charging mode helps to balance the power grid load and reduce the power grid pressure caused by power concentration. On the other hand, if it is detected that the current charging mode is multi-phase charging mode, the controller can take different strategies. In this mode, the controller can control multiple main power switches in the switch assembly to be closed to allow multiple phase lines to be connected to the load in the same charging period. This multi-phase charging mode can effectively improve the charging efficiency and shorten the charging time, and is particularly suitable for scenarios that require fast charging.

[0130] The embodiment introduces a charging mode detection and response mechanism, which can effectively improve the flexibility and adaptability of the flexible charging control system. In addition, by providing phase line switching switches and main power switches in the switch assembly, the embodiment can freely switch between single-phase charging mode and multi-phase charging mode according to actual needs, thereby realizing fine control of the charging process.

[0131] In one embodiment, the above-mentioned flexible charging control method can further include the following steps: receiving the phase line switching instruction sent by the cloud controller, wherein the phase line switching instruction is generated by the cloud controller according to the real-time power data of each phase line on the power grid side; generating a control signal of the phase line switching switch according to the phase line switching instruction, and sending the control signal of the phase line switching switch to the logic self-locking circuit and the switch driving circuit, so that the logic self-locking circuit and the switch driving circuit control the phase line switching switch to be closed according to the control signal of the phase line switching switch, and only one phase line is connected to the load in the same charging period.

[0132] Specifically, the controller can receive the phase line switching instruction from the cloud controller in real time through the communication link. The phase line switching instruction is generated by the cloud controller based on the real-time power data of each phase line on the grid side after algorithm analysis, aiming to optimize the power distribution of the charging network and ensure the safety and charging efficiency of the charging process. Further, after receiving the phase line switching instruction, the controller can analyze the instruction content and generate the corresponding control signal of the phase line switching switch according to the instruction requirement. Subsequently, the controller can send the generated control signal of the phase line switching switch to the logic self-locking circuit and the switch driving circuit. Further, the logic self-locking circuit can perform a series of safety checks and logical judgments after receiving the signal to ensure the legality and correctness of the control signal; the switch driving circuit can drive the corresponding phase line switching switch to perform closing operation according to the corresponding control signal and the charging control signal issued by the logic self-locking circuit, thereby realizing the function that only one phase line is connected with the load in the same charging period.

[0133] The present embodiment can realize remote regulation and control of the flexible charging control process by introducing the cloud controller to send the phase line switching instruction. The cloud controller can generate the corresponding phase line switching strategy based on the real-time power data of each phase line on the grid side and transmit it to the charging system in real time through the communication link. Through the above-mentioned manner, not only the flexibility and response speed of the charging process are improved, but also the charging strategy can be dynamically adjusted according to the real-time state of the grid, thereby ensuring the safety and charging efficiency of the charging process.

[0134] In one embodiment, the above-mentioned flexible charging control method can further include the following steps: monitoring the operation data of the grid side in real time, wherein the operation data includes the state data of the phase line switching switch, the voltage data and the current data of the grid side; judging whether an operation failure occurs on the grid side according to the operation data of the grid side, wherein the operation failure includes at least one of the grid voltage abnormality, the overcurrent fault and the short circuit fault; when detecting that the operation failure occurs on the grid side, setting the control signals of all phase line switching switches to invalid signals to cut off the connection between the phase line and the load.

[0135] Specifically, the controller can ensure the safety and stability of the charging process by monitoring the operation data of the grid side in real time. Specifically, the controller can collect various operation data of the grid side in real time through a sensor network or a communication interface. These data can include, but are not limited to, state data of the phase line switching switch (such as the opening and closing state of the switch, fault information, etc.), voltage data and current data of the grid side, and the like. Subsequently, the controller can process and analyze the collected operation data through a preset algorithm or logic. The process of processing and analyzing can involve real-time monitoring of key parameters such as voltage and current, and comparison with preset safety thresholds to determine whether an operation fault occurs on the grid side. Among them, the operation fault includes but is not limited to grid voltage anomaly (such as excessively high or low voltage), overcurrent fault (i.e. current exceeds the rated value) and short circuit fault (i.e. current abnormally increases and the duration is extremely short) and the like. Further, once any one of the above operation faults occurs on the grid side, the controller will immediately respond and set the control signals of all phase line switching switches to invalid signals, thereby rapidly cutting off the connection between all phase lines and the load, effectively isolating the fault source, preventing the fault from further expanding, and protecting the safety of the charging equipment and the grid.

[0136] The embodiment can realize safety monitoring and rapid response of the charging process by monitoring the operation data of the grid side in real time and determining whether an operation fault occurs on the grid based on the operation data. When detecting an operation fault on the grid side, the controller can rapidly cut off the connection between all phase lines and the load, thereby effectively isolating the fault source and preventing the fault from causing further damage to the charging equipment and the grid. Through the above-mentioned manner, the safety and reliability of the flexible charging control system can be effectively improved.

[0137] The embodiment of the present application also provides a computer device, which can be a personal computer, a server, a network device, etc. The computer device comprises a bus, a controller, a memory and a communication interface, and can further comprise an input / output interface and a display device. The controller of the computer device is used to provide computing and control capabilities. The memory of the computer device comprises a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store position information. The network interface of the computer device is used to communicate with external terminals through network connection. The computer program is executed by the controller to implement the steps in each method embodiment.

[0138] Those skilled in the art can understand that the structure of the computer device described above is only part of the structure related to the scheme of the present application, and does not constitute a limitation on the computer device to which the scheme of the present application is applied. The specific computer device can include more or fewer components, or combine certain components, or have a different arrangement of components.

[0139] In an embodiment, a computer readable storage medium is provided, which can be non-volatile or volatile, and has stored thereon a computer program, which, when executed by a controller, implements the steps in the above method embodiments.

[0140] In an embodiment, a computer program product is provided, comprising a computer program, which, when executed by a controller, implements the steps in the above method embodiments.

[0141] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a non-volatile computer readable storage medium, and when the computer program is executed, the processes of the above-mentioned embodiments of the methods can be included. Any reference to memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (Read-Only Memory, ROM), magnetic tape, floppy disk, flash memory, optical storage, high-density embedded non-volatile memory, resistive memory (ReRAM), magnetoresistive random access memory (Magnetoresistive Random Access Memory, MRAM), ferroelectric memory (Ferroelectric Random Access Memory, FRAM), phase change memory (Phase Change Memory, PCM), graphene memory, etc. Volatile memory can include random access memory (Random Access Memory, RAM) or external cache memory, etc. As an illustration but not limitation, RAM can be in various forms, such as static random access memory (Static Random Access Memory, SRAM) or dynamic random access memory (Dynamic Random Access Memory, DRAM), etc. The database involved in the embodiments provided in the present application can include at least one of a relational database and a non-relational database. The non-relational database can include a distributed database based on a block chain, etc., without being limited thereto. The controller involved in the embodiments provided in the present application can be a general controller, a graphics controller, a digital signal controller, a programmable controller, a data controller based on quantum computing, etc., without being limited thereto.

[0142] Any combination of the technical features of the above embodiments can be made. In order to make the description simple, all possible combinations of the technical features in the above embodiments are not described, however, as long as the combination of the technical features does not exist contradictory, it should be considered as the scope of the present application.

[0143] The above embodiments only express several implementation manners of the present application, and the description is more specific and detailed, but it should not be understood as a limitation on the scope of the patent of the present application. It should be pointed out that for ordinary skilled in the art, without departing from the concept of the present application, a number of modifications and improvements can be made, which are within the scope of protection of the present application. Therefore, the protection scope of the present application should be subject to the appended claims.

Claims

1. A flexible charging control system, characterized by, The flexible charging control system comprises: A switch assembly connected between a power grid side and a load to be charged, comprising a plurality of phase line switching switches, each of which is connected in series between the power grid side of a phase line and the load; A voltage sampling circuit connected to the output end of the switch assembly for detecting the output voltage of the power grid, wherein the switch assembly comprises three phase line switching switches, the first ends of the three phase line switching switches are connected to three phase lines respectively, and the second ends of the three phase line switching switches are connected together as the output end of the switch assembly; the input end of the voltage sampling circuit is connected to the output end of the switch assembly; A controller for sending control signals of the phase line switching switches; A logic self-locking circuit connected to the output end of the voltage sampling circuit and the output end of the controller for outputting a charging control signal when it is detected that the power grid does not output voltage and the control signals of the phase line switching switches sent by the controller are only one valid; A switch driving circuit connected to the output end of the controller and the output end of the logic self-locking circuit for controlling the phase line switching switches to be closed when only one control signal of the phase line switching switches and the charging control signal are received, so that only one phase line is connected to the load in the same charging period; The logic self-locking circuit comprises a first logic self-locking circuit and a second logic self-locking circuit, wherein The input end of the first logic self-locking circuit is connected to the output end of the controller, the output end is connected to the enable end of the second logic self-locking circuit, and the first logic self-locking circuit is used for receiving control signals of a plurality of phase line switching switches and outputting a charging enable signal when it is detected that only one control signal of the phase line switching switches is valid; The input end of the second logic self-locking circuit is connected to the output end of the voltage sampling circuit, the enable end is connected to the output end of the first logic self-locking circuit, and the output end is connected to the input end of the switch driving circuit; the second logic self-locking circuit is used for following and holding the voltage detection signal output by the voltage sampling circuit to obtain the charging control signal when the charging enable signal is received.

2. The system of claim 1, wherein, The switch assembly further comprises at least one main power switch connected in series between a phase line and the load for controlling the on-off between the phase line and the load.

3. The system of claim 1, wherein, The output end of the logic self-locking circuit is further connected to the input end of the controller, and the logic self-locking circuit is further used for outputting a charging state signal to the controller.

4. The system of claim 1, wherein, The output end of the second logic self-locking circuit comprises a first output end and a second output end, the first output end is connected to the input end of the switch driving circuit, and the second output end is connected to the input end of the controller; the second logic self-locking circuit is used for outputting the charging control signal to the switch driving circuit and outputting a charging state signal to the controller.

5. The system of claim 1, wherein, The switch assembly comprises a first phase line switching switch, a second phase line switching switch and a third phase line switching switch; the first logic self-locking circuit comprises a first exclusive OR gate circuit, a second exclusive OR gate circuit, a first AND gate circuit and a second AND gate circuit, wherein The three input terminals of the first exclusive-OR gate circuit are connected with the first output terminal, the second output terminal and the third output terminal of the controller respectively; the first exclusive-OR gate circuit is used for receiving the control signals of the first phase line switching switch, the second phase line switching switch and the third phase line switching switch, and outputting a first logic operation signal; The two input terminals of the first AND gate circuit are connected with the first output terminal and the second output terminal of the controller respectively; the first AND gate circuit is used for receiving the control signals of the first phase line switching switch and the second phase line switching switch, and outputting a second logic operation signal; The two input terminals of the second AND gate circuit are connected with the third output terminal of the controller and the output terminal of the first AND gate circuit respectively; the second AND gate circuit is used for receiving the control signal of the third phase line switching switch and the second logic operation signal, and outputting a third logic operation signal; The two input terminals of the second exclusive-OR gate circuit are connected with the output terminal of the first exclusive-OR gate circuit and the output terminal of the second AND gate circuit respectively, and the output terminal is connected with the enable terminal of the second logic self-locking circuit; the second exclusive-OR gate circuit is used for receiving the first logic operation signal and the third logic operation signal, and outputting the charging enable signal.

6. The system of claim 5, wherein, The first logic self-locking circuit further comprises at least one first delay circuit, wherein, The first delay circuit is arranged between the output terminal of the controller and the input terminal of the first exclusive-OR gate circuit; and / or, the first delay circuit is arranged between the output terminal of the controller and the input terminal of the first AND gate circuit; and / or, the first delay circuit is arranged between the output terminal of the controller and the input terminal of the second AND gate circuit; and / or, the first delay circuit is arranged between the output terminal of the first exclusive-OR gate circuit and the input terminal of the second exclusive-OR gate circuit; and / or, the first delay circuit is arranged between the output terminal of the second AND gate circuit and the input terminal of the second exclusive-OR gate circuit.

7. The system of claim 1 or 4, wherein, The second logic self-locking circuit comprises a D flip-flop, wherein, The data input terminal of the D flip-flop is connected with the output terminal of the voltage sampling circuit, the clock signal input terminal and the clear enable terminal are connected with the output terminal of the first logic self-locking circuit respectively, and the output terminal is connected with the input terminal of the switch driving circuit; the D flip-flop is used for following and holding the voltage detection signal when receiving the charging enable signal, and outputting the charging control signal.

8. The system of claim 7, wherein, The second logic self-locking circuit further comprises a third AND gate circuit and a fourth AND gate circuit, wherein, The two input terminals of the third AND gate circuit are connected with the output terminal of the voltage sampling circuit and the output terminal of the first logic self-locking circuit respectively, and the output terminal is connected with the clock signal input terminal of the D flip-flop; the third AND gate circuit is used for receiving the voltage detection signal and the charging enable signal, and outputting a clock signal to the D flip-flop; The two input terminals of the fourth AND gate circuit are connected with the output terminal of the voltage sampling circuit and the output terminal of the first logic self-locking circuit respectively, and the output terminal is connected with the clear enable terminal of the D flip-flop; the fourth AND gate circuit is used for receiving the voltage detection signal and the charging enable signal, and outputting a clear signal to the D flip-flop. Two inputs of the fourth AND gate circuit are connected with the output of the first logic self-locking circuit, and an output is connected with the clear enable end of the D flip-flop; the fourth AND gate circuit is used for receiving the charging enable signal and outputting a stop clear signal to the D flip-flop.

9. The system of claim 8, wherein, The second logic self-locking circuit further comprises at least one second delay circuit, wherein, The second delay circuit is arranged between the output of the first logic self-locking circuit and the input of the third AND gate circuit, and / or the second delay circuit is arranged between the output of the voltage sampling circuit and the input of the third AND gate circuit, and / or the second delay circuit is arranged between the output of the voltage sampling circuit and the data input end of the D flip-flop, and / or the second delay circuit is arranged between the output of the third AND gate circuit and the clock signal input end of the D flip-flop, and / or the second delay circuit is arranged between the output of the fourth AND gate circuit and the clear enable end of the D flip-flop.

10. The system of claim 9, wherein, The time length of the second delay circuit arranged between the output of the fourth AND gate circuit and the clear enable end of the D flip-flop is shorter than the time length of the second delay circuit arranged between the output of the third AND gate circuit and the clock signal input end of the D flip-flop.

11. The system of claim 1, wherein, The switch driving circuit comprises a plurality of fifth AND gate circuits, wherein, Two inputs of the fifth AND gate circuit are respectively connected with the output of the logic self-locking circuit and the output of the controller, and an output is connected with the control end of the phase line switching switch; the fifth AND gate circuit is used for outputting a switch driving signal to the control end of the phase line switching switch when receiving the charging control signal and the control signal of the phase line switching switch, so as to make the phase line switching switch closed and make the phase line where the phase line switching switch is located connected with the load.

12. The system of claim 11, wherein, The switch driving circuit further comprises at least one third delay circuit, wherein, The third delay circuit is arranged between the output of the logic self-locking circuit and the input of the fifth AND gate circuit, and / or the third delay circuit is arranged between the output of the controller and the input of the fifth AND gate circuit.

13. The system of claim 1, wherein, The voltage sampling circuit comprises an optoelectronic coupler; two inputs of the optoelectronic coupler are respectively connected with the neutral line of the power grid and the output of the switch assembly, and an output is connected with the input of the logic self-locking circuit; the optoelectronic coupler is used for converting the output voltage of the power grid into a voltage detection signal of the power grid and outputting to the logic self-locking circuit.

14. The system of claim 13, wherein, The optoelectronic coupler is an alternating current optoelectronic coupler or a direct current optoelectronic coupler; when the optoelectronic coupler is the direct current optoelectronic coupler, the voltage sampling circuit further comprises a rectifier bridge circuit and a voltage stabilizing filter circuit, wherein, Two input terminals of the rectifier bridge circuit are connected with a neutral line of a power grid and an output terminal of the switch assembly respectively, an output terminal of the rectifier bridge circuit is connected with an input terminal of the voltage stabilizing filter circuit, an output terminal of the voltage stabilizing filter circuit is connected with two input terminals of the optoelectronic coupler, and an output terminal of the optoelectronic coupler is connected with an input terminal of the logic self-locking circuit.

15. The system of claim 1, wherein, The system further comprises a cloud server connected with the controller, and the cloud server is configured to generate a phase line switching instruction according to the power of each phase line and send the phase line switching instruction to the controller, so that the controller generates a control signal of the phase line switching switch corresponding to the phase line switching instruction.

16. A flexible charging control method, characterized by, The method is applied to the flexible charging control system according to any one of claims 1 to 15, and the method comprises: obtaining real-time power data of each phase line on the power grid side in response to a load charging instruction; determining a phase line switching strategy according to the real-time power data of each phase line on the power grid side, and generating a control signal of the phase line switching switch according to the phase line switching strategy; sending the control signal of the phase line switching switch to the logic self-locking circuit and the switch driving circuit, so that the logic self-locking circuit and the switch driving circuit control the phase line switching switch to be closed according to the control signal of the phase line switching switch, and only one phase line is connected with the load in the same charging period.

17. The method of claim 16, wherein, The method further comprises: receiving a charging state signal output by the logic self-locking circuit; in the charging state, if it is detected that the charging state signal is an invalid signal, setting the control signals of all phase line switching switches to invalid signals to cut off the connection between all phase lines and the load; in the idle state, if it is detected that the charging state signal is a valid signal, setting the control signals of all phase line switching switches to invalid signals to cut off the connection between all phase lines and the load.

18. The method of claim 16, wherein, The method further comprises: detecting a charging mode of the flexible charging control system, wherein the charging mode comprises a single-phase charging mode and a multi-phase charging mode; in the charging state, if it is detected that the single-phase charging mode is detected, controlling one phase line switching switch in the switch assembly to be closed, so that only one phase line is connected with the load in the same charging period; in the charging state, if it is detected that the multi-phase charging mode is detected, controlling multiple main power switches in the switch assembly to be closed, so that multiple phase lines are connected with the load in the same charging period.

19. The method of claim 16, wherein, The method further comprises: receiving a phase line switching instruction sent by a cloud controller, wherein the phase line switching instruction is generated by the cloud controller according to real-time power data of each phase line on the power grid side; generating a control signal of the phase line switching switch according to the phase line switching instruction, and sending the control signal of the phase line switching switch to the logic self-locking circuit and the switch driving circuit, so that the logic self-locking circuit and the switch driving circuit control the phase line switching switch to be closed according to the control signal of the phase line switching switch, and only one phase line is connected with the load in the same charging period.

20. The method according to any one of claims 16 to 19, characterized in that, The method further comprises: monitoring operation data of the power grid side in real time, wherein the operation data comprises state data of the phase line switching switch, voltage data and current data of the power grid side; judging whether an operation fault occurs in the power grid side according to the operation data of the power grid side, wherein the operation fault comprises at least one fault of power grid voltage abnormality, overcurrent fault and short circuit fault; when detecting that an operation fault occurs in the power grid side, setting control signals of all phase line switching switches as invalid signals to cut off the connection between the phase line and the load.

21. A storage medium having stored thereon a computer program, characterized in that The computer program is executed by the processor to implement the method in any one of claims 16-20.

22. A computer device comprising a storage medium, a processor, and a computer program stored on the storage medium and executable on the processor, wherein, The processor executes the computer program to implement the method in any one of claims 16-20.

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