A transmission line detection circuit for power system

Abstract

The present invention discloses a power transmission line detection circuit for an electric power system, which relates to the technical field of electric power detection, and includes a power supply module for power supply and voltage conversion; a leakage detection module for leakage detection, adjusting signal input impedance, signal amplification and filtering processing, and leakage judgment; an output module for receiving electric energy, isolating voltage sampling, and signal amplification and filtering processing, and then performing AC voltage mutation detection by a mutation detection module; a signal processing module for receiving signals and wirelessly communicating with a monitoring terminal; a timing trigger module for performing high-level self-locking and controlling the timing control module to work when no leakage occurs and an AC voltage mutation occurs; and a timing control module for timing control of an impedance adjustment module to adjust the input impedance of a leakage detection module. The power transmission line detection circuit for an electric power system of the present invention can automatically adjust the leakage detection sensitivity of the leakage detection module, avoid leakage detection, and improve the safety of the transmission line.

Description

Technical Field

[0001] The invention relates to the technical field of electric power detection, in particular to a power transmission line detection circuit for an electric power system. Background Art

[0002] With the rapid development of power transmission and distribution technology, distributed energy has been connected to the power grid one after another due to its flexibility and convenience for renewable applications. Distributed power sources such as photovoltaics and wind power have been connected to the power grid one after another to improve the power supply quality, environmental protection, and power supply flexibility of the distribution network. In order to ensure the safe power supply of the distributed distribution network, the distribution network in the prior art uses a leakage detection circuit composed of a current transformer, a leakage detection device, etc. in the transmission line to perform leakage detection on the transmission line. However, since the leakage detection circuit of the distribution network cannot automatically adjust the leakage detection accuracy, the leakage detection circuit cannot cope with different usage scenarios and safety requirements, and when the distributed distribution network is judged for leakage, leakage detection is prone to occur, so it needs to be improved. Summary of the invention

[0003] The embodiment of the present invention provides a power transmission line detection circuit for a power system to solve the problems raised in the above background technology.

[0004] According to an embodiment of the present invention, there is provided a power transmission line detection circuit for a power system, comprising: a power supply module, a leakage detection module, an output module, a mutation detection module, a signal processing module, a timing trigger module, a timing control module and an impedance adjustment module;

[0005] A power module, used for receiving AC power, transforming the AC power and outputting a first power, rectifying, filtering and stabilizing the AC power and outputting a second power;

[0006] a leakage detection module, connected to the power module and the impedance adjustment module, for performing residual current sensing on the first electric energy passing through and outputting a first detection signal when the residual current is sensed, adjusting the signal input impedance and amplifying and filtering the first detection signal when receiving the first adjustment signal output by the impedance adjustment module, outputting a second detection signal, and outputting a first abnormal signal when the second detection signal is greater than a set action current threshold;

[0007] an output module, connected to the leakage detection module, configured to receive the first electric energy transmitted through the leakage detection module, perform isolation voltage sampling and signal amplification and filtering processing on the first electric energy, and output a third detection signal;

[0008] a mutation detection module connected to the output module, configured to perform phase shift processing on the third detection signal, superimpose the phase-shifted signal with the third detection signal, and output a second abnormal signal when the superimposed signal potential is not zero;

[0009] A signal processing module connected to the leakage detection module, the mutation detection module and the timing control module, configured to output a first fault signal when the timing control signal output by the timing control module is not received and the first abnormal signal is received, and output a second fault signal when the timing control signal and the first abnormal signal are received, and wirelessly transmit the first fault signal, the second fault signal or the second abnormal signal to the monitoring terminal;

[0010] A timing trigger module, connected to the mutation detection module and the signal processing module, for performing high-level self-locking and outputting a first trigger signal when the first abnormal signal is not received and the second abnormal signal is received;

[0011] A timing control module, connected to the power module and the timing trigger module, is used to set the timing time, and when receiving the first trigger signal or the second electric energy, starts the timing work and outputs the timing control signal regularly, and stops outputting the timing control signal after the timing ends;

[0012] The impedance adjustment module is connected to the power module and the timing control module, and is used to receive the second electric energy and output the first adjustment signal, and adjust the voltage value of the first adjustment signal when receiving the timing control signal.

[0013] As a further solution of the present invention: the power module includes an AC power distribution interface, a first regulating device and a second regulating device; the leakage detection module includes a first mutual inductor, a first resistor, a second resistor, a third resistor, a first power tube, a second power tube, a first diode, a second diode, a first capacitor, a second capacitor, a third capacitor and a first detection device; the output module includes an output port;

[0014] Preferably, the first end of the AC power distribution interface is connected to the first end of the first regulating device and the first end of the second regulating device, the second end of the AC power distribution interface is connected to the second end of the first regulating device and the second end of the second regulating device, the third end and the fourth end of the first regulating device both pass through the first mutual inductor and are respectively connected to the first end and the second end of the output port, the second end, the third end and the fourth end of the second regulating device are respectively connected to the VCC end of the first detection device, the impedance adjustment module and the timing control module, the first output end of the first mutual inductor is connected to the drain of the first power tube and the drain of the second power tube and the second output end of the first mutual inductor through the first resistor, the source of the first power tube is connected to one end of the third capacitor and the IN1 end of the first detection device through the second resistor, the source of the second power tube is connected to the other end of the third capacitor and the IN2 end of the first detection device through the third resistor, the gate of the second power tube is connected to the cathode of the first diode and is grounded through the first resistor, the gate of the first power tube is connected to the cathode of the second diode and is grounded through the second capacitor, the anode of the first diode is connected to the anode of the second diode and the impedance adjustment module, and the OUT end of the first detection device is connected to the signal processing module.

[0015] As a further solution of the present invention: the signal processing module includes a first logic chip, a second logic chip, a first inverter and a data receiving device;

[0016] Preferably, the A end of the first logic chip is connected to the A end of the second logic chip and the OUT end of the first detection device, the B end of the first logic chip is connected to the input end of the first inverter and the timing control module, the B end of the second logic chip is connected to the output end of the first inverter, the Y end of the first logic chip and the Y end of the second logic chip are respectively connected to the first end and the second end of the data receiving device, and the third end of the data receiving device is connected to the mutation detection module.

[0017] As a further solution of the present invention: the timing trigger module includes a second inverter, a fifth diode, a fourth diode, a third diode and a third logic chip;

[0018] Preferably, the input end of the second inverter is connected to the Y end of the second logic chip, the output end of the second inverter is connected to the B end of the third logic chip, the A end of the third logic chip is connected to the cathode of the third diode and the cathode of the fourth diode, the anode of the fourth diode is connected to the mutation detection module, the anode of the third diode is connected to the Y end of the third logic chip and the anode of the fifth diode, and the cathode of the fifth diode is connected to the timing control module.

[0019] As a further solution of the present invention: the output module further includes a fourth resistor, a fifth resistor, a second mutual inductor and a signal conditioning device; the mutation detection module includes a tenth resistor, a phase shift device, an eleventh resistor, a first comparator, a second comparator, a fourth logic chip and a third inverter;

[0020] Preferably, the first end of the second mutual inductor is connected to the first end of the output port through a fourth resistor, the second end of the second mutual inductor is connected to the second end of the output port through a fifth resistor, the third end and the fourth end of the second mutual inductor are respectively connected to the first end and the second end of the signal conditioning device, the third end of the signal conditioning device is connected to the input end of the phase shifting device and is connected to one end of the eleventh resistor through a tenth resistor, the in-phase end of the first comparator and the inverting end of the second comparator, the other end of the eleventh resistor is connected to the output end of the phase shifting device, the inverting end of the first comparator and the in-phase end of the second comparator are both grounded, the output end of the first comparator and the output end of the second comparator are respectively connected to the A end and the B end of the fourth logic chip, the Y end of the fourth logic chip is connected to the input end of the third inverter, and the output end of the third inverter is connected to the anode of the fourth diode and the third end of the signal receiving device.

[0021] As a further solution of the present invention: the impedance adjustment module includes a third power tube, a first thyristor, a sixth resistor, a seventh resistor, a fourth capacitor and an eighth resistor;

[0022] Preferably, the drain of the third power tube and the third end of the second regulating device are connected to the gate of the third power tube and one end of the fourth capacitor through the seventh resistor, the source of the third power tube is connected to the anode of the first thyristor and the anode of the first diode, the cathode of the first thyristor is connected to the other end of the fourth capacitor and one end of the eighth resistor through the sixth resistor, the other end of the eighth resistor is grounded, and the control end of the first thyristor is connected to the timing control module.

[0023] As a further solution of the present invention: the timing control module includes a first key switch, a ninth resistor, a fourth power tube and a timing device;

[0024] Preferably, the drain of the fourth power tube is connected to the fourth end of the second regulating device and the static end of the first push switch, the gate of the fourth power tube is connected to the cathode of the fifth diode and connected to the dynamic end of the first push switch through the ninth resistor, the source of the fourth power tube is connected to the power supply end of the timing device, the ground end of the timing device is grounded, and the output end of the timing device is connected to the control end of the first thyristor, the input end of the first inverter and the B end of the first logic chip.

[0025] Compared with the prior art, the beneficial effects of the present invention are as follows: the transmission line detection circuit for the power system of the present invention can detect the residual current generated by the transmission line between the power module and the output module by the leakage detection module. When the residual current is detected, the leakage judgment is performed and the signal processing module and the monitoring terminal are wirelessly communicated. The mutation detection module performs AC mutation judgment on the electric energy input to the output module. When an AC mutation occurs and no leakage is judged, the timing trigger module controls the timing control module to perform timing work and adjust the voltage value provided by the impedance adjustment module in a timing manner, and then adjusts the input impedance of the leakage detection module, adjusts the leakage detection sensitivity of the leakage detection module, avoids leakage detection, and improves the safety of the transmission line. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.

[0027] Figure 1 A schematic block diagram of a power transmission line detection circuit for a power system provided by an embodiment of the present invention.

[0028] Figure 2 A circuit diagram of a power transmission line detection circuit for a power system provided by an embodiment of the present invention.

[0029] Figure 3 A circuit diagram of a mutation detection module provided in an embodiment of the present invention.

[0030] Figure 4 A circuit diagram of a timing control module provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0031] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0032] In one embodiment, see Figure 1 , a power transmission line detection circuit for a power system, comprising: a power supply module 1, a leakage detection module 2, an output module 3, a mutation detection module 4, a signal processing module 5, a timing trigger module 6, a timing control module 7 and an impedance adjustment module 8;

[0033] Specifically, the power module 1 is used to receive AC power, transform the AC power and output the first power, rectify, filter and stabilize the AC power and output the second power;

[0034] The leakage detection module 2 is connected to the power module 1 and the impedance adjustment module 8, and is used to sense the residual current of the first electric energy passing through and output a first detection signal when the residual current is sensed, and when receiving the first adjustment signal output by the impedance adjustment module 8, adjust the signal input impedance and amplify and filter the first detection signal, and output a second detection signal, and when the second detection signal is greater than a set action current threshold, output a first abnormal signal;

[0035] The output module 3 is connected to the leakage detection module 2, and is used to receive the first electric energy transmitted through the leakage detection module 2, perform isolation voltage sampling and signal amplification and filtering processing on the first electric energy, and output a third detection signal;

[0036] The mutation detection module 4 is connected to the output module 3 and is used to perform phase shift processing on the third detection signal, superimpose the phase-shifted signal with the third detection signal, and output a second abnormal signal when the superimposed signal potential is not zero;

[0037] The signal processing module 5 is connected to the leakage detection module 2, the mutation detection module 4 and the timing control module 7, and is used to output a first fault signal when the timing control signal output by the timing control module 7 is not received and the first abnormal signal is received, and output a second fault signal when the timing control signal and the first abnormal signal are received, and wirelessly transmit the first fault signal, the second fault signal or the second abnormal signal to the monitoring terminal;

[0038] A timing trigger module 6, connected to the mutation detection module 4 and the signal processing module 5, for performing high-level self-locking and outputting a first trigger signal when the first abnormal signal is not received and the second abnormal signal is received;

[0039] The timing control module 7 is connected to the power module 1 and the timing trigger module 6, and is used to set the timing time, and when receiving the first trigger signal or the second electric energy, starts the timing work and outputs the timing control signal regularly, and stops outputting the timing control signal after the timing ends;

[0040] The impedance adjustment module 8 is connected to the power module 1 and the timing control module 7, and is used to receive the second electric energy and output the first adjustment signal, and adjust the voltage value of the first adjustment signal when receiving the timing control signal.

[0041] In a specific embodiment, the power supply module 1 can adopt a power supply circuit composed of an AC distribution interface and a regulating device, can be connected to the AC power provided by the distribution network, and perform isolation and transformation processing on the AC power, detection rectification filtering and multi-way power supply processing; the leakage detection module 2 can adopt a leakage detection circuit composed of a current transformer, a resistor, a field effect transistor, a leakage detection device, etc., can sense the residual current generated in the transmission line, and perform amplification and filtering processing after sensing. When the amplified and filtered signal is greater than the set action current threshold, leakage occurs; the output module 3 can adopt an output circuit composed of an output port, a voltage transformer, a signal conditioning device, etc., can be connected to AC power and perform isolation voltage sampling and signal conditioning on the connected AC power; the mutation detection module 4 can adopt a mutation detection circuit composed of a phase shifter, a comparator, a logic chip, etc., to perform phase shifting on the input AC power. Processing and superposition processing, by judging whether the voltage potential after superposition is zero, it is judged whether the alternating current has a voltage mutation; the above-mentioned signal processing module 5 can adopt a signal processing circuit composed of a logic chip, an inverter and a data receiving device, which can receive signals and wirelessly communicate the received signals with the monitoring terminal; the above-mentioned timing trigger module 6 can adopt a timing trigger circuit composed of an inverter, a logic chip and a diode, which can perform high-level self-locking and control the timing control module 7 to work when an alternating current mutation occurs but no leakage occurs; the above-mentioned timing control module 7 can adopt a timing control circuit composed of a timing device, a field effect transistor, a resistor, etc., which can set the timing time and output a high-level state signal when power is supplied; the above-mentioned impedance adjustment module 8 can adopt an impedance adjustment circuit composed of a field effect transistor, a thyristor, a capacitor, etc., and the timing control module 7 controls and adjusts the input impedance of the leakage detection module 2.

[0042] In another embodiment, see Figure 1 , Figure 2 , Figure 3 and Figure 4 The power module 1 includes an AC power distribution interface, a first regulating device and a second regulating device; the leakage detection module 2 includes a first mutual inductor CT1, a first resistor R1, a second resistor R2, a third resistor R3, a first power tube Q1, a second power tube Q2, a first diode D1, a second diode D2, a first capacitor C1, a second capacitor C2, a third capacitor C3 and a first detection device IC1; the output module 3 includes an output port;

[0043] Specifically, the first end of the AC power distribution interface is connected to the first end of the first regulating device and the first end of the second regulating device, the second end of the AC power distribution interface is connected to the second end of the first regulating device and the second end of the second regulating device, the third end and the fourth end of the first regulating device both pass through the first transformer CT1 and are respectively connected to the first end and the second end of the output port, the second end, the third end and the fourth end of the second regulating device are respectively connected to the VCC end of the first detection device IC1, the impedance adjustment module 8 and the timing control module 7, the first output end of the first transformer CT1 is connected to the drain of the first power tube Q1 and is connected to the drain of the second power tube Q2 and the first transformer C through the first resistor R1. At the second output end of T1, the source of the first power tube Q1 is connected to one end of the third capacitor C3 and the IN1 end of the first detection device IC1 through the second resistor R2, the source of the second power tube Q2 is connected to the other end of the third capacitor C3 and the IN2 end of the first detection device IC1 through the third resistor R3, the gate of the second power tube Q2 is connected to the cathode of the first diode D1 and is grounded through the first resistor R1, the gate of the first power tube Q1 is connected to the cathode of the second diode D2 and is grounded through the second capacitor C2, the anode of the first diode D1 is connected to the anode of the second diode D2 and the impedance adjustment module 8, and the OUT end of the first detection device IC1 is connected to the signal processing module 5.

[0044] In a specific embodiment, the above-mentioned first regulating device can be composed of a transformer; the above-mentioned second regulating device can be composed of a rectifier, a capacitor and a voltage stabilizer; the above-mentioned first transformer CT1 can use a current transformer; the above-mentioned first power tube Q1 and the second power tube Q2 can use N-channel field effect tubes to adjust the input impedance; the above-mentioned first detection device IC1 can use a VG54123 leakage detection device, which has an action current threshold, and outputs a high-level state signal when the input signal exceeds the action current threshold.

[0045] Further, the signal processing module 5 includes a first logic chip J1, a second logic chip J2, a first inverter INV1 and a data receiving device;

[0046] Specifically, the A end of the first logic chip J1 is connected to the A end of the second logic chip J2 and the OUT end of the first detection device IC1, the B end of the first logic chip J1 is connected to the input end of the first inverter INV1 and the timing control module 7, the B end of the second logic chip J2 is connected to the output end of the first inverter INV1, the Y end of the first logic chip J1 and the Y end of the second logic chip J2 are respectively connected to the first end and the second end of the data receiving device, and the third end of the data receiving device is connected to the mutation detection module 4.

[0047] In a specific embodiment, the first logic chip J1 and the second logic chip J2 can both be AND gate chips; the first inverter INV1 can be a NOT gate chip; the data receiving device can be composed of a single chip microcomputer and a communicator to realize signal reception and wireless communication with the monitoring terminal.

[0048] Further, the timing trigger module 6 includes a second inverter INV2, a fifth diode D5, a fourth diode D4, a third diode D3 and a third logic chip J3;

[0049] Specifically, the input end of the second inverter INV2 is connected to the Y end of the second logic chip J2, the output end of the second inverter INV2 is connected to the B end of the third logic chip J3, the A end of the third logic chip J3 is connected to the cathode of the third diode D3 and the cathode of the fourth diode D4, the anode of the fourth diode D4 is connected to the mutation detection module 4, the anode of the third diode D3 is connected to the Y end of the third logic chip J3 and the anode of the fifth diode D5, and the cathode of the fifth diode D5 is connected to the timing control module 7.

[0050] In a specific embodiment, the second inverter INV2 may use a NOT gate chip, and the third logic chip J3 may use an AND gate chip, which cooperates with the fourth diode D4, the third diode D3 and the fifth diode D5 to perform high-level self-locking.

[0051] Further, the output module 3 also includes a fourth resistor R4, a fifth resistor R5, a second mutual inductor CT2 and a signal conditioning device; the mutation detection module 4 includes a tenth resistor R10, a phase shift device, an eleventh resistor R11, a first comparator A1, a second comparator A2, a fourth logic chip J4 and a third inverter INV3;

[0052] Specifically, the first end of the second mutual inductor CT2 is connected to the first end of the output port through the fourth resistor R4, the second end of the second mutual inductor CT2 is connected to the second end of the output port through the fifth resistor R5, the third end and the fourth end of the second mutual inductor CT2 are respectively connected to the first end and the second end of the signal conditioning device, the third end of the signal conditioning device is connected to the input end of the phase shifting device and is connected to one end of the eleventh resistor R11 through the tenth resistor R10, the in-phase end of the first comparator A1 and the inverting end of the second comparator A2, the other end of the eleventh resistor R11 is connected to the output end of the phase shifting device, the inverting end of the first comparator A1 and the in-phase end of the second comparator A2 are both grounded, the output end of the first comparator A1 and the output end of the second comparator A2 are respectively connected to the A end and the B end of the fourth logic chip J4, the Y end of the fourth logic chip J4 is connected to the input end of the third inverter INV3, and the output end of the third inverter INV3 is connected to the anode of the fourth diode D4 and the third end of the signal receiving device.

[0053] In a specific embodiment, the second transformer CT2 can be a voltage transformer; the signal conditioning device can be composed of an operational amplifier, a resistor and a capacitor to perform signal amplification and filtering processing; the phase shifter can be composed of an operational amplifier, a capacitor and a resistor to perform 180-degree phase shift processing on the input AC power; the first comparator A1 and the second comparator A2 can both be LM358 comparators; the fourth logic chip J4 can be an OR gate chip; the third inverter INV3 can be a NOT gate chip.

[0054] Further, the impedance adjustment module 8 includes a third power tube Q3, a first thyristor S1, a sixth resistor R6, a seventh resistor R7, a fourth capacitor C4 and an eighth resistor R8;

[0055] Specifically, the drain of the third power tube Q3 and the third end of the second regulating device are connected to the gate of the third power tube Q3 and one end of the fourth capacitor C4 through the seventh resistor R7, the source of the third power tube Q3 is connected to the anode of the first thyristor S1 and the anode of the first diode D1, the cathode of the first thyristor S1 is connected to the other end of the fourth capacitor C4 and one end of the eighth resistor R8 through the sixth resistor R6, the other end of the eighth resistor R8 is grounded, and the control end of the first thyristor S1 is connected to the timing control module 7.

[0056] In a specific embodiment, the third power tube Q3 may be an N-channel field effect tube; the first thyristor S1 may be a unidirectional thyristor; and the fourth capacitor C4 may be an energy storage capacitor.

[0057] Furthermore, the timing control module 7 includes a first key switch K1, a ninth resistor R9, a fourth power tube Q4 and a timing device;

[0058] Specifically, the drain of the fourth power tube Q4 is connected to the fourth end of the second regulating device and the static end of the first key switch K1, the gate of the fourth power tube Q4 is connected to the cathode of the fifth diode D5 and is connected to the dynamic end of the first key switch K1 through the ninth resistor R9, the source of the fourth power tube Q4 is connected to the power supply end of the timing device, the ground end of the timing device is grounded, and the output end of the timing device is connected to the control end of the first thyristor S1, the input end of the first inverter INV1 and the B end of the first logic chip J1.

[0059] In a specific embodiment, the fourth power tube Q4 can be an N-channel field effect tube; the timing device can be composed of a NE555 chip, a resistor, a capacitor and a diode, and the timing time can be set. When powered on, the timing work starts and the high-level state signal is outputted regularly. After the timing ends, the low-level state signal is continuously outputted.

[0060] In a power transmission line detection circuit for a power system of the present embodiment, an AC power distribution interface is used to connect AC power, a first regulating device performs voltage transformation and transmits the power to an output port, a first transformer CT1 detects whether residual current is generated in the transmitted power, a second regulating device performs rectification, filtering and voltage stabilization, triggers the third power tube Q3 to turn on and controls the first power tube Q1 and the second power tube Q2 to turn on, and after the first transformer CT1 detects the residual current, the first resistor R1, the third resistor R3, the second resistor R2, the first power tube Q1, the third capacitor C3 and the second power tube Q2 are amplified and filtered, and then transmitted to the first detection device IC1, and the processed signal is greater than the set value of the first detection device IC1. When the action current threshold is reached, the OUT terminal of the first detection device IC1 outputs a first abnormal signal, and the Y terminal of the second logic chip J2 outputs a first fault signal, which is received by the data receiving device and communicates wirelessly with the monitoring terminal. The second mutual inductor CT2 cooperates with the fourth resistor R4, the fifth resistor R5 and the signal conditioning device to perform voltage sampling and signal amplification and filtering processing on the AC power input to the output port. The processed signal is subjected to 180-degree phase shift processing by the phase shifting device, and the phase-shifted signal is superimposed with the non-phase-shifted signal through the tenth resistor R10 and the eleventh resistor R11. When the AC power does not undergo a sudden change, the voltage potential between the tenth resistor R10 and the eleventh resistor R11 is zero volt. When an AC mutation occurs, the third inverter INV3 outputs the fourth logic chip J4 outputs the second abnormal signal. If no leakage occurs at this time, the second inverter INV2 will output a high level, cooperate with the third logic chip J3, the third diode D3, the fourth diode D4 and the fifth diode D5 to perform high-level self-locking and output the first trigger signal, so that the fourth power tube Q4 is turned on, the timing device starts timing work, and during the timing period, outputs a timing control signal in a high-level state to control the first thyristor S1 to turn on, the first inverter INV1 outputs a low level and the B terminal of the first logic chip J1 becomes a high level, the first thyristor S1 is turned on, and the electric energy transmitted by the third power tube Q3 is transmitted to the fourth capacitor C4, so that the fourth thyristor S1 is turned on. Capacitor C4 is bootstrapped, the voltage of the fourth capacitor C4 rises, and then the conduction angle of the third power tube Q3 is gradually increased, the voltage output by the source of the third power tube Q3 is increased, and then the conduction angles of the first power tube Q1 and the second power tube Q2 are gradually increased, the input impedance is reduced, so that the current of the signal input to the first detection device IC1 is increased, and the leakage detection sensitivity is improved. During this period, if leakage occurs, the first logic chip J1 will output the second fault signal, the data receiving device receives it and communicates wirelessly with the monitoring terminal. In addition, the conduction angles of the third power tube Q3, the first power tube Q1 and the second power tube Q2, the input impedance and the leakage detection sensitivity can also be adjusted by pressing the first key switch K1.

[0061] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

[0062] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims

1. A power transmission line detection circuit for a power system, characterized in that: The power transmission line detection circuit for the power system comprises: a power supply module, a leakage detection module, an output module, a mutation detection module, a signal processing module, a timing trigger module, a timing control module and an impedance adjustment module; The power supply module is used to receive AC power, transform the AC power and output the first power, rectify, filter and stabilize the AC power and output the second power; The leakage detection module is connected to the power module and the impedance adjustment module, and is used to sense the residual current of the first electric energy passing through and output a first detection signal when the residual current is sensed, and when receiving the first adjustment signal output by the impedance adjustment module, adjust the signal input impedance and amplify and filter the first detection signal, and output a second detection signal, and when the second detection signal is greater than a set action current threshold, output a first abnormal signal; The output module is connected to the leakage detection module, and is used to receive the first electric energy transmitted through the leakage detection module, perform isolation voltage sampling and signal amplification and filtering processing on the first electric energy, and output a third detection signal; The mutation detection module is connected to the output module and is used to perform phase shift processing on the third detection signal, superimpose the phase-shifted signal with the third detection signal, and output a second abnormal signal when the superimposed signal potential is not zero; The signal processing module is connected to the leakage detection module, the mutation detection module and the timing control module, and is used to output a first fault signal when the timing control signal output by the timing control module is not received and the first abnormal signal is received, and output a second fault signal when the timing control signal and the first abnormal signal are received, and wirelessly transmit the first fault signal, the second fault signal or the second abnormal signal to the monitoring terminal; The timing trigger module is connected to the mutation detection module and the signal processing module, and is used to perform high-level self-locking and output a first trigger signal when the first abnormal signal is not received and the second abnormal signal is received; The timing control module is connected to the power module and the timing trigger module, and is used to set the timing time, and when receiving the first trigger signal or the second electric energy, starts the timing work and outputs the timing control signal regularly, and stops outputting the timing control signal after the timing ends; The impedance adjustment module is connected to the power supply module and the timing control module, and is used to receive the second electric energy and output a first adjustment signal, and adjust the voltage value of the first adjustment signal when receiving the timing control signal.

2. A power transmission line detection circuit for a power system according to claim 1, characterized in that: The power supply module includes an AC power distribution interface, a first regulating device and a second regulating device; the leakage detection module includes a first mutual inductor, a first resistor, a second resistor, a third resistor, a first power tube, a second power tube, a first diode, a second diode, a first capacitor, a second capacitor, a third capacitor and a first detection device; the output module includes an output port; The first end of the AC power distribution interface is connected to the first end of the first regulating device and the first end of the second regulating device, the second end of the AC power distribution interface is connected to the second end of the first regulating device and the second end of the second regulating device, the third end and the fourth end of the first regulating device both pass through the first mutual inductor and are respectively connected to the first end and the second end of the output port, the second end, the third end and the fourth end of the second regulating device are respectively connected to the VCC end of the first detection device, the impedance adjustment module and the timing control module, the first output end of the first mutual inductor is connected to the drain of the first power tube and is connected to the drain of the second power tube and the second output end of the first mutual inductor through the first resistor, the source of the first power tube is connected to one end of the third capacitor and the IN1 end of the first detection device through the second resistor, the source of the second power tube is connected to the other end of the third capacitor and the IN2 end of the first detection device through the third resistor, the gate of the second power tube is connected to the cathode of the first diode and is grounded through the first resistor, the gate of the first power tube is connected to the cathode of the second diode and is grounded through the second capacitor, the anode of the first diode is connected to the anode of the second diode and the impedance adjustment module, and the OUT end of the first detection device is connected to the signal processing module.

3. A power transmission line detection circuit for a power system according to claim 2, characterized in that: The signal processing module includes a first logic chip, a second logic chip, a first inverter and a data receiving device; The A end of the first logic chip is connected to the A end of the second logic chip and the OUT end of the first detection device, the B end of the first logic chip is connected to the input end of the first inverter and the timing control module, the B end of the second logic chip is connected to the output end of the first inverter, the Y end of the first logic chip and the Y end of the second logic chip are respectively connected to the first end and the second end of the data receiving device, and the third end of the data receiving device is connected to the mutation detection module.

4. A power transmission line detection circuit for a power system according to claim 3, characterized in that: The timing trigger module includes a second inverter, a fifth diode, a fourth diode, a third diode and a third logic chip; The input end of the second inverter is connected to the Y end of the second logic chip, the output end of the second inverter is connected to the B end of the third logic chip, the A end of the third logic chip is connected to the cathode of the third diode and the cathode of the fourth diode, the anode of the fourth diode is connected to the mutation detection module, the anode of the third diode is connected to the Y end of the third logic chip and the anode of the fifth diode, and the cathode of the fifth diode is connected to the timing control module.

5. A power transmission line detection circuit for a power system according to claim 4, characterized in that: The output module further includes a fourth resistor, a fifth resistor, a second mutual inductor and a signal conditioning device; the mutation detection module includes a tenth resistor, a phase shift device, an eleventh resistor, a first comparator, a second comparator, a fourth logic chip and a third inverter; The first end of the second mutual inductor is connected to the first end of the output port through a fourth resistor, the second end of the second mutual inductor is connected to the second end of the output port through a fifth resistor, the third end and the fourth end of the second mutual inductor are connected to the first end and the second end of the signal conditioning device respectively, the third end of the signal conditioning device is connected to the input end of the phase shifting device and is connected to one end of the eleventh resistor through a tenth resistor, the in-phase end of the first comparator and the inverting end of the second comparator, the other end of the eleventh resistor is connected to the output end of the phase shifting device, the inverting end of the first comparator and the in-phase end of the second comparator are both grounded, the output end of the first comparator and the output end of the second comparator are respectively connected to the A end and the B end of the fourth logic chip, the Y end of the fourth logic chip is connected to the input end of the third inverter, and the output end of the third inverter is connected to the anode of the fourth diode and the third end of the signal receiving device.

6. A power transmission line detection circuit for a power system according to claim 5, characterized in that: The impedance adjustment module includes a third power tube, a first thyristor, a sixth resistor, a seventh resistor, a fourth capacitor and an eighth resistor; The drain of the third power tube and the third end of the second regulating device are connected to the gate of the third power tube and one end of the fourth capacitor through the seventh resistor, the source of the third power tube is connected to the anode of the first thyristor and the anode of the first diode, the cathode of the first thyristor is connected to the other end of the fourth capacitor and one end of the eighth resistor through the sixth resistor, the other end of the eighth resistor is grounded, and the control end of the first thyristor is connected to the timing control module.

7. A power transmission line detection circuit for a power system according to claim 6, characterized in that: The timing control module includes a first key switch, a ninth resistor, a fourth power tube and a timing device; The drain of the fourth power tube is connected to the fourth end of the second regulating device and the static end of the first key switch, the gate of the fourth power tube is connected to the cathode of the fifth diode and connected to the dynamic end of the first key switch through the ninth resistor, the source of the fourth power tube is connected to the power supply end of the timing device, the ground end of the timing device is grounded, and the output end of the timing device is connected to the control end of the first thyristor, the input end of the first inverter and the B end of the first logic chip.

Images