Prefetching method applied to processor and related device

Abstract

The embodiment of the invention discloses a prefetching method applied to a processor and a related device, relates to the technical field of computers, and can effectively improve the prefetching efficiency. The method comprises the steps of obtaining page reading characteristics of a memory page where a prefetch object is located; according to the page reading feature, predicting a first accumulation feature of a storage address where a storage object read by the Kth reading operation after the first reading operation is located, K being a positive integer greater than 1; the first accumulated feature comprises an accumulated feature formed by address features predicted in K reading operations after the first reading operation; according to the first accumulation feature, a storage address where a storage object read by the Kth reading operation after a second reading operation is located is predicted, and the second reading operation is the next reading operation of the first reading operation. The prefetching method and device are suitable for prefetching operation of the processor.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a pre-fetching method and related device applied to a processor. Background Art

[0002] Prefetch technology predicts the addresses to be accessed in the future and fetches the data to be used in the future from the memory to the cache inside the central processing unit (CPU) in advance, or fetches the data from the lower-level cache to the higher-level cache (such as L2 Cache to L1 Cache) in advance. If the prediction is accurate, the data will be ready in the cache when it is really needed, achieving the purpose of "hiding" the memory access delay and improving the overall performance of the processor.

[0003] Since the prefetch operation is relatively time-consuming, in order to prefetch the data or instruction before the processor uses the data or instruction, there are often multiple other read operations between the prefetched data or instruction and the current read operation. For example, if the data needs to be read 8 times, when the data is read for the first time, it is predicted which data will be read for the sixth time, and prefetching is performed, with 5 read operations in between. Since these other read operations in between will also affect the prefetch results, each time data or instructions are prefetched, a large amount of resources will be spent to process these other read operations in between (for example, predicting the addresses of these 5 read operations separately) in order to obtain a more accurate prefetch result, resulting in low prefetch efficiency. Summary of the invention

[0004] In view of this, an embodiment of the present invention provides a prefetching method and related apparatus applied to a processor, which can effectively improve the prefetching efficiency.

[0005] In a first aspect, an embodiment of the present invention provides a prefetch method applied to a processor, comprising: obtaining a page read feature of a memory page where a prefetch object is located; based on the page read feature, predicting a first cumulative feature of a storage address where a storage object read by a K-th read operation after a first read operation is located, wherein K is a positive integer greater than 1; the first cumulative feature includes a cumulative feature formed by address features predicted in K read operations after the first read operation; based on the first cumulative feature, predicting a storage address where a storage object read by a K-th read operation after a second read operation is located, wherein the second read operation is the next read operation of the first read operation.

[0006] In one embodiment, the page read feature is used to predict the address increment corresponding to the storage object read this time by taking the address increment corresponding to the storage object read most recently N times in the memory page as an index, and update the index using the predicted address increment to perform the next round of prediction; wherein N is a positive integer and N is less than a first threshold; the address increment corresponding to the storage object read each time is: the address difference between the storage address of the storage object read this time and the storage address of the storage object read last time; the first cumulative feature of predicting the storage address of the storage object read in the Kth read operation after the first read operation according to the page read feature includes: predicting the address increment of the Kth read operation after the first read operation based on the page read feature. In a fetch operation, the address increment corresponding to the storage object read each time is added, and the address increments corresponding to the storage objects read by K read operations are accumulated to obtain a first accumulated increment, and the address increments corresponding to the storage objects read by K read operations are combined to obtain a first accumulation sequence; wherein K is a positive integer greater than 1; the storage address of the storage object read by the K-th read operation after the second read operation is predicted based on the first accumulation feature, including: predicting the storage address of the storage object read by the K-th read operation after the second read operation based on the page read feature, the first accumulated increment, and the first accumulation sequence, to obtain a target prefetch address, wherein the second read operation is the next read operation of the first read operation.

[0007] In one embodiment, the page read feature includes: a sequence-increment mapping table, the sequence-increment mapping table includes: an incremental sequence formed by address increments corresponding to each storage object read for the last N times, and the next address increment corresponding to each of the incremental sequences in the continuation direction.

[0008] In one embodiment, the method predicts the address increment corresponding to the storage object read each time in K read operations after the first read operation based on the page read characteristics, and accumulates the address increments corresponding to the storage objects read by the K read operations to obtain a first accumulated increment, and combines the address increments corresponding to the storage objects read by the K read operations to obtain a first cumulative sequence, including: determining the increment sequence corresponding to the storage object read by the first read operation to obtain a first increment sequence; predicting the first address increment corresponding to the storage object read next time according to the first increment sequence and the sequence-increment mapping table, and increasing the prediction number by 1; updating the first increment sequence with the first address increment to obtain an updated sequence; using the updated sequence as the new first increment sequence, jumping to the first address increment corresponding to the storage object read next time according to the first increment sequence and the sequence-increment mapping table, and continuing to execute, looping and iterating until the prediction number is equal to K; accumulating the first address increments to obtain the first accumulated increment, and combining the first address increments to obtain the first accumulated sequence.

[0009] In one embodiment, the predicting, based on the page read feature, in K read operations after the first read operation, the address increment corresponding to the storage object read each time, and accumulating the address increments corresponding to the storage objects read by the K read operations to obtain a first accumulated increment, and combining the address increments corresponding to the storage objects read by the K read operations to obtain a first accumulated sequence includes: starting from the last M read operations of the first read operation to the first read operation, performing the following operations for each read operation: performing a prediction less than K times and greater than 1 time based on the page read feature, and combining the address increments corresponding to the storage objects read by the K read operations to obtain a first accumulated sequence The address increments are accumulated to obtain a third accumulated increment corresponding to the read operation, and the address increments obtained by each prediction are combined to obtain a third accumulation sequence corresponding to the read operation; wherein the prediction for each read operation is performed on the basis of the third accumulated increment and the third accumulation sequence formed by the previous read operation, so that the third accumulated increment corresponding to the first read operation includes K address increments, and the third accumulation sequence corresponding to the first read operation includes K address increments, wherein M is greater than 1; the third accumulated increment is determined as the first accumulated increment, and the third accumulation sequence is determined as the first accumulation sequence.

[0010] In one embodiment, predicting the storage address of the storage object read by the Kth read operation after the second read operation based on the page read characteristics, the first cumulative increment, and the first accumulated sequence includes: determining the next address increment in the continuation direction of the first cumulative sequence according to the first accumulated sequence and the sequence-increment mapping table to obtain a first continuation increment; updating the first cumulative increment according to the first continuation increment and the address increment between the storage addresses of the second read operation and the first read operation to obtain an updated cumulative increment; and predicting the storage address of the storage object read by the Kth read operation after the second read operation using the storage address of the second read operation and the updated cumulative increment.

[0011] In one embodiment, the first cumulative increment is updated according to the first continuation increment and the address increment between the storage addresses of the second read operation and the first read operation to obtain an updated cumulative increment, including: detecting whether the actual address increment between the storage addresses of the second read operation and the first read operation is equal to the predicted address increment between the second read operation and the first read operation contained in the first accumulation sequence; and when the actual address increment is equal to the predicted address increment, updating the first cumulative increment according to the first continuation increment and the predicted address increment to obtain an updated cumulative increment.

[0012] In one embodiment, determining the next address increment in the continuation direction of the first accumulation sequence according to the first accumulation sequence and the sequence-increment mapping table to obtain the first continuation increment includes: detecting the difference in the number of read operations between the last address increment prediction operation and the last storage object read operation; when the difference in the number of read operations is equal to K, determining the next address increment in the continuation direction of the first accumulation sequence according to the first accumulation sequence and the sequence-increment mapping table to obtain the first continuation increment.

[0013] In one embodiment, after predicting the storage address of the storage object read by the Kth read operation after the second read operation based on the page read characteristics, the first cumulative increment, and the first accumulation sequence to obtain the target prefetch address, the method further includes: using the target prefetch address to update the first cumulative increment and the first accumulation sequence to obtain a second cumulative increment and a second accumulation sequence; using the second read operation as a new first read operation, the second cumulative increment as a new first cumulative increment, and the second accumulation sequence as a new first accumulation sequence, jumping to the step of predicting the storage address of the storage object read by the Kth read operation after the second read operation based on the storage address corresponding to the first read operation, the page read characteristics, the first cumulative increment, and the first accumulation sequence to obtain a new target prefetch address corresponding to the Kth read operation after the new second read operation, and iterating in a loop until there is no new second read operation after the first read operation.

[0014] In a second aspect, an embodiment of the present invention further provides a prefetch device for a processor, comprising: an acquisition unit, configured to acquire a page read feature of a memory page where a prefetch object is located; a first prediction unit, configured to predict, based on the page read feature, a first cumulative feature of a storage address where a storage object read by a K-th read operation after a first read operation is located, wherein K is a positive integer greater than 1; the first cumulative feature includes a cumulative feature formed by address features predicted in K read operations after the first read operation; and a second prediction unit, configured to predict, based on the first cumulative feature, a storage address where a storage object read by a K-th read operation after a second read operation is located, wherein the second read operation is the next read operation of the first read operation.

[0015] In one embodiment, the page read feature is used to predict the address increment corresponding to the storage object read this time with the address increment corresponding to the storage object read most recently N times in the memory page as an index, and update the index using the predicted address increment to perform the next round of prediction; wherein N is a positive integer and N is less than a first threshold; the address increment corresponding to the storage object read each time is: the address difference between the storage address of the storage object read this time and the storage address of the storage object read last time; the first prediction unit is used to predict K read operations after the first read operation based on the page read feature. In the embodiment, the address increment corresponding to the storage object read each time is accumulated, and the address increments corresponding to the storage objects read by K read operations are accumulated to obtain a first accumulated increment, and the address increments corresponding to the storage objects read by K read operations are combined to obtain a first accumulation sequence; wherein K is a positive integer greater than 1; a second prediction unit is used to predict the storage address of the storage object read by the Kth read operation after the second read operation according to the page read characteristics, the first accumulated increment, and the first accumulation sequence, and obtain a target prefetch address, wherein the second read operation is the next read operation of the first read operation.

[0016] In one embodiment, the page read feature includes: a sequence-increment mapping table, the sequence-increment mapping table includes: an incremental sequence formed by address increments corresponding to each storage object read for the last N times, and the next address increment corresponding to each of the incremental sequences in the continuation direction.

[0017] In one embodiment, the first prediction unit includes: a first determination module, used to determine the incremental sequence corresponding to the storage object read by the first read operation to obtain a first incremental sequence; a first prediction module, used to predict the first address increment corresponding to the storage object to be read next time based on the first incremental sequence and the sequence-increment mapping table, and the prediction number is increased by 1; a first update module, used to update the first incremental sequence using the first address increment to obtain an updated sequence; a trigger module, used to use the update sequence as a new first incremental sequence, trigger the prediction module to run, and iterate until the prediction number is equal to K; an addition and accumulation module, used to add each of the first address increments to obtain the first accumulated increment, and combine each of the first address increments to obtain the first accumulated sequence.

[0018] In one embodiment, the first prediction unit includes: a second prediction module, which is used to perform the following operations for each read operation from the last M read operations of the first read operation to the end of the first read operation: based on the page read characteristics, perform predictions less than K times and greater than 1 time, and accumulate the address increments obtained from each prediction to obtain a third accumulated increment corresponding to the read operation, and combine the address increments obtained from each prediction to obtain a third accumulation sequence corresponding to the read operation; wherein the prediction for each read operation is performed on the basis of the third accumulated increment and the third accumulation sequence formed by the last read operation, so that the third accumulated increment corresponding to the first read operation includes K address increments, and the third accumulation sequence corresponding to the first read operation includes K address increments, wherein M is greater than 1; a second determination module, which is used to determine the third accumulated increment as the first accumulated increment, and determine the third accumulation sequence as the first accumulation sequence.

[0019] In one embodiment, the second prediction unit includes: a third determination module, used to determine the next address increment in the continuation direction of the first accumulation sequence according to the first accumulation sequence and the sequence-increment mapping table, to obtain a first continuation increment; a second update module, used to update the first cumulative increment according to the first continuation increment, the address increment between the storage address of the second read operation and the first read operation, to obtain an updated cumulative increment; a third prediction module, used to predict the storage address of the storage object read by the Kth read operation after the second read operation using the storage address of the second read operation and the updated cumulative increment.

[0020] In one embodiment, the second update module is specifically used to: detect whether the actual address increment between the storage address of the second read operation and the first read operation is equal to the predicted address increment between the second read operation and the first read operation contained in the first accumulation sequence; when the actual address increment is equal to the predicted address increment, update the first cumulative increment according to the first continuation increment and the predicted address increment to obtain an updated cumulative increment.

[0021] In one embodiment, the third determination module is specifically used to: detect the difference in the number of read operations between the last address increment prediction operation and the last storage object read operation; when the difference in the number of read operations is equal to K, determine the next address increment in the continuation direction of the first accumulation sequence according to the first accumulation sequence and the sequence-increment mapping table, and obtain the first continuation increment.

[0022] In one embodiment, the device further comprises: an updating unit, configured to predict, according to the page read feature, the first accumulated increment, and the first accumulated sequence, a storage address of a storage object read by a K-th read operation after the second read operation, obtain a target prefetch address, and then update the first accumulated increment and the first accumulated sequence using the target prefetch address to obtain a second accumulated increment and a second accumulated sequence; A trigger unit is used to trigger the prediction unit to run with the second read operation as the new first read operation, the second accumulated increment as the new first accumulated increment, and the second accumulation sequence as the new first accumulation sequence, so as to obtain a new target prefetch address corresponding to the Kth read operation after the new second read operation, and iterate in a loop until there is no new second read operation after the first read operation.

[0023] In a third aspect, an embodiment of the present invention further provides an electronic device, comprising: a housing, a processor, a memory, a circuit board and a power supply circuit, wherein the circuit board is placed inside the space enclosed by the housing, and the processor and the memory are arranged on the circuit board; a power supply circuit for supplying power to various circuits or devices of the above-mentioned electronic device; the memory is used to store executable program code; the processor runs a program corresponding to the executable program code by reading the executable program code stored in the memory, so as to execute the pre-fetching method applied to the processor provided in any embodiment of the present invention.

[0024] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium stores one or more programs, and the one or more programs can be executed by one or more processors to implement the prefetching method applied to the processor provided in any embodiment of the present invention.

[0025] The prefetch method and related device applied to the processor provided by the embodiment of the present invention can obtain the page read characteristics of the memory page where the prefetch object is located, and predict the first cumulative characteristics of the storage address where the storage object read by the K-th read operation after the first read operation is located based on the page read characteristics, and predict the storage address where the storage object read by the K-th read operation after the second read operation is located based on the first cumulative characteristics, wherein the second read operation is the next read operation of the first read operation. In this way, since the first cumulative characteristics corresponding to the K-th read operation after the first read operation have been predicted, and the first cumulative characteristics include the cumulative characteristics formed by the address characteristics predicted in the K-th read operations after the first read operation, therefore, when predicting the storage address of the storage object read by the K-th read operation after the second read operation, it is only necessary to perform a prediction operation once based on the first cumulative characteristics, without repeating the prediction K times as in the prior art, thereby effectively improving the prefetch efficiency of the processor. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0027] Figure 1 A flow chart of a pre-fetching method applied to a processor provided by an embodiment of the present invention; Figure 2 A flow chart of the updating process of the signature table and the sequence-increment mapping table in an embodiment of the present invention; Figure 3 A detailed flow chart of a pre-fetching method applied to a processor provided by an embodiment of the present invention; Figure 4 A schematic diagram of a structure of a pre-fetch device applied to a processor provided by an embodiment of the present invention; Figure 5 A schematic structural diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0028] The embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0029] It should be clear that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0030] In a first aspect, an embodiment of the present invention provides a prefetching method applied to a processor, which can effectively improve the prefetching efficiency of the processor.

[0031] The prefetching method applied to a processor provided in the embodiment of the present invention may be directed to prefetching based on hardware implementation or prefetching based on software implementation, which is not limited in the embodiment of the present invention.

[0032] like Figure 1 As shown, an embodiment of the present invention provides a prefetching method applied to a processor, which may include: S11, obtaining a page read feature of a memory page where the prefetch object is located; In an embodiment of the present invention, prefetching an object may refer to reading the object from the memory into the cache before the processor processes the object, or reading the object from the lower-level cache into the higher-level cache. Optionally, depending on the content processed by the processor, the prefetch object may be either an instruction or data. Each object is stored and managed in the memory in the form of a memory page. In an embodiment of the present invention, the read operations of objects located in the same memory page may be counted and recorded to form the page read characteristics of the memory page. Furthermore, pages with the same or similar page read characteristics may be divided into a page group, and each page group corresponds to the same page read characteristics.

[0033] S12, predicting, based on the page read feature, a first cumulative feature of a storage address where a storage object read by a K-th read operation after the first read operation is located, wherein K is a positive integer greater than 1; the first cumulative feature includes a cumulative feature formed by address features predicted in K read operations after the first read operation; The first read operation may be any read operation on the memory page where the prefetch object is located. In this step, considering that the speed at which the processor executes instructions or processes data is relatively fast, while the prefetch operation of instructions or data from the memory is relatively slow, in order to enable the prefetched instructions or data to catch up with the execution of instructions, in one embodiment of the present invention, when a certain read operation is performed, instead of prefetching the first read operation after the read operation, prefetching the Kth read operation after the read operation (K is a positive integer greater than 1), and further, when performing the first read operation after the read operation, prefetching the K+1th read operation may be performed, and so on, so that there are K read operations between the read operation and the prefetch operation, so as to leave more time for the prefetch operation, wherein K is the number of memory accesses between the prefetch operation and the memory access operation.

[0034] In this step, a first cumulative feature of a storage address where a storage object read by a K-th read operation after the first read operation is located can be predicted based on the page read feature, wherein the first cumulative feature can be a cumulative feature formed by address features predicted in K read operations after the first read operation. Here, the predicted address feature can refer to a feature related to the storage address obtained by prediction, such as a predicted address increment, etc.

[0035] S13: predicting a storage address of a storage object read by a K-th read operation after a second read operation according to the first accumulated feature, wherein the second read operation is a next read operation of the first read operation.

[0036] Since the first cumulative feature includes the cumulative feature formed by the address features predicted in the K read operations after the first read operation, and the second read operation is the next read operation of the first read operation, when predicting the storage address of the storage object read by the K-th read operation after the second read operation, it is only necessary to perform one prediction operation based on the first cumulative feature, without repeating the prediction K times as in the prior art, thereby effectively improving the prefetch efficiency of the processor.

[0037] The prefetch method applied to the processor provided by the embodiment of the present invention can obtain the page read characteristics of the memory page where the prefetch object is located, and predict the first cumulative characteristics of the storage address where the storage object read by the K-th read operation after the first read operation is located based on the page read characteristics, and predict the storage address where the storage object read by the K-th read operation after the second read operation is located based on the first cumulative characteristics, wherein the second read operation is the next read operation of the first read operation. In this way, since the first cumulative characteristics corresponding to the K-th read operation after the first read operation have been predicted, and the first cumulative characteristics include the cumulative characteristics formed by the address characteristics predicted in the K-th read operations after the first read operation, therefore, when predicting the storage address of the storage object read by the K-th read operation after the second read operation, it is only necessary to perform a prediction operation once based on the first cumulative characteristics, without repeating the prediction K times as in the prior art, thereby effectively improving the prefetch efficiency of the processor.

[0038] Specifically, in one embodiment of the present invention, the page read feature obtained in step S11 can be used to predict the address increment corresponding to the storage object read this time with the address increment corresponding to the storage object read most recently N times in the memory page as an index, and use the predicted address increment to update the index for the next round of prediction; wherein N is a positive integer and N is less than a first threshold; the address increment corresponding to the storage object read each time is: the address difference between the storage address of the storage object read this time and the storage address of the storage object read last time.

[0039] For example, in one example, the address of the storage object read for the first time is 0XF040, the address of the storage object read for the second time is 0XF043, the address of the storage object read for the third time is 0XF047, and the address of the storage object read for the fourth time is 0XF049. The address increment of the storage object read for the second time is (0XF043-0XF040)=3, the address increment of the storage object read for the third time is (0XF047-0XF043)=4, and the address increment of the storage object read for the fourth time is (0XF049-0XF047)=2. The address increments corresponding to the storage objects read for the most recent three times are 3-4-2 respectively. Then, 3-4-2 can be used as the index to predict the address increment corresponding to the storage object read in this read operation (that is, the fifth read operation) according to the page read characteristics, for example, it can be 1, 3, 7, 12, etc. In an example, it can be predicted that the address increment corresponding to the storage object read for the fifth time is 8, and the address increment 8 can be used to update the index 3-4-2, for example, to obtain a new index 3-4-2-8.

[0040] It should be noted that the address increment can have a directionality. When the address increases, the address increment is a positive value, and when the address decreases, the address increment is a negative value. For example, if the last access address is 0XF031 and the current access address is 0XF037, the address increment is 0XF037-0XF031=6, which is a positive value. For another example, if the last access address is 0XF019 and the current access address is 0XF014, the address increment is 0XF014-0XF019=-5, which is a negative value.

[0041] It should also be noted that, in an embodiment of the present invention, certain restrictions may be placed on the maximum length of the index. For example, the maximum length of the index may be less than a first threshold. Based on this, when the index is less than the first threshold, the method for updating the index may be to directly access the newly added address increment in the extension direction of the original index (for example, the index extends to the right), for example, the index changes from the original 3-4-2 to 3-4-2-8. When the index is greater than the first threshold, the index may be "left shifted" to access the newly added address increment to the right end of the original index, and the address increment at the leftmost end of the original index is removed or deleted, for example, the index changes from the original 3-4-2 to the new 4-2-8.

[0042] In an embodiment of the present invention, address increments in an index are connected by a dash “-”, but the embodiments of the present invention are not limited thereto. In other embodiments of the present invention, other symbol connections (such as 4&2&8) or direct concatenation (such as 428) may also be used.

[0043] After obtaining the page read feature, the first cumulative feature of the storage address where the storage object read by the K-th read operation after the first read operation is located can be predicted in step S12 according to the page read feature. Specifically, in one embodiment of the present invention, in step S12, the first cumulative feature of the storage address where the storage object read by the K-th read operation after the first read operation is located can be predicted according to the page read feature, which can include: based on the page read feature, predicting the address increment corresponding to each storage object read in the K read operations after the first read operation, and accumulating the address increments corresponding to the storage objects read by the K read operations to obtain a first cumulative increment, and combining the address increments corresponding to the storage objects read by the K read operations to obtain a first cumulative sequence; wherein K is a positive integer greater than 1. Accordingly, the first cumulative feature can include the first cumulative increment and the first cumulative sequence.

[0044] For example, in one example, K=4, the first read operation after the first read operation corresponds to an address increment of 5, the second read operation corresponds to an address increment of 4, the third read operation corresponds to an address increment of 1, and the fourth read operation corresponds to an address increment of -2. The first accumulated increment is 5+4+1-2=8, and the first accumulation sequence is 5-4-1-(-2).

[0045] After obtaining the first cumulative features such as the first cumulative increment and the first cumulative sequence, the storage address of the storage object read by the K-th read operation after the second read operation can be predicted in step S13 according to the first cumulative features. Specifically, in one embodiment of the present invention, predicting the storage address of the storage object read by the K-th read operation after the second read operation according to the first cumulative features may include: predicting the storage address of the storage object read by the K-th read operation after the second read operation according to the page read features, the first cumulative increment, and the first cumulative sequence, and obtaining a target prefetch address, wherein the second read operation is the next read operation of the first read operation.

[0046] Due to the first cumulative increment and the first accumulated sequence obtained in the aforementioned steps, in this step, when predicting the storage address of the storage object read by the Kth read operation after the second read operation, it is possible to perform a prediction operation once using the characteristics of a page read, based on the first cumulative increment and the first accumulated sequence, without the need to perform K predictions using the characteristics of K page reads as in the prior art, thereby effectively improving the prefetching efficiency of the processor.

[0047] In an embodiment of the present invention, the page read feature can be expressed in various forms such as formulas, text or charts. In one example, the page read feature may include: a sequence-increment mapping table, the sequence-increment mapping table including: an incremental sequence formed by address increments corresponding to each storage object read for the most recent N times, and the next address increment corresponding to the continuation direction of each incremental sequence. In a specific implementation, based on historical data, multiple possibilities of the next address increment corresponding to the continuation direction of each incremental sequence can be counted, and the probability of occurrence corresponding to each possible address increment can be further counted, and the possible address increment with the highest probability of occurrence can be used as the next address increment in the continuation direction of the incremental sequence.

[0048] For example, a schematic diagram of a page read feature can be shown in Table 1. As shown in Table 1, if the incremental sequence is 5-A, the corresponding next address increment may be predicted to be 6, 3, and 1, where 6 appears once, 3 appears 32 times, and 1 appears 7 times. Since 3 has the highest probability of appearing, it can be inferred that the next address increment is 3. The incremental sequence 5-A is updated with the address increment 3, and a new incremental sequence 5-A-3 can be obtained. Each address increment in the incremental sequence can be a hexadecimal number.

[0049] Furthermore, in order to improve the accuracy of address increment prediction, in one embodiment of the present invention, a probability threshold may be pre-set. For the address increment with the highest probability of occurrence, the address increment is only used to update the increment sequence when its probability of occurrence is greater than or equal to the probability threshold.

[0050]

[0051] After obtaining the page read characteristics of the memory page where the prefetch object is located, the address increment corresponding to each storage object read in the K read operations after the first read operation can be predicted based on the page read characteristics, and the address increments corresponding to each storage object read in the K read operations are added together to obtain a first accumulated increment, and the address increments corresponding to each storage object read in the K read operations are combined to obtain a first cumulative sequence.

[0052] In one embodiment of the present invention, the first cumulative increment, the first accumulation sequence, and the number of memory accesses K between the prefetch operation and the memory access operation can be saved in a signature table, so that the prefetch address can be predicted using the first cumulative increment, the first accumulation sequence, and the number of memory accesses K between the prefetch operation and the memory access operation.

[0053] Exemplarily, a data structure of a signature table may be shown in Table 2.

[0054]

[0055] Among them, the first cumulative increment, the first accumulation sequence, and the number of memory accesses K between the pre-fetch operation and the memory access operation are newly added structures of the signature table in the embodiment of the present invention, and the other items are structures existing in the related art. In the related art, it is usually necessary to use the address increment sequence Sig of the last read or prediction operation. M-1 , after K forward explorations, the page read characteristics are queried to calculate the storage address corresponding to the Kth read operation, so the efficiency is low. In the embodiment of the present invention, since the above three items are added to the signature table, only one prediction is required, so the pre-fetching efficiency can be greatly improved.

[0056] Exemplarily, the updating process of the signature table (such as Table 2) and the sequence-increment mapping table (such as Table 1) can be as follows: Figure 2 shown.

[0057] S201, query the signature table to obtain the offset lastoffset of the last (i.e., M-1 times in Table 2) read or prediction operation, and the first accumulated increment D M-1 , M+K-1 , the first cumulative sequence Sig M+K-1, the number of memory accesses K between the prefetch operation and the memory access operation; S202: Determine the address increment D of the current read or prediction operation according to the difference between the offset of the current (i.e., the Mth) read or prediction operation and the last offset. M-1，M ; S203: Using the offset of the current (ie, the Mth) read or prediction operation, the last offset in the signature table is updated to obtain a new last offset.

[0058] For example, the offset of the Mth read or prediction operation may be filled into the last offset item in the signature table to replace the offset of the M-1th read or prediction operation.

[0059] S204, using the address increment D of the current (ie, Mth) read or prediction operation M-1，M Update the number of occurrences of the corresponding address increment in the sequence-increment mapping table (i.e., Table 1); Specifically, the update of the number of occurrences of the address increment will also result in the update of the probability of occurrence of the address increment.

[0060] S205, using the first accumulation sequence Sig M+K-1 Query the sequence-increment mapping table (Table 1) to obtain the address increment D with the highest probability in the continuation direction of the first cumulative sequence. M+k-1 , M+K ; S206, determining whether the occurrence probability is greater than or equal to a preset probability threshold; if yes, executing S207, if no, executing S208; S207, using the address increment D M+k-1 , M+K Update signature table; Specifically, the address increment D can be used M+k-1 , M+K Update the first cumulative increment and the first cumulative sequence in the signature table. For example, the address increment D can be added to the original first cumulative increment in the signature table. M+k-1 , M+K , get the new first cumulative increment, and add the address increment D to the end of the original first cumulative sequence in the signature table M+k-1 , M+K , get the new first cumulative sequence (if the sequence length exceeds the limit, a left shift operation can be performed).

[0061] S208: Abandon the updates made to the signature table in this round of update operation, and restore the signature table to the state before this round of update.

[0062] This embodiment has described in detail the updating process of the signature table and the sequence-increment mapping table. Now, the specific forming process of the first accumulated increment and the first accumulated sequence in the signature table will be described in detail.

[0063] In one embodiment, based on the page read characteristics, predicting the address increment corresponding to the storage object read each time in K read operations after the first read operation, and accumulating the address increments corresponding to the storage objects read by the K read operations to obtain a first accumulated increment, and combining the address increments corresponding to the storage objects read by the K read operations to obtain a first cumulative sequence may include: determining the increment sequence corresponding to the storage object read by the first read operation to obtain a first increment sequence; predicting the first address increment corresponding to the storage object read next time according to the first increment sequence and the sequence-increment mapping table, and adding 1 to the prediction number; updating the first increment sequence using the first address increment to obtain an updated sequence; using the updated sequence as the new first increment sequence, jumping to the first address increment corresponding to the storage object read next time according to the first increment sequence and the sequence-increment mapping table, and continuing to execute, looping and iterating until the prediction number is equal to K; accumulating the first address increments to obtain the first accumulated increment, and combining the first address increments to obtain the first accumulated sequence. In this embodiment, the first increment sequence corresponding to the storage object read by the first read operation can be determined based on the address increment between the storage addresses corresponding to the read operation before the first read operation. For example, if the address increment before the first read operation is 4, the first increment sequence can be determined to be 4. Then, the first increment sequence can be used as an index to find the first address increment corresponding to the storage object read next time in the sequence-increment mapping table. For example, it can be found that the first address increment corresponding to the first increment sequence 4 is 3, and then the first address increment 3 is used to update the first increment sequence to obtain the update sequence 4-3. Then, the update sequence 4-3 is used as the new first increment sequence, and the address increment corresponding to 4-3 is continued to be found in the sequence-increment mapping table. For example, the address increment is 1, and so on. If K times have been predicted, for example, K=2, the address increments of these two times can be accumulated (3+1=4) to obtain the first accumulated increment 4, and the first address increments of these K times can be combined (3-1) to obtain the first accumulated sequence 3-1.

[0064] In one embodiment of the present invention, a data structure table may be maintained for the formation process of the first cumulative increment and the first accumulated sequence, and the data structure table may be updated as the reading operation and the prediction operation proceed. The data structure table may include, for example: the address increment of the last reading operation, the first increment sequence corresponding to the storage object read last time, the first cumulative increment, and the first accumulated address. Exemplarily, a data structure table may be shown in Table 3.

[0065]

[0066] In this embodiment, when executing the first read operation, K address increments are predicted, thereby obtaining the address increments corresponding to each storage object read in the K read operations after the first read operation. However, the embodiments of the present invention are not limited thereto, and in other embodiments of the present invention, the K predictions may also be distributed to multiple read operations, thereby avoiding excessive calculations in one read operation.

[0067] Specifically, in one embodiment of the present invention, based on the page read feature, predicting the address increment corresponding to each storage object read in K read operations after the first read operation, and accumulating the address increments corresponding to the storage objects read in the K read operations to obtain a first accumulated increment, and combining the address increments corresponding to the storage objects read in the K read operations to obtain a first accumulated sequence may include: Starting from the last M read operations of the first read operation to the first read operation, performing the following operations for each read operation: based on the page read characteristics, performing predictions less than K times and greater than 1 time, and accumulating the address increments obtained by each prediction to obtain a third accumulated increment corresponding to the read operation, and combining the address increments obtained by each prediction to obtain a third accumulation sequence corresponding to the read operation; wherein the prediction performed for each read operation is performed on the basis of the third accumulated increment and the third accumulation sequence formed by the last read operation, so that the third accumulated increment corresponding to the first read operation includes K address increments, and the third accumulation sequence corresponding to the first read operation includes K address increments, wherein M is greater than 1; The third accumulated increment is determined as the first accumulated increment, and the third accumulated sequence is determined as the first accumulated sequence.

[0068] For instance, in one example, M=K=4, assuming that the first read operation is the Ath read operation, then starting from AM=A-4th read operation, 2 (2 is less than 4 and greater than 1) predictions can be performed, and the corresponding third cumulative increment and third accumulation sequence can be formed. Based on the third cumulative increment and the third accumulation sequence, 2 more predictions are performed for the A-3th read operation... and so on. After the accumulation of M read operations, the Ath read operation can predict the address increment of the A+Kth read operation. The difference between A and A+K is K read operations. The specific process is as follows: when the A-4 read operation is performed, the address increments of the A-4 read operation and the A-3 read operation are predicted, and the third cumulative increment and the third accumulation sequence respectively include (A-3)-(A-4)=1 address increment. When the A-3 read operation is performed, the address increments of the A-2 read operation and the A-1 read operation are predicted, and the third cumulative increment and the third accumulation sequence respectively include (A-1)-(A-3)=2 address increments. When the A-2 read operation is performed, the address increments of the A-2 read operation and the A-1 read operation are predicted, and the third cumulative increment and the third accumulation sequence respectively include (A-1)-(A-3)=2 address increments. The address increments of the A+4 read operation and the A+1 read operation are predicted, and the third cumulative increment and the third cumulative sequence respectively include (A+1)-(A-2)=3 address increments. During the A-1 read operation, the address increments of the A+2 read operation and the A+3 read operation are predicted, and the third cumulative increment and the third cumulative sequence respectively include (A+3)-(A-1)=4 address increments. At this time, the third cumulative increment can be determined as the first cumulative increment, and the third cumulative sequence can be determined as the first cumulative sequence. In this way, during the A-th read operation, the address increment of the A+4 read operation can be predicted, and there is a difference of 4 read operations between A and A+4. In this embodiment, from the A-4th to the A-1th, in these 4 read operations, each read operation is accompanied by two pre-fetch operations, and the sequence-increment mapping table is used twice. After that, starting from the Ath, each read operation only needs to use the sequence-increment mapping table once to obtain a correct and sufficiently advanced (timely) pre-fetch address.

[0069] In an embodiment of the present invention, the third cumulative increment is determined as the first cumulative increment, and the third cumulative sequence is determined as the first cumulative sequence. After obtaining the first cumulative increment and the first cumulative sequence, the storage address of the storage object read by the Kth read operation after the second read operation can be predicted based on the page read characteristics, the first cumulative increment, and the first cumulative sequence.

[0070] Further, after predicting the storage address of the storage object read by the K-th read operation after the second read operation based on the page read characteristics, the first cumulative increment, and the first accumulation sequence, and obtaining the target prefetch address, the first cumulative increment and the first accumulation sequence can be updated using the target prefetch address to obtain the second cumulative increment and the second accumulation sequence; taking the second read operation as the new first read operation, the second cumulative increment as the new first cumulative increment, and the second accumulation sequence as the new first accumulation sequence, jumping to the step of predicting the storage address of the storage object read by the K-th read operation after the second read operation based on the storage address corresponding to the first read operation, the page read characteristics, the first cumulative increment, and the first accumulation sequence, so as to obtain a new target prefetch address corresponding to the K-th read operation after the new second read operation, and iterating in a loop until there is no new second read operation after the first read operation, thereby performing continuous prefetch address prediction.

[0071] In a specific implementation, predicting the storage address of the storage object read by the Kth read operation after the second read operation according to the page read feature, the first cumulative increment, and the first accumulated sequence may include: determining the next address increment in the continuation direction of the first accumulated sequence according to the first accumulated sequence and the sequence-increment mapping table to obtain the first continuation increment; updating the first cumulative increment according to the first continuation increment and the address increment between the storage addresses of the second read operation and the first read operation to obtain an updated cumulative increment; predicting the storage address of the storage object read by the Kth read operation after the second read operation using the storage address of the second read operation and the updated cumulative increment. The second read operation is the next read operation of the first read operation. For example, in one embodiment of the present invention, if the address increment of the second read operation relative to the first read operation is 6, the first cumulative increment is 1+2+3+4=10, and the first cumulative sequence is 1-2-3-4, then the first cumulative sequence can be used as an index to query the sequence-increment mapping table, and the next address increment in the continuation direction of the first cumulative sequence is obtained to be 5, that is, the first continuation increment is 5. Based on this, the first cumulative increment can be updated according to the following formula to obtain an updated cumulative increment: Update cumulative increment = first cumulative increment + first continuation increment - address increment between the storage address of the second read operation and the storage address of the first read operation (1) Therefore, we can get the update cumulative increment = 10 + 5-6 = 9 After obtaining the updated cumulative increment, the updated cumulative increment is added to the storage address of the storage object read by the second read operation, so as to obtain the storage address of the storage object read by the Kth read operation after the second read operation, and pre-fetch the storage object at the storage address. For example, if the storage address of the storage object read by the second read operation is 0X1F090, it can be known that the storage object at the address 0X1F090+9=0X1F099 should be pre-fetched.

[0072] In one example, updating the first cumulative increment according to the first continuation increment and the address increment between the storage address of the second read operation and the first read operation to obtain the updated cumulative increment may include: detecting whether the actual address increment between the storage address of the second read operation and the first read operation is equal to the predicted address increment between the second read operation and the first read operation contained in the first accumulation sequence; when the actual address increment is equal to the predicted address increment, updating the first cumulative increment according to the first continuation increment and the predicted address increment to obtain the updated cumulative increment. In this embodiment, the first accumulation sequence contains the predicted address increment between the second read operation and the first read operation. In addition, when the second read operation is executed, the storage address targeted by the second read operation and the storage address targeted by the first read operation have been determined, so the actual address increment between the second read operation and the first read operation can also be determined. If the predicted address increment is equal to the actual address increment, it means that the previous prediction of the address increment of the second read operation is correct. Therefore, the first cumulative increment can be updated according to the first continuation increment and the predicted address increment to obtain the updated cumulative increment. On the contrary, if the predicted address increment is not equal to the actual address increment, it means that the previous prediction of the address increment for the second read operation is wrong and the address increments in the first accumulation sequence are unreliable. Therefore, the address increment accumulation and accumulation can be performed again for the second read operation.

[0073] In an embodiment of the present invention, in order to leave more ample time for object prefetching, the storage address corresponding to the Kth read operation after the current read operation can be predicted, and the storage object in the storage address can be prefetched. However, the read operation and the prefetch operation are continuously performed, and the difference between the two is not always K times of read operations. Therefore, in an embodiment of the present invention, according to the first cumulative sequence and the sequence-increment mapping table, the next address increment in the continuation direction of the first cumulative sequence is determined, and the first continuation increment is obtained, which includes: detecting the number of read operations that differ between the last address increment prediction operation and the last storage object read operation; when the number of read operations that differ is equal to K, according to the first cumulative sequence and the sequence-increment mapping table, the next address increment in the continuation direction of the first cumulative sequence is determined to obtain the first continuation increment. In this way, it is possible to avoid the situation where the prefetch operation is performed when the difference between the two is less than K times, so that the prefetch object cannot be obtained and used in time.

[0074] In an example, the operation when the difference in the number of read operations between the last address increment prediction operation and the last storage object read operation is less than K times can be unified with the operation when the difference in the number of read operations is equal to K times: when the difference in the number of read operations is less than K times, multiple read operations can be performed, and at least 2 predictions can be performed for each read operation to form a corresponding third cumulative increment and a third cumulative sequence (for details, please refer to the relevant content about the third cumulative increment and the third cumulative sequence in the previous text), so as to accumulate the difference in the number of read operations between the two. When the accumulation reaches K times, the corresponding prefetch operation can be performed.

[0075] For example, an example of object prefetching may be shown in Table 4. The arrows in the table represent replacement update operations, the data corresponding to the tail of the arrow is the old value to be replaced, and the data pointed by the arrow is the new value after replacement.

[0076] In this embodiment, the interval value of the adjacent memory address sequence conforms to the rule of {+1, +2, +3, +4}, that is, the address sequence is: {0, 1, 3, 6, 10, 11, 13, 16, 20, 21, 23, 26, 30, …}, and the sequence-increment mapping table learned from history can be shown in Table 4. The number of memory accesses between the prefetch operation and the memory access operation is K=2, and the maximum length of the first cumulative sequence Sig is set to 4. Based on this, there are the following processes: (1) Access 0 (that is, the offset address offset of the current read operation in Table 4 is 0) arrives, at this time, the sequence-increment mapping table is mostly empty, and only the last offset is filled; (2) Access 1 (that is, the offset address offset of the current read operation in Table 4 is 1) arrives, the last offset is not empty, but Sig is empty, and the forward probe is K=2 times to obtain the first cumulative increment D M-1,M-1+k =2+3=5, Sig=1-2-3, the pre-fetch address is 1+5=6, and the table entry is updated; (3) Access 3 (i.e., the offset address of the current read operation in Table 4 is 3) arrives, and the address increment delta=4 is obtained by querying sig=1-2-3. The updated cumulative increment D is calculated according to formula (1). M,M+k is (5-(3-1)+4)=7, the pre-fetch address is 3+7=10, update sig=1-2-3-4, D M-1,M-1+k =7 (i.e. using the updated cumulative increment D M,M+k Replace the original first cumulative increment D M-1,M-1+k ), last offset = 3 (i.e., the current offset = 3 in Table 4 replaces the previous offset = 1. The arrow in the table indicates the replacement update, and the position pointed by the arrow is the content after the replacement update); (4) Access 6 (i.e., the offset address of the current read operation in Table 4 is 6) arrives, and the address increment delta = 1 is obtained by querying sig = 1-2-3-4. The update cumulative increment D is calculated according to formula (1) M,M+k = (7-(6-3)+1)=5, the pre-fetch address is 6+5=11, update the table entry last offset=6 (that is, replace the previous offset=3 with the current offset=6 in Table 4, the arrow in the table indicates the replacement update, and the position pointed by the arrow is the content after the replacement update), sig=2-3-4-1, D M-1,M-1+k =5; (5) When access 10 arrives, use sig=2-3-4-1 to query and get delta=2. According to formula (1), the update cumulative increment D is calculated. M,M+k is (5-(10-6)+2)=3, and the prefetch address is 10+3=13; (6) and so on.

[0077]

[0078] Furthermore, after predicting the storage address of the storage object read by the Kth read operation after the second read operation according to the page read feature, the first accumulated increment, and the first accumulation sequence and obtaining the target prefetch address, the method further includes: Using the target prefetch address, updating the first cumulative increment and the first accumulation sequence to obtain a second cumulative increment and a second accumulation sequence; Taking the second read operation as the new first read operation, taking the second accumulated increment as the new first accumulated increment, and taking the second accumulation sequence as the new first accumulation sequence, jump to the step of predicting the storage address of the storage object read by the K-th read operation after the second read operation according to the storage address corresponding to the first read operation, the page read feature, the first accumulated increment, and the first accumulation sequence, so as to obtain a new target prefetch address corresponding to the K-th read operation after the new second read operation, and iterate in a loop until there is no new second read operation after the first read operation.

[0079] The following describes in detail a prefetching method applied to a processor provided by an embodiment of the present invention through a specific embodiment.

[0080] like Figure 3 As shown, the prefetching method applied to a processor provided by an embodiment of the present invention may include: S301, obtaining a page read feature of a memory page where a prefetch object is located; The page read feature includes: a sequence-increment mapping table, which includes: an increment sequence formed by address increments corresponding to each storage object read for the most recent N times, and a next address increment corresponding to the continuation direction of each increment sequence.

[0081] S302, determining an incremental sequence corresponding to a storage object read by a first read operation, to obtain a first incremental sequence; S303, predicting the first address increment corresponding to the storage object to be read next time according to the first increment sequence and the sequence-increment mapping table; the number of predictions is increased by 1; S304, using the first address increment to update the first increment sequence to obtain an updated sequence; S305, determining whether the number of predictions is less than K, if yes, taking the update sequence as a new first increment sequence and jumping to step S303, if no, executing S306; S306 , accumulating the first address increments to obtain a first accumulated increment, and combining the first address increments to obtain a first accumulated sequence.

[0082] S307, determining the next address increment in the continuation direction of the first accumulation sequence according to the first accumulation sequence and the sequence-increment mapping table, and obtaining a first continuation increment; S308, detecting whether the actual address increment between the storage address of the second read operation and the first read operation is equal to the predicted address increment between the second read operation and the first read operation contained in the first accumulation sequence, wherein the second read operation is the next read operation of the first read operation; if yes, executing step S309; ​​if no, taking the second read operation as the new first read operation and jumping to step S302; S309: Update the first cumulative increment according to the first continuation increment and the predicted address increment to obtain an updated cumulative increment.

[0083] Specifically, the update cumulative increment=the first cumulative increment-the predicted address increment+the first continuation increment.

[0084] S310 , using the storage address of the second read operation and the updated accumulated increment, predict the storage address of the storage object read by the Kth read operation after the second read operation to obtain a target prefetch address.

[0085] In a second aspect, an embodiment of the present invention further provides a pre-fetching device applied to a processor, which can effectively improve the pre-fetching efficiency.

[0086] like Figure 4 As shown, the pre-fetching device applied to the processor provided by the embodiment of the present invention may include: An acquisition unit 41 is used to acquire a page read feature of a memory page where a pre-fetch object is located; A first prediction unit 42 predicts, based on the page read feature, a first cumulative feature of a storage address where a storage object read by a K-th read operation after the first read operation is located, wherein K is a positive integer greater than 1; the first cumulative feature includes a cumulative feature formed by address features predicted in K read operations after the first read operation; The second prediction unit 43 is used to predict, according to the first accumulated feature, a storage address of a storage object read by a K-th read operation after a second read operation, wherein the second read operation is a next read operation of the first read operation.

[0087] The prefetch device applied to the processor provided by the embodiment of the present invention can obtain the page read characteristics of the memory page where the prefetch object is located, and predict the first cumulative characteristics of the storage address where the storage object read by the K-th read operation after the first read operation is located based on the page read characteristics, and predict the storage address where the storage object read by the K-th read operation after the second read operation is located based on the first cumulative characteristics, wherein the second read operation is the next read operation of the first read operation. In this way, since the first cumulative characteristics corresponding to the K-th read operation after the first read operation have been predicted, and the first cumulative characteristics include the cumulative characteristics formed by the address characteristics predicted in the K-th read operations after the first read operation, therefore, when predicting the storage address of the storage object read by the K-th read operation after the second read operation, it is only necessary to perform a prediction operation once based on the first cumulative characteristics, without repeating the prediction K times as in the prior art, thereby effectively improving the prefetch efficiency of the processor.

[0088] In one embodiment of the present invention, the acquisition unit 41 can be used to acquire the page read feature of the memory page where the pre-fetch object is located, and the page read feature is used to predict the address increment corresponding to the storage object read this time by using the address increment corresponding to the storage object read in the memory page for the most recent N times as an index, and update the index using the predicted address increment to perform the next round of prediction; wherein N is a positive integer and N is less than a first threshold; the address increment corresponding to the storage object read each time is: the address difference between the storage address where the storage object read this time is located and the storage address where the storage object read last time is located; The first prediction unit 42 may be specifically configured to predict, based on the page read feature, an address increment corresponding to each storage object read in K read operations after the first read operation, and to accumulate the address increments corresponding to the storage objects read in the K read operations to obtain a first accumulated increment, and to combine the address increments corresponding to the storage objects read in the K read operations to obtain a first accumulated sequence; wherein K is a positive integer greater than 1; The second prediction unit 43 can be specifically used to predict the storage address of the storage object read by the Kth read operation after the second read operation according to the page read characteristics, the first cumulative increment, and the first accumulation sequence, and obtain a target prefetch address, wherein the second read operation is the next read operation of the first read operation.

[0089] The prefetch device applied to the processor provided by the embodiment of the present invention can obtain the page read characteristics of the memory page where the prefetch object is located, and based on the page read characteristics, predict the address increment corresponding to the storage object read each time in K read operations after the first read operation, and add up the address increments corresponding to the storage objects read by the K read operations to obtain a first accumulated increment, and combine the address increments corresponding to the storage objects read by the K read operations to obtain a first cumulative sequence, and predict the storage address of the storage object read by the K-th read operation after the second read operation according to the page read characteristics, the first accumulated increment, and the first accumulated sequence to obtain a target prefetch address, wherein the second read operation is the next read operation of the first read operation. In this way, since the first cumulative increment and the first accumulated sequence corresponding to the K read operations after the first read operation have been recorded, when predicting the storage address of the storage object read by the K-th read operation after the second read operation, it is only necessary to perform a prediction operation using the characteristics of a page read once, based on the first cumulative increment and the first accumulated sequence, without the need to perform K predictions using the characteristics of K page reads as in the prior art, thereby effectively improving the prefetching efficiency of the processor.

[0090] In one embodiment, the page read feature includes: a sequence-increment mapping table, the sequence-increment mapping table includes: an incremental sequence formed by address increments corresponding to each storage object read for the last N times, and the next address increment corresponding to each of the incremental sequences in the continuation direction.

[0091] In one implementation, the first prediction unit 42 may include: A first determining module, configured to determine an incremental sequence corresponding to the storage object read by the first reading operation, to obtain a first incremental sequence; A first prediction module, configured to predict a first address increment corresponding to a storage object to be read next time according to the first increment sequence and the sequence-increment mapping table, with the prediction number incremented by 1; A first updating module, configured to update the first incremental sequence using the first address increment to obtain an updated sequence; A trigger module, used to use the update sequence as a new first incremental sequence to trigger the prediction module to run, and iterate in a loop until the number of predictions is equal to K; The accumulation and accumulating module is used for accumulating the first address increments to obtain the first accumulated increments, and combining the first address increments to obtain the first accumulated sequence.

[0092] In one implementation, the first prediction unit 42 may include: a second prediction module, configured to perform the following operations for each read operation from the last M read operations of the first read operation to the end of the first read operation: based on the page read feature, perform predictions less than K times and greater than 1 time, and accumulate the address increments obtained by each prediction to obtain a third accumulated increment corresponding to the read operation, and combine the address increments obtained by each prediction to obtain a third accumulation sequence corresponding to the read operation; wherein the prediction performed for each read operation is performed on the basis of the third accumulated increment and the third accumulation sequence formed by the last read operation, so that the third accumulated increment corresponding to the first read operation includes K address increments, and the third accumulation sequence corresponding to the first read operation includes K address increments, wherein M is greater than 1; The second determining module is configured to determine the third accumulated increment as the first accumulated increment, and determine the third accumulated sequence as the first accumulated sequence.

[0093] In one implementation, the second prediction unit 43 may include: A third determination module, configured to determine the next address increment in the continuation direction of the first accumulation sequence according to the first accumulation sequence and the sequence-increment mapping table, to obtain a first continuation increment; A second updating module, configured to update the first accumulated increment according to the first continuation increment and the address increment between the storage addresses of the second read operation and the first read operation, to obtain an updated accumulated increment; The third prediction module is used to predict the storage address of the storage object read by the Kth read operation after the second read operation by using the storage address of the second read operation and the updated accumulated increment.

[0094] In one embodiment, the second update module is specifically used to: detect whether the actual address increment between the storage address of the second read operation and the first read operation is equal to the predicted address increment between the second read operation and the first read operation contained in the first accumulation sequence; when the actual address increment is equal to the predicted address increment, update the first cumulative increment according to the first continuation increment and the predicted address increment to obtain an updated cumulative increment.

[0095] In one embodiment, the third determination module is specifically used to: detect the difference in the number of read operations between the last address increment prediction operation and the last storage object read operation; when the difference in the number of read operations is equal to K, determine the next address increment in the continuation direction of the first accumulation sequence according to the first accumulation sequence and the sequence-increment mapping table, and obtain the first continuation increment.

[0096] In one embodiment, the device may further include: an updating unit, configured to predict, according to the page read feature, the first accumulated increment, and the first accumulated sequence, a storage address of a storage object read by a K-th read operation after the second read operation, obtain a target prefetch address, and then update the first accumulated increment and the first accumulated sequence using the target prefetch address to obtain a second accumulated increment and a second accumulated sequence; A trigger unit is used to trigger the prediction unit to run with the second read operation as the new first read operation, the second accumulated increment as the new first accumulated increment, and the second accumulation sequence as the new first accumulation sequence, so as to obtain a new target prefetch address corresponding to the Kth read operation after the new second read operation, and iterate in a loop until there is no new second read operation after the first read operation.

[0097] In a third aspect, an embodiment of the present invention further provides an electronic device that can effectively improve pre-fetching efficiency.

[0098] like Figure 5 As shown, the electronic device provided by an embodiment of the present invention may include: a shell 51, a processor 52, a memory 53, a circuit board 54 and a power supply circuit 55, wherein the circuit board 54 is arranged inside the space enclosed by the shell 51, and the processor 52 and the memory 53 are arranged on the circuit board 54; the power supply circuit 55 is used to supply power to various circuits or devices of the above-mentioned electronic device; the memory 53 is used to store executable program codes; the processor 52 runs a program corresponding to the executable program code by reading the executable program code stored in the memory 53, so as to execute the pre-fetching method applied to the processor provided in any of the aforementioned embodiments.

[0099] The specific execution process of the above steps by the processor 52 and the steps further executed by the processor 52 by running the executable program code can be found in the description of the previous embodiment, which will not be repeated here.

[0100] In the fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, which stores one or more programs, and the one or more programs can be executed by one or more processors to implement any of the prefetching methods applied to the processor provided in the aforementioned embodiments, thereby also being able to achieve the corresponding technical effects, which have been described in detail above and will not be repeated here.

[0101] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0102] Each embodiment in this specification is described in a related manner, and the same or similar parts between the embodiments can be referenced to each other, and each embodiment focuses on the differences from other embodiments.

[0103] In particular, for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0104] For the convenience of description, the above device is described by dividing the functions into various units / modules. Of course, when implementing the present invention, the functions of each unit / module can be implemented in the same or multiple software and / or hardware.

[0105] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiments can be implemented by instructing the relevant hardware through a computer program, and the program can be stored in a computer-readable storage medium, and when the program is executed, it can include the processes of the embodiments of the above-mentioned methods. The storage medium can be a disk, an optical disk, a read-only memory (ROM) or a random access memory (RAM), etc.

[0106] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed by the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. A prefetching method applied to a processor, characterized in that: include: Get the page read characteristics of the memory page where the prefetch object is located; Predicting, according to the page read feature, a first cumulative feature of a storage address where a storage object read by a K-th read operation after the first read operation is located, wherein K is a positive integer greater than 1; the first cumulative feature includes a cumulative feature formed by address features predicted in K read operations after the first read operation; A storage address of a storage object read by a K-th read operation after a second read operation is predicted according to the first accumulated feature, wherein the second read operation is a next read operation of the first read operation.

2. The method according to claim 1, characterized in that The page read feature is used to predict the address increment corresponding to the storage object read this time by taking the address increment corresponding to the storage object read in the memory page for the most recent N times as an index, and update the index using the predicted address increment to perform the next round of prediction; wherein N is a positive integer and N is less than a first threshold; the address increment corresponding to the storage object read each time is: the address difference between the storage address of the storage object read this time and the storage address of the storage object read last time; The predicting, according to the page read feature, a first cumulative feature of a storage address where a storage object read by a K-th read operation after the first read operation is located comprises: Based on the page read characteristics, predict the address increment corresponding to each storage object read in K read operations after the first read operation, and accumulate the address increments corresponding to the storage objects read in the K read operations to obtain a first accumulated increment, and combine the address increments corresponding to the storage objects read in the K read operations to obtain a first accumulated sequence; wherein K is a positive integer greater than 1; The predicting, based on the first accumulated feature, a storage address of a storage object read by a K-th read operation after the second read operation includes: Based on the page read characteristics, the first cumulative increment, and the first accumulation sequence, the storage address of the storage object read by the Kth read operation after the second read operation is predicted to obtain a target prefetch address, wherein the second read operation is the next read operation of the first read operation.

3. The method according to claim 2, characterized in that The page read feature includes: a sequence-increment mapping table, which includes: an increment sequence formed by address increments corresponding to each storage object read for the most recent N times, and a next address increment corresponding to the continuation direction of each increment sequence.

4. The method according to claim 3, characterized in that The method of predicting, based on the page read characteristics, an address increment corresponding to each storage object read in K read operations after the first read operation, and accumulating the address increments corresponding to the storage objects read in the K read operations to obtain a first accumulated increment, and combining the address increments corresponding to the storage objects read in the K read operations to obtain a first accumulated sequence includes: Determine an incremental sequence corresponding to the storage object read by the first read operation to obtain a first incremental sequence; According to the first increment sequence and the sequence-increment mapping table, predict the first address increment corresponding to the storage object to be read next time, and increase the prediction number by 1; updating the first incremental sequence using the first address increment to obtain an updated sequence; Taking the update sequence as a new first increment sequence, jumping to predicting the first address increment corresponding to the storage object to be read next time according to the first increment sequence and the sequence-increment mapping table, and continuing to execute, looping and iterating until the number of predictions is equal to K; The first address increments are accumulated to obtain the first accumulated increment, and the first address increments are combined to obtain the first accumulated sequence.

5. The method according to claim 3, characterized in that: The method of predicting, based on the page read characteristics, an address increment corresponding to each storage object read in K read operations after the first read operation, and accumulating the address increments corresponding to the storage objects read in the K read operations to obtain a first accumulated increment, and combining the address increments corresponding to the storage objects read in the K read operations to obtain a first accumulated sequence includes: Starting from the last M read operations of the first read operation to the first read operation, performing the following operations for each read operation: based on the page read characteristics, performing predictions less than K times and greater than 1 time, and accumulating the address increments obtained by each prediction to obtain a third accumulated increment corresponding to the read operation, and combining the address increments obtained by each prediction to obtain a third accumulation sequence corresponding to the read operation; wherein the prediction performed for each read operation is performed on the basis of the third accumulated increment and the third accumulation sequence formed by the last read operation, so that the third accumulated increment corresponding to the first read operation includes K address increments, and the third accumulation sequence corresponding to the first read operation includes K address increments, wherein M is greater than 1; The third accumulated increment is determined as the first accumulated increment, and the third accumulated sequence is determined as the first accumulated sequence.

6. The method according to claim 3, characterized in that: The predicting, according to the page read feature, the first accumulated increment, and the first accumulation sequence, a storage address of a storage object read by a K-th read operation after the second read operation comprises: Determine, according to the first accumulated sequence and the sequence-increment mapping table, a next address increment in a continuation direction of the first accumulated sequence to obtain a first continuation increment; updating the first accumulated increment according to the first continuation increment and the address increment between the storage addresses of the second read operation and the first read operation to obtain an updated accumulated increment; The storage address of the storage object read by the Kth read operation after the second read operation is predicted using the storage address of the second read operation and the updated accumulated increment.

7. The method according to claim 6, characterized in that The updating of the first accumulated increment according to the first continuation increment and the address increment between the storage addresses of the second read operation and the first read operation to obtain the updated accumulated increment includes: detecting whether an actual address increment between the storage addresses of the second read operation and the first read operation is equal to a predicted address increment between the second read operation and the first read operation contained in the first accumulation sequence; In the case that the actual address increment is equal to the predicted address increment, the first accumulated increment is updated according to the first continuation increment and the predicted address increment to obtain an updated accumulated increment.

8. The method according to claim 6, characterized in that The step of determining the next address increment in the continuation direction of the first accumulation sequence according to the first accumulation sequence and the sequence-increment mapping table to obtain the first continuation increment comprises: Detecting the difference in the number of read operations between the last address increment prediction operation and the last storage object read operation; When the number of the difference read operations is equal to K, the next address increment in the continuation direction of the first accumulation sequence is determined according to the first accumulation sequence and the sequence-increment mapping table to obtain a first continuation increment.

9. The method according to any one of claims 2 to 8, characterized in that After predicting the storage address of the storage object read by the Kth read operation after the second read operation according to the page read feature, the first accumulated increment, and the first accumulation sequence, and obtaining the target prefetch address, the method further includes: Using the target prefetch address, updating the first cumulative increment and the first accumulation sequence to obtain a second cumulative increment and a second accumulation sequence; Taking the second read operation as the new first read operation, taking the second accumulated increment as the new first accumulated increment, and taking the second accumulation sequence as the new first accumulation sequence, jump to the step of predicting the storage address of the storage object read by the K-th read operation after the second read operation according to the storage address corresponding to the first read operation, the page read feature, the first accumulated increment, and the first accumulation sequence, so as to obtain a new target prefetch address corresponding to the K-th read operation after the new second read operation, and iterate in a loop until there is no new second read operation after the first read operation.

10. A prefetch device applied to a processor, characterized in that: include: An acquisition unit, used for acquiring a page read feature of a memory page where a pre-fetch object is located; a first prediction unit, predicting, based on the page read feature, a first cumulative feature of a storage address where a storage object read by a K-th read operation after the first read operation is located, wherein K is a positive integer greater than 1; the first cumulative feature includes a cumulative feature formed by address features predicted in K read operations after the first read operation; A second prediction unit is used to predict, based on the first accumulated feature, a storage address of a storage object read by a K-th read operation after a second read operation, wherein the second read operation is a next read operation of the first read operation.

11. The device according to claim 10, characterized in that The page read feature is used to predict the address increment corresponding to the storage object read this time by taking the address increment corresponding to the storage object read in the memory page for the most recent N times as an index, and update the index using the predicted address increment to perform the next round of prediction; wherein N is a positive integer and N is less than a first threshold; the address increment corresponding to the storage object read each time is: the address difference between the storage address of the storage object read this time and the storage address of the storage object read last time; a first prediction unit, specifically configured to predict, based on the page read feature, an address increment corresponding to a storage object read each time in K read operations after the first read operation, and to accumulate the address increments corresponding to the storage objects read in the K read operations to obtain a first accumulated increment, and to combine the address increments corresponding to the storage objects read in the K read operations to obtain a first accumulated sequence; wherein K is a positive integer greater than 1; The second prediction unit is specifically used to predict the storage address of the storage object read by the Kth read operation after the second read operation according to the page read characteristics, the first cumulative increment, and the first accumulation sequence, and obtain a target prefetch address, wherein the second read operation is the next read operation of the first read operation.

12. The device according to claim 11, characterized in that The page read feature includes: a sequence-increment mapping table, which includes: an increment sequence formed by address increments corresponding to each storage object read for the most recent N times, and a next address increment corresponding to the continuation direction of each increment sequence.

13. The device according to claim 12, characterized in that The first prediction unit comprises: A first determining module, configured to determine an incremental sequence corresponding to the storage object read by the first reading operation, to obtain a first incremental sequence; A first prediction module, configured to predict a first address increment corresponding to a storage object to be read next time according to the first increment sequence and the sequence-increment mapping table, with the prediction number incremented by 1; A first updating module, configured to update the first incremental sequence using the first address increment to obtain an updated sequence; A trigger module, used to use the update sequence as a new first incremental sequence to trigger the prediction module to run, and iterate in a loop until the number of predictions is equal to K; The accumulation and accumulating module is used for accumulating the first address increments to obtain the first accumulated increments, and combining the first address increments to obtain the first accumulated sequence.

14. The device according to claim 12, characterized in that The first prediction unit comprises: a second prediction module, configured to perform the following operations for each read operation from the last M read operations of the first read operation to the end of the first read operation: based on the page read feature, perform predictions less than K times and greater than 1 time, and accumulate the address increments obtained by each prediction to obtain a third accumulated increment corresponding to the read operation, and combine the address increments obtained by each prediction to obtain a third accumulation sequence corresponding to the read operation; wherein the prediction performed for each read operation is performed on the basis of the third accumulated increment and the third accumulation sequence formed by the last read operation, so that the third accumulated increment corresponding to the first read operation includes K address increments, and the third accumulation sequence corresponding to the first read operation includes K address increments, wherein M is greater than 1; The second determining module is configured to determine the third accumulated increment as the first accumulated increment, and determine the third accumulated sequence as the first accumulated sequence.

15. The device according to claim 12, characterized in that The second prediction unit comprises: A third determination module, configured to determine the next address increment in the continuation direction of the first accumulation sequence according to the first accumulation sequence and the sequence-increment mapping table, to obtain a first continuation increment; A second updating module, configured to update the first accumulated increment according to the first continuation increment and the address increment between the storage addresses of the second read operation and the first read operation, to obtain an updated accumulated increment; The third prediction module is used to predict the storage address of the storage object read by the Kth read operation after the second read operation by using the storage address of the second read operation and the updated accumulated increment.

16. The device according to claim 15, characterized in that The second updating module is specifically used for: detecting whether an actual address increment between the storage addresses of the second read operation and the first read operation is equal to a predicted address increment between the second read operation and the first read operation contained in the first accumulation sequence; In the case that the actual address increment is equal to the predicted address increment, the first accumulated increment is updated according to the first continuation increment and the predicted address increment to obtain an updated accumulated increment.

17. The device according to claim 15, characterized in that The third determination module is specifically used to: Detecting the difference in the number of read operations between the last address increment prediction operation and the last storage object read operation; When the number of the difference read operations is equal to K, the next address increment in the continuation direction of the first accumulation sequence is determined according to the first accumulation sequence and the sequence-increment mapping table to obtain a first continuation increment.

18. The device according to any one of claims 11 to 17, characterized in that Also includes: an updating unit, configured to predict, according to the page read feature, the first accumulated increment, and the first accumulated sequence, a storage address of a storage object read by a K-th read operation after the second read operation, obtain a target prefetch address, and then update the first accumulated increment and the first accumulated sequence using the target prefetch address to obtain a second accumulated increment and a second accumulated sequence; A trigger unit is used to trigger the prediction unit to run with the second read operation as the new first read operation, the second accumulated increment as the new first accumulated increment, and the second accumulation sequence as the new first accumulation sequence, so as to obtain a new target prefetch address corresponding to the Kth read operation after the new second read operation, and iterate in a loop until there is no new second read operation after the first read operation.

19. An electronic device, characterized in that: The electronic device comprises: a housing, a processor, a memory, a circuit board and a power supply circuit, wherein the circuit board is placed inside the space enclosed by the housing, and the processor and the memory are arranged on the circuit board; the power supply circuit is used to supply power to various circuits or devices of the above-mentioned electronic device; the memory is used to store executable program code; the processor runs a program corresponding to the executable program code by reading the executable program code stored in the memory, so as to execute the pre-fetching method applied to the processor as described in any one of claims 1 to 9.

20. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores one or more programs, and the one or more programs can be executed by one or more processors to implement the prefetching method applied to a processor according to any one of claims 1 to 9.

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