Array substrate and preparation method thereof, display panel and display device

Abstract

The embodiment of the invention discloses an array substrate and a preparation method thereof, a display panel and a display device.The preparation method of the array substrate comprises the steps that a substrate is provided, and the substrate comprises a display area and a non-display area; a metal wire is formed in the display area, a bonding pad is formed in the non-display area, and the metal wire is electrically connected with the bonding pad; the substrate is placed on a cutting machine table, and the display area is cut through the cutting machine table; wherein when the display area is cut, the cutting machine provides first voltage for the bonding pad, meanwhile, the cutting machine provides ion wind for the cutting area, and the polarity of the first voltage is opposite to the ion polarity of the ion wind. By adopting the technical means, when the display area is cut, the polarity of the first voltage is opposite to the ion polarity of the ion wind, so that chippings generated in the cutting process can be sucked away by the ion wind, the chippings can be prevented from scattering to other positions to cause short circuit, and the yield of the array substrate is improved.

Description

Technical Field

[0001] Embodiments of the present invention relate to the field of display technology, and in particular to an array substrate and a manufacturing method thereof, a display panel and a display device. Background Art

[0002] Currently, the main forms of display panels are small and medium-sized light panels, direct displays, or spliced ​​into large-size screens.

[0003] At present, when using the same set of masks to implement special-shaped solutions, the display area needs to be cut, but during the cutting process, metal and glass debris will be generated at the cutting position, resulting in poor cleanliness of the array substrate. In addition, during the cutting process, the organic material in the array substrate is easily carbonized to form a conductive area, which will cause a signal short circuit and affect the normal display of the display panel. Summary of the invention

[0004] Embodiments of the present invention provide an array substrate and a manufacturing method thereof, a display panel and a display device, so as to reduce the short circuit risk of the array substrate and improve the yield of the array substrate.

[0005] In a first aspect, an embodiment of the present invention provides a method for preparing an array substrate, comprising:

[0006] Providing a substrate, the substrate comprising a display area and a non-display area;

[0007] Forming a metal wiring in the display area, forming a pad in the non-display area, wherein the metal wiring is electrically connected to the pad;

[0008] Placing the substrate on a cutting machine, and using the cutting machine to cut the display area;

[0009] When cutting the display area, the cutting machine provides a first voltage to the pad, and at the same time the cutting machine provides an ion wind to the cutting area, and the polarity of the first voltage is opposite to the ion polarity of the ion wind.

[0010] In a second aspect, an embodiment of the present invention further provides an array substrate, wherein the array substrate is prepared by the preparation method described in the first aspect.

[0011] In a third aspect, an embodiment of the present invention further provides a display panel, comprising the array substrate and light-emitting elements described in the second aspect.

[0012] In a fourth aspect, an embodiment of the present invention further provides a display device, comprising the display panel described in the third aspect.

[0013] According to the technical solution provided by the embodiment of the present invention, when cutting the display area, the cutting machine provides a first voltage to the welding pad, and at the same time the cutting machine provides ion wind to the cutting area. In this way, the welding pad can provide the first voltage to the metal routing while the cutting machine provides ion wind to the cutting area. Since the polarity of the first voltage is opposite to the ion polarity of the ion wind, the debris generated during the cutting process will be adsorbed by the ions in the ion wind, and the debris can be blown away. On the one hand, the cleanliness of the array substrate can be ensured, and on the other hand, the debris can be prevented from being scattered to other locations to cause a short circuit, thereby reducing the risk of short circuits and thereby improving the yield of the array substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 A schematic flow chart of a first method for preparing an array substrate provided in an embodiment of the present invention;

[0015] Figure 2 A schematic top view of a first array substrate provided by an embodiment of the present invention;

[0016] Figure 3 A schematic flow chart of a second method for preparing an array substrate provided in an embodiment of the present invention;

[0017] Figure 4 A schematic flow chart of a third method for preparing an array substrate provided in an embodiment of the present invention;

[0018] Figure 5 A schematic flow chart of a fourth method for preparing an array substrate provided in an embodiment of the present invention;

[0019] Figure 6 A schematic top view of a second array substrate provided by an embodiment of the present invention;

[0020] Figure 7 A cross-sectional schematic diagram of a display panel provided by an embodiment of the present invention;

[0021] Figure 8 A schematic structural diagram of a display device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0022] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings.

[0023] Figure 1 A schematic diagram of a process for preparing a first array substrate provided by an embodiment of the present invention is shown in FIG. Figure 1 As shown, the method for preparing the array substrate includes:

[0024] S101 , providing a substrate, wherein the substrate includes a display area and a non-display area.

[0025] Specifically, Figure 2 A schematic top view of a first array substrate provided in an embodiment of the present invention is shown as follows: Figure 2 As shown, the display area 10 may include a plurality of sub-pixels arranged in an array, and the sub-pixels may include light-emitting elements and pixel circuits connected to each other, and the pixel circuit is used to provide a display signal to the light-emitting element to realize the display function of the display panel. The pixel circuit may be a 2T1C circuit, a 7T1C circuit, or a 7T2C circuit, etc. "2T1C circuit" means that the pixel circuit is a pixel circuit including two thin film transistors (T) and one capacitor (C), and other "7T1C circuits", "7T2C circuits", etc. are similar, and the specific type of the pixel circuit in the embodiment of the present invention is not limited.

[0026] Specifically, a display driving unit and display driving signal lines may be disposed in the non-display area 20 , and the display driving unit may include a driving chip (such as an IC) and a pixel driving circuit (such as a shift register circuit VSR) and the like.

[0027] S102 , forming metal wiring in the display area, forming pads in the non-display area, and electrically connecting the metal wiring to the pads.

[0028] For details, please refer to Figure 2 In the display area, the metal wiring 101 can be electrically connected to the pixel circuit or used as a signal wiring for other auxiliary functions. In the non-display area, the metal wiring 101 is connected to the pad 203 so that a voltage signal is applied to the metal wiring 101 through the pad 203.

[0029] Exemplarily, the metal wiring may be a scan signal wiring, and the scan signal wiring may provide a scan signal to the pixel circuit to control the on and off of a transistor in the pixel circuit.

[0030] Exemplarily, the metal routing can also be a data signal routing, which can provide a data signal to the pixel circuit to control the transistor in the pixel circuit to write the data signal into the first electrode (e.g., anode) in the light-emitting element, thereby realizing normal light emission of the light-emitting element and realizing the display function of the display panel.

[0031] Exemplarily, the metal trace may also be a power supply voltage signal line, the width of the power supply voltage signal line is relatively wide, and the signal is more stable when the first voltage is applied. The power supply voltage signal line may be a PVDD signal line or a PVEE signal line. The PVDD signal line is used to provide a positive power supply signal, connected to the anode of the light-emitting element, to ensure that each light-emitting element can obtain a stable positive voltage to control the light-emitting element to emit light normally. The PVEE signal line is used to provide a negative power supply signal, connected to the cathode of the light-emitting element, to form a current loop to ensure that the light-emitting element emits light normally.

[0032] S103, placing the substrate on a cutting machine, and using the cutting machine to cut the display area.

[0033] When cutting the display area, the cutting machine provides a first voltage to the pad, and at the same time, the cutting machine provides ion wind to the cutting area, and the polarity of the first voltage is opposite to the ion polarity of the ion wind.

[0034] Specifically, by cutting the display area using a cutting machine, a large-sized substrate can be divided into separate small-sized substrates to achieve batch production.

[0035] Specifically, when cutting the display area, the cutting machine provides a first voltage to the pad, so that the first voltage is applied to the metal wiring through the pad, and then when the display area is cut, the metal wiring will be cut during the cutting process, and the polarity of the debris generated at the cutting position is the same as the polarity of the first voltage. While the cutting machine provides the first voltage to the pad, the cutting machine provides ion wind to the cutting area, and the polarity of the first voltage is opposite to the ion polarity of the ion wind, that is, the polarity of the debris is opposite to the ion polarity of the ion wind, which is conducive to ion adsorption of debris, and the debris can be blown away, so that on the one hand, the cleanliness of the surface of the array substrate can be ensured, and on the other hand, charged debris can be prevented from being scattered to other positions of the array substrate to cause short circuits, thereby reducing the risk of short circuits and improving the yield of the array substrate.

[0036] Optionally, the first voltage is a positive voltage and the ion wind is a negative ion wind, or the first voltage is a negative voltage and the ion wind is a positive ion wind.

[0037] Specifically, the polarity of the first voltage is opposite to the ion polarity of the ion wind, that is, the polarity of the first voltage is positive and the ion polarity of the ion wind is negative, or the polarity of the first voltage is negative and the ion polarity of the ion wind is positive. Since charges of the same polarity repel each other and charges of opposite polarity attract each other, when cutting the display area, the ions in the ion wind absorb the debris and the debris can be blown away, thereby preventing the charged debris from scattering to other positions of the array substrate and causing a short circuit.

[0038] Exemplarily, the polarity of the first voltage is positive, and the ion polarity of the ion wind is negative, i.e., anionic wind. When cutting the display area, the debris generated at the cutting position is positively charged and is sucked away by the anionic wind, thereby reducing the residual debris, thereby reducing the risk of short circuit and improving the yield of the array substrate.

[0039] The array substrate and preparation method thereof provided by the embodiment of the present invention, when cutting the display area, the cutting machine provides the first voltage to the welding pad and provides ion wind to the cutting area at the same time, the polarity of the first voltage is opposite to the ion polarity of the ion wind, so that when the display area is cut, the polarity of the debris generated at the cutting position is the same as the polarity of the first voltage, and the debris is adsorbed by ions in the ion wind with opposite polarity, and the debris can be blown away, so that on the one hand, the cleanliness of the surface of the array substrate can be ensured, and on the other hand, the charged debris can be prevented from scattering to other positions of the array substrate to cause a short circuit, thereby reducing the risk of short circuit and improving the yield of the array substrate.

[0040] Optional, Figure 3 A schematic diagram of a process of preparing a second array substrate provided by an embodiment of the present invention, Figure 3 Based on the above embodiments, the operation of forming metal wiring in the display area is described in detail. Figure 3 As shown, the method for preparing the array substrate includes:

[0041] S201 , providing a substrate, wherein the substrate includes a display area and a non-display area.

[0042] S202 , forming a mesh metal wiring in the display area, forming a pad in the non-display area, and electrically connecting the metal wiring to the pad.

[0043] For details, please refer to Figure 2 The mesh metal wiring 101 includes a first direction (such as Figure 2 The first trace 1011 extending in the X direction (as shown in FIG. 1 ) and the first trace 1011 extending in the second direction (as shown in FIG. Figure 2 The first direction X and the second direction Y intersect.

[0044] Optionally, the mesh metal wiring includes a power supply voltage signal line, and the power supply voltage signal line is used to provide a power supply voltage to the anode or cathode of the light-emitting element.

[0045] Specifically, the power supply voltage signal line may be a PVDD signal line, which is used to provide a positive power supply voltage to the anode of the light-emitting element, ensuring that each light-emitting element can obtain a stable positive voltage to control the light-emitting element to emit light normally. Alternatively, the power supply voltage signal line may be a PVEE signal line, which is used to provide a negative power supply voltage to the cathode of the light-emitting element, so as to form a current loop to ensure that the light-emitting element emits light normally.

[0046] S203, placing the substrate on a cutting machine, and using the cutting machine to cut the display area.

[0047] In the array substrate and preparation method thereof provided by the embodiments of the present invention, the metal wiring in the display area is a mesh metal wiring, and the mesh metal wiring includes a power supply voltage signal line, which is used to provide a power supply voltage to the anode or cathode of the light-emitting element, which is beneficial to ensure the normal light emission of the light-emitting element and the brightness of the light when it is emitted.

[0048] Optional, Figure 4 A schematic diagram of a process of preparing a third array substrate provided by an embodiment of the present invention, Figure 4 Based on the above embodiments, the operation of forming the pad in the non-display area is described in detail. Figure 4 As shown, the method for preparing the array substrate includes:

[0049] S301 , providing a substrate, wherein the substrate includes a display area and a non-display area.

[0050] S302 , forming a mesh metal wiring in the display area, forming at least one first pad in the edge area, and the metal wiring is electrically connected to the pad.

[0051] For details, please refer to Figure 2 The non-display area 20 includes a central area 201 where the driving chip is disposed and edge areas 202 located on both sides of the central area 201 .

[0052] Specifically, the driver chip is electrically connected to the data signal routing, and is used to provide the signals required for display, such as data signals, to the light-emitting elements through the data signal routing; the driver chip is also electrically connected to the display drive signal line, and the display drive signal line is further electrically connected to the pixel drive circuit. The driver chip is also used to provide the display drive signal to the display drive circuit through the display drive signal line, such as the high-level signal VGH, the low-level signal line VGL, and the clock signal CKV required for the shift register circuit VSR to generate the scanning signal.

[0053] Exemplarily, the number of first solder pads 203 can be one, and it is located in the edge area 202 on one side of the central area 201, that is, the first solder pad 203 is located on the left side of the driver chip or on the right side of the driver chip. In this way, when the display area is cut, the first voltage provided by the cutting machine can be transmitted to the mesh metal routing through the first solder pad 203.

[0054] Optional, continue to refer to Figure 2 At least one first pad 203 is formed in the edge regions 202 on both sides of the central region 201 , and all first pads 203 are electrically connected to the metal traces 101 .

[0055] As a feasible implementation mode, the number of first solder pads 203 can be two, and they are respectively located in the edge areas 202 on both sides of the central area 201, that is, there is a first solder pad 203 on the left side of the central area 201 and on the right side of the central area 201, the first solder pad 203 on the left side of the central area 201 is electrically connected to a second wiring 1012 extending along the second direction Y near the left side of the display area 10, and the first solder pad 203 on the right side of the central area 201 is electrically connected to a second wiring 1012 extending along the second direction Y near the right side of the display area 10, so that the voltage balance on both sides of the central area 201 can be ensured, which is beneficial to improve the performance of preventing wiring short circuit during cutting.

[0056] As another feasible implementation, the left side of the central area 201 and the right side of the central area 201 respectively have the same number of first solder pads 203, and each first solder pad 203 is electrically connected one-to-one with each second trace 1012 extending along the second direction Y. This can ensure the voltage balance on both sides of the central area 201 on the one hand, which is beneficial to improve the performance of preventing trace short circuit during cutting; on the other hand, it can ensure the stability of the voltage in the mesh metal trace 101, thereby improving the reliability and stability of the array substrate.

[0057] S303, placing the substrate on a cutting machine, and using the cutting machine to cut the display area.

[0058] The array substrate and the preparation method thereof provided by the embodiments of the present invention form at least one first solder pad in the edge area. By setting the number or position of the first solder pads to be different, on the one hand, the array substrate can be diversified, and on the other hand, the reliability and stability of the array substrate can be improved.

[0059] Optional, Figure 5 A schematic diagram of a process of preparing a fourth array substrate provided in an embodiment of the present invention, Figure 5 Based on the above embodiment, the operation of cutting the display area by using the cutting machine is described in detail. Figure 5 As shown, the method for preparing the array substrate includes:

[0060] S401 , providing a substrate, wherein the substrate includes a display area and a non-display area.

[0061] S402 , forming a mesh metal wiring in the display area, forming a pad in the non-display area, and electrically connecting the metal wiring to the pad.

[0062] Optional, Figure 6 A schematic top view of a second array substrate provided in an embodiment of the present invention is shown in FIG. Figure 6 As shown, a plurality of third wirings 103 extending along the first direction X and / or a plurality of fourth wirings 104 extending along the second direction Y are formed in the display area 10 .

[0063] Specifically, Figure 6 A plurality of third lines 103 extending along a first direction X and a fourth line 104 extending along a second direction Y are shown. The third line 103 can be understood as a scan signal line, and the fourth line 104 can be understood as a data signal line. The scan signal line is used to provide a scan signal to a pixel circuit in the array substrate to control the on or off of a transistor in the pixel circuit and control whether a display signal can be written into a pixel unit. The data signal line can provide a data signal to the pixel circuit to control the transistor in the pixel circuit to write the data signal into the first electrode (e.g., anode) in the light-emitting element, so as to realize the light-emitting element to emit light and realize the display function of the display panel.

[0064] Optional, continue to refer to Figure 6 A plurality of second pads 204 and / or third pads 205 are formed in the non-display area 20 , the second pads 204 are electrically connected to the third wiring 103 , and the third pads 205 are electrically connected to the fourth wiring 104 .

[0065] Specifically, the second pad 204 is electrically connected to the third wiring 103 to provide a voltage signal to the third wiring 103 , and the third pad 205 is electrically connected to the fourth wiring 104 to provide a voltage signal to the fourth wiring 104 .

[0066] S403, placing the substrate on a cutting machine, and cutting the display area using a sawtooth cutting line.

[0067] For details, please refer to Figure 2 The serrated cutting line a includes a plurality of first cutting line segments a1 and second cutting line segments a2 connected in sequence. The first cutting line segment a1 extends along the first direction X and intersects with a second line 1012 . The second cutting line segment a2 extends along the second direction Y and intersects with a first line 1011 .

[0068] Specifically, the display area 10 is cut using a sawtooth cutting line a, and a first cutting line segment a1 extends along a first direction X and intersects a second routing line 1012, and a second cutting line segment a2 extends along a second direction Y and intersects a first routing line 1011, that is, when the display area is cut, the cutting line is cut along the shape of the grid-like metal routing line 101, which can prevent other signal lines in the pixel unit from being cut during the cutting process, thereby ensuring the stability of the array substrate.

[0069] The array substrate and the preparation method thereof provided by the embodiment of the present invention use sawtooth cutting lines to cut the display area, which can prevent other signal lines in the pixel unit from being cut during the cutting process, thereby facilitating the stability of the array substrate.

[0070] Based on the same inventive concept, an embodiment of the present invention further provides an array substrate. The array substrate is prepared by the preparation method in the above embodiment, so the array substrate has the beneficial effects described in the above embodiment.

[0071] Optional, continue to refer to Figure 2 During the test phase of the array substrate, the pad 203 is used as a test signal output terminal.

[0072] Specifically, after the array substrate is prepared, it needs to be tested. During the test, the driving chip outputs a driving voltage signal to the metal wiring 101 to test whether the metal wiring can withstand the expected working current. Since the pad 203 is electrically connected to the metal wiring 101, the pad 203 is used as a test signal output terminal, that is, the voltage of the pad 203 is tested using the probe of a multimeter or other instrument. If the test voltage meets the preset voltage, it means that there is no short circuit in the array substrate. However, if the test voltage does not meet the preset voltage, it means that there is a risk of short circuit in the array substrate, so as to repair or discard the faulty array substrate.

[0073] It should be noted that the preset voltage can be understood as the voltage value when the array substrate is not short-circuited. When the array substrate is short-circuited, the detected test voltage does not meet the preset voltage due to interference from other voltage signals.

[0074] For example, during the array substrate preparation stage, if pads corresponding to PVDD signal lines and pads corresponding to PVEE signal lines are reserved, during the testing stage, the voltage between the two pads can be tested simultaneously to determine whether a short circuit occurs in the array substrate.

[0075] For example, during the array substrate preparation stage, if only the pads corresponding to the PVDD signal lines are reserved or only the pads corresponding to the PVEE signal lines are reserved, then during the testing stage, it is possible to determine whether a short circuit occurs on the array substrate by testing whether the voltage of such pads meets the voltage of the PVDD signal lines or the PVEE signal lines.

[0076] In summary, the array substrate provided by the embodiment of the present invention is provided with a pad, and in the cutting stage, a voltage signal is applied to the metal trace 101 through the pad, so that the polarity of the debris generated during the cutting process is the same as the polarity of the pad voltage signal, so that the debris can be removed by ion wind with the opposite polarity to the voltage signal, thereby preventing the array substrate from having a short circuit risk. In the testing stage, the pad is used as a test signal output terminal, that is, the voltage of the pad is tested using the probe of a multimeter or other instrument, and the measured voltage can be used to determine whether the array substrate has a short circuit risk, so as to perform maintenance.

[0077] Based on the same inventive concept, an embodiment of the present invention further provides a display panel, which includes the array substrate and the light-emitting element described in the above embodiment. Therefore, the display panel has the beneficial effects described in the above embodiment. Figure 7 A cross-sectional schematic diagram of a display panel provided by an embodiment of the present invention is shown in FIG. Figure 7 As shown, the array substrate 100 may include a plurality of sub-pixels arranged in an array, and the sub-pixels may include light-emitting elements 200 and pixel circuits connected to each other, and the pixel circuits are used to provide display signals to the light-emitting elements to realize the display function of the display panel. The pixel circuit may be a 2T1C circuit, a 7T1C circuit, or a 7T2C circuit. The pixel circuit includes a thin film transistor (T) 1001 and a capacitor (C).

[0078] The thin film transistor 1001 may include a source electrode 10011, a drain electrode 10012, an active layer 10013 and a gate electrode 10014. The gate electrode 10014 is arranged corresponding to the channel region of the active layer 10013. The source electrode 10011 is arranged corresponding to the source region of the active layer 10013. The drain electrode 10012 is arranged corresponding to the drain region of the active layer 10013. Under the action of the gate signal, the channel region is turned on and converted from a non-conductor state to a conductor state. A path is formed between the corresponding source electrode 10011 and the drain electrode 10012. The data signal can be sequentially written into the drain electrode 10012 via the source electrode 10011 and the channel region. Further, the gate electrode 10014 provided in the embodiment of the present invention can be located on the side of the active layer 10013 close to the substrate, that is, the gate electrode 10014 can be a bottom gate, so that the gate electrode 10014 can be used as a light shielding structure of the channel region to prevent light from entering the channel region to form light leakage.

[0079] Optional, continue to refer to Figure 7 The light emitting element 200 includes a micro light emitting diode Micro LED or a sub-millimeter light emitting diode Mini LED.

[0080] As a feasible implementation, the light emitting element 200 includes a micro light emitting diode, which has the advantages of high brightness, low power consumption, long life and high contrast.

[0081] As another feasible implementation, the light emitting element 200 includes a sub-millimeter light emitting diode. Compared with an organic light emitting diode, a sub-millimeter light emitting diode has advantages such as higher brightness and contrast, lower wavelength and longer life.

[0082] In yet another embodiment, the display panel may be used as a backlight source, which may be selected according to actual conditions during specific implementation.

[0083] Based on the same inventive concept, an embodiment of the present invention further provides a display device. Figure 8A schematic diagram of a display device according to an embodiment of the present invention is shown in FIG. Figure 8 As shown, the display device includes the display panel in the above embodiment, so the display device provided by the embodiment of the present invention also has the beneficial effects described in the above embodiment, which will not be repeated here. Exemplarily, the display device can be an electronic device such as a mobile phone, a computer, a smart wearable device (for example, a smart watch), and a vehicle-mounted display device, which is not limited in the embodiment of the present invention.

[0084] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, combinations and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A method for preparing an array substrate, characterized in that: include: Providing a substrate, the substrate comprising a display area and a non-display area; Forming a metal wiring in the display area, forming a pad in the non-display area, and the metal wiring is electrically connected to the pad; Placing the substrate on a cutting machine, and using the cutting machine to cut the display area; When cutting the display area, the cutting machine provides a first voltage to the pad, and at the same time the cutting machine provides an ion wind to the cutting area, and the polarity of the first voltage is opposite to the ion polarity of the ion wind.

2. The method for preparing an array substrate according to claim 1, characterized in that: Forming a metal wiring in the display area includes: forming a mesh metal wiring in the display area; The mesh metal routing includes a first routing extending along a first direction and a second routing extending along a second direction, and the first direction intersects with the second direction.

3. The method for preparing an array substrate according to claim 2, wherein: The mesh metal wiring includes a power supply voltage signal line, and the power supply voltage signal line is used to provide a power supply voltage to the anode or cathode of the light-emitting element.

4. The method for preparing an array substrate according to claim 2, wherein: The non-display area includes a central area where a driving chip is arranged and edge areas located on both sides of the central area, and a pad is formed in the non-display area, including: At least one first pad is formed in the edge region.

5. The method for preparing an array substrate according to claim 4, characterized in that: At least one first pad is formed in the edge region, comprising: At least one first pad is formed in the edge areas on both sides of the central area, and all the first pads are electrically connected to the metal traces.

6. The method for preparing an array substrate according to claim 2, characterized in that: Cutting the display area using the cutting machine comprises: Cutting the display area using a sawtooth cutting line; The serrated cutting line includes a plurality of first cutting line segments and second cutting line segments connected in sequence, the first cutting line segment extends along the first direction and intersects with one of the second lines, and the second cutting line segment extends along the second direction and intersects with one of the first lines.

7. The method for preparing an array substrate according to claim 2, wherein: Forming metal wiring in the display area also includes: A plurality of third wirings extending along the first direction and / or a plurality of fourth wirings extending along the second direction are formed in the display area.

8. The method for preparing an array substrate according to claim 7, characterized in that: Forming a pad in the non-display area, further comprising: A plurality of second pads and / or third pads are formed in the non-display area, the second pads are electrically connected to the third wiring, and the third pads are electrically connected to the fourth wiring.

9. The method for preparing an array substrate according to claim 1, characterized in that: The first voltage is a positive voltage and the ion wind is a negative ion wind, or the first voltage is a negative voltage and the ion wind is a positive ion wind.

10. An array substrate, characterized in that: The array substrate is prepared by the preparation method according to any one of claims 1 to 9.

11. The array substrate according to claim 10, characterized in that: During the test phase of the array substrate, the pad is used as a test signal output terminal.

12. A display panel, characterized in that: It comprises the array substrate and the light-emitting element as claimed in claim 10 or 11.

13. The display panel according to claim 12, characterized in that: The light emitting element includes a micro light emitting diode Micro LED or a sub-millimeter light emitting diode Mini LED.

14. A display device, characterized in that: Includes the display panel according to claim 12 or 13.

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