Embedded heat dissipation structure and method for manufacturing the same

By embedding a substrate and micron-sized pillar structure into the chip, an embedded heat dissipation structure is used to achieve efficient heat dissipation by utilizing the flow of liquid metal, which solves the heat dissipation problem of ultra-high density transistors, improves heat dissipation efficiency, and reduces flow resistance.

CN119381364BActive Publication Date: 2025-11-04PEKING UNIV
View PDF 1 Cites 0 Cited by

Patent Information

Application Number
CN202310923140.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-07-25
Publication Date
2025-11-04
Estimated Expiration
2043-07-25

AI Technical Summary

Technical Problem

In existing technologies, the high-efficiency heat dissipation requirements caused by ultra-high-density transistors within chips are difficult to meet, and traditional thermal management technologies have low heat dissipation efficiency and are difficult to miniaturize.

Method used

An embedded heat dissipation structure is adopted, including a substrate, multiple micron-sized pillars, and liquid metal. By distributing the micron-sized pillars at intervals and filling them with liquid metal in the cavity of the substrate, the micron-sized pillars reduce the kinematic viscosity of the liquid metal and increase its flow rate, thereby enhancing the heat dissipation effect.

Benefits of technology

It achieves efficient chip heat dissipation, meets the heat dissipation requirements of ultra-high density transistors, improves heat dissipation efficiency, and reduces the flow resistance of liquid metal.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119381364B_ABST
    Figure CN119381364B_ABST
Patent Text Reader

Abstract

The application provides an embedded heat dissipation structure and a preparation method thereof. The embedded heat dissipation structure comprises a substrate, a plurality of micropillars and a metal liquid. The substrate comprises a first substrate and a second substrate, and the first substrate and the second substrate enclose a cavity. The plurality of micropillars are distributed in the cavity of the substrate at intervals, and at least one end of at least part of the micropillars is in contact with the first substrate. The metal liquid is located in the cavity and is in contact with the substrate and the micropillars respectively. Due to the interval distribution of the micropillars in the cavity, the kinematic viscosity of the metal liquid and the substrate is small during the flow of the metal liquid, thereby ensuring that the resistance of the metal liquid during the flow is small, ensuring that the speed of the metal liquid is large, and since the heat dissipation capacity is positively correlated with the movement speed of the metal liquid, the heat dissipation effect of the embedded heat dissipation structure is good, and the problem that the high-efficiency heat dissipation demand of the ultra-high-density transistors in the chip in the prior art is difficult to meet is solved.
Need to check novelty before this filing date? Find Prior Art

Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor, in particular, to an embedded heat dissipation structure and a preparation method thereof. BACKGROUND

[0002] In recent years, the rapid increase of transistor integration density in chips leads to the increasingly significant heat accumulation effect caused by the leakage current of transistor gate area, and the working reliability of the chip is extremely sensitive to temperature. On the basis of safe working temperature, the reliability of the chip decreases by about 5% for each increase of 1℃. The heat dissipation way in the packaging structure of integrated circuit chip is mainly to diffuse and transfer the local high heat generated in the narrow area of chip gate area to the substrate through the thermal interface material, and then to the tube shell, and then to dissipate the heat to the atmosphere through the heat management technology such as air cooling and water cooling outside the tube shell.

[0003] However, these traditional heat management technologies are limited by low heat dissipation efficiency and difficulty in structure miniaturization, and are difficult to meet the high-efficiency heat dissipation demand of the new generation of chips.

[0004] At present, there is also a way of near-junction heat dissipation, that is, various heat dissipation structures are miniaturized and embedded in the electronic chip packaging structure, and the embedded heat dissipation structure is used to realize the precise regulation of junction temperature by forcing the liquid cooling working medium to approach (the distance is less than 100 microns) the heat generating gate area of the electronic chip.

[0005] According to whether the embedded liquid cooling heat dissipation technology needs external energy to drive the cooling working medium, it can be divided into active and passive forms. The active embedded liquid cooling includes spray cooling, flow boiling, electromagnetic reflux and vapor compression refrigeration, etc. The active embedded liquid cooling needs external non-thermal physical effect power (such as mechanical force, electromagnetic force, etc.) to provide kinetic energy to drive the liquid cooling working medium to circulate in the embedded cavity, but it has the shortcomings of complex structure and limited scenarios. The passive embedded liquid cooling method includes planar heat pipe, separate heat pipe and phase change heat storage and dissipation, etc. The passive embedded liquid cooling method can also realize effective inhibition of heat accumulation caused by local high heat flux density in the closed cavity by using the thermal physical effect (such as thermal slip, phase change, capillary condensation, etc.) of the liquid cooling working medium, but the physical properties of the substances used in the passive embedded liquid cooling method cannot meet the requirements of the microsystem packaging process and operating environment. SUMMARY

[0006] The main purpose of the present application is to provide an embedded heat dissipation structure and a preparation method thereof, so as to solve the problem that the high-efficiency heat dissipation demand of the ultra-high-density transistors in the chip cannot be met in the prior art.

[0007] In order to achieve the above object, according to one aspect of the present application, an embedded heat dissipation structure is provided, which comprises a substrate, a plurality of micropillars and a metal liquid, the substrate comprises a first substrate and a second substrate, the first substrate and the second substrate enclose a cavity; the plurality of micropillars are distributed in the cavity of the substrate at intervals, and at least part of the micropillars are in contact with the first substrate at one end; the metal liquid is located in the cavity and in contact with the substrate and the micropillars respectively.

[0008] Optionally, the coverage of the micropillars on the surface of the first substrate ranges from 6% to 14%.

[0009] Optionally, the material of the micropillars comprises gallium nitride, the material of the substrate comprises silicon, and the material of the metal liquid comprises gallium.

[0010] Optionally, the cross-sectional shape of the micropillars perpendicular to the extension direction of the micropillars comprises a regular quadrilateral.

[0011] Optionally, the distance between two adjacent micropillars ranges from 12 microns to 17.83 microns, the length of the micropillars ranges from 8 microns to 12 microns, and the length of the cavity in the extension direction of the micropillars ranges from 80 microns to 110 microns.

[0012] According to another aspect of the present application, a preparation method of an embedded heat dissipation structure is provided, which comprises: providing a first substrate and a preliminary substrate; forming a plurality of micropillars distributed at intervals on the surface of the first substrate; removing part of the preliminary substrate to form a first groove, and the remaining preliminary substrate forms a second substrate; bonding the first substrate and the second substrate, so that the first groove and the first substrate form a cavity, the micropillars are located in the cavity, and the first substrate and the second substrate constitute a substrate; pouring a metal liquid into the cavity, and the metal liquid is in contact with the substrate and the micropillars respectively.

[0013] Optionally, the forming of the plurality of micropillars distributed at intervals on at least part of the surface of the first substrate comprises: forming a semiconductor layer on the surface of the first substrate; removing part of the semiconductor layer to form a plurality of micropillars distributed at intervals.

[0014] Optionally, after bonding the first substrate and the second substrate, the method further comprises: using a chemical mechanical polishing process to process the surface of the first substrate away from the micropillars, so that the thickness of the processed first substrate is within a predetermined range.

[0015] Optionally, before the metal liquid is filled into the cavity, the method further comprises: removing part of the first substrate and part of the second substrate to form a plurality of second grooves arranged at intervals, the second grooves exposing part of the second substrate; forming a laminated insulating layer, a barrier layer and a metal layer in the second grooves to obtain a through silicon via, the insulating layer covering the surface of the second grooves; and removing part of the second substrate to expose the through silicon via.

[0016] Optionally, the filling of the metal liquid into the cavity comprises: removing part of the first substrate and part of the micropillars to form a filling hole, the filling hole exposing the cavity; filling the metal liquid into the cavity through the filling hole under a predetermined gas atmosphere; and filling an adhesive in the filling hole.

[0017] By using the technical scheme of the present application, the embedded heat dissipation structure comprises a substrate, a plurality of micropillars and a metal liquid, the substrate comprises a first substrate and a second substrate, the first substrate and the second substrate enclose a cavity; the plurality of micropillars are arranged at intervals in the cavity of the substrate, and at least part of the micropillars are in contact with the first substrate at one end; and the metal liquid is located in the cavity and in contact with the substrate and the micropillars. Compared with the problem that the high heat dissipation requirement caused by the ultra-high density transistors in the chip is difficult to meet in the prior art, the embedded heat dissipation structure comprises the substrate, the plurality of micropillars and the metal liquid, so that heat dissipation can be realized by the flow of the metal liquid, and because the micropillars are arranged at intervals in the cavity, the kinematic viscosity of the metal liquid and the substrate is small during the flow of the metal liquid, thereby ensuring that the resistance of the metal liquid during the flow is small, ensuring that the speed of the metal liquid is large, and because the heat dissipation capacity is positively correlated with the speed of the metal liquid, the heat dissipation effect of the embedded heat dissipation structure is good, and the problem that the high heat dissipation requirement caused by the ultra-high density transistors in the chip is difficult to meet in the prior art is solved. BRIEF DESCRIPTION OF DRAWINGS

[0018] The drawings accompanying the specification of the present application form a part thereof, serve to provide further understanding of the present application, and together with the specification explain the illustrative embodiments of the present application, and do not constitute an improper limitation on the present application. In the drawings:

[0019] Figure 1 A structure schematic diagram of a first substrate and a preliminary substrate according to an embodiment of the present application is shown;

[0020] Figure 2 A structure schematic diagram obtained after forming micropillars according to an embodiment of the present application is shown;

[0021] Figure 3 A structure schematic diagram after forming a first groove according to an embodiment of the present application is shown;

[0022] Figure 4 A structure schematic diagram after bonding a first substrate and a second substrate according to an embodiment of the present application is shown;

[0023] Figure 5 A structure schematic diagram after forming a second groove according to an embodiment of the present application is shown;

[0024] Figure 6 A structure schematic diagram after forming an insulation layer, a barrier layer and a metal layer according to an embodiment of the present application is shown;

[0025] Figure 7 A structure schematic diagram after removing part of the second substrate according to an embodiment of the present application is shown;

[0026] Figure 8 A structure schematic diagram after forming a metal connecting structure according to an embodiment of the present application is shown;

[0027] Figure 9 A structure schematic diagram after forming a potting port according to an embodiment of the present application is shown;

[0028] Figure 10 A structure schematic diagram after pouring a metal liquid according to an embodiment of the present application is shown;

[0029] Figure 11 A structure schematic diagram of an embedded heat dissipation structure according to an embodiment of the present application is shown;

[0030] Figure 12 A flow schematic diagram of a preparation method of an embedded heat dissipation structure according to an embodiment of the present application is shown;

[0031] Figure 13 A schematic diagram of an interface surface state of a liquid metal under different coverages according to an embodiment of the present application is shown;

[0032] Figure 14 A schematic diagram of a movement situation of a liquid metal per unit time under different coverages according to an embodiment of the present application is shown;

[0033] Figure 15 A schematic diagram of a relationship between different coverages of a liquid metal and a resistance ratio according to an embodiment of the present application is shown;

[0034] Figure 16 A structure schematic diagram of an application of an embedded heat dissipation structure according to an embodiment of the present application is shown;

[0035] Figure 17 A structural diagram of a first substrate and micropillars according to an embodiment of the present application is shown.

[0036] In the above drawings, reference numerals:

[0037] 10, substrate; 20, micropillar; 30, metal liquid; 40, first groove; 50, second groove; 60, insulating layer; 70, barrier layer; 80, metal layer; 90, potting hole; 100, adhesive; 101, first substrate; 102, second substrate; 103, preliminary substrate; 110, metal connecting structure. DETAILED DESCRIPTION

[0038] It should be noted that the following detailed description is exemplary in nature and is intended to provide further description of the application. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

[0039] It is to be understood that the phraseology or terminology herein is for the purpose of description and not of limitation. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. Additionally, it is to be understood that the term "comprising" or "including" when used in this specification, specifies the presence of stated features, steps, operations, devices, components, and / or combinations thereof, but do not preclude the presence or addition of one or more other features, steps, operations, devices, components, and / or combinations thereof.

[0040] It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements can also be present. In addition, it will be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element, or intervening elements can also be present.

[0041] As introduced in the background section, the high heat dissipation requirement caused by the ultra-high density transistors in the chip is difficult to meet in the prior art. To solve the above problem, embodiments of the present application provide an embedded heat dissipation structure and a preparation method thereof.

[0042] The technical solutions in the embodiments of the present application will be clearly and completely described in connection with the drawings in the embodiments of the present application.

[0043] According to the embodiments of the present application, an embedded heat dissipation structure is provided, as shown in Figure 11As shown, the embedded heat dissipation structure includes a substrate 10, a plurality of micropillars 20, and a metal liquid 30. The substrate 10 includes a first substrate 101 and a second substrate 102, which enclose a cavity. The plurality of micropillars 20 are distributed in the cavity of the substrate 10, and at least part of the micropillars 20 are in contact with the first substrate 101. The metal liquid 30 is located in the cavity and is in contact with the substrate 10 and the micropillars 20.

[0044] The embedded heat dissipation structure includes a substrate, a plurality of micropillars, and a metal liquid. The substrate includes a first substrate and a second substrate, which enclose a cavity. The plurality of micropillars are distributed in the cavity of the substrate, and at least part of the micropillars are in contact with the first substrate. The metal liquid is located in the cavity and is in contact with the substrate and the micropillars. Compared with the problem that the high-efficiency heat dissipation demand caused by the ultra-high-density transistors in the chip is difficult to meet in the prior art, the embedded heat dissipation structure includes the substrate, the plurality of micropillars, and the metal liquid, so that heat dissipation can be achieved through the flow of the metal liquid. Because the micropillars are distributed in the cavity, the kinematic viscosity of the metal liquid and the substrate is small during the flow of the metal liquid, thereby ensuring that the resistance of the metal liquid during the flow is small, the speed of the metal liquid is large, and the heat dissipation effect of the embedded heat dissipation structure is good, thereby solving the problem that the high-efficiency heat dissipation demand caused by the ultra-high-density transistors in the chip is difficult to meet in the prior art.

[0045] During the implementation process, the micropillars are imitated from the lotus leaf structure in nature, that is, a sparse array composed of a large number of micrometer synaptic structures on the surface.

[0046] During the implementation process, the coverage of the micropillars on the surface of the first substrate is 6%-14%. Because the coverage of the micropillars on the surface of the first substrate is 6%-14%, the dynamic viscosity of the liquid metal can be significantly reduced in this range, thereby enhancing the fluidity of the liquid metal to improve the overall heat dissipation performance, and further ensuring that the heat dissipation effect of the embedded heat dissipation structure is good.

[0047] During the implementation process, the coverage of the micropillars on the surface of the first substrate is preferably 8.5%. Of course, in actual application, micropillars with different coverages can be prepared, and the optimal coverage can be obtained through experimental testing.

[0048] In order to further ensure that the heat dissipation effect of the embedded heat dissipation structure is good, the material of the micropillar includes gallium nitride, the material of the substrate includes silicon, and the material of the metal liquid includes gallium. Since the material of the micropillar includes gallium nitride and the material of the metal liquid includes gallium, that is, the gallium in the liquid is used as the flowing metal. Due to the excellent physicochemical properties of gallium, such as high thermal conductivity (50.75 W / (m·K)), high boiling point (2403℃), low melting point (15.5℃), low thermal expansion coefficient (<7.5×10 -5 PPM% at -65-350℃), diamagnetism (-21.6×10 -6 cm 3 / mol at 290K), the heat dissipation effect of the embedded heat dissipation structure is further ensured to be good.

[0049] In the implementation process, the heat dissipation performance of the embedded heat dissipation structure is mainly affected by the properties of the heat transfer working medium itself and the speed of the heat transfer working medium in the embedded cavity. In the passive heat dissipation structure, the driving force for the movement of the heat transfer working medium in the embedded cavity is mainly the Marangoni effect, that is, the surface tension difference of the liquid metal caused by the temperature difference of the solid surface drives the flow of the liquid metal. However, if the micropillar is not provided, the high viscosity of the gallium liquid metal on the silicon interface hinders the improvement of the speed, thereby weakening the overall heat dissipation capacity, resulting in the low heat dissipation efficiency of the current liquid metal planar heat pipe passive heat dissipation structure. By providing the micropillar, the resistance of the gallium liquid metal during movement is reduced, and the heat dissipation effect of the embedded heat dissipation structure is further ensured to be good.

[0050] In the prior art, the heat dissipation working medium used in the planar heat pipe type passive embedded liquid cooling scheme mainly has two categories. One category uses common low-boiling-point, low-viscosity substances such as water, ethanol, FC770, etc. as the embedded liquid cooling working medium. Although the related working medium has advantages such as low price and mature properties, the physical properties cannot fully meet the process compatibility test in the engineering actual process (200-400℃), operating environment (-65-150℃), and repair process (100-200℃). In the present application, the liquid metal is gallium. Due to the excellent physicochemical properties of gallium, such as high thermal conductivity (50.75 W / (m·K)), high boiling point (2403℃), low melting point (15.5℃), low thermal expansion coefficient (<7.5×10 -5 PPM% at -65-350℃), diamagnetism (-21.6×10 - 6 cm 3 / mol at 290K), the liquid metal in the present application can meet the process compatibility test in the engineering actual process.

[0051] In the implementation process, the cross-sectional shape of the micropillar along the direction perpendicular to the extending direction includes a square.

[0052] In the implementation process, the micropillar is a square prism.

[0053] Of course, the cross-sectional shape of the micropillar along the direction perpendicular to the extending direction is not limited to a square, and in actual application, micropillars with different cross-sectional shapes can be prepared, and the cross-sectional shape with the optimal heat dissipation capacity can be determined through actual testing and / or theoretical testing.

[0054] In a specific embodiment, the distance between two adjacent micropillars is in the range of 12 microns to 17.83 microns, the length of the micropillar is in the range of 8 microns to 12 microns, and the length of the cavity in the direction of the extension of the micropillar is in the range of 80 microns to 110 microns.

[0055] In the implementation process, the side length of the square corresponding to the micropillar is preferably 2 microns, and the length of the micropillar is preferably 10 microns.

[0056] Of course, the distance between the micropillars, the length of the micropillar, and the length of the cavity in the direction of the extension of the micropillar are not limited to the above ranges, and in actual application, structures with different lengths can be prepared, and the length of the micropillar, the distance, and the height of the cavity with the optimal heat dissipation capacity can be determined through actual testing and / or theoretical testing, wherein the height of the cavity is greater than the length of the micropillar.

[0057] According to the embodiments of the present application, a preparation method of an embedded heat dissipation structure is provided.

[0058] Figure 12 is a flowchart of the preparation method of the embedded heat dissipation structure according to the embodiments of the present application. As shown in Figure 12 , the method comprises the following steps:

[0059] Step S1201, as shown in Figure 1 , a first substrate 101 and a preparation substrate 103 are provided;

[0060] Specifically, the materials of the first substrate and the preparation substrate both include silicon, and the first substrate and the preparation substrate need to be double-side polished silicon wafers, and sequentially undergo standard organic cleaning, acetone ultrasonic, isopropyl alcohol ultrasonic, deionized water ultrasonic, and nitrogen blowing dry processes.

[0061] Step S1202, as shown in Figure 2 , a plurality of micropillars 20 are formed on the surface of the first substrate 101 in a spaced distribution;

[0062] Specifically, the coverage of the micropillars on the first substrate surface is in the range of 6%-14%, preferably 8.5%, and the material of the micropillars includes gallium nitride.

[0063] Step S1203, as shown in the figure, part of the preliminary substrate 103 is removed to form the first trench 40, and the remaining preliminary substrate 103 forms the second substrate 102. Figures 1 to 3

[0064] Specifically, by removing part of the preliminary substrate, not only the first trench is formed, but also a plurality of silicon pillars arranged at intervals are formed in the trench. The second trench is formed by removing part of the silicon pillars in the second substrate, that is, the insulating layer, the barrier layer and the metal layer are all located in the second trench in the silicon pillars. The thickness of the preliminary substrate includes 350 microns, the first trench is formed by deep reactive ion etching, and the depth of the first trench includes 100 microns. Of course, the specific thickness is not limited, and is determined according to the actual situation.

[0065] Step S1204, as shown in the figure, the first substrate 101 and the second substrate 102 are bonded, so that the first trench 40 and the first substrate 101 form a cavity, the micropillar 20 is located in the cavity, and the first substrate 101 and the second substrate 102 constitute the substrate 10. Figures 2 to 4

[0066] Specifically, by bonding the first substrate and the second substrate, the silicon pillars in the second substrate are in contact with the first substrate, that is, there are a plurality of silicon pillars arranged at intervals between the first substrate and the bottom of the second substrate.

[0067] Step S1205, metal liquid is poured into the cavity, and the metal liquid is in contact with the substrate and the micropillar respectively.

[0068] Specifically, the metal liquid includes gallium.

[0069] ​​The preparation method of the embedded heat dissipation structure comprises the following steps: first, providing a first substrate and a preliminary substrate; then, forming a plurality of micron columns in spaced distribution on the surface of the first substrate; then, removing part of the preliminary substrate to form a first groove, and the remaining preliminary substrate forms a second substrate; then, bonding the first substrate and the second substrate, so that the first groove and the first substrate form a cavity, the micron columns are located in the cavity, and the first substrate and the second substrate constitute a base; finally, pouring a metal liquid into the cavity, and the metal liquid is in contact with the base and the micron columns respectively. Compared with the problem that the high-efficiency heat dissipation demand of the ultra-high-density transistors in the chip is difficult to meet in the prior art, the preparation method of the embedded heat dissipation structure can realize the heat dissipation function through the flow of the metal liquid, because the cavity has the micron columns in spaced distribution, the kinematic viscosity of the metal liquid and the base is small during the flow of the metal liquid, thereby ensuring that the resistance of the metal liquid during the flow is small, the speed of the metal liquid is large, and the heat dissipation effect of the embedded heat dissipation structure is good, and the problem that the high-efficiency heat dissipation demand of the ultra-high-density transistors in the chip is difficult to meet in the prior art is solved.

[0070] In order to further ensure that the heat dissipation effect of the embedded heat dissipation structure is good, at least a plurality of micron columns in spaced distribution are formed on part of the surface of the first substrate, which comprises the following steps: forming a semiconductor layer on the surface of the first substrate; and removing part of the semiconductor layer to form a plurality of micron columns in spaced distribution. By forming the semiconductor layer on the surface of the first substrate, and then removing part of the semiconductor layer, the remaining semiconductor layer forms a plurality of micron columns in spaced distribution, that is, by controlling the coverage of the micron columns on the surface of the first substrate, the resistance of the metal liquid during the flow is minimized, thereby further ensuring that the heat dissipation effect of the embedded heat dissipation structure is good.

[0071] In the implementation process, the semiconductor layer is formed by molecular beam epitaxy and chemical vapor deposition, and the thickness of the semiconductor layer is 10 microns. Of course, the specific thickness is not limited, and is determined according to the actual situation. The part of the semiconductor layer is removed by a patterned photoresist plate arranged by gallium nitride columns, and is processed to form. First, spin coating is used, then photoetching is performed using a photoetching machine to form a heterogeneous pattern interface, and a plurality of spaced micropillars are obtained. In addition, a plurality of micropillars can be formed outside the first substrate. The specific implementation can be determined according to the actual situation.

[0072] In a specific embodiment, after the first substrate and the second substrate are bonded, the method further includes: using a chemical mechanical polishing process to process the surface of the first substrate away from the micropillar, so that the thickness of the processed first substrate is within a predetermined range. Part of the first substrate is removed by a chemical mechanical mask process, so that the thickness of the remaining first substrate is small, and the remaining first substrate meets the thickness requirement of subsequent formation of a TSV (Through Silicon Via).

[0073] In the implementation process, the thickness of the first substrate after the chemical mechanical mask process is 50 microns. Of course, the specific thickness is not limited, and is determined according to the actual situation.

[0074] In the implementation process, before the metal liquid is poured into the cavity, the method further includes: as shown in Figure 4 and Figure 5 As shown, part of the first substrate 101 and part of the second substrate 102 are removed to form a plurality of second grooves 50 arranged at intervals, and the second grooves 50 expose part of the second substrate 102; as shown in Figures 5 to 6 As shown, a laminated insulating layer 60, a barrier layer 70 and a metal layer 80 are formed in the second groove 50 to obtain a through silicon via, and the insulating layer 60 covers the surface of the second groove 50; as shown in Figures 6 to 7As shown, part of the second substrate 102 is removed, and the remaining thickness of the second substrate 102 is about 150 microns, and the specific thickness is not limited, and is determined according to the actual situation, so that the through silicon via is exposed. By removing part of the first substrate and part of the second substrate, that is, by removing part of the silicon column between the first substrate and the second substrate, a plurality of second grooves are formed, the second grooves expose part of the silicon column, and by forming the laminated insulating layer, barrier layer and metal layer in the second groove, the metal layer and the silicon in the second substrate can be isolated by the insulating layer, the direct current leakage of the metal layer is prevented, the static consumption is reduced, the barrier layer can further prevent the metal in the metal layer from entering the second substrate, and the barrier layer can also improve the adhesion between the metal layer and the insulating layer. The connection is realized through the metal layer, and the embedded heat dissipation structure can realize connection with other structures.

[0075] Of course, the embedded heat dissipation structure is not limited to TSV, and can also be applied to other structures.

[0076] In the implementation process, the material of the insulating layer includes silicon dioxide, the material of the barrier layer includes titanium or titanium nitride, and the material of the metal layer includes copper. Of course, the materials of the insulating layer, the barrier layer and the metal layer can also be other materials with the same performance according to the actual situation.

[0077] In addition, after part of the second substrate is removed, before the metal liquid is poured into the cavity, the method further includes: Figures 7 to 8 As shown, the metal connection structure 110 is formed, the metal connection structure 110 is located at both ends of the through silicon via, and the metal connection structure 110 covers part of the surface of the first substrate 101 and the second substrate 102, that is, the RDL (Re Distribution Layer, redistribution layer) process.

[0078] In order to further ensure that the embedded heat dissipation structure has good heat dissipation effect, the metal liquid is poured into the cavity, including: Figures 8 to 9 As shown, part of the first substrate 101 and part of the micron column 20 are removed to form a pouring hole 90, and the pouring hole 90 exposes the cavity; as shown, Figures 9 to 10 As shown, under a predetermined gas atmosphere, including nitrogen, of course, other gases can also be selected, the metal liquid 30 is poured into the cavity through the pouring hole 90; as shown, Figures 10 to 11The adhesion 100 is filled in the filling hole 90. The filling hole is formed by removing part of the first substrate and part of the micropillar, so that the metal liquid can be filled into the cavity through the filling hole, and the filling process is carried out in the predetermined gas atmosphere, so that the predetermined gas exists between the metal liquid and the substrate, further ensuring that the flow resistance of the metal liquid is small, and further ensuring that the embedded heat dissipation structure has good heat dissipation effect.

[0079] In the implementation process, the adhesion includes a high-temperature ceramic adhesive, which ensures firm connection between the liquid metal and the TSV adapter plate. Then, the ceramic adhesive is completely cured by curing at a temperature of 200 degrees Celsius, thereby ensuring stable connection and packaging effect. Specifically, since the cavities around the TSV are connected, the metal liquid can be filled into the entire cavity through one filling hole. Therefore, the number of filling holes can be one or multiple, which is determined according to actual conditions.

[0080] In addition, the embedded heat dissipation structure not only exposes the nanoscale silicon surface, but also binds part of the nitrogen gas used in the filling planar heat pipe in the structural gap. It can ensure that the liquid metal obtains sufficient heat energy from the micropillar surface with high wettability, and can also maintain the drag reduction effect of the low wettability gap, thereby achieving excellent heterogeneous interface super-wetting heat sliding effect. In addition, the preparation process of the embedded heat dissipation structure is mature and simple, and can be easily integrated into existing micro-nano processing technology, so it has a wide range of applications.

[0081] Embodiment

[0082] The following will be combined with Figures 13 to 16 The confirmation process of the optimal coverage rate of the liquid metal will be described.

[0083] Figure 13 To illustrate the schematic diagram of the state of the liquid on the interface surface, Figs. (a) and (b) respectively show the contact between the liquid drop and the interface in uniform wetting and non-uniform wetting. As can be seen from the figures, in non-uniform wetting, the contact area between the liquid drop and the interface is smaller, and it can be intuitively inferred that the sliding resistance of the liquid drop is lower at this time, which provides a direction for further calculation. Figure 14 Based on the many-body dissipative particle dynamics model, the movement effect diagram of a liquid drop with a certain initial speed in a unit of time under different roughness (i.e. the proportion of gallium nitride column to total area) is obtained by LAMMPS (Large-scale Atomic Molecular Massively Parallel Simulator). From top to bottom, the proportion of gallium nitride column to total area is 0%, 2.5%, 8.5%, and 100%, respectively. FromFigure 14 As can be seen from the figure, when the proportion of the gallium nitride column in the total area is 8.5%, the liquid drop moves the farthest, and it is indicated that the sliding resistance of the interface is the smallest; Figure 15 As can be seen from the figure, when the proportion of the gallium nitride column in the total area is 8.5%, the liquid drop moves the farthest, and it is indicated that the sliding resistance of the interface is the smallest; Figure 16 FIG. 1 is a schematic diagram of a chip adapter structure to which the embedded heat dissipation structure is applied.

[0084] First, in order to better illustrate the principle of how the application realizes the drag reduction gain, we first need to know that on the nanostructure surface, the wettability of the liquid drop can present one of the two states: uniform wetting or non-uniform wetting, and the specific forms are as shown in Figure 13 FIG. 1 is a schematic diagram of a chip adapter structure to which the embedded heat dissipation structure is applied. Figure 13 As can be seen from the figure, when the proportion of the gallium nitride column in the total area is 8.5%, the liquid drop moves the farthest, and it is indicated that the sliding resistance of the interface is the smallest; Figure 13 As can be seen from the figure, when the proportion of the gallium nitride column in the total area is 8.5%, the liquid drop moves the farthest, and it is indicated that the sliding resistance of the interface is the smallest; W cosθ Y , θ Y is the Young contact angle of the liquid drop Ga on the smooth surface, and r is the roughness ratio, which is the ratio of the actual area of the solid surface to the projected area. As can be seen from the Wenzel equation, if the surface is non-wetting (θ Y > 90°), the roughness (r > 1) will make the contact angle θ W greater than the Young contact angle θ Y . If the surface is wetting (θ Y < 90°), the roughness (r > 1) will make the contact angle θ W less than the Young contact angle θ Y . For the liquid drop in the Cassie state, the contact angle is given by the Cassie-Baxter equation: cosθ CB = r f cosθ Y + f-1#(3-10), where f is the wetting part of the projected area, and r fIt is the roughness ratio of the wetted area;

[0085] Then, as Figure 14 As shown, with the liquid metal being Ga, the micropillars being GaN, and the first substrate being Si, to further investigate the influence of interface roughness on droplet sliding resistance and find the optimal proportion of the heterointerface to the total area (i.e., determining the optimal coverage of the micropillars GaN on the first substrate) to maximize the sliding distance of the liquid Ga, we simulated the sliding of Ga liquid droplets on the first substrate (silicon) and on the micropillars GaN layers with different surface roughness nanostructures using a mesoscopic MDPD (Multi-particle Dissipative Particle Dynamics) model. We compared the sliding resistance of the micropillars GaN layers with different roughness nanostructures on the liquid Ga droplets. The simulation results are as follows: Figure 14 as well as Figure 15 As shown. Figure 14 (a) illustrates the case where the aforementioned micron-pillar gallium nitride is not provided. Additionally, when the coverage of the aforementioned micron-pillar gallium nitride in the epitaxial nanostructure is less than 2.5%, such as... Figure 14 (b) shows the sliding state of the aforementioned liquid gallium droplet on a surface with a gallium nitride (GaN) coverage density of 2.25% in the nanostructure. The liquid gallium droplet in the low-roughness solid-liquid interface is in the Wenzel state. In this state, the liquid gallium droplet has a large contact area with the silicon surface, making it impossible to achieve a drag reduction effect. When the GaN coverage density of the epitaxial nanostructure is higher than 2.5%, the sliding state of the liquid gallium droplet at the solid-liquid interface is always in the Cassie state. When the GaN coverage density of the nanostructure is between 6% and 14%, such as... Figure 14 (c) shows the sliding state of the aforementioned liquid gallium droplet on a surface with an 8.5% nanostructure of gallium nitride micropillars, in a super-immersion sliding region, where the sliding resistance can be reduced to 20% of that on a silicon surface. When the gallium nitride coverage density of the epitaxial nanostructure is even higher, its interface is close to that of a pure gallium nitride surface. The high wettability of the aforementioned gallium nitride micropillars to the aforementioned liquid gallium results in a sliding resistance that is 3.5 times greater than that on a silicon surface. Figure 14 (d), such as Figure 14 As can be seen from (a), (b), (c) and (d), (c) corresponds to the farthest distance of the above-mentioned liquid metal covered by 8.5%, that is, the least resistance. Therefore, the optimal coverage of the above-mentioned micron pillars on the above-mentioned first substrate is 8.5%.

[0086] After that, as Figure 15As shown, in the case that the above-mentioned metal liquid is Ga, the above-mentioned micropillar is GaN and the above-mentioned first substrate is Si, the ordinate To further verify the effectiveness of the microcosmic simulation results from a macroscopic perspective, the nanostructure gallium nitride hetero-interface slip resistance under the non-uniform wetting Cassie state obtained by the mesoscopic super-wetting MDPD model simulation can be converted into the motion viscosity coefficient of the gallium droplet when the gallium droplet slides on the medium-roughness silicon substrate. Further, in the constructed macroscopic hetero-interface super-wetting thermal slip FEM model, when the gallium droplet is in a 20℃ / mm thermal gradient environment, the thermal slip steady-state speed of the gallium droplet on the gallium nitride, silicon and medium-roughness nanostructure gallium nitride surfaces is 0.008m / s, 0.15m / s and 1.8m / s respectively. In summary, when the proportion of the gallium nitride hetero-interface in the total area is 6%-14%, the slip resistance of the liquid metal on the interface can be effectively reduced, the highest speed under the Marangoni effect driving can be improved, and the overall heat transfer capacity can be enhanced;

[0087] Finally, the schematic diagram of the passive heat dissipation structure using the hetero-interface is shown in Figure 16 As shown, a high-performance CPU chip embedded cavity adapter plate is taken as an example. Figure 16 The left diagram is a structural schematic diagram of the hetero-interface in the embedded liquid cooling heat dissipation structure, including a TSV part, a CPU chip, a RAM chip, the above-mentioned first substrate 101 and a plurality of the above-mentioned micropillars 20. The enlarged view of the above-mentioned first substrate 101 and the plurality of the above-mentioned micropillars 20 is shown in the right diagram. The area is composed of a silicon substrate (the above-mentioned first substrate 101) and a gallium nitride column array (the plurality of the above-mentioned micropillars 20). The proportion of the gallium nitride column array in the total area of the silicon substrate in the schematic diagram is 8.5%.

[0088] In addition, Figure 17 A structural schematic diagram of the above-mentioned first substrate and the plurality of the above-mentioned micropillars is shown in Figure 17 As can be seen, the plurality of the above-mentioned micropillars 20 are arranged in an array on the surface of the above-mentioned first substrate 101. Of course, the plurality of the above-mentioned micropillars are not limited to being arranged in an array, and the distance between any two adjacent above-mentioned micropillars can be different, and the shapes of different above-mentioned micropillars can also be different.

[0089] In the above-mentioned embodiments of the present application, the description of each embodiment has its own focus, and the parts not described in detail in a certain embodiment can be referred to the related description of other embodiments.

[0090] From the above description, it can be seen that the above-mentioned embodiments of the present application achieve the following technical effects:

[0091] 1) The embedded heat dissipation structure of the present application comprises a substrate, a plurality of micron columns and a metal liquid. The substrate comprises a first substrate and a second substrate, which enclose a cavity. The micron columns are distributed in the cavity of the substrate, and at least part of the micron columns are in contact with the first substrate at one end. The metal liquid is located in the cavity and is in contact with the substrate and the micron columns. Compared with the problem that the high heat dissipation demand of the ultra-high density transistors in the chip is difficult to meet in the prior art, the embedded heat dissipation structure of the present application comprises the substrate, the plurality of micron columns and the metal liquid, so that the heat dissipation function can be realized by the flow of the metal liquid. Since the micron columns are distributed in the cavity, the kinematic viscosity of the metal liquid and the substrate is small during the flow of the metal liquid, thereby ensuring that the resistance of the metal liquid during the flow is small, ensuring that the speed of the metal liquid is large. Since the heat dissipation capacity is positively correlated with the speed of the metal liquid, the heat dissipation effect of the embedded heat dissipation structure is good, solving the problem that the high heat dissipation demand of the ultra-high density transistors in the chip is difficult to meet in the prior art.

[0092] 2) The preparation method of the above-mentioned embedded heat dissipation structure of the present application, first, a first substrate and a preliminary substrate are provided; then, a plurality of micron columns are formed on the surface of the first substrate in a spaced distribution; then, part of the preliminary substrate is removed to form a first groove, and the remaining preliminary substrate forms a second substrate; then, the first substrate and the second substrate are bonded, so that the first groove and the first substrate form a cavity, the micron columns are located in the cavity, and the first substrate and the second substrate constitute a base; finally, a metal liquid is poured into the cavity, and the metal liquid is in contact with the base and the micron columns, respectively. Compared with the problem that the high-efficiency heat dissipation demand of the ultra-high-density transistors in the chip of the prior art is difficult to meet, the preparation method of the above-mentioned embedded heat dissipation structure of the present application first forms the first substrate and a plurality of micron columns arranged in a spaced distribution on part of the surface of the first substrate, then forms the second substrate with a groove, and forms a cavity by bonding, and the micron columns are located in the cavity, and finally pours a metal liquid into the cavity, so that the heat dissipation function can be realized by the flow of the metal liquid. Since the cavity has a plurality of micron columns arranged in a spaced distribution, the kinematic viscosity of the metal liquid and the base is small during the flow of the metal liquid, thereby ensuring that the resistance of the metal liquid during the flow is small, and ensuring that the speed of the metal liquid is large. Since the heat dissipation capacity is positively correlated with the movement speed of the metal liquid, the heat dissipation effect of the embedded heat dissipation structure is good, and the problem that the high-efficiency heat dissipation demand of the ultra-high-density transistors in the chip of the prior art is difficult to meet is solved.

[0093] The above only describes the preferred embodiments of the present application and is not intended to limit the present application. Those skilled in the art can make various modifications and changes to the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. An embedded heat dissipation structure, characterized in that, The embedded heat dissipation structure includes: The substrate includes a first substrate and a second substrate, wherein the first substrate and the second substrate enclose a cavity; Multiple micropillars are spaced apart within the cavity of the substrate, and at least one end of each micropillar is in contact with the first substrate. A liquid metal is located within the cavity, and the liquid metal is in contact with both the substrate and the micropillars. The material of the micropillar includes gallium nitride, the material of the substrate includes silicon, and the material of the liquid metal includes gallium.

2. The embedded heat dissipation structure according to claim 1, characterized in that, The coverage of the micropillars on the surface of the first substrate ranges from 6% to 14%.

3. The embedded heat dissipation structure according to claim 1, characterized in that, The cross-sectional shape of the micropillar perpendicular to its extension direction includes a regular quadrilateral.

4. The embedded heat dissipation structure according to claim 1, characterized in that, The distance between two adjacent micropillars ranges from 12 micrometers to 17.83 micrometers, the length of the micropillars ranges from 8 micrometers to 12 micrometers, and the length of the cavity in the extension direction of the micropillars ranges from 80 micrometers to 110 micrometers.

5. A method for fabricating an embedded heat dissipation structure, characterized in that, The method includes: Provide a first substrate and a pre-substrate; At least a plurality of spaced micropillars are formed on a portion of the surface of the first substrate; A portion of the prepared substrate is removed to form a first trench, and the remaining prepared substrate forms a second substrate; The first substrate and the second substrate are bonded together such that the first trench and the first substrate form a cavity, the micropillar is located in the cavity, and the first substrate and the second substrate constitute a substrate; Liquid metal is poured into the cavity, and the liquid metal contacts both the substrate and the micropillar.

6. The method according to claim 5, characterized in that, At least a plurality of spaced-apart micropillars are formed on a portion of the surface of the first substrate, including: A semiconductor layer is formed on the surface of the first substrate; A portion of the semiconductor layer is removed to form a plurality of spaced-apart micropillars.

7. The method according to claim 5, characterized in that, After bonding the first substrate and the second substrate, the method further includes: The surface of the first substrate away from the micron pillars is treated using a chemical mechanical polishing process, such that the thickness of the first substrate after treatment is within a predetermined range.

8. The method according to claim 5, characterized in that, Before filling the cavity with molten metal, the method further includes: A portion of the first substrate and a portion of the second substrate are removed to form a plurality of spaced second trenches, the second trenches exposing a portion of the second substrate. A stacked insulating layer, barrier layer, and metal layer are formed in the second trench to obtain a through-silicon via, wherein the insulating layer covers the surface of the second trench. Remove a portion of the second substrate to expose the through-silicon via.

9. The method according to claim 5, characterized in that, Filling the cavity with molten metal includes: A portion of the first substrate and a portion of the micron pillars are removed to form a filling hole, which exposes the cavity. Under a predetermined gas atmosphere, the molten metal is injected into the cavity through the filling hole; The potting hole is filled with adhesive.

Citation Information

Patent Citations

  • Gallium nitride power device with on-chip array micro-flow column heat dissipation structure, and manufacturing method thereof

    CN113594111A