A switch tube driving circuit and energy storage device

Abstract

The present application provides a switch tube driving circuit and energy storage device for driving a buck-boost circuit, including: a logic module, a first output module and a second output module; the logic module is connected to the first output module and the second output module respectively, the first output module is also connected to the buck bridge arm of the buck-boost circuit, and the second output module is also connected to the boost bridge arm of the buck-boost circuit; the logic module is configured to receive a driving signal and a buck-boost switching signal, and to switch between the buck-boost and buck-boost signals. By using a switch tube driving circuit to drive the buck-boost circuit, there is no need to set a driving software logic for each switch tube separately, which can make the structure of the driving circuit simpler and reduce the cost of the driving circuit.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of electronic power technology, and in particular to a switch tube drive circuit and an energy storage device. Background Art

[0002] At present, new energy products that use clean energy such as solar energy or wind energy are developing rapidly. For example, energy storage products developed in combination with lithium battery technology usually require a step-up or step-down circuit for voltage conversion because the input voltage is usually lower or higher than the lithium battery system voltage.

[0003] However, in the buck-boost circuit, it is usually necessary to equip the input / output (I / O) ports that match the number of power switch tubes, so that the independent I / O ports output the corresponding drive signals to the corresponding power switch tubes. This method requires software resources to process complex control logic, resulting in increased circuit costs. Summary of the invention

[0004] The embodiments of the present application provide a switch tube driving circuit and an energy storage device, which can drive a buck-boost circuit based on a driving signal, reduce software resources, and lower costs.

[0005] In a first aspect, an embodiment of the present application provides a switch tube driving circuit for driving a buck-boost circuit, comprising: a logic module, a first output module and a second output module; the logic module is connected to the first output module and the second output module respectively, the first output module is also connected to the first driving module of the buck bridge arm of the buck-boost circuit, and the second output module is also connected to the second driving module of the boost bridge arm of the buck-boost circuit; the logic module is configured to receive a driving signal and a buck-boost switching signal, and when the buck-boost switching signal is a buck switching signal, output the driving signal to the first output module, and output the control signal to the second output module, so that the buck-boost circuit operates in a buck mode; when the buck-boost switching signal is a boost switching signal, output the driving signal to the second output module, and output the control signal to the first output module, so that the buck-boost circuit operates in a boost mode.

[0006] In some embodiments, the logic module includes a first logic unit and a second logic unit; the first logic unit is connected to the first output module, and the second logic unit is connected to the second output module; the first logic unit is configured to output the drive signal to the first output module in response to the step-down switching signal, and to output the control signal to the first output module in response to the step-down switching signal; the second logic unit is configured to output the control signal to the second output module in response to the step-down switching signal, and to output the drive signal to the second output module in response to the step-down switching signal.

[0007] In some embodiments, the first logic unit includes a first AND gate, a first OR gate and a first NOT gate; the first input end of the first AND gate and the input end of the first NOT gate are both used to receive the buck-boost switching signal, the second input end of the first AND gate is used to receive the drive signal, the output end of the first AND gate is connected to the first input end of the first OR gate, the second input end of the first OR gate is connected to the output end of the first NOT gate, and the output end of the first OR gate is connected to the first output module.

[0008] In some embodiments, the second logic unit includes a second NOT gate, a second OR gate and a second AND gate; the input end of the second NOT gate and the first input end of the second OR gate are both used to receive the buck-boost switching signal, the output end of the second NOT gate is connected to the first input end of the second AND gate, the second input end of the second AND gate is used to receive the drive signal, the output end of the second AND gate is connected to the second input end of the second OR gate, and the output end of the second OR gate is connected to the second output module.

[0009] In some embodiments, the first output module includes a first output unit and a second output unit, the second output module includes a third output unit and a fourth output unit, the buck bridge arm includes a buck upper tube and a buck lower tube, the first driver module includes a first driver submodule of the buck upper tube and a second driver submodule of the buck lower tube, the boost bridge arm includes a boost upper tube and a boost lower tube, the second driver module includes a third driver submodule of the boost upper tube and a fourth driver submodule of the boost lower tube; the first output end of the logic module is connected to the first output unit and the second output unit respectively, the second output end of the logic module is connected to the third output unit and the fourth output unit respectively, the first output unit is also connected to the first driver submodule, the second output unit is also connected to the second driver submodule, the third output unit is also connected to the third driver submodule, and the fourth output unit is also connected to the fourth driver submodule; when the buck-boost switching signal is a buck switching signal, the first output unit is configured to output a first pulse width modulation signal to the first driver submodule based on the drive signal, so that the buck upper tube is periodically turned on and off, and the second output unit is configured The first output unit is configured to output a second pulse width modulation signal to the second driver submodule based on the driving signal, so that the buck lower tube is periodically turned on and off, wherein the buck upper tube and the buck lower tube are turned on at different times; the third output unit is configured to output a first level signal to the third driver submodule based on the control signal, so that the boost upper tube is turned on, and the fourth output unit is configured to output a second level signal to the fourth driver submodule based on the control signal, so that the boost lower tube is turned off; when the buck-boost switching signal is a boost switching signal, the first output unit is configured to output a first level signal to the third driver submodule based on the control signal, so that the boost upper tube is turned on, and the fourth output unit is configured to output a second level signal to the fourth driver submodule based on the control signal, so that the boost lower tube is turned off; when the buck-boost switching signal is a boost switching signal, the first output unit is configured to output a The third level signal is sent to the first driver submodule to turn on the buck upper tube. The second output unit is configured to output a fourth level signal to the second driver submodule based on the control signal to turn off the buck lower tube. The third output unit is configured to output a third pulse width modulation signal to the third driver submodule based on the drive signal to turn on and off the boost upper tube periodically. The fourth output unit is configured to output a fourth pulse width modulation signal to the fourth driver submodule based on the drive signal to turn on and off the boost lower tube periodically. The boost upper tube and the boost lower tube are turned on at different times.

[0010] In some embodiments, the first output module is further configured to adjust the duty cycle of the first pulse width modulation signal through the first output unit and adjust the duty cycle of the second pulse width modulation signal through the second output unit, so that the buck upper tube is turned on by delaying the first dead time after the buck lower tube is turned off, and the buck lower tube is turned on by delaying the first dead time after the buck upper tube is turned off; the second output module is further configured to adjust the duty cycle of the third pulse width modulation signal through the third output unit and adjust the duty cycle of the second pulse width modulation signal through the fourth output unit, so that the boost upper tube is turned on by delaying the second dead time after the boost lower tube is turned off, and the boost lower tube is turned on by delaying the second dead time after the boost upper tube is turned off.

[0011] In some embodiments, the first output unit includes a first resistor, a first capacitor and a first diode, the second output unit includes a third NOT gate, a second resistor, a second capacitor and a second diode, the third output unit includes a third resistor, a third capacitor and a third diode, and the fourth output unit includes a fourth NOT gate, a fourth resistor, a fourth capacitor and a fourth diode; the first end of the first resistor is respectively connected to the first output end of the logic module and the cathode of the first diode, the second end of the first resistor is respectively connected to the anode of the first diode, the first end of the first capacitor and the first driving submodule, and the second end of the first capacitor is grounded; the first end of the third NOT gate is connected to the first output end of the logic module, and the second end of the third NOT gate is respectively connected to the first end of the second resistor and the cathode of the second diode , the second end of the second resistor is respectively connected to the anode of the second diode, the first end of the second capacitor and the second driving submodule, and the second end of the second capacitor is grounded; the first end of the third resistor is respectively connected to the second output end of the logic module and the cathode of the third diode, the second end of the third resistor is respectively connected to the anode of the third diode, the first end of the third capacitor and the third driving submodule, and the second end of the third capacitor is grounded; the first end of the fourth NOT gate is connected to the second output end of the logic module, the second end of the fourth NOT gate is respectively connected to the first end of the fourth resistor and the cathode of the fourth diode, the second end of the fourth resistor is respectively connected to the anode of the fourth diode, the first end of the fourth capacitor and the fourth driving submodule, and the second end of the fourth capacitor is grounded.

[0012] In some embodiments, the switch tube driving circuit also includes a comparison module; the comparison module is connected to the third driving submodule; the comparison module is configured to receive a first sampling signal of the output current of the buck-boost circuit, and when the voltage of the first sampling signal is less than the first voltage, output a first shutdown signal to the third driving submodule to shut down the boost upper tube.

[0013] In some embodiments, the switch tube driving circuit also includes an overcurrent protection module; the overcurrent protection module is respectively connected to the first driving module and the second driving module; the overcurrent protection module is configured to receive a second sampling signal of the input current of the buck-boost circuit, and when the voltage of the second sampling signal is greater than the second voltage, output a second shutdown signal to the first driving module and the second driving module to stop the buck-boost circuit from working.

[0014] In a second aspect, an embodiment of the present application further provides an energy storage device, which includes a buck-boost circuit and a switch tube drive circuit as described in any embodiment of the first aspect; the switch tube drive circuit is connected to the buck-boost circuit.

[0015] The beneficial effects of the power switch circuit provided by the embodiment of the present application are as follows: the present application provides a switch tube driving circuit and an energy storage device for driving a buck-boost circuit, characterized in that it includes: a logic module, a first output module and a second output module; the logic module is connected to the first output module and the second output module respectively, the first output module is also connected to the first driving module of the buck bridge arm of the buck-boost circuit, and the second output module is also connected to the second driving module of the boost bridge arm of the buck-boost circuit; the logic module is configured to receive a driving signal and a buck-boost switching signal, and in the buck-boost switching signal. The logic module is configured to receive a driving signal and a buck-boost switching signal, and when the buck-boost switching signal is a buck switching signal, output a driving signal to the first output module, and output a control signal to the second output module, so that the buck-boost circuit works in a buck mode; when the buck-boost switching signal is a boost switching signal, output a driving signal to the second output module, and output a control signal to the first output module, so that the buck-boost circuit works in a boost mode. By using a switch tube driving circuit to drive the buck-boost circuit, there is no need to set up software logic or equip an I / O port for each switch tube in the buck-boost circuit, which can make the structure of the driving circuit simpler and reduce the cost of the driving circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0017] Figure 1 A structural block diagram of a switch tube driving circuit provided in an embodiment of the present application;

[0018] Figure 2 A structural diagram of a buck-boost circuit provided in an embodiment of the present application;

[0019] Figure 3 A structural block diagram of another switch tube driving circuit provided in an embodiment of the present application;

[0020] Figure 4 A structural diagram of a first logic unit provided in an embodiment of the present application;

[0021] Figure 5 A structural diagram of a second logic unit provided in an embodiment of the present application;

[0022] Figure 6 A structural block diagram of another switch tube driving circuit provided in an embodiment of the present application;

[0023] Figure 7 A partial structural diagram of a switch tube driving circuit provided in an embodiment of the present application;

[0024] Figure 8 A structural diagram of a comparison module provided in an embodiment of the present application;

[0025] Fig. 9 A partial structural block diagram of a switch tube driving circuit provided in an embodiment of the present application;

[0026] Fig.10 A partial structural diagram of another switch tube driving circuit provided in an embodiment of the present application;

[0027] Fig.11 A partial structural diagram of another switch tube driving circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0028] In order to facilitate the understanding of the present application, the present application is described in more detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that when an element is described as "fixed to" another element, it can be directly on another element, or there can be one or more centered elements therebetween. When an element is described as "electrically connected" to another element, it can be directly connected to another element, or there can be one or more centered elements therebetween. The orientation or positional relationship indicated by the terms "upper", "lower", "inner", "outer", "bottom", etc. used in this specification is based on the orientation or positional relationship shown in the accompanying drawings, only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", "third", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0029] Unless otherwise defined, all technical and scientific terms used in this specification have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used in this specification includes any and all combinations of one or more related listed items. In addition, the technical features involved in the different embodiments of this application described below can be combined with each other as long as they do not conflict with each other.

[0030] At present, in the buck-boost circuit, the number of I / O ports equipped with input drive signals is equal to the number of switch tubes to be driven. For example, in a four-tube buck-boost circuit, four independent I / O ports are required to output drive signals to drive the four switch tubes to work respectively, which leads to a complex system structure, large size and high cost.

[0031] In order to solve the above technical problems, the embodiments of the present application provide a switch tube driving circuit and an energy storage device. By inputting a driving signal and a buck-boost switching signal into the switch tube driving circuit, a control signal can be provided for the boost bridge arm and the buck bridge arm in the buck-boost circuit. There is no need to set software logic for each switch tube separately, which can simplify the structure of the driving circuit and save the cost of the driving circuit.

[0032] In a first aspect, the present invention provides a switch tube driving circuit for driving a buck-boost circuit 100. Figure 1The switch tube driving circuit 200 includes: a logic module 210, a first output module 220 and a second output module 230. The logic module 210 is connected to the first output module 220 and the second output module 230 respectively, the first output module 220 is also connected to the first driving module 130 of the buck bridge arm 110 of the buck-boost circuit 100, and the second output module 230 is also connected to the second driving module 140 of the boost bridge arm 120 of the buck-boost circuit 100. The logic module 210 is configured to receive the driving signal MCU_PWM and the buck-boost switching signal BUCK-BOOST, and when the buck-boost switching signal BUCK-BOOST is a buck switching signal, output the driving signal MCU_PWM to the first output module 220, and output the control signal to the second output module 230, so that the buck-boost circuit 100 works in the buck mode. When the buck-boost switching signal BUCK-BOOST is a boost switching signal, the driving signal MCU_PWM is output to the second output module 230 , and the control signal is output to the first output module 220 , so that the buck-boost circuit 100 operates in a boost mode.

[0033] A buck-boost circuit is a circuit that can be used to increase or decrease the input voltage. In this application, a four-tube buck-boost circuit is used as an example. Figure 1 and Figure 2The buck-boost circuit includes a buck bridge arm 110, a boost bridge arm 120, a first driving module 130, a second driving module 140 and an inductor L1, wherein the buck bridge arm 110 includes a buck upper tube 111 and a buck lower tube 112, the boost bridge arm 120 includes a boost upper tube 121 and a boost lower tube 122, the first driving module 130 includes a first driving submodule 131 for driving the buck upper tube 111 and a second driving submodule 132 for driving the buck lower tube 112, and the second driving module 140 includes a third driving submodule 141 for driving the boost upper tube 121 and a fourth driving submodule 142 for driving the boost lower tube 122. In the boost mode, the working states of the four tubes are: the buck upper tube 111 is always on, the buck lower tube 112 is always off, and the boost upper tube 121 and the boost lower tube 122 are complementary on and off; in the buck mode, the working states of the four tubes are: the boost upper tube 121 is always on, the boost lower tube 122 is always off, and the buck upper tube 111 and the buck lower tube 112 are complementary on and off. Among them, the buck upper tube 111, the buck lower tube 112, the boost upper tube 121 and the boost lower tube 122 can use the same type of switch tube, for example, they can all be NMOS tubes, which are turned on when receiving the high-level signal output by the corresponding driver module, and turned off when receiving the low-level signal output by the driver module. The first driver module 131, the second driver module 132, the third driver module 141 and the fourth driver module 142 can include electrical isolation elements, such as photoelectric couplers, photoelectric relays, photoelectric field effect tubes, etc. For example, the driver submodule may be turned on when receiving a high level signal and output a high level signal to the corresponding switch tube, and may be turned off when receiving a high level signal and output a low level signal to the corresponding switch tube.

[0034] The logic module 210 means that when receiving a boost switching signal or a buck switching signal, it can output the drive signal MCU_PWM or the control signal to a specific output module according to a preset logic rule, so that the first output module 220 and the second output module 230 output specific signals to the first drive module 130 and the second drive module 140 based on the output signal of the logic module 210, so that the first drive module 130 controls the boost bridge arm 120 to operate in the boost mode or the buck mode, and the second drive module 140 controls the buck bridge arm 110 to operate in the boost mode or the buck mode.

[0035] The driving signal MCU_PWM may be a signal with a specific waveform and frequency, such as a pulse width modulation signal. The driving signal MCU_PWM may be issued by a controller or generated by a waveform generator. The parameters such as the waveform, frequency and duty cycle of the driving signal MCU_PWM may be set according to actual needs and are not limited here.

[0036] The control signal may be a signal having a certain level, such as a high level signal or a low level signal.

[0037] The buck-boost switching signal BUCK-BOOST refers to a signal that can be used to instruct the drive circuit to output different drive signals MCU_PWM to the buck-boost circuit 100, so that the buck-boost circuit 100 is in a boost mode or a buck mode. Among them, the buck-boost switching signal BUCK-BOOST includes a boost switching signal and a buck switching signal. The boost switching signal can be used to instruct the switch tube drive circuit to output a boost drive signal to the buck-boost circuit 100, so that the buck-boost circuit 100 is in a boost mode, and the buck switching signal can be used to instruct the switch tube drive circuit to output a buck drive signal to the buck-boost circuit 100, so that the buck-boost circuit 100 is in a buck mode. The boost switching signal can be a low-level signal, and the buck switching signal can be a high-level signal. In actual applications, the boost switching signal can also be a high-level signal, and the buck switching signal can be a low-level signal. More specifically, the buck-boost switching signal can be output by the buck-boost switching signal output module. As for whether to output the boost switching signal or the buck switching signal, it can be determined according to the relationship between the input voltage and the output voltage of the buck-boost circuit. For example, when the input voltage is greater than the output voltage, the buck-boost switching signal output module outputs a buck-boost switching signal as a buck switching signal; for another example, when the input voltage is less than the output voltage, the buck-boost switching signal output module outputs a buck-boost switching signal as a boost switching signal. In one embodiment, the buck-boost switching signal module can be implemented using a comparator. In another embodiment, the buck-boost switching signal module can implement the buck-boost switching signal output through a controller.

[0038] The first output module 220 refers to a device that can control the first driving module 130 and the second driving module 140 to work after receiving the driving signal MCU_PWM, so that the buck upper tube 111 and the buck lower tube 112 in the buck bridge arm 110 are periodically complementarily turned on and off, that is, the buck upper tube 111 and the buck lower tube 112 will not be turned on at the same time within a complete working cycle, and can control the first driving module 130 and the second driving module 140 to work after receiving the control signal, so that the buck upper tube 111 in the buck bridge arm 110 is continuously turned on and the buck lower tube 112 in the buck bridge arm 110 is controlled to be continuously disconnected.

[0039] The second output module 230 refers to a device that can control the first driving module 130 and the second driving module 140 to work after receiving the driving signal MCU_PWM, so that the boost upper tube 121 and the boost lower tube 122 in the boost bridge arm 120 are periodically complementarily turned on and off, that is, the boost upper tube 121 and the boost lower tube 122 will not be turned on at the same time within a complete working cycle, and can control the first driving module 130 and the second driving module 140 to work after receiving the control signal, so that the boost upper tube 121 in the boost bridge arm 120 is continuously turned on and the boost lower tube 122 in the boost bridge arm 120 is controlled to be continuously disconnected.

[0040] In the switch tube driving circuit 200, when the buck-boost switching signal BUCK-BOOST is a buck switching signal, the logic module 210 will output the driving signal MCU_PWM to the first output module 220, and output the control signal to the second output module 230. The signal output by the first output module 220 through the first driving module 130 will control the buck upper tube 111 and the buck lower tube 112 in the buck bridge arm 110 to be periodically complementary on and off. The signal output by the second output module 230 through the second driving module 140 will control the boost upper tube 121 in the boost bridge arm 120 to be continuously turned on and the boost lower tube 122 in the boost bridge arm 120 to be continuously turned off. That is, the buck-boost circuit 100 Work in buck mode; when the buck-boost switching signal BUCK-BOOST is a boost switching signal, the logic module 210 will output a control signal to the first output module 220, and output a drive signal MCU_PWM to the second output module 230. The signal output by the first output module 220 via the first drive module 130 will control the buck upper tube 111 in the buck bridge arm 110 to be continuously turned on and the buck lower tube 112 in the buck bridge arm 110 to be continuously turned off. The signal output by the second output module 230 via the second drive module 140 will control the boost upper tube 121 and the boost lower tube 122 in the boost bridge arm 120 to be periodically complementary turned on, that is, the buck-boost circuit 100 works in boost mode.

[0041] It can be seen that in this embodiment, the logic module 210 outputs the drive signal MCU_PWM to the first output module 220 or the second output module 230 under the instruction of the buck-boost switching signal BUCK-BOOST, and outputs the control signal to the second output module 230 or the first output module 220. After receiving the corresponding signal, the first output module 220 or the second output module 230 can control the buck bridge arm 110 or the boost bridge arm 120 to work, so that the buck-boost circuit 100 works in the boost mode or the buck mode. Compared with the method of using four drive signals to drive the switch tubes in the buck-boost circuit 100 to work respectively, this embodiment uses one drive signal to drive the four switch tubes in the buck-boost circuit 100 to work, and there is no need to set software logic separately for each switch tube in the buck-boost circuit 100, which can make the structure of the drive circuit simpler and reduce the cost of the drive circuit.

[0042] In some of these embodiments, see Figure 3 , the logic module 210 includes a first logic unit 211 and a second logic unit 212. The first logic unit 211 is connected to the first output module 220, and the second logic unit 212 is connected to the second output module 230. The first logic unit 211 is configured to output a driving signal MCU_PWM to the first output module 220 in response to a step-down switching signal, and to output a control signal to the first output module 220 in response to a step-up switching signal. The second logic unit 212 is configured to output a control signal to the second output module 230 in response to a step-down switching signal, and to output a driving signal MCU_PWM to the second output module 230 in response to a step-up switching signal.

[0043] The first logic unit 211 and the second logic unit 212 simultaneously receive the driving signal MCU_PWM and the buck-boost switching signal BUCK-BOOST. When the buck-boost switching signal BUCK-BOOST is a buck switching signal, the first logic unit 211 will output the driving signal MCU_PWM to the first output module 220, and the second logic unit 212 will output the control signal to the second output module 230. In this way, the first output module 220 and the second output module 230 can control the buck-boost circuit to operate in the buck mode based on the corresponding signal; when the buck-boost switching signal BUCK-BOOST is a boost switching signal, the first logic unit 211 will output the control signal to the first output module 220, and the second logic unit 212 will output the driving signal MCU_PWM to the second output module 230. In this way, the first output module 220 and the second output module 230 can control the buck-boost circuit to operate in the boost mode based on the corresponding signal.

[0044] Compared to the embodiment using one logic unit for processing, in this embodiment, two special logic units are provided to process input signals respectively and output corresponding signals to corresponding output modules, so that when a logic unit fails, it is convenient to repair the logic unit.

[0045] In some of these embodiments, see Figure 4 The first logic unit 211 includes a first AND gate AND1, a first OR gate OR1 and a first NOT gate NOT1. The first input end of the first AND gate AND1 and the input end of the first NOT gate NOT1 are both used to receive the buck-boost switching signal BUCK-BOOST, the second input end of the first AND gate AND1 is used to receive the driving signal MCU_PWM, the output end of the first AND gate AND1 is connected to the first input end of the first OR gate OR1, the second input end of the first OR gate OR1 is connected to the output end of the first NOT gate NOT1, and the output end of the first OR gate OR1 is connected to the first output module 220.

[0046] The first AND gate AND1 refers to a logic device that outputs a high level signal when the input signals at the first input terminal and the second input terminal are both high level signals, and outputs a low level signal when the input signals at the first input terminal and / or the second input terminal are low level signals. The first OR gate OR1 refers to a logic device that outputs a high level signal when the input signals at the first input terminal and / or the second input terminal are high level signals, and outputs a low level signal when the input signals at the first input terminal and the second input terminal are both low level signals. The first NOT gate NOT1 refers to a logic device that outputs a signal that is an inverted signal of the input signal.

[0047] Specifically, taking the boost switching signal as a low level signal and the buck switching signal and the control signal as high level signals as an example, when the boost-boost switching signal BUCK-BOOST is a high level signal, the output signal of the first AND gate AND1 is consistent with the drive signal MCU_PWM, and the output signal of the first NOT gate NOT1 is a low level signal, then the output signal of the first OR gate OR1 is consistent with the output signal of the first AND gate AND1, that is, the output signal of the first OR gate OR1 is consistent with the drive signal MCU_PWM, that is, at this time, the first logic unit 211 outputs the drive signal MCU_PWM to the first output module 220; when the boost-boost switching signal BUCK-BOOST is a low level signal, the output signal of the first AND gate AND1 is a low level signal, the output signal of the first NOT gate NOT1 is a high level signal, and the output signal of the first OR gate OR1 is a high level signal, that is, at this time, the first logic unit 211 will output a high level signal to the first output module 220.

[0048] It can be seen that in this embodiment, by configuring the above logic devices, different signals can be output to the first output module 220 under different buck-boost switching signals BUCK-BOOST.

[0049] In some of these embodiments, see Figure 5 The second logic unit 212 includes a second NOT gate NOT2, a second OR gate OR2, and a second AND gate AND2. The input end of the second NOT gate NOT2 and the first input end of the second OR gate OR2 are both used to receive the buck-boost switching signal BUCK-BOOST, the output end of the second NOT gate NOT2 is connected to the first input end of the second AND gate AND2, the second input end of the second AND gate AND2 is used to receive the driving signal MCU_PWM, the output end of the second AND gate AND2 is connected to the second input end of the second OR gate OR2, and the output end of the second OR gate OR2 is connected to the second output module 230.

[0050] The second NOT gate NOT2 refers to a logic device whose output signal is the inverted signal of the input signal. The second OR gate OR2 refers to a logic device that outputs a high level signal when the input signal at the first input terminal and / or the second input terminal is a high level signal, and outputs a low level signal when the input signals at the first input terminal and the second input terminal are both low level signals. The second AND gate AND2 refers to a logic device that outputs a high level signal when the input signals at the first input terminal and the second input terminal are both high level signals, and outputs a low level signal when the input signal at the first input terminal and / or the second input terminal is a low level signal.

[0051] Specifically, taking the boost switching signal as a low-level signal and the buck switching signal and the control signal as high-level signals as an example, when the buck-boost switching signal BUCK-BOOST is a high-level signal, the output signal of the second NOT gate NOT2 is a low-level signal, and the output signal of the second AND gate AND2 is a low-level signal, then the output signal of the second OR gate OR2 is a high-level signal, that is, at this time, the second logic unit 212 will output a high-level signal to the second output module 230. When the buck-boost switching signal BUCK-BOOST is a low-level signal, the output signal of the second NOT gate NOT2 is a high-level signal, the output signal of the second AND gate AND2 is consistent with the drive signal MCU_PWM, that is, the output signal of the second AND gate AND2 is consistent with the drive signal MCU_PWM, and the output signal of the second OR gate OR2 is consistent with the output signal of the second AND gate AND2, that is, the output signal of the second OR gate OR2 is consistent with the drive signal MCU_PWM, that is, at this time, the second logic unit 212 outputs the drive signal MCU_PWM to the second output module 230.

[0052] It can be seen that in this embodiment, by configuring the above logic devices, different signals can be output to the second output module 230 under different buck-boost switching signals BUCK-BOOST.

[0053] In some of these embodiments, see Figure 6The first output module 220 includes a first output unit 221 and a second output unit 222 , and the second output module 230 includes a third output unit 231 and a fourth output unit 232 .

[0054] The first output end of the logic module 210 is connected to the first output unit 221 and the second output unit 222 respectively, the second output end of the logic module 210 is connected to the third output unit 231 and the fourth output unit 232 respectively, the first output unit 221 is also connected to the first driver submodule 131, the second output unit 222 is also connected to the second driver submodule 132, the third output unit 231 is also connected to the third driver submodule 141, and the fourth output unit 232 is also connected to the fourth driver submodule 142.

[0055] When the buck-boost switching signal BUCK-BOOST is a buck switching signal, the first output unit 221 is configured to output a first pulse width modulation signal to the first driver submodule 131 based on the drive signal MCU_PWM, so that the buck upper tube 111 is periodically turned on and off, and the second output unit 222 is configured to output a second pulse width modulation signal to the second driver submodule 132 based on the drive signal MCU_PWM, so that the buck lower tube 112 is periodically turned on and off, wherein the buck upper tube 111 and the buck lower tube 112 are turned on at different times; the third output unit 231 is configured to output a first level signal to the third driver submodule 141 based on the control signal, so that the boost upper tube 121 is turned on, and the fourth output unit 232 is configured to output a second level signal to the fourth driver submodule 142 based on the control signal, so that the boost lower tube 122 is turned off.

[0056] When the buck-boost switching signal BUCK-BOOST is a boost switching signal, the first output unit 221 is configured to output a third level signal to the first driver submodule 131 based on the control signal, so that the buck upper tube 111 is turned on, the second output unit 222 is configured to output a fourth level signal to the second driver submodule 132 based on the control signal, so that the buck lower tube 112 is turned off, the third output unit 231 is configured to output a third pulse width modulation signal to the third driver submodule 141 based on the drive signal MCU_PWM, so that the boost upper tube 121 is periodically turned on and off, and the fourth output unit 232 is configured to output a fourth pulse width modulation signal to the fourth driver submodule 142 based on the drive signal MCU_PWM, so that the boost lower tube 122 is periodically turned on and off, wherein the boost upper tube 121 and the boost lower tube 122 are turned on at different times.

[0057] Specifically, the first output unit 221 and the second output unit 222 are both connected to the first logic unit 211, the third output unit 231 and the fourth output unit 232 are both connected to the second logic unit 212, the first driver submodule 131 is connected to the control end of the step-down upper tube 111, the second driver submodule 132 is connected to the control end of the step-down lower tube 112, the third driver submodule 141 is connected to the control end of the boost upper tube 121, and the fourth driver submodule 142 is connected to the control end of the boost lower tube 122.

[0058] The duty cycle of each pulse width modulation signal may be consistent with or inconsistent with the duty cycle of the driving signal MCU_PWM, and the frequency of each pulse width modulation signal may be consistent with or inconsistent with the frequency of the driving signal MCU_PWM. In order to ensure the stable operation of the buck-boost circuit, the duty cycle and frequency of the first pulse width modulation signal should be consistent with the duty cycle and frequency of the second pulse width modulation signal, and the duty cycle and frequency of the third pulse width modulation signal should be consistent with the duty cycle and frequency of the fourth pulse width modulation signal. Figure 2 In the illustrated embodiment, the first level signal and the third level signal may be high level signals, and the second level signal and the fourth level signal may be low level signals.

[0059] In the switch tube driving circuit, when the buck-boost switching signal BUCK-BOOST is a buck switching signal, the first output unit 221 receives the driving signal MCU_PWM from the logic module 210, and generates a first pulse width modulation signal based on the signal. The first pulse width modulation signal is output to the control end of the buck upper tube 111 through the first driving submodule 131, so that the buck upper tube 111 is periodically turned on and off. The second output unit 222 also receives the driving signal MCU_PWM and generates a second pulse width modulation signal. The second pulse width modulation signal The signal is output to the control end of the buck lower tube 112 through the second driving submodule 132, so that the buck lower tube 112 is periodically turned on and off, wherein the buck upper tube 111 and the buck lower tube 112 are not turned on at the same time. At the same time, the third output unit 231 outputs a first level signal (such as a high level signal) based on the control signal, so that the boost upper tube 121 is continuously turned on, and the fourth output unit 232 outputs a second level signal (such as a low level signal) based on the control signal, so that the boost lower tube 122 is continuously turned off, so that the buck-boost circuit 100 operates in the buck mode.

[0060] When the buck-boost switching signal BUCK-BOOST is a boost switching signal, the first output unit 221 outputs a third level signal (such as a high level signal) based on the control signal to keep the buck upper tube 111 turned on, and the second output unit 222 outputs a fourth level signal (such as a low level signal) based on the control signal to keep the buck lower tube 112 turned off, and the third output unit 231 receives the drive signal MCU_PWM from the logic module 210, and generates a third pulse width modulation signal based on the signal, and the third pulse width modulation signal is output to the control end of the boost upper tube 121 through the third driver module 141, so that the boost upper tube 121 is periodically turned on and off, and the fourth output unit 232 also receives the drive signal and generates a fourth pulse width modulation signal, and the fourth pulse width modulation signal is output to the control end of the boost lower tube 122 through the fourth driver module 142, so that the boost lower tube 122 is periodically turned on and off, wherein the boost upper tube 121 and the boost lower tube 122 are not turned on at the same time,

[0061] In this embodiment, each output unit can output a corresponding signal to a corresponding switch tube under different input signals, accurately making each switch tube operate in a desired state, thereby realizing flexible switching of the working mode of the buck-boost circuit under the control of the buck-boost switching signal BUCK-BOOST.

[0062] In some embodiments, the first output module 220 is further configured to adjust the duty cycle of the first pulse width modulation signal through the first output unit 221 and the duty cycle of the second pulse width modulation signal through the second output unit 222, so that the buck upper tube 111 is turned on after the buck lower tube 112 is turned off and the buck lower tube 112 is turned on after the buck upper tube 111 is turned off and the buck lower tube 112 is turned on after the buck upper tube 111 is turned off and the buck lower tube 112 is turned on after the buck upper tube 111 is turned off and the buck lower tube 112 is turned on after the buck lower tube 112 is turned off and the buck upper tube 112 is turned on after the buck lower tube 112 is turned off and the boost lower tube 122 is turned on after the boost upper tube 121 ...

[0063] The duty cycle refers to the ratio of the high level time to the total cycle time within a working cycle.

[0064] The first dead time refers to the time interval between the moment when the buck lower tube 112 is turned off and the moment when the buck upper tube 111 is turned on in the buck mode, and also the time interval between the moment when the buck upper tube 111 is turned off and the moment when the buck lower tube 112 is turned on.

[0065] The second dead time refers to the time interval between the moment when the boost lower tube 122 is turned off and the moment when the boost upper tube 121 is turned on in the boost mode, and also the time interval between the moment when the boost upper tube 121 is turned off and the moment when the boost lower tube 122 is turned on.

[0066] Specifically, when the first output unit 221 outputs the first pulse width modulation signal based on the driving signal MCU_PWM, the duty cycle of the first pulse width modulation signal can be reduced by adjusting the duty cycle of the first pulse width modulation signal; at the same time, when the second output unit 222 outputs the second pulse width modulation signal based on the driving signal MCU_PWM, the duty cycle of the second pulse width modulation signal can be reduced by adjusting the duty cycle of the second pulse width modulation signal; because under the control of the first pulse width modulation signal and the second pulse width modulation signal, the buck upper tube 111 and the buck lower tube 112 are periodically switched on and off in a complementary manner, and by adjusting the duty cycle of the first pulse width modulation signal and the second pulse width modulation signal, the conduction time of the buck upper tube 111 and the buck lower tube 112 are shortened at the same time within one working cycle, so that there is a first dead time when the buck upper tube 111 and the buck lower tube 112 are switched on. Similarly, by adjusting the duty ratios of the third pulse width modulation signal and the fourth pulse width modulation signal, the boost upper tube 121 and the boost lower tube 122 can have a second dead time when they are switched on.

[0067] In this embodiment, by adjusting the duty cycle of each pulse width modulation signal, a dead time exists when the upper tube and the lower tube in the same bridge arm are switched on, thereby preventing the upper tube and the lower tube in the same bridge arm from being turned on at the same time during the switching process, thereby avoiding short circuit and damage to circuit components, and improving the reliability of the circuit during operation.

[0068] In some of these embodiments, see Figure 7 The first output unit 221 includes a first resistor R1, a first capacitor C1 and a first diode D1. The first end of the first resistor R1 is respectively connected to the first output end of the logic module 210 and the cathode of the first diode D1. The second end of the first resistor R1 is respectively connected to the anode of the first diode D1, the first end of the first capacitor C1 and the first driving submodule 131. The second end of the first capacitor C1 is grounded.

[0069] The third output unit 231 includes a third resistor R3, a third capacitor C3 and a third diode D7. The first end of the third resistor R3 is respectively connected to the second output end of the logic module 210 and the cathode of the third diode D7, the second end of the third resistor R3 is respectively connected to the anode of the third diode D7, the first end of the third capacitor C3 and the second driving submodule 132, and the second end of the third capacitor C3 is grounded.

[0070] The second output unit 222 includes a third NOT gate NOT3, a second resistor R2, a second capacitor C2 and a second diode D2. The first end of the third NOT gate NOT3 is connected to the first output end of the logic module 210, the second end of the third NOT gate NOT3 is respectively connected to the first end of the second resistor R2 and the cathode of the second diode D2, the second end of the second resistor R2 is respectively connected to the anode of the second diode D2, the first end of the second capacitor C2 and the third driving submodule 141, and the second end of the second capacitor C2 is grounded.

[0071] The fourth output unit 232 includes a fourth NOT gate NOT4, a fourth resistor R4, a fourth capacitor C4 and a fourth diode D8. The first end of the fourth NOT gate NOT4 is connected to the second output end of the logic module 210, the second end of the fourth NOT gate NOT4 is respectively connected to the first end of the fourth resistor R4 and the cathode of the fourth diode D8, the second end of the fourth resistor R4 is respectively connected to the anode of the fourth diode D8, the first end of the fourth capacitor C4 and the fourth driving submodule 142, and the second end of the fourth capacitor C4 is grounded.

[0072] Specifically, the first end of the first resistor R1 can be connected to Figure 4 The first end of the third resistor R3 is connected to the output end of the second OR gate OR2. The first end of the third NOT gate NOT3 can be connected to the output end of the first OR gate OR1. Figure 4 A first terminal of a fourth NOT gate NOT4 is connected to an output terminal of the second OR gate OR2.

[0073] For the first output unit 221, when the output signal of the first logic unit 211 is at a rising edge, that is, when the output signal of the first logic unit 211 switches from a low level signal to a high level signal, the first resistor R1 and the first capacitor C1 form an RC delay circuit, so that the output signal switches from a low level signal to a high level signal after a first delay; when the output signal of the first logic unit 211 is at a falling edge, that is, when the output signal of the first logic unit 211 switches from a high level signal to a low level signal, the first resistor R1 and the first capacitor C1 delay the output signal from a high level signal to a low level signal after a second delay. Since the first capacitor C1 accelerates the energy discharge through the first diode D1, the second time is shorter than the first time, wherein the first time is related to the parameters of the first resistor R1 and the first capacitor C1, and the second time is related to the parameters of the first capacitor C1 and the first diode D1.

[0074] Similarly, for the third output unit 231, when the output signal of the second logic unit 212 is at the rising edge, the output signal of the third output unit 231 is delayed for a third time and switches from a low level signal to a high level signal, and when the output signal of the second logic unit 212 is at the falling edge, the output signal of the third output unit 231 is delayed for a fourth time and switches from a high level signal to a low level signal, the fourth time is less than the third time, and the third time is related to the parameters of the third resistor R3 and the third capacitor C3, and the second time is related to the parameters of the third capacitor C3 and the third diode D7.

[0075] For the second output unit 222, when the output signal of the first logic unit 211 is at a falling edge, the output signal of the third NOT gate NOT3 is at a rising edge, that is, when the output signal of the third NOT gate NOT3 switches from a low level signal to a high level signal, the second resistor R2 and the second capacitor C2 form an RC delay circuit, so that the output signal is delayed for a fifth time and switched from a low level signal to a high level signal; when the output signal of the first logic unit 211 is at a rising edge, the output signal of the third NOT gate NOT3 is at a falling edge, that is, when the output signal of the third NOT gate NOT3 switches from a high level signal to a low level signal, the second resistor R2 and the second capacitor C2 delay the output signal from a high level signal to a low level signal after a sixth time. Since the first capacitor C1 accelerates the energy discharge through the second diode D2, the sixth time is less than the fifth time, wherein the fifth time is related to the parameters of the second resistor R2 and the second capacitor C2, and the sixth time is related to the parameters of the second capacitor C2 and the second diode D2.

[0076] Similarly, for the fourth output unit 232, when the output signal of the second logic unit 212 is at the falling edge, the output signal of the third output unit 231 is delayed from the low level signal to the high level signal after the seventh time, and when the output signal of the second logic unit 212 is at the rising edge, the output signal of the third output unit 231 is delayed from the high level signal to the low level signal after the eighth time, the seventh time is less than the eighth time, and the seventh time is related to the parameters of the fourth resistor R4 and the fourth capacitor C4, and the eighth time is related to the parameters of the fourth capacitor C4 and the fourth diode D8.

[0077] In order to ensure the normal operation of the system, the first time is equal to the fifth time, the second time is equal to the sixth time, the third time is equal to the seventh time, and the fourth time is equal to the eighth time. Taking the boost bridge arm as an example, when the first logic unit 211 is at the rising edge, the output signal of the first output unit 221 is delayed for the first time and switched from a low level signal to a high level signal, that is, the buck upper tube 111 is turned on after the first time delay, and the output signal of the second output unit 222 is delayed for the sixth time and switched from a high level signal to a low level signal, that is, the buck lower tube 112 is turned off after the sixth time delay. Since the first time is equal to the third time and the sixth time is less than the fifth time, then, after the buck lower tube 112 is turned off, the buck upper tube 111 is turned on after the first dead time delay. will be turned on; when the first logic unit 211 is at a falling edge, the output signal of the first output unit 221 is delayed for the second time and switched from a high level signal to a low level signal, that is, the buck upper tube 111 is delayed for the second time to be turned off, and the output signal of the second output unit 222 is delayed for the fifth time and switched from a low level signal to a high level signal, that is, the buck lower tube 112 is delayed for the fifth time to be turned on. Since the second time is equal to the sixth time, and the sixth time is less than the fifth time, then the buck lower tube 112 will be turned on only after the first dead time is delayed after the buck upper tube 112 is turned off.

[0078] It can be seen that in this embodiment, by providing the above-mentioned devices, a dead time can exist when the upper and lower tubes in the same bridge arm are switched on, and no software logic is required to achieve this, thereby reducing costs.

[0079] In some of these embodiments, see Figure 8 The switch tube driving circuit 200 further includes a comparison module 240. The comparison module 240 is connected to the third driving submodule 141. The comparison module 240 is configured to receive a first sampling signal S1 of the output current of the buck-boost circuit 100, and when the voltage of the first sampling signal S1 is less than the first voltage Vref1, output a first shutdown signal to the third driving submodule 141 to shut down the boost upper tube 121.

[0080] The output current refers to the current at the output side of the buck-boost circuit 100 . The first sampling signal can be sampled by a dedicated current sampling module. The specific sampling process can be referred to the prior art and is not limited here.

[0081] The comparison module 240 is a device that can compare the voltage of the first sampling signal S1 with the first voltage Vref1 and output different signals to the control terminal of the boost upper tube 121. Figure 8As shown, the comparison module 240 may include a comparator AMP2, the positive input terminal of the comparator AMP2 is used to receive the first sampling signal S1, and the negative input terminal of the comparator AMP2 is used to receive the first voltage Vref1. The voltage amplitude of the first voltage Vref1 can be set according to actual needs. In the comparison module 240, when the voltage of the first sampling signal S1 is less than the first voltage Vref1, the comparator AMP2 will output a low-level signal, thereby turning off the boost upper tube 121. At this time, the third output unit 231 cannot control the boost upper tube 121 to work; when the voltage of the first sampling signal S1 is greater than the second voltage Vref1, the comparator AMP2 will output a high-level signal. At this time, the working state of the boost upper tube 121 will be controlled by the output signal of the third output unit 231.

[0082] By setting the comparison module 240, when the buck-boost circuit 100 is working, if the output current is less than the set first sampling point, that is, the voltage of the first sampling signal S1 is less than the first voltage Vref1, the boost upper tube 121 will be in the off state, and the current will first flow through the body diode of the boost upper tube 121 to prevent the current from flowing from the output side of the buck-boost circuit to the input side, thereby achieving an anti-backflow effect. When the output current is greater than the set first sampling point, that is, the voltage of the first sampling signal S1 is greater than the first voltage Vref1, the comparison module 240 stops outputting a low-level signal to ensure the normal operation of the circuit.

[0083] In some of these embodiments, see Fig. 9 The switch tube driving circuit 200 further includes an overcurrent protection module 250. The overcurrent protection module 250 is connected to the first driving module 130 and the second driving module 140 respectively. The overcurrent protection module 250 is configured to receive a second sampling signal of the input current of the buck-boost circuit 100, and when the voltage of the second sampling signal is greater than the second voltage, output a second shutdown signal to the first driving module 130 and the second driving module 140, so that the buck-boost circuit 100 stops working.

[0084] The input current refers to the current on the input side of the buck-boost circuit 100 . The second sampling signal can be sampled by a dedicated current sampling module. The specific sampling process can be referred to the prior art and is not limited here.

[0085] In the switch tube driving circuit 200, when the input current is greater than the set second sampling point, that is, when the voltage of the second sampling signal is greater than the second voltage, the overcurrent protection module 250 will control the buck-boost circuit 100 to stop working, implement overcurrent protection, and thus improve the safety of the circuit.

[0086] In some of these embodiments, see Fig.10The overcurrent protection module 250 includes a comparator AMP3, a resistor R6, an AND gate AND3, a NOT gate NOT5, a switch tube MOS5, a diode D3, a diode D4, a diode D5 and a diode D6; the positive input terminal of the comparator AMP3 is used to receive the second voltage Vref2, the negative input terminal of the comparator AMP3 is used to receive the second sampling signal S2, the output terminal of the comparator AMP3 is respectively connected to one end of the resistor R6 and the first input terminal of the AND gate AND3, the other end of the resistor R6 is connected to the power supply Vcc1, and the second input terminal of the AND gate AND3 is used to receive the switch tube driving circuit 10 The enable signal EN of 0 is connected, the output end of the AND gate AND3 is connected to the input end of the NOT gate NOT5, the output end of the NOT gate NOT5 is connected to the first end of the switch tube Q5, the second end of the switch tube Q5 is respectively connected to the cathode of the diode D3, the cathode of the diode D4, the cathode of the diode D5 and the cathode of the diode D6, the third end of the switch tube Q5 is grounded GND, the anode of the diode D3 is connected to the first driver submodule 131, the anode of the diode D4 is connected to the second driver submodule 132, the anode of the diode D5 is connected to the third driver submodule 141, and the anode of the diode D6 is connected to the fourth driver submodule 142.

[0087] The enable signal EN of the switch tube driving circuit 100 is a signal for indicating whether the switch tube driving circuit 100 is working, which may include a low level signal for indicating that the switch tube driving circuit 100 is working and a low level signal for indicating that the switch tube driving circuit 100 is not working. The switch tube Q5 may be a suitable switch device such as an N-type MOS tube or an NPN transistor.

[0088] In this circuit, when the enable signal EN is a low level signal, the AND gate AND3 outputs a low level signal, the NOT gate NOT5 outputs a high level signal, the switch tube Q5 is turned on, and each driving sub-module is pulled down through the corresponding diode and the switch tube Q5, the buck upper tube 111, the buck lower tube 112, the boost upper tube 121 and the boost lower tube 122 are all turned off, and the switch tube driving circuit 100 cannot control the buck upper tube 111, the buck lower tube 112, the boost upper tube 121 and the boost lower tube 122.

[0089] When the enable signal EN is a high-level signal and the input current is less than the set second sampling point, that is, the voltage of the second sampling signal S2 is greater than the second voltage Vref2, the comparator AMP3 outputs a high-level signal, the AND gate AND3 outputs a high-level signal, the NOT gate NOT5 outputs a low-level signal, the switch tube Q5 is turned off, and the overcurrent protection module 250 does not affect the operation of the switch tube driving circuit 200; when the enable signal EN is a high-level signal and the input current is greater than the set second sampling point, that is, the voltage of the second sampling signal S2 is greater than the second voltage Vref2, the comparator AMP3 outputs a low-level signal, the AND gate AND3 outputs a low-level signal, the NOT gate NOT5 outputs a high-level signal, the switch tube Q5 is turned on, and each driving sub-module is pulled down through the corresponding diode and the switch tube Q5, and the buck upper tube 111, the buck lower tube 112, the boost upper tube 121 and the boost lower tube 122 are all turned off to achieve overcurrent protection.

[0090] It can be seen that in this embodiment, overcurrent protection can be achieved by providing the above-mentioned devices.

[0091] In some of these embodiments, see Fig.11 The switch tube driving circuit 200 also includes a buck-boost switching signal output module 260, which is used to receive the sampling signal V1 of the input voltage and the sampling signal V2 of the output voltage of the buck-boost circuit 100, and compare the sizes of the sampling signal V1 and the sampling signal V2, and output a boost switching signal or a buck switching signal.

[0092] The voltage of the sampling signal V1 of the input voltage has a first ratio with the input voltage, the voltage of the sampling signal V2 of the output voltage has a second ratio with the output voltage, and the first ratio is equal to the second ratio. In this circuit, when the sampling signal V1 of the input voltage is less than the sampling signal V2 of the output voltage, the buck-boost switching signal output module 260 outputs a boost switching signal, and when the sampling signal V1 of the input voltage is greater than the sampling signal V2 of the output voltage, the buck-boost switching signal output module 260 outputs a buck switching signal.

[0093] Taking the boost switching signal as a low level signal and the buck switching signal as a high level signal as an example, the boost-boost switching signal output module 260 includes a comparator AMP1, a resistor R5 and a power supply Vcc2, the positive input terminal of the comparator AMP1 is used to receive the sampling signal V1 of the input voltage, the negative input terminal of the comparator AMP1 is used to receive the sampling signal V2 of the output voltage, the output terminal of the comparator AMP1 is connected to the power supply Vcc2 through the resistor R5, and the output terminal of the comparator AMP1 is also connected to the logic module 210. In this circuit, when the sampling signal V1 of the input voltage is less than the sampling signal V2 of the output voltage, the comparator AMP1 outputs a low level signal (boost switching signal), and when the sampling signal V1 of the input voltage is greater than the sampling signal V2 of the output voltage, the boost-boost switching signal output module 260 outputs a high level signal (buck switching signal).

[0094] It can be seen that in this embodiment, the buck-boost switching signal output module 260 can be provided to realize the hardware output of the buck-boost switching signal.

[0095] Combine the following Figure 4 , Figure 5 , Figure 8 , Fig.10 and Fig.11 The illustrated embodiment illustrates the specific working process of the switch tube driving circuit provided in the present application.

[0096] When the sampling signal V1 of the input voltage is greater than the sampling signal V2 of the output voltage, the buck-boost switching signal output module 260 outputs a high-level signal (buck switching signal) to the logic module 210, the first logic unit 211 outputs the driving signal MCU_PWM to the first output unit 221 and the second output unit 222, the second logic unit 212 outputs a high-level signal (control signal) to the third output unit 231 and the fourth output unit 232, the first output unit 221 outputs a first pulse width modulation signal, the first pulse width modulation signal is transmitted to the buck upper tube 111 via the first driver module 131, and the second output unit 222 outputs a second pulse width modulation signal. The first output unit 221 and the second output unit 222 have a first dead time when the buck upper tube 111 and the buck lower tube 112 are switched on and off. The third output unit 231 outputs a high level signal to the boost upper tube 121 to turn on the boost upper tube 121. The fourth output unit 232 outputs a low level signal to the boost lower tube 122 to turn off the boost lower tube 122. That is, the buck-boost circuit 100 is in the buck mode.

[0097] When the sampling signal V1 of the input voltage is less than the sampling signal V2 of the output voltage, the comparator AMP1 outputs a low level signal (boost switching signal) to the logic module 210, the first logic unit 211 outputs a high level signal (control signal) to the first output unit 221 and the second output unit 222, the second logic unit 212 outputs the drive signal MCU_PWM to the third output unit 231 and the fourth output unit 232, the third output unit 231 outputs a third pulse width modulation signal, the third pulse width modulation signal is transmitted to the boost upper tube 121 via the third driver submodule 141, and the fourth output unit 232 outputs a fourth pulse width modulation signal. The fourth pulse width modulation signal is transmitted to the boost lower tube 122 through the fourth driving submodule 142, so that the boost upper tube 121 and the boost lower tube 122 are periodically complementarily turned on and off, and due to the effect of the resistor, capacitor and diode in the third output unit 231 and the fourth output unit 232, the boost upper tube 121 and the boost lower tube 122 have a second dead time when they are switched on, the first output unit 221 outputs a high level signal to the buck upper tube 111, so that the buck upper tube 111 is turned on, and the second output unit 222 outputs a low level signal to the buck lower tube 112, so that the buck lower tube 112 is turned off, that is, the buck-boost circuit 100 is in the boost mode.

[0098] It can be seen that the switch tube driving current 200 provided in the embodiment of the present application can drive the four switch tubes in the buck-boost circuit 100 to work. There is no need to set software logic separately for each switch tube in the buck-boost circuit 100, which can make the structure of the driving circuit simpler and reduce the cost of the driving circuit.

[0099] In a second aspect, an embodiment of the present application further provides an energy storage device, which includes a buck-boost circuit and a switch tube driving circuit as in any embodiment of the first aspect; the switch tube driving circuit is connected to the buck-boost circuit.

[0100] Energy storage equipment refers to a device that can store energy in the form of electrical energy and release it when needed to supply it to a power system or other equipment. In this embodiment, the switch tube drive circuit has the same structure and function as the switch tube drive circuit described in any embodiment of the first aspect, and will not be repeated here.

[0101] In some implementations, the energy storage device may further include a battery, which is usually disposed at the output side of the buck-boost circuit.

[0102] It should be noted that the device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0103] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Under the concept of the present application, the technical features in the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other changes in different aspects of the present application as described above, which are not provided in detail for the sake of simplicity. Although the present application has been described in detail with reference to the aforementioned embodiments, a person of ordinary skill in the art should understand that the technical solutions described in the aforementioned embodiments can still be modified, or some of the technical features can be replaced by equivalents. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A switch tube driving circuit, used to drive a buck-boost circuit, characterized in that: include: A logic module, a first output module and a second output module; The logic module includes a first logic unit and a second logic unit. The first logic unit includes a first AND gate, a first OR gate and a first NOT gate. The second logic unit includes a second NOT gate, a second OR gate and a second AND gate. The first input end of the first AND gate and the input end of the first NOT gate are both used to receive a buck-boost switching signal. The second input end of the first AND gate is used to receive a drive signal. The output end of the first AND gate is connected to the first input end of the first OR gate. The second input end of the first OR gate is connected to the output end of the first NOT gate. The output end of the first OR gate is connected to the first output module. The input end of the second NOT gate and the first input end of the second OR gate are both used to receive the buck-boost switching signal. The output end of the second NOT gate is connected to the first input end of the second AND gate. The second input end of the second AND gate is used to receive the drive signal. The output end of the second AND gate is connected to the second input end of the second OR gate. The output end of the second OR gate is connected to the second output module. The first output module is also connected to a first drive module of a buck bridge arm of the buck-boost circuit. The second output module is also connected to a second drive module of a boost bridge arm of the buck-boost circuit. When the buck-boost switching signal is a buck switching signal, the first logic unit outputs the drive signal to the first output module, and the second logic unit outputs the control signal to the second output module, so that the buck-boost circuit operates in a buck mode; when the buck-boost switching signal is a boost switching signal, the first logic unit outputs the drive signal to the second output module, and the second logic unit outputs the control signal to the first output module, so that the buck-boost circuit operates in a boost mode.

2. The switch tube driving circuit according to claim 1, characterized in that: The first output module includes a first output unit and a second output unit, the second output module includes a third output unit and a fourth output unit, the buck bridge arm includes a buck upper tube and a buck lower tube, the first driving module includes a first driving submodule of the buck upper tube and a second driving submodule of the buck lower tube, the boost bridge arm includes a boost upper tube and a boost lower tube, and the second driving module includes a third driving submodule of the boost upper tube and a fourth driving submodule of the boost lower tube; The first output end of the logic module is connected to the first output unit and the second output unit respectively, the second output end of the logic module is connected to the third output unit and the fourth output unit respectively, the first output unit is also connected to the first driver submodule, the second output unit is also connected to the second driver submodule, the third output unit is also connected to the third driver submodule, and the fourth output unit is also connected to the fourth driver submodule; When the buck-boost switching signal is a buck switching signal, the first output unit is configured to output a first pulse width modulation signal to the first driver submodule based on the driving signal, so that the buck upper tube is periodically turned on and off, and the second output unit is configured to output a second pulse width modulation signal to the second driver submodule based on the driving signal, so that the buck lower tube is periodically turned on and off, wherein the buck upper tube and the buck lower tube are turned on at different times; the third output unit is configured to output a first level signal to the third driver submodule based on the control signal, so that the boost upper tube is turned on, and the fourth output unit is configured to output a second level signal to the fourth driver submodule based on the control signal, so that the boost lower tube is turned off; When the buck-boost switching signal is a boost switching signal, the first output unit is configured to output a third level signal to the first driver submodule based on the control signal to turn on the buck upper tube, the second output unit is configured to output a fourth level signal to the second driver submodule based on the control signal to turn off the buck lower tube, the third output unit is configured to output a third pulse width modulation signal to the third driver submodule based on the drive signal to turn on and off the boost upper tube periodically, and the fourth output unit is configured to output a fourth pulse width modulation signal to the fourth driver submodule based on the drive signal to turn on and off the boost lower tube periodically, wherein the boost upper tube and the boost lower tube are turned on at different times.

3. The switch tube driving circuit according to claim 2, characterized in that: The first output module is further configured to adjust the duty cycle of the first pulse width modulation signal through the first output unit and adjust the duty cycle of the second pulse width modulation signal through the second output unit, so that the buck upper tube is turned on by delaying the first dead time after the buck lower tube is turned off, and the buck lower tube is turned on by delaying the first dead time after the buck upper tube is turned off; The second output module is also configured to adjust the duty cycle of the third pulse width modulation signal through the third output unit and to adjust the duty cycle of the second pulse width modulation signal through the fourth output unit, so that the boost upper tube is turned on by delaying the second dead time after the boost lower tube is turned off, and so that the boost lower tube is turned on by delaying the second dead time after the boost upper tube is turned off.

4. The switch tube driving circuit according to claim 3, characterized in that: The first output unit includes a first resistor, a first capacitor and a first diode, the second output unit includes a third NOT gate, a second resistor, a second capacitor and a second diode, the third output unit includes a third resistor, a third capacitor and a third diode, and the fourth output unit includes a fourth NOT gate, a fourth resistor, a fourth capacitor and a fourth diode; The first end of the first resistor is respectively connected to the first output end of the logic module and the cathode of the first diode, the second end of the first resistor is respectively connected to the anode of the first diode, the first end of the first capacitor and the first driving submodule, and the second end of the first capacitor is grounded; The first end of the third NOT gate is connected to the first output end of the logic module, the second end of the third NOT gate is respectively connected to the first end of the second resistor and the cathode of the second diode, the second end of the second resistor is respectively connected to the anode of the second diode, the first end of the second capacitor and the second driving submodule, and the second end of the second capacitor is grounded; The first end of the third resistor is respectively connected to the second output end of the logic module and the cathode of the third diode, the second end of the third resistor is respectively connected to the anode of the third diode, the first end of the third capacitor and the third driving submodule, and the second end of the third capacitor is grounded; The first end of the fourth NOT gate is connected to the second output end of the logic module, the second end of the fourth NOT gate is respectively connected to the first end of the fourth resistor and the cathode of the fourth diode, the second end of the fourth resistor is respectively connected to the anode of the fourth diode, the first end of the fourth capacitor and the fourth driving submodule, and the second end of the fourth capacitor is grounded.

5. The switch tube driving circuit according to claim 2, characterized in that: The switch tube driving circuit also includes a comparison module; The comparison module is connected to the third driving submodule; The comparison module is configured to receive a first sampling signal of the output current of the buck-boost circuit, and when the voltage of the first sampling signal is less than the first voltage, output a first shutdown signal to the third driver module to shut down the boost upper tube.

6. The switch tube driving circuit according to claim 1, characterized in that: The switch tube driving circuit also includes an overcurrent protection module; The overcurrent protection module is connected to the first driving module and the second driving module respectively; The overcurrent protection module is configured to receive a second sampling signal of the input current of the buck-boost circuit, and when the voltage of the second sampling signal is greater than a second voltage, output a second shutdown signal to the first drive module and the second drive module to stop the buck-boost circuit from working.

7. An energy storage device, characterized in that: It comprises a buck-boost circuit and a switch tube driving circuit as claimed in any one of claims 1 to 6; The switch tube driving circuit is connected to the buck-boost circuit.

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