A high-precision segmented resistor digital-to-analog converter with low glitch energy

Abstract

The present invention discloses a high-precision segmented resistor-type digital-to-analog converter with low glitch energy, which divides the digital-to-analog converter into two sections: a high-segment digital-to-analog converter and a low-segment digital-to-analog converter. The high-segment digital-to-analog converter adopts a resistor string structure, and the low-segment digital-to-analog converter adopts a thermometer code voltage-current converter structure. The digital code is divided into a high-segment code and a low-segment code after passing through the digital-to-analog converter register. The high-segment digital-to-analog converter decodes the high-segment code, and each resistance node has only one switch. The output voltage of the high-segment digital-to-analog converter is the input voltage of the low-segment digital-to-analog converter. The low-segment digital-to-analog converter performs thermometer decoding on the low-segment code, and adopts a differential pair as a load. The output voltage of the low-segment digital-to-analog converter is the output voltage of the entire digital-to-analog converter. The digital-to-analog converter switch decoding circuit of the present invention is simple, has low power consumption, has low output voltage glitch energy when the input code is switched, and has high linearity of the segmented structure.

Description

Technical Field

[0001] The invention relates to the technical field of high-precision digital-to-analog converters, and in particular to a high-precision segmented resistance type digital-to-analog converter with low burr energy. Background Art

[0002] Resistor string DACs have good monotonicity and are widely used in the field of industrial control. Since the number of resistor units increases exponentially with the number of bits of the converter, 10-bit and above DACs usually adopt a segmented structure. However, the segmented structure of the DAC may cause nonlinear errors between different segments, which will accumulate and affect the overall linearity of the DAC.

[0003] Existing segmented digital-to-analog converters usually use a two-stage resistor string structure, where the low-order resistor string forms a resistor load on the high-order, resulting in inconsistent weights of resistors in the low-order resistor string, making it difficult to achieve a high-precision digital-to-analog converter, and having the problem of large switching glitch energy. Another existing technology is to use a buffer to connect the tap voltage of the high-order resistor string to the low-order resistor string. Since the buffer has an extremely high input impedance, the problem of the low-order resistor string forming a resistor load on the high-order is avoided. However, the power consumption of the buffer is relatively large, and errors such as noise and offset voltage will be introduced into the digital-to-analog converter.

[0004] Therefore, the linearity of the existing segmented structure of the digital-to-analog converter is low. When the input code is switched, due to the switching speed and matching of the internal switch, the output voltage glitch energy is large, which will affect the stability and accuracy of the signal. At the same time, as the number of bits of the digital-to-analog converter increases, the switch decoding circuit of the digital-to-analog converter becomes complex, the hardware cost is high, and the power consumption is large. Summary of the invention

[0005] The problem to be solved by the present invention is to propose a high-precision segmented resistor digital-to-analog converter with low glitch energy, which is used to solve the problem that the output voltage glitch energy of the existing digital-to-analog converter is large and the switch decoding circuit is complex when the input code is switched.

[0006] The present invention adopts the following technical scheme: a high-precision segmented resistance type digital-to-analog converter with low glitch energy, comprising: a digital-to-analog converter register, a high-segment digital-to-analog converter, and a low-segment digital-to-analog converter;

[0007] The input digital code is divided into a high-order segment code [N+M, N+1] and a low-order segment code [N, 1] after passing through the digital-to-analog converter register, and controls the high-order segment digital-to-analog converter and the low-order segment digital-to-analog converter respectively;

[0008] The high-order segment digital-to-analog converter is a resistor string structure, which is used to decode the input M-bit high-order segment code, and the output voltage of the high-order segment digital-to-analog converter is the input voltage of the low-order segment digital-to-analog converter;

[0009] The low-segment digital-to-analog converter is a thermometer code voltage-to-current converter structure, which is used to perform thermometer decoding on the input N-bit low-segment code. The output voltage of the low-segment digital-to-analog converter is the output voltage of the entire digital-to-analog converter.

[0010] Preferably, the high-bit digital-to-analog converter is formed by connecting a plurality of resistor units end to end in sequence to form a resistor string, wherein the resistance value of the resistor unit is set according to power consumption, accuracy and speed. For an M-bit resistor string structure, 2 M resistance unit.

[0011] Two ends of the resistor string are connected to a first voltage end and a second voltage end respectively, the first voltage end is used to input a first voltage, and the second voltage end is used to input a second voltage.

[0012] Preferably, the high-bit segment digital-to-analog converter further comprises a plurality of switches corresponding to the resistance units; a tap connection switch B0 is arranged between the first voltage terminal and the first resistance unit of the resistance string, and tap connection switches B1, B2, ..., B1 are arranged between every two resistance units of the resistance string. n-1 , set a tap connection switch B between the last resistor unit of the resistor string and the second voltage terminal n ; Connect switches B0, B2, ..., B n Tap to the first voltage output terminal, output voltage V1, connect switches B1, B3, ..., B n-1 The tap is connected to the second voltage output terminal to output voltage V2.

[0013] Preferably, the switch is switched according to the codeword of the input digital code, and the 2 M The resistor units correspond to the high-order segment code 2 from top to bottom. M To 0, during digital-to-analog conversion, the input high-order segment code is decoded, the corresponding resistance unit is selected according to the high-order segment code word of the input digital code, the corresponding switches at both ends of the resistance unit are closed, and the voltage at both ends of the selected resistance unit is input to V1 and V2 to form differential output voltages V1 and V2, which are input to the low-order segment digital-to-analog converter.

[0014] Preferably, the high-order segment digital-to-analog converter further includes an adder, and the M-bit high-order segment coded data is discarded after passing through the adder, and the M-1-bit data is input into the resistor string structure as switches B0, B2, ..., B n The control signal of M-bit high-order segment coding signal is directly discarded with the lowest bit, and input into the resistor string structure as switches B1, B3, ..., B n-1 control signal.

[0015] Preferably, the low-bit digital-to-analog converter includes a plurality of differential pairs, a load circuit and an error amplifier; for an N-bit voltage-to-current converter, 2 N group differential pair structure, the 2 N The differential pairs are connected in parallel to convert the differential input voltages V1 and V2 into differential currents; the differential currents flow through the load circuit and the error amplifier in sequence, and the output voltage of the low-segment digital-to-analog converter is adjusted through negative feedback.

[0016] Preferably, the input low-order segment code is decoded, and the differential pair is selected according to the thermometer code result, the selected differential pair input end is connected to the voltage V2, the unselected differential pair input end is connected to the voltage V1, and the selected differential pair input voltage is increased from V1 to V2, so that the differential pair generates a differential current Id:

[0017] ;

[0018] where gm is the transconductance of the differential pair.

[0019] Preferably, the load circuit includes a first load circuit and a second load circuit, and the differential current is respectively input into the first load circuit and the second load circuit to output a differential voltage, which is input into two input terminals of the error amplifier.

[0020] Preferably, the error amplifier is used to amplify the differential voltage output by the first load circuit and the second load circuit, and feed it back to the inverting input terminal of the differential pair to form negative feedback; the voltage at the input terminal of the error amplifier is close to zero, forming a virtual short.

[0021] Preferably, the differential input voltages V1 and V2 flow through the low-bit segment digital-to-analog converter 2 N The current flowing through the positive input terminal of the differential pair is equal to the current flowing through the 2 N The current at the reverse input end of the differential pair is balanced so that the currents on both sides of the differential pair are balanced, which is used to uniformly interpolate the differential input voltages V1 and V2.

[0022] Compared with the prior art, the present invention adopts the above technical solution and has the following technical effects:

[0023] 1. In the high-precision segmented resistance-type digital-to-analog converter of the present invention, each resistance node in the high-bit segment has only one switch, which minimizes the number of switches, reduces the node capacitance, and improves the digital-to-analog conversion speed.

[0024] 2. The high-precision segmented resistor-type digital-to-analog converter of the present invention uses a differential pair as a load in the low-order segment, has an extremely high input impedance, does not constitute a load on the high-order segment resistor string, has a fast settling time and good linearity.

[0025] 3. In the high-precision segmented resistance-type digital-to-analog converter of the present invention, when every two adjacent code words are switched, only one set of switches in the low-order segment performs the switching action, thereby reducing the inter-code glitch energy. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 This is a structural block diagram of a high-precision segmented resistor digital-to-analog converter of the present invention;

[0027] Figure 2 This is a schematic diagram of a high-precision segmented resistor digital-to-analog converter according to an embodiment of the present invention;

[0028] Figure 3 The decoding logic of the digital-to-analog converter according to the embodiment of the present invention;

[0029] Figure 4 This is the high-order decoding logic of the digital-to-analog converter according to an embodiment of the present invention. DETAILED DESCRIPTION

[0030] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the application is further elaborated in detail below in conjunction with the accompanying drawings. The described embodiments are only a part of the embodiments involved in the present invention. All non-innovative embodiments of other researchers in the field on this embodiment belong to the protection scope of the present invention. At the same time, for the step numbering in the embodiment of the present invention, it is only set for the convenience of explanation, and the order between the steps is not limited in any way. The execution order of each step in the embodiment can be adaptively adjusted according to the understanding of those skilled in the art.

[0031] The invention discloses a high-precision segmented resistor-type digital-to-analog converter with low glitch energy. The digital-to-analog converter is divided into two sections, namely a high-segment digital-to-analog converter and a low-segment digital-to-analog converter. The high-segment digital-to-analog converter adopts a resistor string structure, and the low-segment digital-to-analog converter adopts a thermometer code voltage-current converter structure.

[0032] The resistor string structure of the high-bit digital-to-analog converter requires 2 N There are resistance units, and the resistance units are connected end to end in sequence.

[0033] Assuming that the resolution of the high-order segment resistor string is 8, there are a total of 2^8=256 resistors in the high-order segment, which are connected from top to bottom. The resistors in the resistor string correspond to the high-order segment codes 255 to 0 from top to bottom.

[0034] During digital-to-analog conversion, the high bits of the digital code are decoded, and the corresponding resistance unit is selected according to the high-bit segment codeword of the input digital code. The switches at both ends of the resistance unit are closed, and the voltages at both ends of the selected resistance unit are output as V1 and V2, thereby obtaining the voltages V1 and V2 at both ends of the resistor.

[0035] Thermometer code voltage-to-current converter (VI converter) for low-bit DACs requires 2 N The low-order segment of the digital code is decoded by thermometer, and the selected differential pair input terminal is connected to V2, and the unselected differential pair input terminal is connected to V1.

[0036] 2 N The differential pair converts the differential input voltage into a differential input current, and adjusts the output voltage VOUT through negative feedback so that the total current flowing through the differential pair is equal, thereby realizing the interpolation of the high-segment output voltages V1 and V2.

[0037] The output voltage of the high-order digital-to-analog converter is used as the input of the low-order digital-to-analog converter, and the output of the low-order digital-to-analog converter is used as the output voltage of the entire digital-to-analog converter.

[0038] Specifically, in one embodiment of the present invention, the overall structure of the segmented digital-to-analog converter is as follows: Figure 1 shown.

[0039] The input digital code is divided into a high-order segment code [N+M, N+1] and a low-order segment code [N, 1] after passing through the DAC register, which are used to control the high-order segment DAC and the low-order segment DAC respectively.

[0040] In order to simplify the drawing, the present embodiment reduces the number of bits of the converter and the segmented digital-to-analog converter structure, such as Figure 2 shown.

[0041] The digital-to-analog converter is divided into two sections, the high-order section is 3 bits, and the low-order section is 2 bits. The resistor string structure of the high-order digital-to-analog converter includes 8 resistors, namely R1, R2, ..., R7, R8, and the low-order digital-to-analog converter includes 4 differential structures, namely Q1, Q2, Q3, Q4.

[0042] Furthermore, the two ends of the resistor string are connected to reference voltages VREFP and VREFN respectively, and (VREFP-VREFN) / 2 is obtained at the middle node of the resistor string. N The voltage value of the equal division.

[0043] The high-bit DAC decodes the high bits of the digital code, selects a specific resistor, closes the switch at both ends of the resistor, and thus obtains a first voltage output terminal and a second voltage output terminal at both ends of the resistor, and the output voltages are voltages V1 and V2 respectively.

[0044] The low-order digital-to-analog converter performs thermometer decoding on the low-order segment of the digital code, connects the selected differential pair input to V2, and connects the unselected differential pair input to V1. The selected differential pair input voltage is increased from V1 to V2, so that the differential pair generates a differential current Id, which is calculated as follows:

[0045] ;

[0046] where gm is the transconductance of the differential pair.

[0047] In this embodiment, the load circuits are M1 and M2, and the error amplifier is A1. After the differential current flows through the load circuits M1 and M2, a differential voltage is output. The error amplifier A1 amplifies the differential voltage output by M1 and M2 and then feeds it back to the inverting input terminal of the differential pair, forming negative feedback, so that the current flowing through the positive input terminals of all differential pairs is equal to the current flowing through the reverse input terminals of all differential pairs, so that the voltage at the input terminal of the error amplifier A1 is close to zero, forming a virtual short.

[0048] Therefore, whenever a differential pair input voltage increases from V1 to V2, the error amplifier output voltage increases by ΔV, so that the currents on both sides of the differential pair are balanced again, achieving uniform interpolation of the input voltages V1 and V2.

[0049] In this embodiment, the segmented digital-to-analog converter decoding truth table is as follows:

[0050]

[0051] The tap V1 voltage, tap V2 voltage and low-segment switch control corresponding to the input codeword refer to the decoding truth table. When the input codeword is 000_01, in the resistor string of the high-segment digital-to-analog converter, the switches at both ends of the resistor R1 are closed, and the output voltages V1 and V2 are equal to the bottom voltage of the resistor R1 and the bottom voltage of the resistor R2 respectively. Among the four differential pairs of the low-segment digital-to-analog converter, one differential pair input is connected to the output voltage V2, and the other three input pairs are connected to the output voltage V1.

[0052] In this embodiment, for every additional bit of the input code word, the low-segment digital-to-analog converter will have a set of differential pairs of input terminals connected to the output voltage V2. When the input code word increases from 000_11 to 001_00, the output voltages V1 and V2 are equal to the bottom voltage of the resistor R3 and the bottom voltage of the resistor R2, respectively. At this time, for every additional bit of the input code word, the low-segment digital-to-analog converter will have a set of differential pairs of input terminals connected to the output voltage V1.

[0053] The maximum inter-code glitch energy of the digital-to-analog converter usually occurs when the low-bit segment moves to the high-bit segment. At this time, the number of switches switching simultaneously is the largest, making it more likely that the delay inconsistency between switches and the switch charge feedthrough will be affected.

[0054] It can be understood from this embodiment that the segmented DAC structure proposed in the present invention can achieve that only one set of low-order segment switches are always switched when two code words are switched, thereby avoiding inconsistent delays between switches and reducing the impact of switch charge feedthrough.

[0055] Preferably, in one embodiment of the present invention, Figure 3 As shown in FIG. 1 , a DAC decoding logic is shown with an input coding resolution of M+N bits, where the high-order segment is M bits and the low-order segment is N bits. The decoding logic of the N-bit low-order segment is the same as the above decoding logic and will not be repeated here. The decoding logic of the M-bit high-order segment is as follows: Figure 4 As shown, an adder is also included.

[0056] Specifically, the M-bit data of the high-order segment is discarded after passing through the adder, and the M-1-bit data processed by the adder is combined with the original lowest bit data and input into the decoder as the left switch B0, B2, ..., B of the high-order segment digital-to-analog converter. n The control signal of the high-order segment M bits of data directly discards the lowest bit, and the M-1 bits of data are input into the decoder as the switches B1, B3, ..., B on the other side of the high-order segment digital-to-analog converter. n-1 In particular, when the high-order M-bit data is all 1, an overflow bit will be generated after passing through the adder, and the control signal of the left switch will be one more than that of the right switch.

[0057] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A high-precision segmented resistor type digital-to-analog converter with low glitch energy, characterized in that: include: DAC registers, high-segment DAC, low-segment DAC; The input digital code is divided into a high-order segment code [N+M, N+1] and a low-order segment code [N, 1] after passing through the digital-to-analog converter register, and controls the high-order segment digital-to-analog converter and the low-order segment digital-to-analog converter respectively; The high-order segment digital-to-analog converter is a resistor string structure, which is used to decode the input M-bit high-order segment code. The resistor string structure includes a plurality of resistor units connected end to end in sequence. A switch is set at each resistor unit node. The resistor unit is selected according to the input high-order segment codeword, and the switches at both ends of the resistor unit are closed to form differential output voltages V1 and V2. The output voltage of the high-order segment digital-to-analog converter is the input voltage of the low-order segment digital-to-analog converter. The low-order digital-to-analog converter is a thermometer code voltage-current converter structure, which is used to perform thermometer decoding on the input N-bit low-order code. N The differential pair structure is formed by grouping, and the differential pair is selected according to the thermometer decoding result. The selected differential pair input end is connected to the voltage V2, and the unselected differential pair input end is connected to the voltage V1, 2 N A differential pair converts the differential input voltages V1 and V2 into differential currents, and adjusts the output voltage of the low-segment digital-to-analog converter through negative feedback so that the total current flowing through the differential pair is equal; when every two adjacent code words are switched, only one set of switches of the low-segment digital-to-analog converter performs switching action, and the output voltage of the low-segment digital-to-analog converter is the output voltage of the entire digital-to-analog converter.

2. The high-precision segmented resistor digital-to-analog converter with low glitch energy according to claim 1, characterized in that: The high-bit segment digital-to-analog converter is formed by connecting a number of resistor units end to end in sequence to form a resistor string. The resistance value of the resistor unit is set according to power consumption, accuracy and speed. For an M-bit resistor string structure, 2 M resistance units; Two ends of the resistor string are connected to a first voltage end and a second voltage end respectively, the first voltage end is used to input a first voltage, and the second voltage end is used to input a second voltage.

3. The high-precision segmented resistor digital-to-analog converter with low glitch energy according to claim 2, characterized in that: The high-bit segment digital-to-analog converter further includes a plurality of switches corresponding to the resistance units; A tap connection switch B0 is set between the first voltage terminal and the first resistor unit of the resistor string, and tap connection switches B1, B2, ..., B0 are set between every two resistor units of the resistor string. n-1 , set a tap connection switch B between the last resistor unit of the resistor string and the second voltage terminal n ; Connection switches B0, B2, ..., B n Tap to the first voltage output terminal, output voltage V1, connect switches B1, B3, ..., B n-1 The tap is connected to the second voltage output terminal to output voltage V2.

4. The high-precision segmented resistor digital-to-analog converter with low glitch energy according to claim 3, characterized in that: The switch is switched according to the high-order digital code of the input. M The resistor units correspond to the high-order segment code 2 from top to bottom. M To 0, during digital-to-analog conversion, the input high-order segment code is decoded, the corresponding resistance unit is selected according to the high-order segment codeword of the input digital code, and the corresponding switches at both ends of the resistance unit are closed to form differential output voltages V1 and V2, which are input to the low-order segment digital-to-analog converter.

5. The high-precision segmented resistor digital-to-analog converter with low glitch energy according to claim 4, characterized in that: The high-order segment DAC also includes an adder. After the M-bit high-order segment coded data passes through the adder, the lowest bit is discarded and the M-1-bit data is input into the resistor string structure as switches B0, B2, ..., B n The control signal of M-bit high-order segment coding signal is directly discarded with the lowest bit, and input into the resistor string structure as switches B1, B3, ..., B n-1 control signal.

6. The high-precision segmented resistor digital-to-analog converter with low glitch energy according to claim 5, characterized in that: The low-bit segment digital-to-analog converter includes a plurality of differential pairs, a load circuit and an error amplifier; For an N-bit voltage-to-current converter, set 2 N group differential pair structure, the 2 N The differential pairs are connected in parallel to convert the differential input voltages V1 and V2 into differential currents; the differential currents flow through the load circuit and the error amplifier in sequence, and the output voltage of the low-segment digital-to-analog converter is adjusted through negative feedback.

7. The high-precision segmented resistor digital-to-analog converter with low glitch energy according to claim 6, characterized in that: Decode the input low-order segment code, select the differential pair according to the thermometer code result, connect the selected differential pair input end to voltage V2, connect the unselected differential pair input end to voltage V1, and increase the selected differential pair input voltage from V1 to V2, so that the differential pair generates a differential current Id: ； where gm is the transconductance of the differential pair.

8. The high-precision segmented resistor digital-to-analog converter with low glitch energy according to claim 6, characterized in that: The load circuit includes a first load circuit and a second load circuit. The differential current is respectively input into the first load circuit and the second load circuit to output a differential voltage, which is input into two input terminals of the error amplifier.

9. The high-precision segmented resistor digital-to-analog converter with low glitch energy according to claim 8, characterized in that: The error amplifier is used to amplify the differential voltage output by the first load circuit and the second load circuit, and feed it back to the inverting input terminal of the differential pair to form negative feedback; the voltage at the input terminal of the error amplifier is close to zero, forming a virtual short.

10. The high-precision segmented resistor digital-to-analog converter with low glitch energy according to claim 9, characterized in that: After the differential input voltages V1 and V2 pass through the low-bit segment DAC, they flow through 2 N The current flowing through the positive input terminal of the differential pair is equal to the current flowing through the 2 N The current at the reverse input end of the differential pair is balanced so that the currents on both sides of the differential pair are balanced, which is used to uniformly interpolate the differential input voltages V1 and V2.

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