Solar cell and preparation method thereof

Abstract

The invention provides a solar cell and a preparation method thereof, and the solar cell comprises a substrate which is provided with a first surface, the first surface comprises a P-type doped region and an N-type doped region, the P-type doped region comprises a first region and second regions located at the two sides of the first region, the N-type doped region comprises a third region and fourth regions located at the two sides of the third region, the first region sequentially comprises a first tunneling layer, a first doped polycrystalline silicon layer, a second tunneling layer and a second doped polycrystalline silicon layer in a direction gradually away from the first surface, the first doped polycrystalline silicon layer has a first thickness in a first direction perpendicular to the substrate, and the second doped polycrystalline silicon layer has a second thickness in a second direction perpendicular to the substrate; the second doped polycrystalline silicon layer has a second thickness smaller than the first thickness in the first direction; the second region sequentially comprises a second tunneling layer and a second doped polycrystalline silicon layer in the direction gradually away from the first surface. Parasitic absorption of the cell can be reduced, and the conversion efficiency of the cell is further improved.

Description

Technical Field

[0001] The present application mainly relates to the field of battery technology, and in particular to a solar cell and a method for preparing the same. Background Art

[0002] Full back electrode solar cells, also called IBC (interdigitated back contact) cells, are cells with no electrodes on the front side, and the positive and negative metal grid lines are arranged in finger-like crosses on the back side of the cell. Usually, a thicker doped polysilicon layer is set on the back side of the back contact cell to improve the conversion efficiency of the cell, but since the doped polysilicon layer is set on the entire back side of the cell, the thicker the doped polysilicon layer, the greater the parasitic absorption of the cell, which leads to the loss of short-circuit current of the cell. Summary of the invention

[0003] The technical problem to be solved by the present application is to provide a solar cell and a preparation method thereof, which can reduce the parasitic absorption of the cell and further improve the conversion efficiency of the cell.

[0004] In order to solve the above technical problems, the present application provides a solar cell, comprising: a substrate having a first surface, the first surface comprising a P-type doped region and an N-type doped region, the P-type doped region comprising a first region and a second region located on both sides of the first region, the N-type doped region comprising a third region and a fourth region located on both sides of the third region, wherein the first region comprises, in a direction gradually away from the first surface, a first tunneling layer, a first doped polysilicon layer, a second tunneling layer and a second doped polysilicon layer, wherein the first doped polysilicon layer has a first thickness along a first direction perpendicular to the substrate, and the second doped polysilicon layer has a thickness along the first direction perpendicular to the substrate. A second thickness that is less than the first thickness; the second region includes the second tunneling layer and the second doped polysilicon layer in a direction gradually away from the first surface; the third region includes a third tunneling layer, a third doped polysilicon layer, a fourth tunneling layer and a fourth doped polysilicon layer in a direction gradually away from the first surface, wherein the third doped polysilicon layer has a third thickness along a first direction perpendicular to the substrate, and the fourth doped polysilicon layer has a fourth thickness that is less than the third thickness along the first direction; the fourth region includes the fourth tunneling layer and the fourth doped polysilicon layer in a direction gradually away from the first surface.

[0005] Optionally, the first thickness and the third thickness are in a range of 100 nm to 200 nm, and the second thickness and the fourth thickness are in a range of 30 nm to 50 nm.

[0006] Optionally, the first thickness of the first doped polysilicon layer along the first direction perpendicular to the substrate is the same as the third thickness of the third doped polysilicon layer along the first direction perpendicular to the substrate; the second thickness of the second doped polysilicon layer along the first direction is the same as the fourth thickness of the fourth doped polysilicon layer along the first direction.

[0007] Optionally, the solar cell further comprises a first passivation layer, which is located at a side of the second doped polysilicon layer further away from the first surface in the N-type doping region and at a side of the fourth doped polysilicon layer further away from the first surface in the P-type doping region.

[0008] Optionally, the solar cell further includes an isolation region located between the P-type doping region and the N-type doping region, and the first passivation layer is also located in the isolation region.

[0009] Optionally, the P-type doped region also includes a P-type metal contact region, the first region has a first width along a second direction parallel to the extension direction of the substrate, the P-type metal contact region has a P-type metal contact region width along the second direction, and the first width is greater than or equal to the P-type metal contact region width; the N-type doped region also includes an N-type metal contact region, the third region has a second width along the second direction, the N-type metal contact region has an N-type metal contact region width along the second direction, and the second width is greater than or equal to the N-type metal contact region width.

[0010] Optionally, the solar cell also includes a first metal electrode with a first polarity located in the P-type metal contact area, and a second metal electrode with a second polarity opposite to the first polarity located in the N-type metal contact area, wherein the first metal electrode is in contact with the first doped polysilicon layer, and the second metal electrode is in contact with the third doped polysilicon layer.

[0011] In order to solve the above technical problems, the present application provides a method for preparing a solar cell, comprising: preparing a substrate, the substrate having a first surface, forming a P-type doped region and an N-type doped region on the first surface, the P-type doped region comprising a first region and a second region located on both sides of the first region, the N-type doped region comprising a third region and a fourth region located on both sides of the third region, wherein the first region sequentially comprises a first tunneling layer, a first doped polysilicon layer, a second tunneling layer and a second doped polysilicon layer in a direction gradually away from the first surface, wherein the first doped polysilicon layer has a first thickness along a first direction perpendicular to the substrate, and the second doped polysilicon layer has a first thickness along the ... The first direction has a second thickness less than the first thickness; the second region includes the second tunneling layer and the second doped polysilicon layer in sequence in the direction gradually away from the first surface; the third region includes a third tunneling layer, a third doped polysilicon layer, a fourth tunneling layer and a fourth doped polysilicon layer in the direction gradually away from the first surface, wherein the third doped polysilicon layer has a third thickness along the first direction perpendicular to the substrate, and the fourth doped polysilicon layer has a fourth thickness less than the third thickness along the first direction; the fourth region includes the fourth tunneling layer and the fourth doped polysilicon layer in sequence in the direction gradually away from the first surface.

[0012] Optionally, the preparation method also includes first preparing the first tunneling layer, the first doped polysilicon layer, the second tunneling layer and the second doped polysilicon layer located in the P-type doped area, and then preparing the third tunneling layer, the third doped polysilicon layer, the fourth tunneling layer and the fourth doped polysilicon layer located in the N-type doped area.

[0013] Optionally, the preparation method also includes, after preparing the first tunneling layer, the first doped polysilicon layer, the second tunneling layer and the second doped polysilicon layer located in the P-type doped region, cleaning the first tunneling layer, the first doped polysilicon layer, the second tunneling layer and the second doped polysilicon layer located in the P-type doped region in the N-type doped region to form a damaged area deep into the first surface of the substrate.

[0014] Optionally, the preparation method further includes forming a BSG layer on the second doped polysilicon layer in the P-type doped region before preparing the third tunneling layer, the third doped polysilicon layer, the fourth tunneling layer and the fourth doped polysilicon layer in the N-type doped region.

[0015] Optionally, the preparation method also includes cleaning the third tunneling layer, the third doped polysilicon layer, the fourth tunneling layer and the fourth doped polysilicon layer located in the P-type doping area after preparing the third tunneling layer, the third doped polysilicon layer, the fourth tunneling layer and the fourth doped polysilicon layer in the N-type doping area.

[0016] Optionally, the preparation method also includes forming a PSG layer on the fourth doped polysilicon layer in the N-type doped area before cleaning the third tunneling layer, the third doped polysilicon layer, the fourth tunneling layer and the fourth doped polysilicon layer in the P-type doped area.

[0017] Optionally, the preparation method further comprises preparing an isolation region between the P-type doping region and the N-type doping region after preparing the P-type doping region and the N-type doping region.

[0018] Optionally, the preparation method further comprises cleaning the BSG layer of the P-type doping region and the PSG layer of the N-type doping region after preparing the isolation region.

[0019] Optionally, the preparation method also includes preparing a first passivation layer on the second doped polysilicon layer in the P-type doped area, on the fourth doped polysilicon layer in the N-type doped area, and in the isolation area after cleaning the BSG layer in the P-type doped area and the PSG layer in the N-type doped area.

[0020] Optionally, the preparation method also includes preparing a first metal electrode having a first polarity in the P-type doping region, and preparing a second metal electrode having a second polarity opposite to the first polarity in the N-type doping region, wherein the first metal electrode is in contact with the first doped polysilicon, and the second metal electrode is in contact with the third doped polysilicon.

[0021] Compared with the prior art, the present application provides doped polysilicon layers with different thicknesses in both the P-type doped region and the N-type doped region, wherein the thicker doped polysilicon layer can make the conversion efficiency of the solar cell higher and further optimize the cell performance, while the thinner doped polysilicon layer can reduce the parasitic absorption of light caused by the thick doped polysilicon layer. Therefore, the solar cell provided by the present application can take into account the advantages of doped polysilicon layers of different thicknesses at the same time, further reduce the parasitic absorption of the solar cell while improving the cell conversion efficiency, and improve the performance of the solar cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The accompanying drawings are included to provide a further understanding of the present application. They are included and constitute a part of the present application. The accompanying drawings illustrate embodiments of the present application and together with the present specification serve to explain the principles of the present application. In the accompanying drawings:

[0023] Figure 1 is a schematic structural diagram of a solar cell in one embodiment of the present application;

[0024] Figure 2 is a schematic flow chart of a method for preparing a solar cell in one embodiment of the present application;

[0025] Figure 3 to Figure 12 It is a schematic structural diagram of a solar cell in a certain process of preparing a solar cell in a method for preparing a solar cell in one embodiment of the present application. DETAILED DESCRIPTION

[0026] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for the description of the embodiments. Obviously, the drawings described below are only some examples or embodiments of the present application. For ordinary technicians in this field, the present application can also be applied to other similar scenarios based on these drawings without creative work. Unless it is obvious from the language environment or otherwise explained, the same reference numerals in the figures represent the same structure or operation.

[0027] As shown in this application and claims, unless the context clearly indicates an exception, the words "a", "an", "an" and / or "the" do not refer to the singular and may also include the plural. Generally speaking, the terms "include" and "comprise" only indicate the inclusion of the steps and elements that have been clearly identified, and these steps and elements do not constitute an exclusive list. The method or device may also include other steps or elements.

[0028] Unless otherwise specifically stated, the relative arrangement, numerical expressions and numerical values ​​of the parts and steps set forth in these embodiments do not limit the scope of the present application. At the same time, it should be understood that, for ease of description, the sizes of the various parts shown in the accompanying drawings are not drawn according to the actual proportional relationship. The technology, method and equipment known to those of ordinary skill in the relevant field may not be discussed in detail, but in appropriate cases, the technology, method and equipment should be considered as a part of the authorization specification. In all examples shown and discussed here, any specific value should be interpreted as being merely exemplary, rather than as a limitation. Therefore, other examples of exemplary embodiments may have different values. It should be noted that similar reference numerals and letters represent similar items in the following drawings, so that once a certain item is defined in an accompanying drawing, it does not need to be further discussed in subsequent drawings.

[0029] In the description of the present application, it should be understood that the directions or positional relationships indicated by directional words such as "front, back, up, down, left, right", "lateral, vertical, perpendicular, horizontal" and "top, bottom" are usually based on the directions or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description. Unless otherwise specified, these directional words do not indicate or imply that the device or element referred to must have a specific direction or be constructed and operated in a specific direction, and therefore cannot be understood as limiting the scope of protection of the present application; the directional words "inside and outside" refer to the inside and outside relative to the contours of each component itself.

[0030] For ease of description, spatially relative terms such as "above", "above", "on the upper surface of", "above", etc. may be used here to describe the spatial positional relationship between a device or feature and other devices or features as shown in the figure. It should be understood that spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientation described in the figure. For example, if the device in the accompanying drawings is inverted, the device described as "above other devices or structures" or "above other devices or structures" will be positioned as "below other devices or structures" or "below other devices or structures". Thus, the exemplary term "above" may include both "above" and "below". The device may also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatially relative descriptions used here are interpreted accordingly.

[0031] In addition, it should be noted that the use of words such as "first" and "second" to define components is only for the convenience of distinguishing the corresponding components. If not otherwise stated, the above words have no special meaning and cannot be understood as limiting the scope of protection of this application. In addition, although the terms used in this application are selected from well-known and commonly used terms, some terms mentioned in the specification of this application may be selected by the applicant at his or her discretion, and their detailed meanings are explained in the relevant parts of the description of this article. In addition, it is required to understand this application not only by the actual terms used, but also by the meaning implied by each term.

[0032] This application refers to Figure 1 A schematic diagram of the structure of a solar cell 10 is shown. Figure 1 As shown, the solar cell 10 includes a substrate 11, a first surface S1 of the substrate 11, the first surface S1 includes a P-type doping region A10 and an N-type doping region A20, the P-type doping region A10 includes a first region A1 and a second region A2 located on both sides of the first region A1, and the N-type doping region A20 includes a third region A2 and a fourth region A4 located on both sides of the third region A3.

[0033] Now refer to Figure 1 First, the structure of the P-type doping region A10 is described. The first region A1 of the P-type doping region A10 includes a first tunneling layer 12, a first doped polysilicon layer 13, a second tunneling layer 14, and a second doped polysilicon layer 15 in a direction gradually away from the first surface S1, wherein the first doped polysilicon layer 13 has a first thickness h1 along a first direction y perpendicular to the substrate 11, and the second doped polysilicon layer 15 has a second thickness h2 less than the first thickness h1 along the first direction y. The second region A2 of the P-type doping region A10 includes a second tunneling layer 14 and a second doped polysilicon layer 15 in a direction gradually away from the first surface S1.

[0034] Further, see Figure 1 The structure of the N-type doped region A20 is described. The third region A3 of the N-type doped region A20 includes a third tunneling layer 22, a third doped polysilicon layer 23, a fourth tunneling layer 24, and a fourth doped polysilicon layer 25 in a direction gradually away from the first surface S1, wherein the third doped polysilicon layer 23 has a third thickness h3 along a first direction y perpendicular to the substrate 11, and the fourth doped polysilicon layer 25 has a fourth thickness h4 along the first direction y that is less than the third thickness h3. The fourth region A4 of the N-type doped region A20 includes a fourth tunneling layer 24 and a fourth doped polysilicon layer 25 in a direction gradually away from the first surface S1.

[0035] In this embodiment, preferably, the first thickness h1 of the first doped polysilicon layer 13 along the first direction y perpendicular to the substrate 11 is the same as the third thickness h3 of the third doped polysilicon layer 23 along the first direction y perpendicular to the substrate 11; the second thickness h2 of the second doped polysilicon layer 15 along the first direction y is the same as the fourth thickness h4 of the fourth doped polysilicon layer 25 along the first direction y. Exemplarily, the thickness range of the first thickness h1 and the third thickness h3 is 100nm to 200nm, and the thickness range of the second thickness h2 and the fourth thickness h4 is 30nm to 50nm.

[0036] In this embodiment, taking the P-type doping area A10 as an example, in the P-type doping area A10, the thickness of the first doped polysilicon layer 13 is 150Pm, and the first doped polysilicon layer 13 in this thickness range is beneficial to the conversion efficiency of the solar cell 10, and further a second doped polysilicon layer 15 with a thickness of 30Pm is set in the P-type doping area A10, which can further reduce the parasitic absorption of the solar cell 10, so that the solar cell 10 can take into account the advantages of thick doped polysilicon layers and thin doped polysilicon layers, so that the solar cell 10 can further reduce the parasitic absorption of the solar cell while improving the cell conversion efficiency, so that the solar cell 10 has better performance. The third doped polysilicon layer 23 and the fourth doped polysilicon layer 25 of the N-type doping area A20 have the same structural settings as the first doped polysilicon layer 13 and the second doped polysilicon layer 15 in the P-type doping area A10, and can also achieve the same effect, which will not be elaborated here.

[0037] Exemplarily, the first doped polysilicon layer 13 and the second doped polysilicon layer 15 in the P-type doping region A10 include P-poly, and the third doped polysilicon layer 23 and the fourth doped polysilicon layer 25 in the N-type doping region A20 include N-poly.

[0038] On the other hand, the solar cell 10 further includes a first passivation layer 16, which is located on a side of the second doped polysilicon layer 15 further away from the first surface S1 in the P-type doping region A10 and on a side of the fourth doped polysilicon layer 25 further away from the first surface S1 in the N-type doping region A20. Exemplarily, the first passivation layer 16 may be an aluminum oxide silicon nitride layer. Further, the solar cell 10 further includes an isolation region A30 located between the P-type doping region A10 and the N-type doping region A20, and the first passivation layer 16 is also located in the isolation region A30.

[0039] In this embodiment, the P-type doping region A10 also includes a P-type metal contact region A11, the first region A1 has a first width W1 along a second direction x parallel to the extension direction of the substrate 11, the P-type metal contact region A11 has a P-type metal contact region width W11 along the second direction x, and the first width W1 is greater than the P-type metal contact region width W11. In other embodiments of the present application, the first width W1 may be equal to the P-type metal contact region width W11, and the present application does not limit this. Exemplarily, the width range of the N-type metal contact region width W11 is 20nm to 30nm.

[0040] Further, the N-type doping region A20 also includes an N-type metal contact region A22, the third region A3 has a second width W2 along the second direction x, the N-type metal contact region A22 has an N-type metal contact region width W22 along the second direction x, and the second width W2 is greater than the N-type metal contact region width W22. In other embodiments of the present application, the second width W2 may be equal to the N-type metal contact region width W22, and the present application does not limit this. The width range of the N-type metal contact region width W22 is 20nm to 30nm.

[0041] On the other hand, the solar cell 10 also includes a first metal electrode 17 with a first polarity located in the P-type metal contact area A11, and a second metal electrode 18 with a second polarity opposite to the first polarity located in the N-type metal contact area A22, wherein the first metal electrode 17 is in contact with the first doped polysilicon layer 13, and the second metal electrode 18 is in contact with the third doped polysilicon layer 23.

[0042] This application also refers to Figure 2 A method 20 for preparing a solar cell (hereinafter referred to as "preparation method 20") is proposed, which is suitable for preparing the solar cell 10 proposed in any embodiment of the present application, such as the above-mentioned solar cell 10. Flowcharts are used in the present application to illustrate the operations performed by the system according to the embodiments of the present application. It should be understood that the previous or following operations are not necessarily performed precisely in sequence. Instead, various steps can be processed in reverse order or simultaneously. At the same time, other operations may be added to these processes, or one or more operations may be removed from these processes.

[0043] Specifically, the preparation method 20 includes first preparing a substrate, the substrate having a first surface, forming a P-type doping region and an N-type doping region on the first surface, the P-type doping region includes a first region and a second region located on both sides of the first region, and the N-type doping region includes a third region and a fourth region located on both sides of the third region.

[0044] The following will take the solar cell 10 as an example. Figure 3 to Figure 12 The process of preparing the solar cell 10 using the preparation method 20 is described one by one. Figure 3 to Figure 12 A schematic structural diagram of the solar cell 10 is shown during the process of preparing the solar cell 10 by the preparation method 20 .

[0045] In this embodiment, the preparation method 20 includes first preparing a first tunneling layer 12, a first doped polysilicon layer 13, a second tunneling layer 14 and a second doped polysilicon layer 15 located in the P-type doping region A10. Figure 3The preparation method 20 includes first preparing a first tunneling layer 12 and a first doped polysilicon layer 13 having a first thickness h1 on the first surface of the substrate 11 in sequence, and at this time, the first tunneling layer 12 and the first doped polysilicon layer 13 exist in both the P-type doping area A10 and the N-type doping area A20.

[0046] Further references Figure 4 After the first tunneling layer 12 and the first doped polysilicon layer 13 are prepared on the substrate 11, laser etching is used to retain only the first tunneling layer 12 and the first doped polysilicon layer 13 located in the first area A1, that is, the first tunneling layer 12 and the first doped polysilicon layer 13 in the emitter region in the P-type doped area A10 are retained.

[0047] Then refer to Figure 5 , continue to prepare the second tunneling layer 14 and the second doped polysilicon layer 15 with a second thickness h2, by Figure 5 It can be seen that at this time, a BSG layer 19 is formed on the second doped polysilicon layer 15. At this time, the P-type doped region A10 has the first tunneling layer 12, the first doped polysilicon layer 13, the second tunneling layer 14, the second doped polysilicon layer 15 and the BSG layer 19 in sequence as it gradually moves away from the first surface S1. At this time, the second tunneling layer 14 and the second doped polysilicon layer 15 exist in the N-type doped region A20.

[0048] Next refer to Figure 6 After preparing the first tunneling layer 12, the first doped polysilicon layer 13, the second tunneling layer 14 and the second doped polysilicon layer 15 in the P-type doping region, it is necessary to remove the second tunneling layer 14 and the second doped polysilicon layer 15 in the N-type doping region A20 by laser etching. As can be seen from the figure, the second tunneling layer 14 and the second doped polysilicon layer 15 in the second region A2 in the P-type doping region are retained at this time, and in order to completely remove the second tunneling layer 14 and the second doped polysilicon layer 15 in the N-type doping region A20, the preparation method 20 not only laser etches the second tunneling layer 14 and the second doped polysilicon layer 15 in the N-type doping region A20 on the first surface S1, but also further penetrates into the substrate 11 for laser etching, thereby forming a damaged area A0, so as to achieve the purpose of better removing the second tunneling layer 14 and the second doped polysilicon layer 15 in the N-type doping region A20.

[0049] Further references Figure 7 to Figure 9 After preparing the first tunneling layer 12, the first doped polysilicon layer 13, the second tunneling layer 14 and the second doped polysilicon layer 15 in the P-type doping area A10, the third tunneling layer 22, the third doped polysilicon layer 23, the fourth tunneling layer 24 and the fourth doped polysilicon layer 25 in the N-type doping area A20 can be prepared.

[0050] Specifically, refer to Figure 7 , a third tunneling layer 22 and a third doped polysilicon layer 23 are sequentially prepared on the BSG layer 19 of the P-type doping region and on the N-type doping region A20. After the third tunneling layer 22 and the third doped polysilicon layer 23 are prepared, further referring to Figure 8 In the preparation method 20, an INK protection layer 30 is prepared on the third doped polysilicon layer 23 in the third area A3 of the N-type doping area A20. Fig. 9 , ammonia and hydrogen peroxide are used to remove the third doped polysilicon layer 23 in the P-type doped area A10 and the third tunneling layer 22 and the third doped polysilicon layer 23 in the fourth area A4 of the N-type doped area A20. At this time, the P-type doped area A10 has the first tunneling layer 12, the first doped polysilicon layer 13, the second tunneling layer 14, the second doped polysilicon layer 15, the BSG layer 19 and the third tunneling layer 22. At this time, the emitter position of the N-type doped area A20 includes the third tunneling layer 22, the third doped polysilicon layer 23 and the INK protection layer 30.

[0051] In this embodiment, the width W30 of the INK protective layer is preferably greater than the second width W2 of the third area A3, and the material thereof is ink, which has the characteristic of not reacting with acid, so that when the third tunneling layer 22 and the third doped polysilicon layer 23 in the fourth area A4 of the N-type doped area A20 are removed by using ammonia water and hydrogen peroxide, the third tunneling layer 22 and the third doped polysilicon layer 23 in the third area A3 can be protected from corrosion. The performance of the solar cell 10 is further guaranteed.

[0052] Further references Fig.10 A fourth tunneling layer 24 and a fourth doped polysilicon layer 25 are sequentially prepared on the P-type doping region A10 and the fourth region A4 in the N-type doping region A20 and the third doped polysilicon layer 23 located on the third region A3, and a PSG layer 26 is formed.

[0053] Next refer to Fig.11 , laser etching is used to remove the third tunneling layer 22, the fourth tunneling layer 24, the fourth doped polysilicon layer 25 and the PSG layer 26 in the P-type doping region A10. At this time, the P-type doping region A10 only includes the first tunneling layer 12, the first doped polysilicon layer 13, the second tunneling layer 14, the second doped polysilicon layer 15 and the BSG layer, while the N-type doping region A20 includes the third tunneling layer 22, the third doped polysilicon layer 23, the fourth tunneling layer 24, the fourth doped polysilicon layer 25 and the PSG layer 26. Further, a laser isolation method is used to prepare an isolation region A30 between the P-type doping region A10 and the N-type doping region A20.

[0054] Further references Fig.12The preparation method 20 further includes cleaning the BSG layer 19 of the P-type doping region A10 and the PSG layer 26 of the N-type doping region A20 after preparing the isolation region A30.

[0055] Last return reference Figure 1 The preparation method 20 further includes preparing a first passivation layer 16 on the second doped polysilicon layer 15 of the P-type doped region A10, on the fourth doped polysilicon layer 25 of the N-type doped region A20, and in the isolation region A30 after cleaning the BSG layer 19 of the P-type doped region A10 and the PSG layer 26 of the N-type doped region A20. Then, a first metal electrode 17 having a first polarity is prepared in the P-type doped region A10, and a second metal electrode 18 having a second polarity opposite to the first polarity is prepared in the N-type doped region A20, wherein the first metal electrode 17 contacts the first doped polysilicon layer 13, and the second metal electrode 18 contacts the third doped polysilicon layer 23.

[0056] The present application provides doped polysilicon layers with different thicknesses in both the P-type doped region and the N-type doped region, wherein the thicker doped polysilicon layer can make the conversion efficiency of the solar cell higher and further optimize the battery performance, while the thinner doped polysilicon layer can reduce the parasitic absorption of light caused by the thick doped polysilicon layer. Therefore, the solar cell provided by the present application can take into account the advantages of doped polysilicon layers of different thicknesses at the same time, further reduce the parasitic absorption of the solar cell while improving the battery conversion efficiency, and improve the performance of the solar cell.

[0057] The basic concepts have been described above. Obviously, for those skilled in the art, the above application disclosure is only an example and does not constitute a limitation of the present application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements and amendments to the present application. Such modifications, improvements and amendments are suggested in the present application, so such modifications, improvements and amendments still belong to the spirit and scope of the exemplary embodiments of the present application.

[0058] At the same time, the present application uses specific words to describe the embodiments of the present application. For example, "one embodiment", "an embodiment", and / or "some embodiments" refer to a certain feature, structure or characteristic related to at least one embodiment of the present application. Therefore, it should be emphasized and noted that "one embodiment" or "an embodiment" or "an alternative embodiment" mentioned twice or more in different positions in this specification does not necessarily refer to the same embodiment. In addition, some features, structures or characteristics in one or more embodiments of the present application can be appropriately combined.

[0059] Similarly, it should be noted that in order to simplify the description of the disclosure of this application and thus help understand one or more application embodiments, in the above description of the embodiments of this application, multiple features are sometimes merged into one embodiment, figure or description thereof. However, this disclosure method does not mean that the features required by the object of this application are more than the features mentioned in the claims. In fact, the features of the embodiments are less than all the features of the single embodiment disclosed above.

[0060] In some embodiments, numbers describing the number of components and attributes are used. It should be understood that such numbers used in the description of the embodiments are modified by the modifiers "about", "approximately" or "substantially" in some examples. Unless otherwise specified, "about", "approximately" or "substantially" indicate that the numbers are allowed to vary by ±20%. Accordingly, in some embodiments, the numerical parameters used in the specification and claims are approximate values, which may change according to the required features of individual embodiments. In some embodiments, the numerical parameters should take into account the specified significant digits and adopt the general method of retaining digits. Although the numerical domains and parameters used to confirm the breadth of their range in some embodiments of the present application are approximate values, in specific embodiments, the setting of such numerical values ​​is as accurate as possible within the feasible range.

[0061] Although the present application has been described with reference to the current specific embodiments, ordinary technicians in this technical field should recognize that the above embodiments are only used to illustrate the present application, and various equivalent changes or substitutions may be made without departing from the spirit of the present application. Therefore, as long as the changes and modifications to the above embodiments are within the essential spirit of the present application, they will fall within the scope of the claims of the present application.

Claims

1. A solar cell, characterized in that: include: A substrate having a first surface, wherein the first surface includes a P-type doping region and an N-type doping region, wherein the P-type doping region includes a first region and a second region located on both sides of the first region, and the N-type doping region includes a third region and a fourth region located on both sides of the third region, wherein: The first region includes, in sequence in a direction gradually away from the first surface, a first tunneling layer, a first doped polysilicon layer, a second tunneling layer, and a second doped polysilicon layer, wherein the first doped polysilicon layer has a first thickness along a first direction perpendicular to the substrate, and the second doped polysilicon layer has a second thickness along the first direction that is less than the first thickness; The second region includes the second tunneling layer and the second doped polysilicon layer in sequence in a direction gradually away from the first surface; The third region includes, in sequence in a direction gradually away from the first surface, a third tunneling layer, a third doped polysilicon layer, a fourth tunneling layer and a fourth doped polysilicon layer, wherein the third doped polysilicon layer has a third thickness along a first direction perpendicular to the substrate, and the fourth doped polysilicon layer has a fourth thickness along the first direction that is less than the third thickness; The fourth region includes the fourth tunneling layer and the fourth doped polysilicon layer in sequence in a direction gradually away from the first surface.

2. The solar cell according to claim 1, wherein: The first thickness and the third thickness are in the range of 100 nm to 200 nm, and the second thickness and the fourth thickness are in the range of 30 nm to 50 nm.

3. The solar cell according to claim 2, characterized in that A first thickness of the first doped polysilicon layer along a first direction perpendicular to the substrate is the same as a third thickness of the third doped polysilicon layer along the first direction perpendicular to the substrate; A second thickness of the second doped polysilicon layer along the first direction is the same as a fourth thickness of the fourth doped polysilicon layer along the first direction.

4. The solar cell according to claim 1, wherein: A first passivation layer is also included, which is located at a side of the second doped polysilicon layer further away from the first surface in the P-type doping region and at a side of the fourth doped polysilicon layer further away from the first surface in the N-type doping region.

5. The solar cell according to claim 4, characterized in that The first passivation layer includes an aluminum oxide silicon nitride layer.

6. The solar cell according to claim 5, characterized in that It also includes an isolation region located between the P-type doping region and the N-type doping region, and the first passivation layer is also located in the isolation region.

7. The solar cell according to any one of claims 1 to 6, characterized in that: The P-type doped region further includes a P-type metal contact region, the first region has a first width along a second direction parallel to the substrate extension direction, the P-type metal contact region has a P-type metal contact region width along the second direction, and the first width is greater than or equal to the P-type metal contact region width; The N-type doped region also includes an N-type metal contact region. The third region has a second width along the second direction. The N-type metal contact region has an N-type metal contact region width along the second direction. The second width is greater than or equal to the N-type metal contact region width.

8. The solar cell according to claim 7, wherein: It also includes a first metal electrode with a first polarity located in the P-type metal contact area, and a second metal electrode with a second polarity opposite to the first polarity located in the N-type metal contact area, wherein the first metal electrode is in contact with the first doped polysilicon layer, and the second metal electrode is in contact with the third doped polysilicon layer.

9. A method for preparing a solar cell, characterized in that: include: A substrate is prepared, the substrate having a first surface, a P-type doping region and an N-type doping region are formed on the first surface, the P-type doping region includes a first region and a second region located on both sides of the first region, the N-type doping region includes a third region and a fourth region located on both sides of the third region, wherein: The first region includes, in sequence in a direction gradually away from the first surface, a first tunneling layer, a first doped polysilicon layer, a second tunneling layer, and a second doped polysilicon layer, wherein the first doped polysilicon layer has a first thickness along a first direction perpendicular to the substrate, and the second doped polysilicon layer has a second thickness along the first direction that is less than the first thickness; The second region includes the second tunneling layer and the second doped polysilicon layer in sequence in a direction gradually away from the first surface; The third region includes, in sequence in a direction gradually away from the first surface, a third tunneling layer, a third doped polysilicon layer, a fourth tunneling layer and a fourth doped polysilicon layer, wherein the third doped polysilicon layer has a third thickness along a first direction perpendicular to the substrate, and the fourth doped polysilicon layer has a fourth thickness along the first direction that is less than the third thickness; The fourth region includes the fourth tunneling layer and the fourth doped polysilicon layer in sequence in a direction gradually away from the first surface.

10. The preparation method according to claim 9, characterized in that: It also includes first preparing the first tunneling layer, the first doped polysilicon layer, the second tunneling layer and the second doped polysilicon layer located in the P-type doping area, and then preparing the third tunneling layer, the third doped polysilicon layer, the fourth tunneling layer and the fourth doped polysilicon layer located in the N-type doping area.

11. The preparation method according to claim 10, characterized in that: It also includes removing the first tunneling layer and the first doped polysilicon layer located in the N-type doping area after preparing the first tunneling layer and the first doped polysilicon layer located in the P-type doping area, and removing the second tunneling layer and the second doped polysilicon layer located in the N-type doping area after preparing the second tunneling layer and the second doped polysilicon layer located in the P-type doping area to form a damaged area deep into the first surface of the substrate.

12. The preparation method according to claim 10, characterized in that: It also includes forming a BSG layer on the second doped polysilicon layer in the P-type doped region before preparing the third tunneling layer, the third doped polysilicon layer, the fourth tunneling layer and the fourth doped polysilicon layer in the N-type doped region.

13. The preparation method according to claim 12, characterized in that: It also includes removing the third doped polysilicon layer located in the P-type doped area after preparing the third tunneling layer and the third doped polysilicon layer in the N-type doped area; and cleaning the third tunneling layer, the fourth tunneling layer and the fourth doped polysilicon layer located in the P-type doped area after preparing the fourth tunneling layer and the fourth doped polysilicon layer in the N-type doped area.

14. The preparation method according to claim 13, characterized in that: The method further includes forming a PSG layer on the fourth doped polysilicon layer in the N-type doped region before cleaning the third tunneling layer, the fourth tunneling layer and the fourth doped polysilicon layer in the P-type doped region.

15. The preparation method according to claim 14, characterized in that: The method further includes preparing an isolation region between the P-type doping region and the N-type doping region after preparing the P-type doping region and the N-type doping region.

16. The preparation method according to claim 15, characterized in that: The method further includes cleaning the BSG layer in the P-type doping region and the PSG layer in the N-type doping region after preparing the isolation region.

17. The preparation method according to claim 16, characterized in that: It also includes preparing a first passivation layer on the second doped polysilicon layer in the P-type doped area, on the fourth doped polysilicon layer in the N-type doped area, and in the isolation area after cleaning the BSG layer in the P-type doped area and the PSG layer in the N-type doped area.

18. The preparation method according to any one of claims 9 to 17, characterized in that: It also includes preparing a first metal electrode with a first polarity in the P-type doping region, and preparing a second metal electrode with a second polarity opposite to the first polarity in the N-type doping region, wherein the first metal electrode is in contact with the first doped polysilicon, and the second metal electrode is in contact with the third doped polysilicon.

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