On-chip integrated squid cryogenic thermometer and method of making the same

Abstract

The present disclosure relates to a second-order gradient independent input feedback superconducting quantum interference device and a preparation method thereof, comprising: eight superconducting pads, the eight superconducting pads comprising four input superconducting pads and four negative feedback superconducting pads, one input superconducting pad and one negative feedback superconducting pad forming one superconducting loop, the four superconducting loops being in parallel and arranged in a central symmetry; an input coil, the input coil being coupled with the four input superconducting pads; and a negative feedback coil, the negative feedback coil being coupled with the four negative feedback superconducting pads. The present disclosure can effectively reduce the crosstalk phenomenon between the input coil and the feedback coil, and improve the coupling coefficient and the transfer efficiency of the input coil and the feedback coil.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of superconducting electronics, and in particular to an on-chip integrated SQUID cryogenic thermometer and a preparation method thereof. BACKGROUND

[0002] A superconducting quantum interference device (SQUID) is the most sensitive magnetic field sensor at present, and its equivalent energy resolution can approach the quantum limit level, and is widely used in biological magnetic measurement and geomagnetic detection. A current sensor based on a SQUID can precisely measure a small current and other signals equivalent to magnetic flux, and is the only readout device of a transition-edge sensor (TES), a metallic magnetic calorimeter (MMC), a cryogenic current comparator (CCC) and the like.

[0003] In 2016, Germany used a SQUID-based cryogenic thermometer for temperature measurement, used two SQUIDs to measure the noise spectrum of the same heat source, used a cross-correlation method to eliminate other noise signals except thermal noise, and used an additional calibration coil to measure the conductivity of the sensor.

[0004] The current SQUID cryogenic thermometer system uses a 2mm metal structure machined by a traditional mechanical process as a signal source, and a chip above the signal source is coupled to each other with a spacing of tens to hundreds of microns, so as to read the corresponding noise signal, and the system needs to introduce an additional calibration coil to measure the conductivity of the corresponding thick metal structure at extremely low temperature by applying a standard alternating current signal. The overall structure is difficult to process, the overall uncertainty of the system is limited by the machining precision, and the contribution of the overall uncertainty is more than 90%, and the conductivity measurement is complex. SUMMARY

[0005] Therefore, it is necessary to provide an on-chip integrated SQUID cryogenic thermometer and a preparation method thereof to at least effectively reduce the error of the SQUID cryogenic thermometer for temperature measurement.

[0006] Meanwhile, the SQUID cryogenic thermometer is integrated on a semiconductor device, the conductivity of the metal temperature layer can be measured directly using the conductivity measurement unit, the complexity and error of the SQUID cryogenic thermometer can be reduced, and the SQUID cryogenic thermometer no longer needs to use a calibration coil to calibrate the conductivity of the metal temperature layer through a complex coil control process.

[0007] To achieve the above object and other objects, in a first aspect, the present disclosure provides an on-chip integrated SQUID cryogenic thermometer, the SQUID cryogenic thermometer is formed in a semiconductor device, the semiconductor device comprises a SQUID layer, a superconducting gradient coil layer and a metal temperature layer, wherein the on-chip integrated SQUID cryogenic thermometer comprises: at least two SQUID coils, the at least two SQUID coils are located in the SQUID layer; at least two superconducting gradient coils, the at least two superconducting gradient coils are at least partially located below the metal temperature layer, and the at least two superconducting gradient coils are at least partially located in a hollow region; and a conductivity measurement unit, the conductivity measurement unit is integrated in a chip.

[0008] In the on-chip integrated SQUID cryogenic thermometer in the above embodiment, the SQUID layer, the superconducting gradient coil layer and the metal temperature layer are integrated in the semiconductor device, and the conductivity measurement unit is directly used to measure the conductivity of the metal temperature layer, which can at least effectively reduce the error of the SQUID cryogenic thermometer in temperature measurement, and directly using the conductivity measurement unit to measure the conductivity of the metal temperature layer can also reduce the complexity and error of the SQUID cryogenic thermometer, so that the SQUID cryogenic thermometer no longer needs to use a calibration coil to calibrate the conductivity of the metal temperature layer through a complex coil control process.

[0009] In one of the embodiments, the superconducting gradient coils located below the metal temperature layer have the same winding direction and are coupled to each other.

[0010] In one of the embodiments, the multiple sub-coils located at the hollow position have opposite winding directions to the multiple sub-coils located on the metal to be measured of the SQUID coil, and are decoupled from each other.

[0011] In one of the embodiments, the at least two superconducting gradient coils located below the metal temperature layer are used to read the metal noise of the metal temperature layer; the at least two superconducting gradient coils located in the hollow region are used to read the space noise; and the conductivity measurement unit is used to measure the conductivity of the metal temperature layer.

[0012] In the on-chip integrated SQUID cryogenic thermometer in the above embodiment, the temperature noise in the metal temperature layer is read through the effective coupling of the superconducting gradient coils, and the two-by-two decoupling design is performed at the hollow position, which eliminates the interference of the space noise on the cryogenic thermometer.

[0013] In one of the embodiments, each superconducting gradient coil is connected to a corresponding SQUID coil, each superconducting gradient coil comprises multiple sub-coils, and the multiple sub-coils of each superconducting gradient coil are connected in series.

[0014] In one of the embodiments, each superconducting gradient coil comprises a first sub-coil, a second sub-coil, a third sub-coil and a fourth sub-coil; one end of the first sub-coil is connected to one end of a SQUID coil, the other end of the first sub-coil is connected to one end of the second sub-coil, the other end of the second sub-coil is connected to one end of the third sub-coil, the other end of the third sub-coil is connected to one end of the fourth sub-coil, the other end of the fourth sub-coil is connected to the other end of a SQUID coil; the first coil and the fourth coil are located below the metal temperature layer, and the second coil and the third coil are located in the hollow region.

[0015] In the on-chip integrated SQUID cryogenic thermometer in the above embodiments, the temperature noise of the measured resistance is detected by the first coil and the fourth coil, and the spatial noise is detected by the second coil and the third coil, which simplifies the complexity of the superconducting gradient coil and improves the detection accuracy.

[0016] In one of the embodiments, the plurality of sub-coils of each superconducting gradient coil are connected through superconducting leads.

[0017] In the on-chip integrated SQUID cryogenic thermometer in the above embodiments, through the design of superconducting connection, the interface resistance introduced additionally is avoided, and only the random spatial noise is coupled through inductance.

[0018] In one of the embodiments, the on-chip integrated SQUID cryogenic thermometer comprises a substrate, a SQUID layer located on the substrate, a superconducting gradient coil layer located on the substrate, an insulating layer located on the SQUID layer and / or the superconducting gradient coil layer, and a metal temperature layer located on the insulating layer.

[0019] In one of the embodiments, the substrate, the first superconducting layer, the first insulating layer, the second superconducting layer, the second insulating layer, the superconducting coil layer and the resistance layer are used to form a plurality of SQUID coils; the superconducting coil layer is also used to form a plurality of superconducting gradient coils; the SQUID layer and / or the superconducting gradient coil layer are staggered on the same layer of the substrate.

[0020] In a second aspect, the embodiments of the present disclosure further provide a preparation method of an on-chip integrated SQUID cryogenic thermometer, which is characterized by comprising: forming a substrate; forming a SQUID layer on the substrate; forming a superconducting gradient coil layer on the substrate; forming an insulating layer on the SQUID layer and / or the superconducting gradient coil layer; forming a metal temperature layer on the insulating layer; and constructing an electrical conductivity measurement unit in the metal temperature layer by means of micro-nano processing; wherein the SQUID layer comprises at least two SQUID coils, and the at least two SQUID coils are located on the SQUID layer; the superconducting gradient coil layer comprises at least two superconducting gradient coils, and the at least two superconducting gradient coils are at least partially located below the metal temperature layer and at least partially located in a hollow region.

[0021] In the preparation method of the on-chip integrated SQUID cryogenic thermometer in the above embodiment, the SQUID layer, the superconducting gradient coil layer and the metal temperature layer are integrated in the semiconductor device, and the conductivity measurement unit is used to directly measure the conductivity of the metal temperature layer, thereby effectively reducing the temperature measurement error of the SQUID cryogenic thermometer, and directly measuring the conductivity of the metal temperature layer by the conductivity measurement unit can reduce the complexity and error of the SQUID cryogenic thermometer, so that the SQUID cryogenic thermometer no longer needs to use the calibration coil to calibrate the conductivity of the metal temperature layer through a complex coil control process. BRIEF DESCRIPTION OF DRAWINGS

[0022] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings needed in the embodiments will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present disclosure, and other drawings can also be obtained by those skilled in the art without creative labor.

[0023] Figure 1 FIG. 1 is a structural schematic diagram of an on-chip integrated SQUID cryogenic thermometer provided in an embodiment;

[0024] Figure 2 FIG. 2 is an equivalent circuit diagram of the on-chip integrated SQUID cryogenic thermometer provided in an embodiment;

[0025] Figure 3 FIG. 3 is another structural schematic diagram of an on-chip integrated SQUID cryogenic thermometer provided in an embodiment;

[0026] Figure 4 FIG. 4 is a flowchart of a preparation method of the on-chip integrated SQUID cryogenic thermometer provided in an embodiment.

[0027] BRIEF DESCRIPTION OF DRAWINGS

[0028] 101, silicon wafer; 102, metal layer; SQUID1, first SQUID device; SQUID2, second SQUID device; CH1, first SQUID coil; CH2, second SQUID coil; L1, first coil; L2, second coil; L3, third coil; L4, fourth coil; 201, conductivity measurement unit; 202, on-chip area; 203, hollow area; 301, substrate; 302, superconducting gradient coil layer; 303, SQUID layer; 304, insulating layer; 305, metal temperature layer. DETAILED DESCRIPTION

[0029] For the purposes of the present disclosure, certain terms will now be defined, summarized below. These preferred embodiments of the present disclosure are shown in the attached drawings, which are made a part hereof; and which will be described together with the specification diverse forms. Rather, these embodiments are meant to be illustrative of the disclosure.

[0030] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terminology used in the description herein is for describing particular embodiments only and is not intended to be limiting of the disclosure.

[0031] It will be understood that when an element or layer is referred to as being "on" or "adjacent" or "connected" or "coupled" to another element or layer, it can be directly on, adjacent, connected or coupled to the other element or layer or one or more intervening elements or layers can be present. In contrast, when an element is referred to as being "directly on," "directly adjacent," "directly connected" or "directly coupled" to another element or layer, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section; for example, a first dopant type could be termed a second dopant type, and similarly, a second dopant type could be termed a first dopant type; a first dopant type and a second dopant type are different dopant types, for example, a first dopant type could be P-type and a second dopant type could be N-type, or a first dopant type could be N-type and a second dopant type could be P-type.

[0032] Spatially relative terms, such as "beneath", "below", "lower", "under", "above", "upper" and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and / or operation in addition to the orientations depicted in the figures. For example, if a device in the figures is inverted, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary term "below" can encompass both an orientation of above and below. The devices can be otherwise oriented (e.g., rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

[0033] As used herein, the singular form "a", "an" and "the" include plural references unless the context clearly dictates otherwise. As used herein, the term "comprises" and / or "comprising", when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0034] Embodiments of the application are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the present disclosure. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and / or tolerances, are to be expected. Thus, embodiments of the present disclosure should not be construed as limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an implanted region illustrated as a rectangle will, typically, have rounded or curved features and / or a gradient of implant concentration at its edges rather than a binary change between implanted and non-implanted region. Similarly, a buried region formed by implantation can result in some implantation in a region between the buried region and a surface through which the implantation occurs. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the present disclosure.

[0035] Please refer to Figure 1 , Figure 1 A schematic diagram of the structure of a prior art SQUID cryogenic thermometer. The prior art SQUID cryogenic thermometer is overall cylindrical, with the SQUID cryogenic thermometer formed within the cylinder.

[0036] Please continue to refer to Figure 1The superconducting gradient coil of the prior art SQUID cryogenic thermometer is formed on the silicon wafer 101, and the superconducting gradient coil of the prior art SQUID cryogenic thermometer is partially located below the metal layer 102 on the silicon wafer 101 and partially located in the hollow area 203. The metal layer 102 of the prior art SQUID cryogenic thermometer is manufactured by mechanical processing (for example, by a numerical control machine tool or the like), and the error generated by the mechanical processing manufacturing method is difficult to be ignored for the precise detection equipment such as the SQUID cryogenic thermometer.

[0037] Based on the data analysis of the existing SQUID cryogenic thermometer, among the various reasons that may cause the detection error of the SQUID cryogenic thermometer, the error of the metal layer 102 accounts for a high proportion (up to more than 90%) in the total detection error.

[0038] And when the SQUID cryogenic thermometer is used for temperature measurement, the first SQUID device SQUID1 and the second SQUID device SQUID2 are needed to measure the noise spectrum of the same heat source, and the cross-correlation method is used to eliminate other noise signals except thermal noise, and an additional calibration coil is used to measure the conductivity of the sensor.

[0039] For example, when the temperature is about 16 mK, the SQUID cryogenic thermometer can collect about 420 million samples in 700 minutes, and after about 50,000 times of average processing, the cross power spectral density with a frequency range of (0.61-5000) Hz is obtained, and a large number of samples are selected to reduce the influence of the statistical uncertainty component. The most important uncertainty in the above steps comes from the measurement uncertainty of the distance between the detection coil and the calibration coil and the distance between the detection coil and the sensor surface.

[0040] And in the prior art, a complex calibration coil structure needs to be formed to measure the conductivity of the metal layer 102, which not only occupies a large space in the SQUID cryogenic thermometer, but also makes the measurement process of the conductivity very complex and the accuracy is low.

[0041] As an example, the standard uncertainty of the geometric parameters of the existing SQUID cryogenic thermometer design scheme is 1.5 microns.

[0042] Please refer to Figures 2-3 It should be noted that the diagrams provided in the embodiments only illustrate the basic concept of the present application in a schematic manner, and only show the components related to the present application, not the number, shape and size of the components when actually implemented. The actual implementation of each component may be arbitrarily changed in shape, number and proportion, and the component layout pattern may be more complex.

[0043] Please refer to Figure 2, Figure 2 A schematic diagram of the SQUID cryogenic thermometer provided in an embodiment.

[0044] It should be noted that the SQUID cryogenic thermometer is formed in the semiconductor device, which includes the SQUID layer 303, the superconducting gradient coil layer 302 and the metal temperature layer 305.

[0045] Here, the present application reduces the error value of the metal temperature layer 305 to the manufacturing error of the semiconductor device by forming the metal temperature layer 305 on the semiconductor device by a method, avoiding the mechanical manufacturing error generated by the metal temperature layer 305 manufactured by the mechanical processing method (for example, by a numerical control machine tool, etc.) in the prior art.

[0046] For example, the error of the metal temperature layer 305 manufactured by the semiconductor device is only 0.2%~0.5%, and the standard uncertainty converted according to the thickness of 200 microns is only 0.4~1.0 microns. Obviously, the metal temperature layer 305 manufactured by the manufacturing method of the semiconductor device greatly reduces the order of magnitude of the error.

[0047] Specifically, the on-chip integrated SQUID cryogenic thermometer includes: at least two SQUID coils, the at least two SQUID coils are located in the SQUID layer 303; at least two superconducting gradient coils, the at least two superconducting gradient coils are located in the superconducting gradient coil layer 302, and the at least two superconducting gradient coils are at least partially located in the semiconductor device region below the metal temperature layer 305 (i.e. Figure 2 The on-chip region 202 in the semiconductor device), and the at least two superconducting gradient coils are at least partially located in the hollow region 203.

[0048] Here, it should be noted that the on-chip referred to in the present application refers to the silicon wafer 101 used to form the substrate 301, and the on-chip integration refers to the integration of the SQUID layer 303, the superconducting gradient coil layer 302 and the metal temperature layer 305 on the silicon wafer 101 substrate 301.

[0049] The conductivity measurement unit 201 is integrated in the semiconductor device.

[0050] In this way, the conductivity of the metal temperature layer 305 is directly measured and analyzed by the conductivity measurement unit 201, avoiding the problems that the prior art not only needs to form a complex structure in the SQUID cryogenic thermometer, occupies a large space, and the measurement process of the conductivity is also very complex, and the accuracy is also low.

[0051] Among them, the superconducting gradient coils located below the metal temperature layer 305 have the same winding direction and are coupled to each other.

[0052] The multiple sub-coils located at the hollowed-out positions are opposite in winding direction to the multiple sub-coils located on the metal to be detected of the SQUID coil, and are decoupled two by two.

[0053] As an example, refer to Figure 2 , the first sub-coil, the second sub-coil, the third sub-coil, the fourth sub-coil and the first SQUID coil CH1 form a detection circuit. Figure 2 Taking the detection circuit formed by the first sub-coil, the second sub-coil, the third sub-coil, the fourth sub-coil and the first SQUID coil CH1 as an example, the first sub-coil and the fourth sub-coil located below the metal temperature layer 305 have the same winding direction as the first SQUID coil CH1, and the second sub-coil and the third sub-coil located in the hollowed-out area 203 have opposite winding directions to the first SQUID coil CH1.

[0054] Here, the second SQUID coil CH2 and the superconducting gradient coil have the same or similar connection mode, which will not be described here.

[0055] The multiple sub-coils of each superconducting gradient coil are connected in series. Figure 2 The identification line with a bidirectional arrow is used to indicate the coupling and / or decoupling relationship between the coils.

[0056] The at least two superconducting gradient coils are located below the metal temperature layer 305, and are used to read the metal noise of the metal temperature layer 305.

[0057] The at least two superconducting gradient coils are located in the hollowed-out area 203, and are used to read the space noise.

[0058] The conductivity measuring unit 201 is used to measure the conductivity of the metal temperature layer 305.

[0059] It should be noted that the detection of the metal temperature of the metal temperature layer 305 needs to subtract the space noise from the metal noise of the metal temperature layer 305, and the present application can accurately complete the detection of the metal temperature of the metal temperature layer 305 through the winding mode and the setting of the superconducting gradient coil.

[0060] Meanwhile, the on-chip integrated SQUID cryogenic thermometer disclosed in the present application further simplifies the measurement system, and can complete the temperature measurement of the metal temperature layer 305 using at least two channels, which is more accurate and simpler than the measurement method of at least three channels in the prior art.

[0061] Please continue to refer to Figure 2 Each superconducting gradient coil is connected with a corresponding SQUID coil, each superconducting gradient coil includes multiple sub-coils, and the multiple sub-coils of each superconducting gradient coil are connected in series.

[0062] In an optional embodiment, each superconducting gradient coil comprises a first sub-coil, a second sub-coil, a third sub-coil and a fourth sub-coil.

[0063] wherein one end of the first sub-coil is connected to one end of a SQUID coil, the other end of the first sub-coil is connected to one end of the second sub-coil, the other end of the second sub-coil is connected to one end of the third sub-coil, the other end of the third sub-coil is connected to one end of the fourth sub-coil, and the other end of the fourth coil L4 is connected to the other end of a SQUID coil.

[0064] The first coil L1 and the fourth coil L4 are located below the metal temperature layer 305, and the second coil L2 and the third coil L3 are located in the hollowed-out area 203.

[0065] Further, the plurality of sub-coils of each superconducting gradient coil are connected through superconducting leads.

[0066] Here, the present application can form a superconducting lead connection between a plurality of sub-coils by providing a superconducting layer in a semiconductor device, avoiding the influence of additional magnetic flux noise and the like.

[0067] wherein the superconducting layer can be superconducting niobium, and the on-chip electrical connection through the superconducting niobium avoids the influence of additional magnetic flux noise and the like.

[0068] Here, the temperature signal is collected into the SQUID coil through the superconducting gradient coil, and the electrical connection between them is a superconducting niobium lead connection, which eliminates the interference of additional magnetic flux noise and interface resistance, effectively improving the test speed.

[0069] Referring to Figure 3 , the on-chip integrated SQUID cryogenic thermometer comprises: a substrate 301; a SQUID layer 303 located on the substrate 301; a superconducting gradient coil layer 302 located on the substrate 301; an insulating layer 304 located on the SQUID layer 303 and / or the superconducting gradient coil layer 302; and a metal temperature layer 305 located on the insulating layer 304.

[0070] Here, it should be noted that although the SQUID layer 303 and the superconducting gradient coil layer 302 can be formed on one superconducting layer, they are not coincident, and the SQUID layer 303 and the superconducting gradient coil layer 302 can be arranged side by side or independent of each other.

[0071] wherein the substrate 301, the first superconducting layer, the first insulating layer 304, the second superconducting layer, the second insulating layer 304, the superconducting coil layer and the resistance layer are used to constitute a plurality of SQUID coils.

[0072] The superconducting coil layer is also used to constitute a plurality of superconducting gradient coils.

[0073] The SQUID layer 303 and / or the superconducting gradient coil layer 302 are staggered on the same layer of the substrate 301.

[0074] It should be noted that the superconducting quantum interference device formed by the plurality of SQUID coils also includes an input coil, a feedback coil, a bias port, a Josephson junction, and other structures of the superconducting quantum interference device. The specific structure of the superconducting quantum interference device will not be described here.

[0075] Please refer to Figure 4 As an example, the disclosure embodiment provides a preparation method of an on-chip integrated SQUID cryogenic thermometer, comprising the following steps:

[0076] Step S1000: forming a substrate 301.

[0077] The substrate 301 can be made of a semiconductor material or an insulating material. The substrate 301 can be a single-layer structure or a multi-layer structure. For example, the substrate 301 can be a silicon substrate 301, a silicon dioxide substrate 301, etc., or, for example, the substrate 301 can be a layered substrate 301 including silicon / silicon carbide, silicon-on-insulator, or silicon germanium-on-insulator. Therefore, the type of substrate 301 should not limit the protection scope of the disclosure.

[0078] Step S2000: forming a SQUID layer 303 on the substrate 301.

[0079] Step S3000: forming a superconducting gradient coil layer 302 on the substrate 301.

[0080] Step S4000: forming an insulating layer 304 on the SQUID layer 303 and / or the superconducting gradient coil layer 302.

[0081] Specifically, the material of the insulating layer 304 is silicon oxide (SiO2).

[0082] The thickness of the insulating layer 304 is 1-3 microns.

[0083] As an example, the thickness of the insulating layer 304 can be 1 micron, 2 microns, or 3 microns.

[0084] Step S5000: forming a metal temperature layer 305 on the insulating layer 304.

[0085] The material of the metal temperature layer 305 is copper.

[0086] Specifically, the thickness of the metal temperature layer 305 is 110-320 microns.

[0087] As an example, the thickness of the metal temperature layer 305 can be 110 microns, 195 microns, 200 microns, 210 microns, 290 microns, 320 microns, etc.

[0088] The metal temperature layer 305 can be prepared by an electroplating process.

[0089] Step S6000: constructing the electrical conductivity measurement unit 201 in the metal temperature layer 305 by micro-nano processing.

[0090] The SQUID layer 303 includes at least two SQUID coils, and the at least two SQUID coils are located in the SQUID layer 303.

[0091] The superconducting gradient coil layer 302 includes at least two superconducting gradient coils, and the at least two superconducting gradient coils are at least partially located below the metal temperature layer 305 and at least partially located in the hollow region 203.

[0092] The preparation method of the on-chip integrated SQUID cryogenic thermometer in the above embodiment can at least effectively reduce the error of the SQUID cryogenic thermometer in temperature measurement.

[0093] Meanwhile, the SQUID cryogenic thermometer is integrated on the semiconductor device, the electrical conductivity of the metal temperature layer 305 can be directly measured by using the electrical conductivity measurement unit 201, and the complexity and error of the SQUID cryogenic thermometer can be reduced, so that the SQUID cryogenic thermometer no longer needs to use a calibration coil to calibrate the electrical conductivity of the metal temperature layer 305 through a complex coil control process.

[0094] The technical features of the above embodiments can be combined in any manner. To make the description concise, all possible combinations of the technical features of the above embodiments are not described, but as long as the combinations of the technical features do not exist contradictory, they should be considered as the scope of the disclosure.

[0095] The above embodiments only express several implementation manners of the disclosure, and the description is relatively specific and detailed, but it should not be understood as a limitation on the patent scope. It should be noted that for those skilled in the art, without departing from the concept of the disclosure, a number of modifications and improvements can be made, which are all within the protection scope of the disclosure. Therefore, the protection scope of the patent of the disclosure should be subject to the appended claims.

Claims

1. An on-chip integrated SQUID cryogenic thermometer, characterized by, The SQUID cryogenic thermometer is formed in a superconducting device, the superconducting device comprising a SQUID layer, a superconducting gradient coil layer and a metal temperature layer, The on-chip integrated SQUID cryogenic thermometer comprises: at least two SQUID coils, the at least two SQUID coils being located on the SQUID layer; at least two superconducting gradient coils, the at least two superconducting gradient coils being located on the superconducting gradient coil layer, and at least part of the sub-coils in the at least two superconducting gradient coils being located below the metal temperature layer, and at least part of the sub-coils in the at least two superconducting gradient coils being located in a hollow region; wherein the superconducting gradient coils located below the metal temperature layer have the same winding direction and are coupled to each other; the winding directions of the sub-coils located in the hollow region and the sub-coils on the metal to be measured are opposite, and are decoupled from each other; at least part of the sub-coils in the at least two superconducting gradient coils located below the metal temperature layer are used to read the metal noise of the metal temperature layer; at least part of the sub-coils in the at least two superconducting gradient coils located in the hollow region are used to read the space noise; the hollow region is located beside the metal to be measured; a conductivity measurement unit integrated in the metal temperature layer for measuring the conductivity of the metal temperature layer.

2. The on-chip integrated SQUID cryogenic thermometer of claim 1, wherein, Each superconducting gradient coil is connected to a corresponding SQUID coil, each superconducting gradient coil comprises a plurality of sub-coils, and the plurality of sub-coils of each superconducting gradient coil are connected in series.

3. The on-chip integrated SQUID cryogenic thermometer of claim 2, wherein, Each superconducting gradient coil comprises a first sub-coil, a second sub-coil, a third sub-coil and a fourth sub-coil. The one end of the first sub-coil is connected to one end of a SQUID coil, the other end of the first sub-coil is connected to one end of the second sub-coil, the other end of the second sub-coil is connected to one end of the third sub-coil, the other end of the third sub-coil is connected to one end of the fourth sub-coil, and the other end of the fourth sub-coil is connected to the other end of the SQUID coil. The first sub-coil and the fourth sub-coil are located below the metal temperature layer, and the second sub-coil and the third sub-coil are located in a hollow region.

4. The on-chip integrated SQUID cryogenic thermometer of claim 1, wherein, The plurality of sub-coils of each superconducting gradient coil are connected by superconducting leads.

5. The on-chip integrated SQUID cryogenic thermometer of claim 1, wherein, The on-chip integrated SQUID cryogenic thermometer comprises: a substrate; a SQUID layer on the substrate; a superconducting gradient coil layer on the substrate; an insulating layer on the SQUID layer and / or the superconducting gradient coil layer; a metal temperature layer on the insulating layer.

6. The on-chip integrated SQUID cryogenic thermometer of claim 5, wherein, The substrate, the first superconducting layer, the first insulating layer, the second superconducting layer, the second insulating layer, the superconducting coil layer and the resistance layer are used to form a plurality of SQUID coils; The superconducting coil layer is also used to form a plurality of superconducting gradient coils; The SQUID layer and the superconducting gradient coil layer are staggered on the same layer of the substrate.

7. A method of fabricating an integrated on-chip SQUID cryogenic thermometer, characterized by, comprises: forming a substrate; forming a SQUID layer on the substrate; forming a superconducting gradient coil layer on the substrate; forming an insulating layer on the SQUID layer and / or the superconducting gradiometric coil layer; forming a metal temperature layer on the insulating layer; constructing an electrical conductivity measurement unit in the metal temperature layer by micro-nano processing; wherein the SQUID layer comprises at least two SQUID coils, and the at least two SQUID coils are located on the SQUID layer; the superconducting gradiometric coil layer comprises at least two superconducting gradiometric coils, at least part of the sub-coils in the at least two superconducting gradiometric coils are located below the metal temperature layer, and at least part of the sub-coils in the at least two superconducting gradiometric coils are located in a hollow region; wherein the superconducting gradiometric coils located below the metal temperature layer have the same winding direction and are coupled to each other; the winding directions of the sub-coils located in the hollow region and the sub-coils on the measured metal of the SQUID coil are opposite, and are decoupled from each other; and the hollow region is located on the side of the measured metal.

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