Detection method of subsurface damaged layer of semiconductor materials

Abstract

The present invention discloses a method for detecting a subsurface damage layer of a semiconductor material, comprising: depositing a protective layer on the surface of the semiconductor material, the protective layer at least covering the damage observation position of the semiconductor material; etching the semiconductor material with a high-energy beam to form a first cross section, the depth of the first cross section being greater than or equal to the estimated damage depth of the semiconductor material; polishing the first cross section with a high-energy beam to form an observation cross section, the polishing direction being toward the protective layer, the cross section of the damage observation position being exposed on the observation cross section; the thickness of the protective layer being greater than or equal to the etching depth generated on the protective layer by the component of the deposited energy of the high-energy beam in a direction perpendicular to the surface of the semiconductor material when polishing the first cross section. The present invention achieves the technical effect of retaining the most original damage layer information and improving the accuracy of the observation result during the processing of the observation cross section.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor detection technology, and in particular to a method for detecting a sub-surface damaged layer of a semiconductor material. Background Art

[0002] Semiconductor materials play a vital role in modern electronic technology, and their performance is directly related to the stability and overall level of electronic devices. Therefore, monitoring the subsurface damage layer generated by semiconductor materials during various processing processes is crucial for understanding the formation and evolution of lattice defects, achieving quality control and optimizing production processes, and studying new materials and device structures.

[0003] Currently, the detection technology of sub-surface damage layer of samples is divided into destructive detection and non-destructive detection. Non-destructive detection detects defects by observing the changes in heat, sound, light, electricity, magnetism, etc. caused by internal defects in the material. This type of observation technology is not intuitive enough and has large errors. Destructive detection technology requires destroying the specimen to show the damage during the detection, and then obtaining the results through microscopy technology, which can more accurately characterize and test the generated cracks.

[0004] However, currently, the sample is usually processed into a cross section by grinding, etching, etc., and then polished or chemically etched before observation. In this process, it is easy to introduce a new damage layer on the surface of the material, which affects the accuracy of the observation results. Therefore, it is urgent to propose a new, non-destructive sample cross-section preparation method to observe the subsurface damage layer of semiconductor materials, so as to improve the processing quality of semiconductor materials and devices. Summary of the invention

[0005] The main purpose of the present invention is to provide a method for detecting a subsurface damaged layer of a semiconductor material, so as to solve the problem in the related art that a new damaged layer is easily introduced on the surface of the material during cross-section processing of the semiconductor, thereby affecting the accuracy of the observation results.

[0006] In order to achieve the above object, the present invention provides a method for detecting a subsurface damaged layer of a semiconductor material, comprising:

[0007] Depositing a protective layer on the surface of the semiconductor material, wherein the protective layer at least covers a damage observation position of the semiconductor material;

[0008] Etching the semiconductor material using a high energy beam to form a first cross section, wherein the depth of the first cross section is greater than or equal to an estimated damage depth of the semiconductor material;

[0009] Polishing the first cross section with a high energy beam to form an observation cross section, wherein the polishing direction is toward the protective layer, and the cross section at the damage observation position is exposed on the observation cross section;

[0010] The thickness of the protective layer is greater than or equal to the etching depth on the protective layer caused by the component of the deposited energy of the high-energy beam in a direction perpendicular to the surface of the semiconductor material when polishing the first cross section.

[0011] Further, the protective layer includes a first protective layer and a second protective layer;

[0012] Depositing a protective layer on the surface of a semiconductor material, wherein the protective layer at least covers a damage observation position of the semiconductor material, comprises:

[0013] Depositing a first protective layer on the semiconductor material using an electron beam, wherein the first protective layer at least covers the damage observation position;

[0014] An ion beam is used to deposit a second protective layer on the first protective layer, wherein the second protective layer covers the first protective layer.

[0015] Furthermore, the thickness of the first protective layer is greater than or equal to the etching depth on the first protective layer caused by the components of the deposition energy of the ion beam in directions parallel and perpendicular to the surface of the semiconductor material when depositing the second protective layer on the first protective layer.

[0016] Further, etching the semiconductor material with a high energy beam to form a first cross section includes:

[0017] A high energy beam is used to etch the semiconductor material at a distance of 0.1 to 10 μm from the edge of the protective layer to form a first cross section.

[0018] Furthermore, the polishing width of the first cross section polished by the high energy beam is greater than the distance from the first cross section to the first side edge of the protective layer, and less than the distance from the first cross section to the second side edge of the protective layer;

[0019] The first side edge is an edge of the protective layer close to the first cross section, and the second side edge is an edge of the protective layer away from the first cross section.

[0020] Furthermore, the length of the first cross section is greater than or equal to the length of the protective layer, and when the length of the first cross section is equal to the length of the protective layer, two ends of the first cross section are flush with two ends of the protective layer;

[0021] When the length of the first cross section is greater than the length of the protective layer, two ends of the first cross section extend beyond two ends of the protective layer.

[0022] Furthermore, the first cross section and the observation cross section are perpendicular to the surface of the semiconductor material and the surface of the protective layer.

[0023] Furthermore, when the semiconductor material is etched by a high energy beam to form the first cross section, the etching width of the semiconductor material by the high energy beam is 1 to 2 times the etching depth, and the etching depth is 1 to 2 times the estimated damage depth.

[0024] Furthermore, the semiconductor material is etched using a high energy beam to form a first cross section, and further includes:

[0025] Selecting the type of ion beam of the high energy beam;

[0026] Selecting the target material as the semiconductor material;

[0027] The optimal etching parameter combination is obtained by orthogonal experiment, wherein the parameters in the etching parameter combination include: acceleration voltage, beam current, ion incident angle, and residence time;

[0028] Based on the etching parameter combination, the semiconductor material is etched using the high energy beam to form a first cross section.

[0029] Furthermore, polishing the first cross section by using a high energy beam to form an observation cross section also includes:

[0030] Selecting the type of ion beam of the high energy beam;

[0031] Selecting the target material as the semiconductor material;

[0032] An orthogonal experiment is used to obtain an optimal polishing parameter combination, wherein the parameters in the polishing parameter combination include: acceleration voltage, beam current, ion incident angle, and residence time;

[0033] Based on the polishing parameter combination, the first section is polished using the high energy beam to form an observation section.

[0034] In an embodiment of the present invention, a protective layer is deposited on the surface of a semiconductor material, the protective layer at least covers the damage observation position of the semiconductor material; a high-energy beam is used to etch the semiconductor material and form a first cross section, the depth of the first cross section is greater than or equal to the estimated damage depth of the semiconductor material; a high-energy beam is used to polish the first cross section to form an observation cross section, the polishing direction is toward the protective layer, and the cross section at the damage observation position is exposed on the observation cross section; the thickness of the protective layer is greater than or equal to the etching depth generated on the protective layer by the component of the deposited energy of the high-energy beam in the direction perpendicular to the surface of the semiconductor material when polishing the first cross section. On the one hand, the purpose of first depositing a protective layer on the surface of the semiconductor material for protection and then using a high-energy beam for cross section processing to protect the surface morphology of the semiconductor material at the damage observation position from being affected by the high-energy beam is achieved, thereby achieving the technical effect of retaining the most original damage layer information and improving the accuracy of the observation result during the processing of the observation cross section, thereby solving the problem in the related art that a new damage layer is easily introduced on the material surface during the cross section processing of the semiconductor, thereby affecting the accuracy of the observation result; and after the cross section processing is performed using a high-energy beam, the processing efficiency and processing accuracy are higher, effectively reducing the external force damage caused by human beings;

[0035] On the other hand, the use of high-energy beams for cross-sectional processing has the characteristics of multi-scale, selectivity, non-contact, three-dimensional high precision, strong flexibility, and strong material adaptability. It can be used for cross-sectional processing of semiconductor materials of any nature, and can be used for sub-surface damage layer observation of cross-sections of arbitrary shapes. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The accompanying drawings constituting a part of the present invention are used to provide a further understanding of the present invention, so that other features, purposes and advantages of the present invention become more obvious. The accompanying drawings of the exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the accompanying drawings:

[0037] Figure 1 is a schematic flow chart of a detection method according to an embodiment of the present invention;

[0038] Figure 2 is a schematic diagram of a semiconductor material surface damage detection position according to an embodiment of the present invention;

[0039] Figure 3 is a schematic diagram of depositing a first protective layer on the surface of a semiconductor material according to an embodiment of the present invention;

[0040] Figure 4 is a schematic diagram of depositing a second protective layer on the surface of a semiconductor material according to an embodiment of the present invention;

[0041] Figure 5is a schematic diagram of processing an observation cross section on a semiconductor material according to an embodiment of the present invention;

[0042] Figure 6 is a schematic diagram of a subsurface damage structure observed on a processed cross section of a semiconductor material according to an embodiment of the present invention;

[0043] Figure 7 It is a function of the number of ion beam deposition scans and the damage depth of the material surface under the optimal parameters in the embodiment of the present invention. DETAILED DESCRIPTION

[0044] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0045] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged under appropriate circumstances to facilitate the embodiments of the present invention described herein.

[0046] In the present invention, the directions or positional relationships indicated by the terms "upper", "lower", "inner", etc. are based on the directions or positional relationships shown in the drawings. These terms are mainly used to better describe the present invention and its embodiments, and are not used to limit the indicated devices, elements or components to have a specific direction, or to be constructed and operated in a specific direction.

[0047] In addition, some of the above terms may be used to express other meanings in addition to indicating orientation or positional relationship. For example, the term "on" may also be used to express a certain dependency or connection relationship in some cases. For those skilled in the art, the specific meanings of these terms in the present invention can be understood according to specific circumstances.

[0048] In addition, the terms "disposed", "provided with", "connected", "fixed" and the like should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or an integral structure; it can be a mechanical connection, or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate medium, or it can be an internal connection between two devices, elements or components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0049] In addition, the term "plurality" shall mean two or more.

[0050] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0051] To solve the above technical problems, Figure 1 As shown, an embodiment of the present invention provides a method for detecting a sub-surface damaged layer of a semiconductor material, comprising:

[0052] S100, depositing a protective layer on the surface of the semiconductor material, wherein the protective layer at least covers a damage observation position of the semiconductor material;

[0053] S200, etching the semiconductor material using a high energy beam to form a first cross section, wherein the depth of the first cross section is greater than or equal to an estimated damage depth of the semiconductor material;

[0054] S300, polishing the first section with a high energy beam to form an observation section, wherein the polishing direction is toward the protective layer, and the section at the damage observation position is exposed on the observation section;

[0055] S400, the thickness of the protective layer is greater than or equal to the etching depth on the protective layer caused by the component of the deposition energy of the high energy beam in a direction perpendicular to the surface of the semiconductor material when polishing the first cross section.

[0056] like Figure 2 As shown, in this embodiment, it is first necessary to determine the damage observation position of the semiconductor material. The damage observation position can be a position selected manually, or any position on the surface of the semiconductor material. The damage observation position can be a position where the surface of the semiconductor material has obvious damage or other positions. The protective layer can be deposited by electron beam deposition, ion beam deposition or magnetron sputtering. Figure 3 and Figure 4 As shown, the protective layer has a certain thickness and deposition area, and the deposition area of ​​the protective layer can be matched according to the size of the damage observation position. In one embodiment, the damage observation position is a pit on the surface of the semiconductor material, and the deposition area of ​​the protective layer can at least cover the pit.

[0057] The deposited material of the protective layer can be a metal material, a non-metal material, a semiconductor material or other composite material or a polymer, etc., which is not limited in this embodiment. When a metal material is used, Pt, Au, W, Cr, etc. can be selected. When a non-metal material is used, C, oxides such as TiO 2, ZnO, etc. When using semiconductor materials, Si, CdSe, etc. can be selected. The deposited shape of the protective layer can be any shape as long as the area covers the damage observation position. The shape includes but is not limited to circular, elliptical, linear, quadrilateral, pentagonal, hexagonal, etc., preferably quadrilateral, linear, simple to process, and efficient.

[0058] After depositing the protective layer, a high-energy beam is used to etch the semiconductor material and form a first cross section, which is a cross section in the groove formed by etching close to the protective layer. The high-energy beam used for etching is an ion beam, and a liquid metal ion source such as Ga, Al, In, Au, Bi, etc. can be used. The etching position of the high-energy beam can be in any direction of the protective layer, starting at a distance from the edge of the protective layer, and the etching depth is at least the estimated damage layer depth, preferably greater than 1 to 2 times the estimated damage layer depth, to ensure that the damaged layer can be fully exposed during the subsequent polishing process.

[0059] For the convenience of observation, the groove formed by the high-energy beam etching on the surface of the semiconductor material should have a certain length and width. Since the protective layer covers the damage observation position of the semiconductor material, the etching length should be greater than or equal to the length of the protective layer, and the etching width can be 1 to 2 times the etching depth according to the observation conditions. It can be understood that the above description of the etching depth, etching length and etching width is not restrictive and can be adjusted according to actual needs.

[0060] like Figure 5 and Figure 6 As shown, after high-energy beam etching is used to form the first cross section, the first cross section needs to be polished to form an observation cross section. The polishing direction is the direction toward the protective layer, and after polishing, the cross section of the damage observation position needs to be exposed on the observation cross section. In a specific embodiment, first, in the process of etching to form the first cross section, since the etching position has not yet reached the damage observation position, the high-energy beam will not affect the original damage layer information, so a high-energy beam with relatively large energy can be used to improve processing efficiency. After the first cross section is formed, the first cross section still has a micron-level distance from the damage observation position in the horizontal direction, or the first cross section just reaches the edge of the damage observation position. At this time, it is necessary to use a high-energy beam to polish the first cross section more finely, so that the damage observation position is completely exposed on the polished cross section, that is, exposed on the observation cross section. In the process of polishing the first cross section, the control of the high-energy beam is more precise, which can further reduce the possibility of affecting the original damage layer information.

[0061] Since the protective layer completely covers the damage observation position of the semiconductor material, in order to expose the cross section of the damage observation position on the observation cross section, when polishing the first cross section, the high-energy beam emitted from top to bottom will also act on the protective layer and polish or etch the protective layer. The semiconductor material to be observed is used as the substrate, and the ion sputtering direction of the high-energy beam includes a direction parallel to the substrate surface and a direction perpendicular to the substrate surface. During the polishing process, ions parallel to the substrate surface will act on the first cross section and the side of the protective layer, while ions perpendicular to the substrate surface will act on the surface of the protective layer. In order to prevent the ion beam from causing additional damage to the damage observation position, it is necessary to prevent ions perpendicular to the substrate surface from directly acting on the damage observation position. For this reason, the thickness of the protective layer needs to be greater than or equal to the etching depth of the ions perpendicular to the substrate surface on the protective layer.

[0062] Specifically, in this embodiment, before depositing the protective layer, the deposition thickness of the protective layer needs to be determined first, and the deposition thickness needs to satisfy the requirement of being greater than or equal to the etching depth generated on the protective layer by the component of the deposition energy of the high-energy beam in the direction perpendicular to the surface of the semiconductor material when polishing the first section.

[0063] The etching depth can be determined experimentally, and the parameters of the high-energy beam when polishing the first section can be determined according to the physical properties of the semiconductor material. In one embodiment, the same acquisition can be used to deposit an experimental protective layer with a certain thickness on the experimental product, and the thickness of the experimental protective layer can be relatively large. Then, a high-energy beam with the same parameters is used to act on the experimental protective layer, and the thickness of the protective layer deposited on the surface of the semiconductor material is determined according to the etching depth of the high-energy beam on the experimental protective layer.

[0064] In one embodiment, the deposition thickness of the protective layer is preferably greater than the etching depth on the protective layer caused by the component of the deposition energy of the high-energy beam in a direction perpendicular to the surface of the semiconductor material when polishing the first cross section.

[0065] In addition, the specific calculation of etching depth is derived as follows:

[0066] When the substrate atoms are bombarded by incident ions, they will inevitably cause ion deposition and sputtering. Therefore, the deposition and sputtering of ion beams is a game process. When the decomposition rate of the precursor gas is higher than the ion sputtering rate, it manifests as deposition. When the sputtering rate is higher than the deposition rate, it manifests as sputtering etching. From the definition of sputtering yield, it can be seen that the amount of sputtered particles is equal to the product of the incident ion amount and the sputtering yield, that is,

[0067] ;

[0068] in, is the total sputtering ion flux, that is, the incident dose is The amount of material removed is described by the sputtered particles generated by the ions. Assume that at different times in a single process, the amount of material etching caused by the unit dose of sputtered particles is the same, and the etching occurs in the normal direction of the regional microelement. It can be obtained that the volume of material removed by etching can be described as:

[0069] ;

[0070] in, is the volume of material removed, is the microelement of the material surface processing area, is the normal average etching rate on the region microelement, The time element calculated for material processing. is the etching volume coefficient, which is used to describe the ratio of particle dose to actual etching material dose during the etching process of different materials. M is the molar mass of the substrate material, is Avogadro's constant, is the density of the substrate material. Then the etching depth per unit microelement is:

[0071] ;

[0072] Experiments have shown that as the ion beam irradiation scan proceeds, an amorphous material layer will form on the material surface (such as SiC), the influence of factors such as crystal orientation disappears, and the sputtering etching results converge and tend to be stable. Figure 7 shown.

[0073] On the one hand, the present invention achieves the purpose of first depositing a protective layer on the surface of the semiconductor material for protection, and then using a high-energy beam to perform cross-section processing, so as to protect the surface morphology of the semiconductor material at the damage observation position from being affected by the high-energy beam, thereby achieving the technical effect of retaining the most original damage layer information and improving the accuracy of the observation result during the processing of the observation cross section, thereby solving the problem in the related art that a new damage layer is easily introduced on the material surface during the cross-section processing of the semiconductor, thereby affecting the accuracy of the observation result; and after the cross-section processing is performed using a high-energy beam, the processing efficiency and processing accuracy are higher, and the external force damage caused by human beings is effectively reduced;

[0074] On the other hand, the use of high-energy beams for cross-sectional processing has the characteristics of multi-scale, selectivity, non-contact, three-dimensional high precision, strong flexibility, and strong material adaptability. It can be used for cross-sectional processing of semiconductor materials of any nature, and can be used for sub-surface damage layer observation of cross-sections of arbitrary shapes.

[0075] When depositing the protective layer, an electron beam or an ion beam can be used. During the processing, an electron beam or an ion beam can be used to deposit a protective layer of sufficient thickness on the surface of the semiconductor material at one time. Among them, when an electron beam is used, the mass of the electron beam is almost negligible, so it can avoid causing additional damage to the surface of the semiconductor material when depositing the protective layer, but there are problems such as long deposition time and low efficiency. When an ion beam is used, the ion beam has a certain mass, so it may cause damage to the surface of the semiconductor material, but the ion beam deposition speed is fast and the deposition efficiency is high.

[0076] Based on this, in order to avoid causing additional damage to the surface of the semiconductor material and to improve deposition efficiency, the protective layer is deposited twice in this embodiment.

[0077] Specifically, in this embodiment, S100, depositing a protective layer on the surface of the semiconductor material, wherein the protective layer at least covers the damage observation position of the semiconductor material, includes:

[0078] S1001, depositing a first protective layer on the semiconductor material using an electron beam, wherein the first protective layer at least covers the damage observation position;

[0079] S1002, depositing a second protective layer on the first protective layer using an ion beam, wherein the second protective layer covers the first protective layer;

[0080] The protective layer includes a first protective layer and a second protective layer.

[0081] In this embodiment, if Figure 3 As shown, an electron beam is first used to deposit a first protective layer on the surface of the semiconductor material. The first protective layer covers the damage observation position. Since an electron beam is used, additional damage to the surface of the semiconductor material can be reduced. The thickness of the first protective layer can be relatively thin, so the time consumed for deposition is relatively short. Figure 4 As shown, on the basis of the first protective layer, an ion beam is used to deposit a second protective layer, and the second protective layer covers the first protective layer. Although the thickness of the second protective layer is greater than that of the first protective layer, due to the use of ion beam deposition, the deposition time is relatively short.

[0082] It can be seen that in this embodiment, the first protective layer and the second protective layer are deposited respectively using an electron beam and an ion beam, which can not only effectively reduce additional damage to the surface of the semiconductor material, but also shorten the deposition time and improve the deposition efficiency.

[0083] On the basis of the above-mentioned implementation mode, when the second protective layer is deposited by an ion beam, the ion beam will act on the first protective layer, and it is necessary to prevent the ion beam from directly acting on the surface of the semiconductor material through the first protective layer. To this end, in this embodiment, the thickness of the first protective layer is greater than or equal to the etching depth generated on the first protective layer by the components of the deposition energy of the ion beam in the directions parallel to and perpendicular to the surface of the semiconductor material when the second protective layer is deposited on the first protective layer.

[0084] In one embodiment, the thickness of the first protective layer is preferably greater than the etching depth on the first protective layer caused by the components of the deposition energy of the ion beam in directions parallel and perpendicular to the surface of the semiconductor material when depositing the second protective layer on the first protective layer.

[0085] The specific deposition thickness of the first protective layer can be determined by experiments. Specifically, the ion beam parameters for depositing the second protective layer are pre-set. During the experiment, the same material as the first protective layer is used to deposit a first experimental protective layer of a certain thickness. The same material as the second protective layer is deposited on the experimental protective layer according to the set ion beam parameters. The thickness of the first protective layer is determined according to the ion etching depth.

[0086] It is understandable that, since the thickness of the second protective layer is significantly greater than that of the first protective layer, the second protective layer is deposited in a layer-by-layer manner. Therefore, in the process of depositing the second protective layer, only the ions of the lower layer will directly act on the first protective layer, and the ions of the upper layer will be stacked on the ions of the lower layer. Therefore, in order to further improve the deposition efficiency, the ion beam used to deposit the second protective layer can be changed over time. In other words, as the deposition time increases, the parameters of the ion beam can be adjusted to speed up the ion deposition speed.

[0087] In a specific implementation of depositing the first protective layer, the first protective layer is deposited to a thickness of 10 nm, and the electron beam parameters used for deposition are set to:

[0088] Deposition material: preferably Pt;

[0089] Electron beam energy: 1~10keV, preferably 5keV;

[0090] Electron beam current: 0.1~200nA, preferably 1nA;

[0091] Working distance: 1-100mm, preferably 5mm;

[0092] Dwell time: 1-1000ms, preferably 50ms

[0093] Scan mode: point and scan.

[0094] In another specific embodiment, the first protective layer is deposited to a thickness of 100 nm, and the electron beam parameters used for deposition are set to:

[0095] Deposition material: preferably Pt;

[0096] Electron beam energy: 10keV;

[0097] Electron beam current: 5nA;

[0098] Working distance: 10mm;

[0099] Dwell time: 100ms;

[0100] Scanning mode: line scan or area scan.

[0101] In one embodiment of depositing the second protective layer, the second protective layer is deposited to a thickness of 100 nm, and the ion beam parameters used for deposition are set to:

[0102] Deposition material: preferably Pt;

[0103] Electron beam energy: 5~30keV, preferably 20keV;

[0104] Electron beam current: 2~1000pA, preferably 100pA;

[0105] Working distance: 1~100mm, preferably 5mm;

[0106] Dwell time: 0.1~100µs, preferably 5µs;

[0107] Scan mode: point and scan.

[0108] In another embodiment, the second protective layer is deposited to a thickness of 10 μm, and the ion beam parameters used for deposition are set to:

[0109] Deposition material: preferably Pt;

[0110] Electron beam energy: 30keV;

[0111] Electron beam current: 300pA;

[0112] Working distance: 10mm;

[0113] Dwell time: 10µs;

[0114] Scanning mode: line scan or area scan.

[0115] Since the ion beam has not yet contacted the damage observation position of the semiconductor material when processing the first cross section, an ion beam with relatively large energy can be used to improve processing efficiency. In a specific embodiment, etching the semiconductor material with a high-energy beam to form the first cross section includes:

[0116] A high energy beam is used to etch the semiconductor material at a distance of 0.1 to 10 μm from the edge of the protective layer to form a first cross section.

[0117] According to the present embodiment, the first cross section formed by etching is 0.1 μm away from the edge of the protective layer. In other words, the first cross section is 0.1 μm away from the damage observation position. In one embodiment, it is preferred to use a high-energy beam to etch the semiconductor material at a distance of 0.5 to 2 μm from the edge of the protective layer to form the first cross section, thereby improving the processing efficiency and avoiding the influence on the damage observation position due to being too close to it.

[0118] In this embodiment, the ion source used by the ion beam is a liquid metal ion source, such as Ga, Al, In, Au, Bi, etc. The first cross section formed by the etching process should be perpendicular to the surface of the semiconductor material and also perpendicular to the protective layer. The first cross section can be rectangular or arc-shaped, etc.

[0119] Furthermore, the length of the first cross section is greater than or equal to the length of the protective layer, and when the length of the first cross section is equal to the length of the protective layer, two ends of the first cross section are flush with two ends of the protective layer;

[0120] When the length of the first cross section is greater than the length of the protective layer, both ends of the first cross section extend beyond both ends of the protective layer. In one embodiment, preferably, the two ends extend beyond 0.5 to 2 μm on the left and right.

[0121] Since the protective layer covers the damage detection position, in order to better expose the cross section of the damage detection position on the observation section, the ion beam will also act on the protective layer when polishing the first section. Figure 5 As shown, the polishing width of the first section polished by high-energy beam is greater than the distance from the first section to the first side edge of the protective layer, and less than the distance from the first section to the second side edge of the protective layer; the first side edge is the edge of the protective layer close to the first section, and the second side edge is the edge of the protective layer away from the first section.

[0122] Specifically, in this embodiment, the width of the polishing should cover the first section and the edge of the protective layer close to the first section. In one embodiment, it is preferred to cover the edge of the protective layer by 0.1-1 um, the polishing depth can be set to the estimated damage depth or slightly greater than the estimated damage depth, and the polishing length can be the same as the length of the first section.

[0123] In one embodiment, etching the semiconductor material using a high energy beam to form a first cross section further comprises:

[0124] Selecting the type of ion beam of the high energy beam;

[0125] Selecting the target material as the semiconductor material;

[0126] The optimal etching parameter combination is obtained by adopting an orthogonal experiment method. The parameters in the etching parameter combination include: acceleration voltage, beam current size, ion incident angle, and residence time.

[0127] In the orthogonal experiment, the surface flatness of the first section after processing (i.e., line roughness Ra, tested by atomic force microscopy) is used as the surface quality evaluation index, and the time consumed in processing the first section (i.e., etching rate) is used as the processing efficiency evaluation index. The acceleration voltage, beam size, ion incident angle, and residence time under different parameters are used to etch the material to be processed. The surface quality and processing efficiency of the first section under different processing parameters are comprehensively considered to obtain the optimal etching parameter combination.

[0128] Based on the etching parameter combination, the semiconductor material is etched using the high energy beam to form a first cross section.

[0129] Specifically, the ion beam parameter settings used for etching the first cross section include: selecting the incident ion beam type, and setting the incident ion type acceleration voltage, beam current, ion incident angle, and combining different target materials to obtain a suitable etching rate. In other words, the factors affecting the etching rate are: incident ion beam type, acceleration voltage, beam current, ion incident angle, residence time, and target material. Therefore, the adjustment parameters can be selected as needed to adjust the etching to a suitable rate (etching time).

[0130] In one embodiment:

[0131] a. Etching rate R Relationship with accelerating voltage:

[0132] ;

[0133] The coefficient It is a parameter that has nothing to do with the accelerating voltage.

[0134] b. Etching rate R Relationship with beam size:

[0135] ;

[0136] The coefficient C It is a parameter that has nothing to do with the beam current.

[0137] c. Etching rate R Relationship with ion incident angle:

[0138] ;

[0139] In the formula It is the polynomial coefficient obtained from the least squares method of regression processing of experimental data. Experiments show that when n=4, the fitting formula has a good correlation with the experimental data.

[0140] d. Etching rate R Relationship with residence time:

[0141] ;

[0142] The coefficient C It is a parameter that has nothing to do with the dwell time.

[0143] The six etching rates listed above R Among the key influencing factors, the relationship between etching rate and acceleration voltage, beam current, ion incident angle, and residence time can be quantitatively described by mathematical formulas. Therefore, under the conditions of a selected ion source and a specific target material, the optimal parameter combination required for composite processing can be obtained through orthogonal experiments.

[0144] In one embodiment, the incident ion species is a liquid metal ion source, such as Ga, Al, In, Au, Bi.

[0145] In one embodiment, a Ga ion source is preferred;

[0146] The accelerating voltage is 10keV~50keV, preferably 30keV;

[0147] The beam current is 1nA~50nA, preferably 10nA;

[0148] The dwell time is 10µs~1000µs, preferably 500µs;

[0149] The ion incident angle is 0.1-90°, preferably 50°.

[0150] In another embodiment, a Ga ion source is preferred;

[0151] The accelerating voltage is 30 keV;

[0152] The beam current is 20nA;

[0153] The dwell time is 400µs;

[0154] The ion incident angle was 60°.

[0155] Similarly, polishing the first cross section by using a high energy beam to form an observation cross section also includes:

[0156] Selecting the type of ion beam of the high energy beam;

[0157] Selecting the target material as the semiconductor material;

[0158] An optimal polishing parameter combination is obtained by an orthogonal experiment, wherein the parameters in the polishing parameter combination include: acceleration voltage, beam size, ion incident angle, and residence time; based on the polishing parameter combination, the high-energy beam is used to polish the first section to form an observation section.

[0159] Specifically, the parameter settings of the ion beam used for polishing in this embodiment can refer to the parameter settings of the ion beam used for etching in the above-mentioned embodiment. Since the first cross section needs to be polished to better expose and observe the damage of the subsurface of the semiconductor material, the ion beam used for polishing has smaller settings such as acceleration voltage and beam current than the parameters of the ion beam used for etching.

[0160] In addition, in order to better observe the damage, the observation cross section formed after polishing is perpendicular to the surface of the semiconductor material and the surface of the protective layer.

[0161] The present invention provides a specific embodiment:

[0162] (1) The observed semiconductor material is determined to be a SiC wafer thinned by a ceramic-based diamond grinding wheel, and the damage observation position is the pit on the Si surface (the pit is formed due to the failure to remove abrasive particles or debris shed from the grinding wheel or the material itself in time during the thinning process of the SiC wafer).

[0163] (2) A first protective layer is deposited on the surface of the semiconductor material using an electron beam to cover the pits.

[0164] The deposition material was selected as Pt, and an electron beam was used to deposit a protective layer of 8μm*2μm*0.2um on the surface of the pit. The electron gun was 6mm away from the sample surface, the acceleration voltage was 5keV, the beam current was 3nA, the electron beam dwell time was 0.5µs, and the scanning mode was line scan. The surface line roughness Ra of the first protective layer deposited by the electron beam was 0.18nm, and it took 2min36s.

[0165] (3) Depositing a second protective layer on the first protective layer using an ion beam

[0166] The deposition material was selected as Pt, and an ion beam was used to continue to deposit a second protective layer of 8μm*2μm*0.2um on the surface of the first protective layer. The sample surface was 6mm away from the electron gun, the incident angle was 55°, the acceleration voltage was 30keV, the beam current was 250pA, the ion beam dwell time was 1µs, and the scanning mode was line scan. The surface line roughness Ra of the second protective layer deposited by the ion beam was 0.29nm, and it took 4min22s.

[0167] (4) Etching the cross section using an ion beam

[0168] The ion source was selected as liquid Ga, and the ion beam was used to etch a 10μm*8μm*12um pit 1um away from the long side of the protective layer and facing the protective layer to expose the cross section. The acceleration voltage was 30keV, the beam current was 10nA, the ion incident angle was 55°, the ion beam dwell time was 0.5µs, and the scanning mode was line scanning. The line roughness Ra of the cross section formed after ion beam etching was 0.45nm, and it took 3min19s.

[0169] (5) Polishing the cross section using an ion beam

[0170] The ion source was selected as liquid Ga, and the 10μm*2μm*7um area was polished with an ion beam between the protective layer and the etched cross section. The acceleration voltage was 5keV, the beam current was 30pA, the ion incident angle was 55°, the ion beam dwell time was 0.5µs, and the scanning mode was line scanning. The line roughness Ra of the cross section after ion beam polishing was 0.13nm, and it took 1min46s.

[0171] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Within the spirit and principle of the present invention, any modification, equivalent replacement, improvement, etc. made shall be included in the protection scope of the present invention.

Claims

1. A method for detecting a subsurface damaged layer of a semiconductor material, characterized in that: include: Depositing a protective layer on the surface of the semiconductor material, wherein the protective layer at least covers a damage observation position of the semiconductor material; Etching the semiconductor material using a high energy beam to form a first cross section, wherein the depth of the first cross section is greater than or equal to an estimated damage depth of the semiconductor material; The semiconductor material is etched using a high energy beam to form a first cross section, comprising: Using a high energy beam to etch the semiconductor material at a distance of 0.1-10 μm from the edge of the protective layer to form a first cross section; Polishing the first cross section with a high energy beam to form an observation cross section, wherein the polishing direction is toward the protective layer, and the cross section at the damage observation position is exposed on the observation cross section; The thickness of the protective layer is greater than or equal to the etching depth on the protective layer caused by the component of the deposited energy of the high-energy beam in the direction perpendicular to the surface of the semiconductor material when polishing the first cross section; The etching depth is determined according to the following formula: ； ； ； in, is the etching volume coefficient, which is used to describe the ratio of particle dose to actual etching material dose during the etching process of different materials. is the total sputtering ion flux, is the incident dose, is the sputtering yield, is the etching volume coefficient, which describes the ratio of particle dose to actual etching material dose during the etching process of different materials. M is the molar mass of the substrate material. is Avogadro's constant, is the density of the base material, is the microelement of the material surface processing area, The time element for material processing calculation, is the volume of material removed.

2. The detection method according to claim 1, characterized in that: Depositing a protective layer on the surface of a semiconductor material, wherein the protective layer at least covers a damage observation position of the semiconductor material, comprises: Depositing a first protective layer on the semiconductor material using an electron beam, wherein the first protective layer at least covers the damage observation position; Depositing a second protective layer on the first protective layer using an ion beam, wherein the second protective layer covers the first protective layer; The protective layer includes a first protective layer and a second protective layer.

3. The detection method according to claim 2, characterized in that: The thickness of the first protective layer is greater than or equal to the etching depth on the first protective layer caused by the components of the deposition energy of the ion beam in directions parallel and perpendicular to the surface of the semiconductor material when depositing the second protective layer on the first protective layer.

4. The detection method according to claim 1, characterized in that: The polishing width of the first cross section polished by the high energy beam is greater than the distance from the first cross section to the first side edge of the protective layer, and less than the distance from the first cross section to the second side edge of the protective layer; The first side edge is an edge of the protective layer close to the first cross section, and the second side edge is an edge of the protective layer away from the first cross section.

5. The detection method according to claim 4, characterized in that: The length of the first cross section is greater than or equal to the length of the protective layer. When the length of the first cross section is equal to the length of the protective layer, two ends of the first cross section are flush with two ends of the protective layer. When the length of the first cross section is greater than the length of the protective layer, two ends of the first cross section extend beyond two ends of the protective layer.

6. The detection method according to claim 1, characterized in that: The first cross section and the observation cross section are perpendicular to a surface of the semiconductor material and a surface of the protective layer.

7. The detection method according to claim 1, characterized in that: When the semiconductor material is etched by a high energy beam to form a first cross section, the etching width of the semiconductor material by the high energy beam is 1-2 times the etching depth, and the etching depth is 1-2 times the estimated damage depth.

8. The detection method according to claim 1, characterized in that: The method further comprises etching the semiconductor material with a high energy beam to form a first cross section, and further comprising: Selecting the type of ion beam of the high energy beam; Selecting the target material as the semiconductor material; The optimal etching parameter combination is obtained by orthogonal experiment, wherein the parameters in the etching parameter combination include: acceleration voltage, beam current, ion incident angle, and residence time; Based on the etching parameter combination, the semiconductor material is etched using the high energy beam to form a first cross section.

9. The detection method according to claim 1, characterized in that: Polishing the first cross section by using a high energy beam to form an observation cross section also includes: Selecting the type of ion beam of the high energy beam; Selecting the target material as the semiconductor material; The optimal polishing parameter combination is obtained by orthogonal experiment, wherein the parameters in the polishing parameter combination include: acceleration voltage, beam current, ion incident angle, and residence time; Based on the polishing parameter combination, the first section is polished using the high energy beam to form an observation section.

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