Fault simulation method, test method, device and system of Flexray bus
By determining the bus time information of the Flexray bus and performing fault simulations in the specified period and time slots, the problem of lack of specific and reliable methods of Flexray fault simulation in the prior art is solved, and the accuracy and reliability of Flexray fault simulation are achieved.
Patent Information
- Application Number
- CN202411290663.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-13
- Publication Date
- 2025-02-07
AI Technical Summary
There is a lack of a specific and reliable way to implement Flexray fault simulation in the prior art, and it is difficult to effectively carry out fault simulation and testing on the Flexray bus.
By determining the bus time information of the Flexray bus, including information about periods and time slots, the fault simulation is performed on the specified periods and time slots based on this information to achieve targeted fault simulation.
A specific and reliable Flexray fault simulation method is provided, which can perform fault simulation based on the time division characteristics of the Flexray bus, improving the accuracy and reliability of Flexray fault simulation.
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Figure CN119396641A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of bus technology, and in particular to a fault simulation method, a test method, a device and a system for a Flexray bus. Background Art
[0002] Flexray bus is widely used in vehicles, aviation, rail transportation and other fields. In the Flexray bus, messages are often sent based on various time parameters.
[0003] For devices that communicate via the Flexray bus (such as domain controllers and sensors), simulation testing is often required during the development process, which includes the process of fault simulation injection. In the prior art, taking the article "Design of Fault Testing System Based on FlexRay Bus" as an example, some methods of fault injection are mentioned, such as generating some erroneous data streams and inserting them into these data to form various faults, thereby simulating actual faults. However, these are only some conceptual explanations. It can be seen that the prior art lacks a specific and reliable method to implement Flexray fault simulation. Summary of the invention
[0004] Based on this, it is necessary to provide a Flexray bus fault simulation method, test method, device and system to address the above technical problems.
[0005] In a first aspect, the present application provides a Flexray bus fault simulation method, comprising:
[0006] Determine bus time information of the Flexray bus; the bus time information at least includes: information for describing a cycle of the Flexray bus and a time slot in the cycle;
[0007] Based on the bus time information, fault simulation is performed in a specified time slot of a specified cycle of the Flexray bus.
[0008] In a second aspect, the present application provides a testing method, comprising:
[0009] After the fault simulation of the fault simulation method of the first aspect occurs, a response of the device under test on the Flexray bus is determined as a basis for evaluating the device under test.
[0010] In a third aspect, the present application provides a testing device, including a processing module and a channel, wherein the processing module is used to execute the method provided in the first aspect or the second aspect, and the processing module is connected to the Flexray bus through the channel.
[0011] In a fourth aspect, the present application provides a testing system, comprising the testing device provided in the third aspect.
[0012] The above-mentioned Flexray bus fault simulation method, test method, test equipment and test system are based on the bus time information of the Flexray bus. According to the unique time-division characteristics of buses such as the Flexray bus (which are reflected in the need to send corresponding data based on cycles and time slots), fault simulation can be performed in a specified time slot of a specified cycle, thereby realizing targeted fault simulation of the corresponding time slot, and providing a specific and reliable method for Flexray fault simulation. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the drawings required for use in the embodiments of the present application or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.
[0014] Figure 1 A schematic diagram of an application environment in an embodiment;
[0015] Figure 2 is a schematic diagram of a Flexray protocol specification in one embodiment;
[0016] Figure 3 FIG. 1 is a flow chart of a method for simulating a fault of a Flexray bus in an embodiment. Figure 1 ;
[0017] Figure 4 FIG. 1 is a flow chart of a method for simulating a fault of a Flexray bus in an embodiment. Figure 2 ;
[0018] Figure 5 FIG. 1 is a flow chart of a method for simulating a fault of a Flexray bus in an embodiment. Figure 3 ;
[0019] Figure 6 FIG. 1 is a flow chart of a method for simulating a fault of a Flexray bus in an embodiment. Figure 4 . DETAILED DESCRIPTION
[0020] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.
[0021] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.
[0022] It can be understood that the terms "first", "second", etc. used in the present application can be used in this article to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from another element.
[0023] It should be noted that when an element is considered to be "connected" to another element, it can be directly connected to the other element, or connected to the other element through an intermediate element. In addition, the "connection" in the following embodiments should be understood as "electrical connection", "communication connection", etc. if there is transmission of electrical signals or data between the connected objects.
[0024] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" etc. specify the presence of stated features, wholes, steps, operations, components, parts or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts or combinations thereof.
[0025] Please refer to Figure 1 Part or all of the steps of the fault simulation method and the test method involved in this application can be implemented by electronic devices on the Flexray bus. Figure 1 In the example, one electronic device is used, and the number of electronic devices, the number of processing modules in each electronic device, and the number of channels in each electronic device can be one or more.
[0026] The processing module may be any device or a collection of devices for implementing data processing. In one example, the processing module may be one or more circuits, such as an FPGA circuit, or a combination of an FPGA circuit and a controller, a FPGA circuit and a processor, a controller and a processor, a FPGA circuit and a Flexray chip, etc., or a collection of multiple combinations; in another example, the processing module may be a lower computer (or a bus communication device, a real-time machine, a bus board, etc.) comprising one or more circuit boards, or may be a computer; in yet another example, it may be a combination of devices comprising an upper computer and a lower computer, the lower computer may also be replaced by (or described as) a bus communication device, a real-time machine, a bus board, etc., and the upper computer may be a computer, a tablet computer, etc.
[0027] The channel may be any device or a collection of devices that implement signal transmission between the Flexray bus and the processing module, and may include, for example, a corresponding interface, such as some or all terminals of a standardized interface, or may include a corresponding interface and a Flexray chip.
[0028] The electronic device therein may be any device or a collection of devices including processing modules and channels, for example, a circuit board, a slave computer, a bus communication device, a real-time machine, a bus board, etc. It may also be a combination of a host computer and a slave computer (or a bus communication device, a real-time machine, a bus board). In a specific example, the electronic device may be a test device, such as a back-injection test device, a HIL test device, a simulation test device, etc., or it may be a data acquisition device, a vehicle-mounted device, etc.
[0029] The fault simulation method of the embodiment of the present application can be implemented by one or more electronic devices. The fault simulation method and the test method can be implemented by the same electronic device or by different electronic devices. The test method may also be implemented by a device that is not connected to the Flexray bus. For example, the device can communicate with the device under test in other ways (such as at least one of CAN bus, Ethernet bus, USB, RS232, etc.), thereby determining the response of the device under test.
[0030] In addition, the device under test and the electronic device can communicate only through Flexray, or through other methods (such as CAN bus, vehicle Ethernet bus, Flexray bus, ordinary Ethernet bus, DSI3 bus, PSI5 bus, USB, RS232, etc.).
[0031] For ease of understanding the concept of this application, refer to Figure 2 , briefly explain the communication principle of Flexray bus.
[0032] When communicating based on the Flexray bus, data is transmitted on the bus based on cycles. Figure 2 It shows a cycle, where a cycle is divided into: static segment, dynamic segment, symbol window, network idle time. Cycles can constitute a large cycle, and the Flexray bus can communicate based on the cycle of the large cycle.
[0033] Among them, the static segment and the dynamic segment can be composed of time slots. The time slots in the dynamic segment can be mini slots. Each time slot in the static segment can be described as a static slot, and its length is the same. The data to be transmitted will be pre-planned to the corresponding time slot. For example, the data to be transmitted in each slot can be pre-planned in the communication scheduling information. For static time slots, it can usually be used to transmit periodic data, and the relationship between data and time slots is fixed. For dynamic segments, nodes on the Flexray bus can send data in the dynamic segment, and which mini slots can be pre-planned for transmitting what data. Each node can also seize the mini slot according to priority, and the number of occupied mini slots may not be fixed. The data transmitted by the dynamic segment can be triggered based on events, for example.
[0034] The number of cycles configured for the Flexray bus during use, the number and length of the time slots in the dynamic segment of each cycle, the number and length of the time slots in the static segment, etc. are all predetermined and may be different in different application scenarios. Therefore, for nodes on the Flexray bus (e.g. Figure 1 For the electronic device shown in the figure, if the information of the cycle and time slot is not known in advance, the information of the cycle and time slot, such as the number of cycles, the number and length of time slots, etc., can be obtained by monitoring the signal transmission on the Flexray bus.
[0035] There is an action point for each time slot. From the action point, the message part of the message is officially transmitted. Therefore, in each time slot, there is an action point offset before the message part. Specifically, the time slot includes the action point offset, the message part, the channel idle delimiter, and the channel idle time.
[0036] The message part (Message) can further include TSS, FSS, BBS and data unit (Data Byte); among which:
[0037] TTS is a series of continuous low levels;
[0038] FSS is a high level;
[0039] BBS is a high level + a low level;
[0040] FES is a low level + a high level.
[0041] It can be seen that the length and level of TTS, FSS, BBS, FES, Action Point Offset, etc. are all standardized. The standard may be determined based on the Flexray specification, such as the level and length of FFS, or it may be determined based on pre-configured global parameters, such as the length of Action Point Offset, which may also be determined based on pre-configured global parameters and Flexray specifications.
[0042] The nodes on the Flexray bus (or the nodes of a Flexray cluster) synchronize the clocks and calculate the current time on the Flexray bus based on the clocks, such as whether the corresponding segment or bit time has been reached; and then send and receive signals accordingly.
[0043] Each frame of data in the message part may further include a frame header, ID information, frame header CRC, cycle count information, a valid data segment, and a CRC check code at the end of the frame.
[0044] Based on the above description, please refer to Figure 3 , an embodiment of the present application provides a Flexray bus fault simulation method, comprising:
[0045] S10: Determine bus time information of the Flexray bus;
[0046] The bus time information at least includes: information for describing the cycle of the Flexray bus and the time slots in the cycle; for example, it may include the number of cycles, the number of time slots, that is, the number of cycles and the number of time slots in each large cycle of the cycle, and in a further example, it may also include: the length of part or all of the time slots, the length of part or all of the cycle, etc.;
[0047] S20: Based on the bus time information, perform fault simulation in a specified time slot of a specified period of the Flexray bus;
[0048] The designated period and designated time slot may be a period and time slot directly designated by humans, or a period and time slot automatically designated based on preset rules.
[0049] For example, one or more blank time slots can be automatically found as designated time slots, where a blank time slot refers to a time slot that is not specified in the communication scheduling information to transmit any message. For another example, a time slot used to transmit a specific message can be found as a designated time slot to achieve fault simulation of the specific message, and test accordingly, which helps to verify and ensure the effectiveness and accuracy of such message transmission.
[0050] The specific message may refer to a message with specific ID information or a message for a specific purpose, thereby realizing fault simulation, testing, verification, etc. of message transmission of corresponding functions. The specific message may also refer to a message from a specific source, such as a message from a certain device (the device under test or other devices on the Flexray bus), thereby realizing fault simulation, testing, verification, etc. of message transmission of corresponding devices.
[0051] The message here refers to the information content that needs to be shared on the Flexray bus, which at least includes a valid data segment and may also include a frame header, a frame trailer, ID information, etc.
[0052] The designated period may be one or more periods of the multiple periods of the Flexray bus; it may be multiple consecutive periods or may be discontinuous periods.
[0053] The designated time slots may be one or more time slots in a designated period of the Flexray bus, and may be a plurality of continuous time slots or may be discontinuous time slots.
[0054] It can be seen that, based on the bus time information of the Flexray bus, fault simulation (such as sending fault simulation messages or making interference) can be performed in the specified time slot of the specified period according to the unique time-division characteristics of buses such as the Flexray bus (which is reflected in the need to send corresponding data based on cycles and time slots), thereby realizing targeted fault simulation of the corresponding time slots, and providing a specific and reliable method for Flexray fault simulation. Under the conception of the embodiment of the present application, based on the bus time information, it is possible to "point and hit" and realize fault simulation at a specified location.
[0055] In some implementations, the bus time information may be pre-defined manually or directly received from other devices. For example, the electronic device executing step S10 may be a device that has been added to the Flexray bus, thereby obtaining various global parameters and / or: has been specified in the communication scheduling information.
[0056] In some other implementations, bus time information can also be obtained by monitoring and analyzing the signals transmitted on the Flexray bus, for example: Figure 4 , step S10 may include:
[0057] S11: monitoring a signal transmitted on the Flexray bus, and determining the bus time information of the Flexray bus according to the monitored signal.
[0058] For example, multiple devices (including devices under test and other devices) can be connected to the Flexray bus, and an electronic device that executes the fault simulation method of the Flexray bus can be connected to the Flexray bus without being added to the Flexray bus, for example, the global parameters of the Flexray bus are not known, and for example, not specified in the communication scheduling information.
[0059] When the transmitted signal is fault-free, various messages that meet the preset requirements are transmitted on it. Because they meet the preset requirements, such as global parameters or Flexray specifications, they are easy to identify. For example, some or all of TTS, FSS, BBS, FES, action point offset (Action Point Offset), network idle time (network idle time), channel idle delimiter (Channel Idledelimiter), channel idle time (Channel Idle), etc. can be identified, and the relationship between these segments and time slots and cycles is fixed. Some contents defined by global parameters (such as the length of TTS, the length of action point offset, etc.) can be determined. For example, because the level change law and length of FSS, BBS, and FES are fixed, they can be identified. The levels of TTS and action point offset (Action Point Offset) are also fixed. When FSS, BBS, and FES are known, TTS and action point offset (Action Point Offset) can be inferred. PointOffset) is exactly how long. Therefore, after monitoring enough large-cycle messages, the bus time information, such as how many cycles and time slots there are, can be calculated based on these identified segments and global parameters. If the number of cycles, the number of time slots in a cycle, the length of the cycle and time slot can also be understood as a global parameter, then the process of determining the bus time information can also be understood as the process of calculating the global parameters through the monitoring results.
[0060] In the above scheme, no matter whether it is originally added to the Flexray bus or not, the bus time information can be obtained through monitoring, which enriches the scenarios for fault simulation and testing.
[0061] For one implementation, please refer to Figure 5 , step S20 may include:
[0062] S21: Based on the bus time information, a fault simulation message is sent in a specified time slot of a specified period of the Flexray bus.
[0063] The sending of the fault simulation message violates the preset requirement. In other words, the fault simulation message is a message that violates the preset requirement, and can also be understood as an illegal message.
[0064] The message here refers to a signal or a set of signals sent to the Flexray bus. It may carry a group of message parts (Message) or multiple group message parts (Message). It may be a time slot (slot) or multiple time slots (slots). It may also refer to a signal or a string of signals that are not part of the message (Message).
[0065] The preset requirements may be defined based on the Flexray specification, may be defined based on pre-configured global parameters, or may be defined based on the Flexray specification and global parameters. The preset requirements may be understood as the requirements that need to be met for normal and trouble-free data transmission on the Flexray bus.
[0066] In one example, the preset requirement may include a standard length of a specified segment; the standard length is determined based on a Flexray specification and / or a pre-configured global parameter;
[0067] Furthermore, the length of the designated segment in at least one of the fault simulation messages is different from the standard length. The designated segment may be, for example, TSS, FSS, BBS, FES, action point offset (Action Point Offset), TTS, etc. The difference may refer to a length less than the standard length or a length greater than the standard length.
[0068] Correspondingly, in step S21, a message of a designated segment of a non-standard length can be constructed and sent according to a known standard length. Among them, the target length of the non-standard length can be determined according to the standard length, and then the designated segment of the target length can be constructed and sent to the Flexray bus when the designated segment needs to be sent. For example, when TSS needs to be sent, if the standard length is known to be n bits, a target length of n-2 bits can be determined first, and then only n-2 bits of low level can be sent when TSS needs to be sent.
[0069] Among them, since the Flexray bus can communicate based on a large cycle, if it is necessary to cyclically send fault simulation messages that violate the standard length multiple times in the same specified time slot of the same specified cycle, then in some examples, the target length of the specified segment in the fault simulation message sent each time and / or the selected specified segment may be the same, and in other examples, the target length of the specified segment in the fault simulation message sent each time and / or the selected specified segment may be different.
[0070] By sending fault simulation messages that violate the standard length, it is convenient to evaluate the corresponding functions of the device under test by observing the reaction of the device under test. For example, for the situation of partial violation of the standard length, based on the Flexray specification or further algorithm design of the user, it should be possible to feedback the fault (such as an error). If the fault is not fed back or the frequency of not feeding back the fault is not high enough, it can be considered that the function of the device under test is not ideal. For another example, for the situation of partial violation of the standard length, based on the Flexray specification or further algorithm design of the user, it should be possible to correctly extract the content in the message part without being affected and perform further processing. If the extraction and further processing are not successful or the frequency of unsuccessful extraction and processing is not high enough, it is considered that the corresponding function of the device under test is not ideal.
[0071] In one example, the preset requirement may include a standard level of a designated bit in the Flexray specification; and a level of the designated bit in at least one of the fault simulation messages is different from the standard level.
[0072] The designated bit can be a single bit, multiple consecutive bits, or multiple discrete bits, such as one or more bits of TTS, FSS, BBS, FES, action point offset, etc., but it is not limited to this. Any bit with a level defined in the Flexray specification can be used as a designated bit to construct a fault simulation message.
[0073] Correspondingly, in step S21, a message with a non-standard level for a designated bit can be constructed and sent according to a known standard level, wherein the level after flipping can be determined as the target level for the designated bit based on the standard level, and then the target level is constructed and sent to the Flexray bus when the designated bit needs to be sent.
[0074] Among them, since the Flexray bus can communicate based on a large cycle, if it is necessary to cyclically send a fault simulation message that violates the standard level multiple times in the same specified time slot of the same specified cycle, in some examples, the specified bits selected in the fault simulation message sent each time can be the same, and in other examples, the specified bits selected in the fault simulation message sent each time can also be different.
[0075] By sending fault simulation messages that violate the standard level, it is convenient to evaluate the corresponding functions of the device under test by observing the reaction of the device under test. For example, for the situation of partial violation of the standard level, based on the Flexray specification or further algorithm design of the user, it should be possible to feedback the fault (such as an error). If the fault is not fed back or the frequency of not feeding back the fault is not high enough, it can be considered that the function of the device under test is not ideal. For another example, for the situation of partial violation of the standard level, based on the Flexray specification or further algorithm design of the user, it should be possible to correctly extract the content in the message part without being affected and perform further processing. If the extraction and further processing are not successful or the frequency of unsuccessful extraction and processing is not high enough, it is considered that the corresponding function of the device under test is not ideal.
[0076] In addition, the violation of the standard length and the violation of the standard level may also occur simultaneously for the same segment, that is, the designated bit is one or more bits in the designated segment.
[0077] In one example, the preset requirement may include communication scheduling information of the Flexray bus, the communication scheduling information is used to specify whether to send a message in each time slot of each cycle and what message to send; the communication scheduling information may include a communication scheduling table. At least one of the fault simulation messages is sent in a time slot that does not comply with the communication scheduling information.
[0078] Since blank time slots can be discovered based on communication scheduling information, blank time slots can be understood as time slots that are not specified to send any messages. Furthermore, in one implementation of step S21, a message containing a preset message can be sent in the blank time slot, and the message itself may or may not cover situations that violate other preset requirements (such as violations of standard length and / or standard level).
[0079] In addition, the communication scheduling information may also define which node and channel sends the message in each time slot.
[0080] By sending fault simulation messages that violate the communication scheduling information, it is convenient to evaluate the corresponding functions of the device under test by observing the reaction of the device under test. For example, it can be observed whether the device under test will extract the message content, whether it affects the extraction and processing of the content of messages in other time slots by the device under test, and whether an error will be reported as a result.
[0081] In addition, if the Flexray bus is already equipped with various devices, and they communicate in a manner that complies with the communication scheduling information, preset global parameters, and Flexray specifications, then, when these devices are still working, in one example, no matter what kind of fault simulation message, the fault simulation message can be sent in a blank time slot. The blank time slot can be understood as a time slot that is not specified to send any message. Then, the fault simulation is achieved without affecting the original function. In another example, after one of the devices is controlled to be out of work, in the communication scheduling information, it is assumed that the message configured to be sent by the device is message a, and message a is specified to be sent in a time slot A of a certain period. Then, after the device is controlled to be out of work, a fault simulation message can be sent in the time slot A. At this time, the ID information and other contents of the message part of the fault simulation message can be designed with reference to message a, for example, the same as it, or different from it. The fault simulation message may cover violations of the standard length and / or standard level, or may not violate it.
[0082] For one implementation, please refer to Figure 6 , step S20 may include:
[0083] S22: Based on the bus time information, interfere with the message transmission in the specified time slot of the specified period of the Flexray bus.
[0084] The interference includes sending an interference signal. In one example, when it is determined that the target level should be transmitted at the target time of the specified time slot, an interference signal can be sent to the Flexray bus to prevent the target level from being transmitted, such as interfering with it to 1 when it should be transmitted, interfering with it to 0 when it should be transmitted, or interfering with it to a signal that cannot be identified or is identified as noise.
[0085] Among them, since the Flexray bus can communicate based on a large cycle, if interference is required multiple times in the same specified time slot of the same specified cycle in each cycle, in some examples, the interference position can be different each time, or: the interference position can be changed according to the response of the device under test. For example, the same time slot can be interfered with at the same position in N cycles. If the device under test can always successfully extract the message part, a new position can be used for interference according to the internship switch.
[0086] It can be seen that in step S22, the normally transmitted message can be interfered by sending an interference signal, and the common communication interference in the communication process can be simulated. Through the interference fault simulation, it is convenient to evaluate the corresponding function of the device under test by observing the reaction of the device under test. For example, for the case of partial interference, based on the Flexray specification or the user's further algorithm design, it should be possible to feedback the fault (such as an error). If the fault is not fed back or the frequency of not feeding back the fault is not high enough, it can be considered that the function of the device under test is not ideal; for another example, for the case of partial interference, based on the Flexray specification or the user's further algorithm design, it should be possible to correctly extract the content in the message part without being affected and perform further processing. If the extraction and further processing are not successful or the frequency of unsuccessful extraction and processing is not high enough, it is considered that the corresponding function of the device under test is not ideal.
[0087] The present application also provides a testing method, including:
[0088] After the fault simulation of the fault simulation method involved in the embodiment of the present application and its optional solutions occurs, determining the response of the device under test on the Flexray bus as the evaluation basis of the device under test may include, for example, at least one of the following:
[0089] Determining whether the tested device generates corresponding fault feedback information;
[0090] Determine whether the device under test can successfully process the message of the fault simulation;
[0091] Determine whether the device under test can successfully process subsequent messages after the fault simulation occurs.
[0092] Successful processing usually involves extracting the message contained in the message.
[0093] The embodiment of the present application also provides an electronic device, including a processing module and a channel.
[0094] The processing module is used to execute the method involved in the embodiment of the present application and its optional solution, and the processing module is connected to the Flexray bus through the channel. For information about the processing module and the channel, please refer to the relevant description of this specification.
[0095] An embodiment of the present application also provides a testing system, including the above-mentioned electronic device.
[0096] The test systems can be simulation test systems, hardware-in-the-loop test systems, data injection test systems, bus test analysis systems, etc.
[0097] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps in the above-mentioned method embodiments are implemented.
[0098] In one embodiment, a computer program product is provided, including a computer program, which implements the steps in the above-mentioned method embodiments when executed by a processor.
[0099] Those of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a program, and the computer program can be stored in a non-volatile readable storage medium, and the program can include the processes of the embodiments of the above-mentioned methods when executed. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, an artificial intelligence (AI) processor, etc., but are not limited to this.
[0100] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.
[0101] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.
Claims
1. A Flexray bus fault simulation method, characterized in that: include: Determining bus time information of the Flexray bus; The bus time information includes at least: information for describing the cycle of the Flexray bus and the time slots in the cycle; Based on the bus time information, fault simulation is performed in a specified time slot of a specified cycle of the Flexray bus.
2. The fault simulation method according to claim 1, characterized in that: Based on the bus time information, a fault simulation is performed in a specified time slot of a specified period of the Flexray bus, including: Based on the bus time information, a fault simulation message is sent in a specified time slot of a specified period of the Flexray bus; the sending of the fault simulation message violates a preset requirement.
3. The fault simulation method according to claim 2, characterized in that: The preset requirement includes a standard length of a specified segment; the standard length is determined based on the Flexray specification and / or pre-configured global parameters; The length of the designated segment in at least one of the fault simulation messages is different from the standard length.
4. The fault simulation method according to claim 2, characterized in that: The preset requirements include standard levels of specified bits in the Flexray specification; The level of the designated bit in at least one of the fault simulation messages is different from the standard level.
5. The fault simulation method according to claim 2, characterized in that: The preset requirement includes communication scheduling information of the Flexray bus, and the communication scheduling information is used to specify whether to send a message in each time slot of each cycle and what message to send; At least one of the fault simulation messages is sent in a time slot that does not comply with the communication scheduling information.
6. The fault simulation method according to any one of claims 1 to 5, characterized in that: Based on the bus time information, a fault simulation is performed in a specified time slot of a specified period of the Flexray bus, including: Based on the bus time information, message transmission in a specified time slot of a specified period of the Flexray bus is interfered with, and the interference includes sending an interference signal.
7. The fault simulation method according to any one of claims 1 to 5, characterized in that: Determining bus time information of the Flexray bus includes: The signal transmitted on the Flexray bus is monitored, and the bus time information of the Flexray bus is determined according to the monitored signal.
8. A testing method, characterized in that: include: After the fault simulation of the fault simulation method according to any one of claims 1 to 7 occurs, the response of the device under test on the Flexray bus is determined as a basis for evaluating the device under test.
9. The testing method according to claim 8, characterized in that: Determining the response of the device under test on the Flexray bus after the fault simulation message is sent as a basis for evaluating the device under test includes at least one of the following: Determining whether the tested device generates corresponding fault feedback information; Determine whether the device under test can successfully process the message of the fault simulation; Determine whether the device under test can successfully process subsequent messages after the fault simulation occurs.
10. An electronic device, comprising a processing module and a channel, characterized in that: The processing module is used to execute the method according to any one of claims 1 to 9, and the processing module is connected to the Flexray bus through the channel.
11. A testing system, characterized in that: The electronic device comprising claim 10.
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