Enhanced AlGaN / GaN HEMT device comprising embedded layer

Abstract

The invention discloses an enhanced AlGaN / GaN HEMT (High Electron Mobility Transistor) device comprising an embedded layer. Comprising a silicon substrate, a nucleating layer, a buffer layer, a P embedding layer, an N embedding layer, a channel layer, a barrier layer, a passivation layer, a source electrode, a drain electrode, a p-GaN layer and a grid electrode, wherein the silicon substrate, the nucleating layer, the buffer layer, the P embedding layer, the N embedding layer, the channel layer, the barrier layer and the passivation layer are stacked from bottom to top; the drain electrode extends from the surface of the passivation layer to the upper surface of the channel layer and is in direct electric contact with the channel layer, the barrier layer and the passivation layer. And the p-GaN layer is embedded into the passivation layer until the p-GaN layer is in contact with the upper surface of the barrier layer. The source electrode extends into the P-type embedded layer from the surface of the passivation layer and is in direct electric contact with the P-type embedded layer, the N-type embedded layer, the channel layer, the barrier layer and the passivation layer. According to the invention, the dynamic on-resistance characteristic of the device is optimized while the off-state voltage endurance capability of the device is improved and the output characteristic is not lost.

Description

Technical Field

[0001] The invention belongs to the technical field of semiconductor devices, and relates to the structural design of an enhanced AlGaN / GaN HEMT device, and in particular to an enhanced AlGaN / GaN HEMT device comprising an embedded layer. Background Art

[0002] Enhanced-mode AlGaN / GaN HEMT devices have excellent performances such as high off-state breakdown voltage, low on-resistance, high operating temperature, and high operating frequency. They are one of the research hotspots in the field of semiconductor device technology today. However, there are some serious reliability issues in their practical applications. Dynamic on-resistance refers to the phenomenon that the saturation current density and on-resistance of AlGaN / GaN HEMT devices degrade compared to the static value when they are switched to the on state after being subjected to high drain bias stress in the off state.

[0003] The dynamic on-resistance problem of enhanced AlGaN / GaN HEMT devices will reduce device performance, increase system losses, and reduce conversion efficiency, severely limiting its further development. In order to solve this problem, researchers mostly focus on the surface process optimization or electrode structure design of the device, and have proposed technologies such as device surface passivation, gate field plate structure, and hybrid drain-gate injection structure. However, there are still few related technologies based on the internal structure of the device, and the existing related technologies based on the internal structure of the device, such as buffer layer growth process optimization, often find it difficult to suppress the degradation of the dynamic on-resistance of the device while taking into account other performance indicators. Therefore, suppressing the degradation of the dynamic on-resistance of enhanced AlGaN / GaN HEMT devices without excessively damaging other performance indicators is still a technical focus that technicians in this field need to solve urgently. Summary of the invention

[0004] In view of the shortcomings of the prior art, the present invention proposes an enhanced AlGaN / GaN HEMT device including an embedded layer, which improves the dynamic on-resistance degradation problem of the enhanced AlGaN / GaN HEMT device and improves the reliability of the device by introducing the embedded layer into the conventional enhanced AlGaN / GaN HEMT device.

[0005] The enhanced AlGaN / GaN HEMT device containing an embedded layer comprises a silicon substrate, a nucleation layer, a buffer layer, a P embedded layer, an N embedded layer, a channel layer, a barrier layer and a passivation layer stacked from bottom to top, as well as a source and a drain located on both sides of the passivation layer, a p-GaN layer located between the source and the drain, and a gate located above the p-GaN layer.

[0006] The drain electrode extends from the surface of the passivation layer to the upper surface of the channel layer, and is in direct electrical contact with the channel layer, the barrier layer, and the passivation layer. The p-GaN layer is embedded in the passivation layer until it contacts the upper surface of the barrier layer. The source electrode extends from the surface of the passivation layer to the P embedded layer, and is in direct electrical contact with the P-type embedded layer, the N-type embedded layer, the channel layer, the barrier layer, and the passivation layer.

[0007] The N embedded layer material is Al 0.1 Ga 0.9 N, thickness is 0.5μm~1μm, N-type doping concentration is 1×10 14 cm -3 ~1×10 16 cm -3 The P embedded layer material is Al 0.1 Ga 0.9 N, thickness is 0.5μm~1μm, P-type doping concentration is 5×10 17 cm -3 ~5×10 18 cm -3 .

[0008] Preferably, the height of the source electrode inside the P embedded layer is 0.2 μm-0.8 μm.

[0009] Preferably, the C doping concentration in the buffer layer is 1×10 16 cm -3 ~1×10 18 cm -3 , the unintentional N-type doping concentration is 1×10 15 cm -3 .

[0010] Preferably, the buffer layer material is Al 0.1 Ga 0.9 N, thickness is 2μm~4μm.

[0011] Preferably, the barrier layer material is Al 0.23 Ga 0.77 N, thickness is 0.015μm.

[0012] Preferably, the material of the p-GaN gate is GaN, and the P-type doping concentration is 3×10 17 cm -3 , and the lateral distance from the drain is 5.0μm to 8.0μm.

[0013] Preferably, the passivation layer material is Si3N4, and the thickness is 0.2 μm.

[0014] The present invention has the following beneficial effects: 1. Compared with conventional enhancement-mode AlGaN / GaN HEMT devices, by adding stacked N-embedded layers and P-embedded layers between the channel layer and the buffer layer, the two form a PN junction and raise the potential barrier between the buffer layer and the channel layer, effectively suppressing the leakage of channel carriers to the buffer layer, and thus suppressing the device's buffer layer leakage, thereby effectively improving the off-state withstand voltage capability of conventional enhancement-mode AlGaN / GaN HEMT devices.

[0015] 2. Compared with conventional enhancement-mode AlGaN / GaN HEMT devices, when subjected to drain electrical stress, the P-type doping in the P-embedded layer in the new device can effectively suppress the capture of channel electrons by buffer layer defects, while compensating for the hole depletion in the buffer layer, thereby effectively improving the dynamic on-resistance degradation problem of the device.

[0016] 3. Compared with the traditional device with back barrier layer, the new device improves the withstand voltage of the device through the PN junction formed between the N-embedded layer and the P-embedded layer, avoiding the reduction of the two-dimensional electron gas concentration in the channel layer due to the large Al component of the back barrier layer; on the other hand, since the N-type embedded layer is located between the P-type embedded layer and the channel layer, it effectively isolates the influence of the P-type impurities in the P-type embedded layer on the 2DEG in the channel layer. In summary, the addition of N and P embedded layers can improve the performance of the device while ensuring that the basic electrical characteristics of the device are not affected. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 This is a schematic diagram of the structure of a conventional enhancement-mode AlGaN / GaN HEMT device.

[0018] Figure 2 It is a schematic diagram of the structure of an enhanced AlGaN / GaN HEMT device including an embedded layer.

[0019] Figure 3 1 is a graph showing output and transfer characteristics of different enhancement mode AlGaN / GaN HEMT devices measured in Example 1.

[0020] Figure 4 3 is a breakdown characteristic curve diagram of different enhanced AlGaN / GaN HEMT devices measured in Example 1.

[0021] Figure 5 These are the performance results of different enhanced-mode AlGaN / GaN HEMT devices measured in Example 1 after being subjected to drain voltage stresses of different magnitudes.

[0022] Figure 6 Graphs showing output and transfer characteristics of different enhancement-mode AlGaN / GaN HEMT devices measured in Example 2.

[0023] Figure 7 A graph showing breakdown characteristics of different enhanced-mode AlGaN / GaN HEMT devices measured in Example 2.

[0024] Figure 8 The performance results of different enhanced-mode AlGaN / GaN HEMT devices measured in Example 2 after being subjected to drain voltage stress of different magnitudes. DETAILED DESCRIPTION

[0025] In order to make the objectives, technical solutions and advantages of the present invention more clear, the present invention is described in detail below with reference to the accompanying drawings.

[0026] Conventional enhancement mode AlGaN / GaN HEMT devices in the prior art are Figure 1 As shown, it includes a silicon substrate 12, a nucleation layer 11, a buffer layer 10, a channel layer 7, a barrier layer 6 and a passivation layer 5 stacked from bottom to top, and a P-GaN layer 4, a source 1 and a drain 2 arranged above the passivation layer 5. The P-GaN layer 4 is embedded in the passivation layer 5 until it contacts the upper surface of the barrier layer 6, and the gate 3 is arranged directly above the P-GaN layer 4. The source 1 and the drain 2 are respectively arranged on both sides of the barrier layer 6, and the source 1 and the drain 2 extend to the interface between the channel layer 7 and the barrier layer 6, and form electrical contact with the channel layer 7, the barrier layer 6 and the passivation layer 5 of the device. The material of the buffer layer 10 is Al 0.1 Ga 0.9 N, thickness is 2μm~4μm, and the unintentional N-type doping concentration is 1×10 15 cm -3 , the C doping concentration is 1×10 16 cm -3 ~1×10 18 cm -3 The material of the p-GaN layer 4 is GaN, and the P-type doping concentration is 3×10 17 cm -3 The lateral distance from the drain electrode 2 is 5.0 μm to 8.0 μm. The passivation layer 5 is made of Si3N4 and has a thickness of 0.2 μm. The barrier layer 6 is made of Al 0.23 Ga 0.77 N, thickness is 0.015μm.

[0027] The present application proposes an enhanced AlGaN / GaN HEMT device including an embedded layer. Figure 2As shown in FIG. 1 , compared with a conventional enhanced AlGaN / GaN HEMT device, an N-type embedded layer 8 and a P-type embedded layer 9 are added between the buffer layer 10 and the channel layer 7, and the source electrode 1 extends into the P-type embedded layer 9 and is in direct electrical contact with the N-type embedded layer 8, the P-type embedded layer 9, the channel layer 7, the barrier layer 6 and the passivation layer 5. The N-type embedded layer 8 is made of Al 0.1 Ga 0.9 N, thickness is 0.5μm~1μm, N-type doping concentration is 1×10 14 cm -3 ~1×10 16 cm -3 The material of the P embedded layer 9 is Al 0.1 Ga 0.9 N, thickness is 0.5μm~1μm, P-type doping concentration is 5×10 17 cm -3 ~5×10 18 cm -3 The source electrode 1 extends into the P embedded layer 9 to a depth of 0.2 μm to 0.8 μm.

[0028] Example 1

[0029] Sentaurus TCAD semiconductor device simulation software was used to Figure 1 , 2 The enhanced AlGaN / GaN HEMT device shown in the figure is modeled and simulated to compare its output characteristics, transfer characteristics, off-state withstand voltage characteristics and dynamic on-resistance characteristics. The gate-drain spacing selected in the simulation is 5μm, the buffer layer thickness is 2μm, the P-type embedded layer thickness is 1μm, and the P-type doping concentration is 1×10 18 cm -3 , the thickness of the N-type embedded layer is 1 μm, and the N-type doping concentration is 1×10 15 cm -3 , the source electrode 1 extends to a depth of 0.5 μm inside the P embedded layer 9 .

[0030] like Figure 3As shown, (a) and (b) are the output and transfer characteristic curves of the two devices, respectively. In (a), the horizontal axis is the drain voltage and the vertical axis is the drain current. The simulated bias conditions are: the gate bias is constant at 3V or 5V, and the drain bias gradually increases from 0V to 10V. According to the curve in (a), the enhanced AlGaN / GaN HEMT device containing an embedded layer proposed in this application has an output characteristic curve that is basically consistent with the conventional enhanced AlGaN / GaN HEMT device. This is mainly because the N-type embedded layer is located between the P-type embedded layer and the channel layer, which effectively suppresses the influence of the P-type impurities in the P-type embedded layer on the 2DEG in the channel, thereby suppressing the influence of the P-type embedded layer on the output characteristics of the device. In (b), the horizontal axis is the gate voltage and the vertical axis is the drain current. The simulated bias conditions are: the drain bias is constant at 10V, and the gate bias gradually increases from 0V to 7V. According to the curve in (b), since the N-embedded layer greatly shields the influence of the P-embedded layer on the channel 2DEG, the enhanced AlGaN / GaN HEMT device including the embedded layer proposed in the present application has a transfer characteristic curve that is basically consistent with that of the conventional enhanced AlGaN / GaN HEMT device.

[0031] like Figure 4 The figure shows the off-state breakdown characteristic curve, where the horizontal axis is the drain voltage and the vertical axis is the drain current. The bias conditions of the simulation are: zero gate-source bias, and the drain bias gradually increases from 0V. From the simulation results, it can be seen that the V BR There are significant differences in L gd =5μm, the V BR is 505V, while the V BR 940 V. This is because the stacked N-type embedded layer 8 and P-type embedded layer 9 raise the energy band between the buffer layer and the channel layer, effectively suppressing the leakage of channel carriers to the buffer layer in the off state; and when the device is subjected to the off-state drain voltage stress, the PN junction is reverse biased, sharing part of the drain voltage, making the body potential distribution of the device more uniform.

[0032] like Figure 5 As shown in the figure, (a) and (b) are the output characteristic curves of the two devices after different drain voltage stresses, (c) is the relationship curve between the normalized on-resistance R / R0 of the two devices and the drain voltage stress, and (d) is a schematic diagram of the dynamic on-resistance characteristic test waveform of the two devices, where R0 is the static on-resistance and R is the on-resistance after stress. Figure 5As shown in (d), the dynamic on-resistance degradation characteristics of the two devices are characterized by applying drain voltage stress on the two devices. Before the stress begins, the static output characteristics and static on-resistance (V d =0V). Then, in stage I, the drain voltages of the two devices are scanned to a high voltage (0~200V). Then, the stress stage II is entered, in which the gate 3 and source 1 of the device are grounded, and the drain 2 electrical stress continues to act on the device for a duration of t stress Then it enters phase III, in which the drain electrical stress is removed within 1μs. Then it enters phases IV and V for dynamic output characteristics and dynamic on-resistance testing. In phase IV, the gate voltage is swept to 5V, and then in phase V, the drain voltage is swept to 10V. The entire test phase lasts for t test , and finally the dynamic output characteristic diagrams of the two devices are obtained as shown in (a) and (b), and the relationship curve between the normalized on-resistance of the two devices and the magnitude of the drain electrical stress is shown in (c). As can be seen from (a), the conventional enhanced AlGaN / GaN HEMT device shows obvious dynamic on-resistance degradation and output characteristic degradation after being subjected to the off-state drain electrical stress. In contrast, as can be seen from (b), the enhanced AlGaN / GaNHEMT device including the embedded layer proposed in the present application can significantly suppress the dynamic on-resistance degradation and output characteristic degradation. As can be seen from (c), for the conventional enhanced AlGaN / GaN HEMT device, after being subjected to the off-state drain electrical stress of 200V, the on-resistance of the device increased by 289% compared with the static on-resistance, while the on-resistance of the enhanced AlGaN / GaN HEMT device including the embedded layer proposed in the present application only increased by 139%.

[0033] The hole depletion in the buffer layer and the electrical coupling of the residual negative charge region in the buffer layer to the 2DEG are one of the main mechanisms for the dynamic on-resistance degradation of conventional enhancement-mode AlGaN / GaN HEMT devices. In the enhancement-mode AlGaN / GaN HEMT device including the embedded layer proposed in the present application, when subjected to the off-state drain 2 electrical stress, the P-type embedded layer 9 electrically connected to the source 1 is biased, and the holes therein are emitted to the buffer layer 10. Since the P-type embedded layer 9 has a high concentration of P-type impurities, these sufficient P-type impurities injected into the buffer layer suppress the hole depletion in the buffer layer 10 and neutralize the residual negative charge region in the buffer 10. On the other hand, the PN junction formed by the two embedded layers raises the barrier height between the channel layer and the buffer layer, suppresses the leakage of electrons in the channel to the buffer layer 10, and reduces the number of electrons trapped in the buffer layer 10 during the electrical stress, thereby effectively optimizing the dynamic on-resistance degradation problem in conventional enhancement-mode AlGaN / GaN HEMT devices.

[0034] Example 2

[0035] In this embodiment, based on the embodiment 1, the thickness of the P-type embedded layer and the N-type embedded layer is adjusted to 0.5 μm. Output and transfer characteristic curves of different enhanced AlGaN / GaN HEMT devices measured Figure 6 As shown, when the thickness of the P-type embedded layer and the N-type embedded layer is 0.5 μm, the enhanced AlGaN / GaN HEMT device including the embedded layer proposed in the present application still has substantially consistent output characteristics and transfer characteristics with conventional enhanced AlGaN / GaN HEMT devices.

[0036] Breakdown characteristics of different enhanced-mode AlGaN / GaN HEMT devices measured Figure 7 As shown in FIG. 1 , when the thickness of the P-type embedded layer and the N-type embedded layer is 0.5 μm, the V BR The new device has a V of 785V, which is significantly higher than the 505V of conventional enhanced AlGaN / GaN HEMT devices. Compared with the 940V when the thickness of the P-type and N-type embedded layers is 1μm, the new device has a V BR The improvement effect is weakened, which is mainly because: when the device is subjected to the off-state withstand voltage, the thicker the P and N embedded layers, the wider the depletion region of the PN junction, and the better the effect of bearing the off-state withstand voltage and optimizing the body electric field distribution.

[0037] Performance results of different enhanced-mode AlGaN / GaN HEMT devices measured after different drain voltage stresses Figure 8 As shown, when the thickness of the P-type embedded layer and the N-type embedded layer is 0.5 μm, compared with the conventional enhanced AlGaN / GaNHHEMT device, the enhanced AlGaN / GaN HEMT device including the embedded layer proposed in the present application can still significantly suppress the dynamic on-resistance degradation and output characteristic degradation. However, compared with the case where the thickness of the P-type embedded layer and the N-type embedded layer is 1 μm, the suppression ability is weakened. This is mainly because the thicker the embedded layer, the more total amount of P-type doped impurities in the P embedded layer, and thus the stronger its suppression effect on electron capture in the buffer layer.

[0038] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. It should be noted that the above description is only a specific embodiment of the present invention and does not limit the present invention. All modulations and optimizations made within the spirit and principle of the present invention should fall within the scope of the claims of the present invention.

Claims

1. An enhanced AlGaN / GaN HEMT device including an embedded layer, comprising a silicon substrate, a nucleation layer, a buffer layer, a channel layer, a barrier layer and a passivation layer stacked from bottom to top, and a source and a drain located on both sides of the passivation layer, a p-GaN layer located between the source and the drain, and a gate located above the p-GaN layer; the drain extends from the surface of the passivation layer to the upper surface of the channel layer, and is in direct electrical contact with the channel layer, the barrier layer and the passivation layer; the p-GaN layer is embedded in the passivation layer until it contacts the upper surface of the barrier layer; characterized in that: An N-type embedded layer and a P-type embedded layer stacked up and down are provided between the channel layer and the buffer layer; the source electrode extends from the surface of the passivation layer into the P-type embedded layer and is in direct electrical contact with the P-type embedded layer, the N-type embedded layer, the channel layer, the barrier layer, and the passivation layer; The N embedded layer material is Al 0.1 Ga 0.9 N, thickness is 0.5μm~1μm, N-type doping concentration is 1×10 14 cm -3 ~1×10 16 cm -3 ; The P embedded layer material is Al 0.1 Ga 0.9 N, thickness is 0.5μm~1μm, P-type doping concentration is 5×10 17 cm -3 ~5×10 18 cm -3 .

2. The enhanced AlGaN / GaN HEMT device comprising an embedded layer according to claim 1, characterized in that: The height of the source electrode inside the P embedded layer is 0.2 μm to 0.8 μm.

3. The enhanced AlGaN / GaN HEMT device comprising an embedded layer according to claim 1, characterized in that: The C doping concentration in the buffer layer is 1×10 16 cm -3 ~1×10 18 cm -3 , the unintentional N-type doping concentration is 1×10 15 cm -3 .

4. The enhanced AlGaN / GaN HEMT device comprising an embedded layer according to claim 1 or 3, characterized in that: The buffer layer material is Al 0.1 Ga 0.9 N, thickness is 2μm~4μm.

5. The enhanced AlGaN / GaN HEMT device comprising an embedded layer according to claim 1, characterized in that: The barrier layer material is Al 0.23 Ga 0.77 N, thickness is 0.015μm.

6. The enhanced AlGaN / GaN HEMT device comprising an embedded layer according to claim 1, characterized in that: The material of the p-GaN gate is GaN, and the P-type doping concentration is 3×10 17 cm -3 .

7. The enhanced AlGaN / GaN HEMT device comprising an embedded layer according to claim 1 or 6, characterized in that: The lateral distance between the p-GaN gate and the drain is 5.0 μm to 8.0 μm.

8. The enhanced AlGaN / GaN HEMT device comprising an embedded layer according to claim 1, characterized in that: The passivation layer material is Si3N4, and the thickness is 0.2 μm.

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