LED chip and preparation method thereof

Abstract

The application relates to the technical field of semiconductor materials, and discloses an LED chip and a preparation method thereof, the preparation method comprising the following steps: (1) providing a substrate, growing an epitaxial layer on the substrate, and then depositing a current blocking layer on the surface of the epitaxial layer; (2) coating photoresist on the surface, patterning the photoresist through a yellow light process, then sequentially depositing a light reflection material and a first metal material, and performing photoresist removal and cleaning to form a light reflection layer with a preset shape and a first metal electrode layer with a preset shape; (3) depositing ITO material on the surface, then performing yellow light and etching to form an ITO current expansion layer with a preset shape; (4) coating photoresist on the surface, patterning the photoresist through a yellow light process, then depositing a second metal material, and performing photoresist removal treatment to form a second metal electrode layer with a preset shape; and (5) depositing a passivation protective layer on the surface. Through the preparation method, the luminous brightness of the LED chip can be improved, and problems such as easy falling-off of the LED chip and low process yield can be solved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor materials, and particularly to an LED chip and a preparation method thereof. BACKGROUND

[0002] After about 20 years of development, LED chip technology has developed to a relatively mature stage. It is increasingly difficult to further improve LED chips in terms of process and performance.

[0003] A conventional forward-mounted LED chip inevitably loses part of the light-emitting area due to the presence of a metal electrode. The lost light-emitting area is usually more than 8%. It is one of the core difficulties in the process of LED chips to reduce the light-emitting area as much as possible and improve the brightness of LED chips. Generally, there are two methods to solve the above problems: the first method is to reduce the area of the metal electrode as much as possible to increase the light-emitting area of the chip; the second method is to increase the reflectivity of the bottom of the metal electrode to increase the light extraction efficiency. Such methods include replacing low-reflectivity metals such as Cr, Ti, and Ni with high-reflectivity metal Al as an adhesion layer, and adding a light reflection layer to the bottom of the metal.

[0004] However, the area of the metal electrode of the LED chip is usually optimized to the best in the current process, and it is difficult to continue to reduce the space. If it continues to be reduced, it may cause problems such as reliability decline and poor electrical properties. If the adhesion layer metal of the electrode of the LED chip is replaced with Al, although the brightness of the chip increases, the electrode is prone to easy falling off and high voltage. If a light reflection layer is prepared at the bottom of the metal, the metal electrode is prone to falling off, which may also cause a significant decrease in chip yield in actual mass production. SUMMARY

[0005] The technical problem to be solved by the present application is to provide a high-brightness LED chip and a preparation method thereof, which can improve the light-emitting brightness of the LED chip and solve the problems of easy falling off of the LED chip and low process yield.

[0006] To solve the above technical problems, the present application provides, in a first aspect, a preparation method of an LED chip, comprising:

[0007] (1) providing a substrate, growing an epitaxial layer on the substrate, and then depositing a current blocking layer on the surface of the epitaxial layer;

[0008] (2) coating photoresist on the surface of the LED wafer obtained in (1), patterning the photoresist by a yellow light process, then sequentially depositing a light reflection material and a first metal material, and removing the photoresist and cleaning to form a light reflection layer with a predetermined shape and a first metal electrode layer with a predetermined shape;

[0009] (3) depositing ITO material on the surface of the LED wafer obtained in (2), and then forming an ITO current spreading layer with a preset shape by means of yellow light and etching;

[0010] (4) coating photoresist on the surface of the LED wafer obtained in (3), patterning the photoresist by means of yellow light process, then depositing a second metal material, and performing a photoresist removing process to form a second metal electrode layer with a preset shape;

[0011] (5) depositing a passivation protective layer on the surface of the LED wafer obtained in (4).

[0012] As an improvement of the above scheme, the first metal electrode layer comprises a P-electrode interdigital portion.

[0013] The second metal electrode layer comprises a metal electrode layer on the surface of the N-type layer and a metal pad layer on the surface of the P-type layer.

[0014] As an improvement of the above scheme, the first metal electrode layer comprises a first metal sub-layer, a second metal sub-layer and a third metal sub-layer stacked in order from bottom to top.

[0015] The thickness of the first metal sub-layer is 5nm-100nm.

[0016] The thickness of the second metal sub-layer is 50nm-600nm.

[0017] The thickness of the third metal sub-layer is 5nm-100nm.

[0018] As an improvement of the above scheme, the thickness of the second metal electrode layer is 1μm-3μm.

[0019] As an improvement of the above scheme, the metal material in the first metal sub-layer is one of Al, Cr, Ti and Ni.

[0020] The metal material in the second metal sub-layer is Au.

[0021] The metal material in the third metal sub-layer is one of Cr, Ti and Ni.

[0022] The metal material of the second metal electrode layer is at least two of Cr, Al, Ti, Ni, Au and Pt.

[0023] As an improvement of the above scheme, the time interval from forming the light reflection layer to starting to deposit the material of the first metal electrode layer is less than or equal to 6h.

[0024] As an improvement of the above scheme, the edge angle of the light reflection layer and the first metal electrode layer is less than 40°.

[0025] As an improvement of the above scheme, the light reflection layer comprises SiO2 layers and TiO2 layers which are periodically stacked from bottom to top, and the number of periods is 2-40;

[0026] In each period, the thickness of the SiO2 layer is 10-300 nm, and the thickness of the TiO2 layer is 10-200 nm.

[0027] As an improvement of the above scheme, the material of the current blocking layer is SiO2, and the thickness of the current blocking layer is 50-600 nm;

[0028] The thickness of the ITO current spreading layer is 15-120 nm;

[0029] The material of the passivation protection layer is SiO2 or Al2O3, and the thickness of the passivation protection layer is 30-200 nm.

[0030] Correspondingly, the second aspect of the present application also provides an LED chip prepared by the above preparation method.

[0031] The present application has the following beneficial effects:

[0032] In the present application, the metal electrode layer is divided into a first metal electrode layer and a second metal electrode layer, and the first metal electrode on the surface of the P electrode is prepared before the ITO current spreading layer, and then the second metal electrode layer on the surface of the N electrode and the surface of the P electrode metal pad is prepared on the ITO current spreading layer, which is beneficial to increase the surface area of the ITO current spreading layer in contact with the metal electrode, reduce the contact resistance, and improve the luminous efficiency. At the same time, the ITO current spreading layer is coated, which improves the adhesion effect between the light reflection layer and the metal electrode layer, thereby improving the reliability of the chip. In addition, the preparation method in the present application is also helpful to improve the brightness and manufacturing yield of the LED chip. BRIEF DESCRIPTION OF DRAWINGS

[0033] Figure 1 : The structure diagram of the mask in step (11) in the present application (the black area is the non-transparent area, and the white area is the transparent area);

[0034] Figure 2 : The structure diagram of the structure obtained after step (11) in the present application is completed;

[0035] Figure 3 : The structure diagram of the mask in step (12) in the present application (the black area is the non-transparent area, and the white area is the transparent area);

[0036] Figure 4 : The structure diagram of the structure obtained after step (12) in the present application is completed;

[0037] Figure 5 : Schematic diagram of the structure of the mask in step (21) of the present invention (the black area is the opaque area, and the white area is the translucent area);

[0038] Figure 6 : A schematic structural diagram of the light reflecting layer after obtaining a preset shape in step (23) of the present invention;

[0039] Figure 7 : A schematic structural diagram of the first metal electrode layer of a preset shape obtained in step (23) of the present invention;

[0040] Figure 8 : Schematic diagram of the structure of the mask in step (3) of the present invention (the black area is the opaque area, and the white area is the translucent area);

[0041] Figure 9 : Schematic diagram of the structure obtained after step (3) in the present invention is completed;

[0042] Figure 10 : Schematic diagram of the structure of the mask in step (4) of the present invention (the black area is the opaque area, and the white area is the translucent area);

[0043] Figure 11 : Schematic diagram of the structure of the mask in step (5) of the present invention (the black area is the opaque area, and the white area is the translucent area);

[0044] Figure 12 : Schematic diagram of the structure obtained after step (5) is completed in the present invention;

[0045] Figure 13 : A cross-sectional view of an LED chip in the present invention ( Figure 4 Cross-sectional view at position A in the middle);

[0046] Reference numerals:

[0047] 10 - substrate; 11 - N-GaN layer; 12 - multi-quantum well layer; 13 - P-GaN layer; 14 - current blocking layer; 15 - light reflecting layer; 16 - first metal electrode layer; 17 - ITO current spreading layer; 18 - second metal electrode layer; 19 - passivation protection layer. DETAILED DESCRIPTION

[0048] In order to make the objectives, technical solutions and advantages of the present invention more clear, the present invention will be further described in detail with reference to specific embodiments below.

[0049] To solve the above problems, the present invention provides a method for preparing an LED chip in a first aspect, comprising:

[0050] (1) providing a substrate 10, growing an epitaxial layer on the substrate 10, and then depositing a current blocking layer 14 on the surface of the epitaxial layer;

[0051] (2) coating photoresist on the surface of the LED wafer obtained in (1), patterning the photoresist by a photolithography process, and then sequentially depositing a light reflecting material and a first metal material, and then removing the photoresist to form a light reflecting layer 15 with a preset shape and a first metal electrode layer 16 with a preset shape;

[0052] (3) depositing ITO material on the surface of the LED wafer obtained in (2), and then forming an ITO current spreading layer 17 with a preset shape by photolithography and etching;

[0053] (4) coating photoresist on the surface of the LED wafer obtained in (3), patterning the photoresist by a photolithography process, and then depositing a second metal material, and then removing the photoresist to form a second metal electrode layer 18 with a preset shape;

[0054] (5) depositing a passivation protective layer 19 on the surface of the LED wafer obtained in (4).

[0055] In the present application, the metal electrode layer is divided into the first metal electrode layer 16 and the second metal electrode layer 18, and the first metal electrode on the surface of the P electrode is prepared before the ITO current spreading layer 17, and then the second metal electrode layer 18 on the surface of the N electrode and the metal pad surface of the P electrode is prepared on the ITO current spreading layer 17, which is beneficial to increase the surface area of the ITO current spreading layer 17 in contact with the metal electrode, reduce the contact resistance, and improve the luminous efficiency. At the same time, the ITO current spreading layer 17 is coated, which improves the adhesion effect between the light reflecting layer 15 and the metal electrode layer, thereby improving the reliability of the chip. In addition, the preparation method in the present application is also helpful to improve the brightness and manufacturing yield of the LED chip.

[0056] Each step is described in detail as follows:

[0057] Regarding step (1), providing a substrate 10, growing an epitaxial layer on the substrate 10, and then depositing a current blocking layer 14 on the surface of the epitaxial layer, specifically comprising:

[0058] (11) providing a substrate 10, and growing an epitaxial layer on the substrate 10;

[0059] Preferably, the substrate 10 can be a sapphire substrate, or a silicon substrate, a silicon carbide substrate, a gallium nitride substrate, or a substrate of other materials, which is not specifically limited in the present application.

[0060] Preferably, the epitaxial layer includes an N-GaN layer 11, a multi-quantum well layer 12, and a P-GaN layer 13 stacked sequentially from bottom to top. Furthermore, the N-GaN layer 11 is a Si-doped N-GaN layer, the multi-quantum well layer 12 is an InGaN / GaN multi-quantum well layer, the P-GaN layer 13 is a Mg-doped P-GaN layer, and the thickness of the epitaxial layer is 3 μm to 7 μm.

[0061] Furthermore, before depositing the current blocking layer 14, the epitaxial layer is subjected to MSA treatment to form an etching step, and the specific operations are as follows:

[0062] A photoresist is coated on the surface of the epitaxial layer, and then a Figure 1 The mask is exposed and developed to obtain a patterned photoresist, and finally the epitaxial layer is etched using an etching technique to expose the N-type layer in the epitaxial layer, and the etching step is obtained after the resist is removed and cleaned. Figure 2 shown.

[0063] In this step, the photoresist is a positive photoresist. The exposed areas are easily removed by the developer during the development process, leaving behind the negative photoresist in the unexposed areas to form a patterned positive photoresist that protects the underlying material. During the etching process, the material not protected by the photoresist is etched away, while the protected areas remain. Dry etching, specifically ICP etching, is used as the etching technology.

[0064] (12) depositing a current blocking layer 14 on the surface of the epitaxial layer;

[0065] The specific operations are:

[0066] A current blocking material is deposited on the surface of the epitaxial layer to form a current blocking film layer, and then a photoresist is coated on the surface of the current blocking film layer. Figure 3 The mask is exposed and developed to obtain a patterned photoresist, and finally the current blocking film layer is etched using an etching technique, and then the resist is removed and cleaned to form a current blocking layer 14 of a preset shape, such as Figure 4 shown.

[0067] The current blocking material in the present invention is SiO2, the deposition method of the current blocking material is PECVD, the photoresist is positive photoresist, and the etching technology is wet etching. Specifically, the SiO2 film layer can be etched with an etching solution, and the etching solution includes but is not limited to BOE etching solution.

[0068] Furthermore, the thickness of the current blocking layer 14 is 50 nm to 600 nm.

[0069] Regarding step (2), coating a photoresist on the surface of the LED wafer obtained in (1), patterning the photoresist by a yellow light process, and depositing a light reflective material to form a light reflective film layer; specifically comprising:

[0070] (21) Coating photoresist on the surface of the LED wafer obtained in (1), and then using Figure 5 The mask is exposed and developed to obtain a patterned photoresist;

[0071] In this step, the photoresist is a negative photoresist. The negative photoresist portion in the unexposed area is easily removed by the developer during the development operation, leaving the negative photoresist in the exposed area to form a patterned negative photoresist to protect the material at the bottom. Subsequently, the light reflective material is deposited by electron beam evaporation.

[0072] (22) depositing a light-reflecting material by electron beam evaporation to form a light-reflecting film layer;

[0073] In the present invention, the light reflective film layer is made of SiO2 and TiO2, thereby ensuring that the light reflective layer 15 of the predetermined shape formed after debonding contains SiO2 and TiO2. Specifically, the predetermined shape light reflective layer 15 includes a SiO2 layer and a TiO2 layer. Furthermore, the light reflective layer 15 includes SiO2 layers and TiO2 layers periodically stacked from bottom to top, with the number of periods ranging from 2 to 40, exemplified by, but not limited to, 2, 5, 10, 15, 20, 25, 30, 35, and 40.

[0074] Furthermore, in each period, the thickness of the SiO2 layer is 10nm to 300nm, exemplarily 10nm, 50nm, 100nm, 150nm, 200nm, 250nm, and 300nm, but not limited thereto; the thickness of the TiO2 layer is 10nm to 200nm, exemplarily 10nm, 50nm, 100nm, 150nm, and 200nm, but not limited thereto.

[0075] (23) Continue to deposit the first metal material by electron beam evaporation to form a first metal film layer, and then remove the glue and clean it to form a light reflecting layer 15 of a preset shape (such as Figure 6 as shown) and a first metal electrode layer 16 of a preset shape (as shown Figure 7 shown).

[0076] In the present invention, the first metal electrode layer 16 corresponds to the interdigital part of the P electrode. In the present invention, by designing the light reflection layer 15 under the metal electrode and depositing it after the same yellow light process, the chip brightness is improved and the exposure alignment accuracy problem between different process flows is avoided, thereby effectively improving the chip manufacturing yield.

[0077] Further, in order to avoid the surface of the light reflection layer 15 from adsorbing too many impurities and water vapor, affecting the adhesion effect of the first metal electrode layer 16, the time interval from the formation of the light reflection layer 15 to the start of the deposition of the material of the first metal electrode layer 16 is controlled to be less than or equal to 6h, further improving the manufacturing yield of the LED chip. The upper and lower contact surfaces of the first metal electrode layer 16 are the ITO current expansion layer 17 and the light reflection layer 15 respectively. In the present application, in order to ensure the coating effect of the ITO current expansion layer 17, the edge angle of the light reflection layer 15 and the first metal electrode layer 16 is controlled to be less than 40°, more preferably 30-40°. If the edge angle is too high, the ITO film layer and the passivation layer 19 deposited subsequently will be broken at the edge, resulting in a decrease in yield and reliability. If the edge angle is too small, the film thickness cannot be accurately controlled. Here, the edge angle specifically refers to the angle of the slope of the edge of the film layer.

[0078] The first metal material includes but is not limited to Al, Cr, Ti, Ni, Au, and the first metal film layer has a three-layer metal layer stack structure, thereby ensuring that the pre-designed shape of the metal electrode layer formed after the stripping and cleaning has a three-layer metal layer stack structure. Specifically, the pre-designed shape of the metal electrode layer includes a first metal sublayer, a second metal sublayer, and a third metal sublayer stacked in order from bottom to top, wherein the thickness of the first metal sublayer is 5-100nm, and the metal material in the first metal sublayer is one of Al, Cr, Ti, and Ni; the thickness of the second metal sublayer is 50-600nm, and the metal material in the second metal sublayer is Au; the thickness of the third metal sublayer is 5-100nm, and the metal material in the third metal sublayer is one of Cr, Ti, and Ni. In the present application, by providing the first metal electrode layer 16 with a three-layer structure, the current can be more effectively expanded, thereby improving the light-emitting efficiency and uniformity of the LED chip, and a better heat dissipation path can be provided to enhance the structural stability of the LED chip, thereby prolonging the service life of the chip and maintaining stable performance. At the same time, in cooperation with the light reflection layer 15, the reflection of the light not extracted is improved, thereby improving the light output efficiency. In addition, compared with a single-layer thicker metal film layer, the stress in the metal can be reduced, and the reliability can be enhanced. Compared with a more-layer metal structure, the film layer is simple, easy to prepare, and low in cost.

[0079] Regarding step (3), ITO material is deposited on the surface of the LED wafer obtained in (2), and then a pre-designed shape of ITO current expansion layer 17 is formed by photolithography and etching;

[0080] The specific operation is as follows:

[0081] ITO material is deposited on the surface of the LED wafer obtained in (2) to form an ITO film layer, and then photoresist is coated on the surface, and then photolithography and etching are performed to form a pre-designed shape of ITO current expansion layer 17.Figure 8 The mask is exposed and developed to obtain a patterned photoresist; finally, the ITO film is etched using an etching technique, and the ITO film is cleaned and stripped to form an ITO current spreading layer 17 of a preset shape, such as Figure 9 shown.

[0082] In this step, the photoresist is a positive photoresist, and the etching technology is wet etching.

[0083] Furthermore, the thickness of the ITO current spreading layer 17 is 15nm to 120nm, and the ITO current spreading layer 17 is deposited by magnetron sputtering. The film layer obtained by magnetron sputtering deposition has high density and good adhesion effect, so that the obtained ITO current spreading layer 17 can not only play a good current spreading role, but also can well coat the light reflecting layer 15 and the first metal electrode layer 16, and make good ohmic contact with the first metal electrode layer 16, thereby reducing contact resistance.

[0084] Regarding step (4), a photoresist is coated on the surface of the LED wafer obtained in (3), the photoresist is patterned by a yellow light process, and then a second metal material is deposited and stripped to form a second metal electrode layer 18 of a predetermined shape;

[0085] The specific operations are:

[0086] The surface of the LED wafer obtained in (3) is coated with photoresist, and then the Figure 10 The mask is exposed and developed to obtain a patterned photoresist; finally, a second metal material is deposited by electron beam evaporation to form a second metal film layer, and then the resist is removed and cleaned to form a second metal electrode layer 18 of a preset shape.

[0087] The second metal electrode layer 18 includes a metal electrode layer on the surface of the N-type layer and a metal pad layer on the surface of the P-type layer. By combining it with the first metal electrode layer 16, a complete N-electrode metal layer and a P-electrode metal layer can be obtained.

[0088] In this step, the photoresist is a negative photoresist.

[0089] Furthermore, the metal material of the second metal electrode layer 18 is at least two of Cr, Al, Ti, Ni, Au, and Pt. The second metal electrode layer 18 is a stacked structure, which can be a stacked structure of two or more metal layers, or three or more layers. The second metal electrode layer 18 does not need to be consistent with the first metal electrode layer 16, and can be matched according to actual mass production.

[0090] Further, the thickness of the second metal electrode layer 18 is 1-3 μm. Preferably, the second metal electrode layer 18 is sequentially stacked from bottom to top with a Cr layer, an Al layer, a Ti layer and an Au layer, wherein the thickness of the Cr layer is 2-7 nm, the thickness of the Al layer is 100-200 nm, the thickness of the Ti layer is 150-300 nm, and the thickness of the Au layer is 1000-2000 nm.

[0091] (5) depositing a passivation protective layer 19 on the surface of the LED wafer obtained in (4).

[0092] Specifically, the operation is as follows:

[0093] (4) depositing a passivation protective material on the surface of the LED wafer obtained in (3) to form a passivation protective film layer, then coating photoresist on the surface of the passivation protective film layer, and performing exposure and development treatment using a mask as shown in Figure 11 to obtain patterned photoresist; finally, etching the passivation protective film layer using etching technology to expose the underlying metal pads, and removing the photoresist to form a passivation protective layer 19 of a predetermined shape, as shown in Figure 12 .

[0094] In this step, the photoresist is photoresist positive, the etching technology uses ICP etching, and the deposition method of the passivation protective layer 19 includes but is not limited to PECVD and ALD.

[0095] Further, the thickness of the passivation protective layer 19 is 30-200 nm, and the material of the passivation protective layer 19 is SiO2 or Al2O3.

[0096] In the present application, the coating method of the photoresist can be spin coating, which is not specifically limited.

[0097] Correspondingly, the present application also provides an LED prepared by the above preparation method, and the structure is as shown in Figure 13 .

[0098] The present application will be further described in the following specific examples:

[0099] Example 1

[0100] The present example provides an LED chip prepared by the following method:

[0101] (1) providing a substrate, growing an epitaxial layer on the substrate, then coating photoresist positive on the surface of the epitaxial layer, and performing exposure and development treatment using a mask as shown in Figure 1 to obtain patterned photoresist positive, and using an ICP machine to etch the epitaxial layer to expose the N-type layer in the epitaxial layer, and then removing the photoresist to obtain an etching step;

[0102] The epitaxial layer comprises a Si-doped N-GaN layer, an InGaN / GaN multi-quantum well layer, and a Mg-doped P-GaN layer, and the thickness of the epitaxial layer is 4 μm.

[0103] (2) A SiO2 film layer is formed on the surface of the epitaxial layer by depositing SiO2 on the surface of the epitaxial layer by PECVD, and a photoresist positive photoresist is coated on the surface of the SiO2 film layer, and the photoresist positive photoresist is exposed and developed by using the mask plate as described above to obtain a patterned photoresist positive photoresist, and finally the SiO2 film layer is etched by a BOE etching solution, and the photoresist is removed and cleaned to form a SiO2 current blocking layer with a preset shape, and the thickness of the SiO2 current blocking layer is 200 nm. Figure 3

[0104] (3) A photoresist negative photoresist is coated on the surface of the LED wafer obtained in (2), and then the photoresist negative photoresist is exposed and developed by using the mask plate as described above to obtain a patterned photoresist negative photoresist, and then the photoresist negative photoresist is placed in an electron beam evaporation machine to deposit a SiO2 layer and a TiO2 layer as one cycle for periodic repetition to form a light reflection film layer, and then an Al layer, an Au layer, and a Ni layer are sequentially deposited in the electron beam evaporation machine to form a first metal electrode layer, and the photoresist is removed and cleaned to form a light reflection layer and a first metal electrode layer with a preset shape, and the edge angle of the light reflection layer and the first metal electrode layer is 35°. Figure 5

[0105] The number of cycles of the light reflection film layer is 6, the thickness of the SiO2 layer in each cycle is 60 nm, the thickness of the TiO2 layer is 30 nm, the thickness of the Cr layer in the first metal electrode layer is 3 nm, the thickness of the Au layer is 50 nm, and the thickness of the Ni layer is 30 nm.

[0106] (4) An ITO film layer is formed on the surface of the LED wafer obtained in (3) by using a magnetron sputtering to deposit ITO material, and then a photoresist positive photoresist is coated on the surface of the ITO film layer, and the photoresist positive photoresist is exposed and developed by using the mask plate as described above to obtain a patterned photoresist positive photoresist, and finally the ITO film layer is etched by a wet etching method, and the photoresist is removed and cleaned to form an ITO current spreading layer with a preset shape, and the thickness of the ITO current spreading layer is 70 nm. Figure 8

[0107] (5) A photoresist negative photoresist is coated on the surface of the LED wafer obtained in (4), and then the photoresist negative photoresist is exposed and developed by using the mask plate as described above to obtain a patterned photoresist negative photoresist, and finally a Cr layer, an Al layer, a Ti layer, and an Au layer are sequentially deposited in an electron beam evaporation machine to form a second metal electrode layer with a preset shape, wherein the thickness of the Cr layer is 3 nm, the thickness of the Al layer is 120 nm, the thickness of the Ti layer is 200 nm, and the thickness of the Au layer is 1200 nm. Figure 10

[0108] ​​​​(6) The surface of the LED wafer obtained in (5) is subjected to PECVD deposition of SiO2 to form a SiO2 film layer, then photoresist positive glue is coated on the surface of the SiO2 film layer, and exposure and development are performed using the mask plate as described above to obtain a patterned photoresist positive glue; finally, the SiO2 film layer is etched by an ICP machine to expose the underlying metal pads, and the glue is removed and washed to form a passivation protective layer with a preset shape and a thickness of 80 nm. Figure 11

[0109] Comparative Example 1

[0110] This comparative example provides an LED chip, and the preparation method is basically the same as that of Example 1, except that:

[0111] (3) The surface of the LED wafer obtained in (2) is coated with photoresist negative glue, then exposure and development are performed using the mask plate as described above to obtain a patterned photoresist negative glue, then the LED wafer is placed in an electron beam evaporation machine to deposit a SiO2 layer and a TiO2 layer as one cycle for periodic repetition to form a light reflection film layer, and the glue is removed and washed to form a light reflection layer with a preset shape; Figure 5

[0112] (5) The surface of the LED wafer obtained in (4) is coated with photoresist negative glue, then exposure and development are performed to obtain a patterned photoresist negative glue; finally, the LED wafer is placed in an electron beam evaporation machine to deposit an Al layer and an Au layer in sequence, and the glue is removed and washed to form a metal electrode layer with a preset shape, which includes a metal electrode layer on the surface of the N-type layer, a metal pad layer on the surface of the P-type layer, and a finger portion of the P-electrode.

[0113] Comparative Example 2

[0114] This comparative example provides an LED chip, and the preparation method is basically the same as that of Example 1, except that:

[0115] (1) A substrate is provided, an epitaxial layer is grown on the substrate, then photoresist positive glue is coated on the surface of the epitaxial layer, exposure and development are performed using the mask plate as described above to obtain a patterned photoresist positive glue, and the epitaxial layer is etched by an ICP machine to expose the N-type layer in the epitaxial layer, and the glue is removed and washed to obtain an etching step; Figure 1

[0116] (2) SiO2 is deposited on the surface of the epitaxial layer by PECVD to form a SiO2 film layer, and photoresist positive glue is coated on the surface of the SiO2 film layer, exposure and development are performed using the mask plate as described above to obtain a patterned photoresist positive glue, and finally the SiO2 film layer is etched by a BOE etching solution, and the glue is removed and washed to form a SiO2 current blocking layer with a preset shape; Figure 3

[0117] ​​​​(3) using a magnetron sputtering to deposit ITO material on the surface of the LED wafer obtained in (2) to form an ITO film layer, then coating a photoresist positive on the surface thereof, exposing and developing the photoresist positive using a mask plate as shown in FIG. 6, obtaining a patterned photoresist positive, and finally etching the ITO film layer using a wet etching method, removing the photoresist and cleaning, to form an ITO current spreading layer with a preset shape; Figure 8

[0118] (4) coating a photoresist negative on the surface of the LED wafer obtained in (2), then exposing and developing the photoresist negative using a mask plate as shown in FIG. 7, obtaining a patterned photoresist negative, then sequentially depositing Cr layer, Al layer, Ti layer and Au layer in an electron beam evaporation machine to form a first metal electrode layer, removing the photoresist and cleaning, to form a first metal electrode layer with a preset shape; Figure 5

[0119] (5) coating a photoresist negative on the surface of the LED wafer obtained in (4), then exposing and developing the photoresist negative using a mask plate as shown in FIG. 8, obtaining a patterned photoresist negative, and finally sequentially depositing Cr layer, Al layer, Ti layer and Au layer in an electron beam evaporation machine to form a second metal electrode layer with a preset shape; Figure 10

[0120] (6) depositing SiO2 film layer on the surface of the LED wafer obtained in (5) using PECVD, then coating a photoresist positive on the surface of the SiO2 film layer, and exposing and developing the photoresist positive using a mask plate as shown in FIG. 9, obtaining a patterned photoresist positive, and finally etching the SiO2 film layer using an ICP machine to expose the underlying metal pad, removing the photoresist and cleaning, to form a passivation protection layer with a preset shape. Figure 11

[0121] Performance test

[0122] The LED chips obtained in the examples and comparative examples were cut into 10 mil*24 mil, and 1000 of them were extracted, respectively, to test their luminous brightness, luminous efficiency and manufacturing yield under the condition of 120 mA.

[0123] The test results are shown in Table 1 below.

[0124] Table 1 Performance test results of LED chips obtained in examples and comparative examples

[0125] Luminous intensity (mW) Luminous efficiency (%) Yield (%) Example 1 220.1 59.17 96.3 Comparative Example 1 219.4 58.98 92.7 Comparative Example 2 210.2 56.45 95.2

[0126] ​​​​From the above results, the metal electrode layer is divided into a first metal electrode layer and a second metal electrode layer, and the first metal electrode on the P electrode surface is deposited before the ITO current spreading layer, then the second metal electrode layer on the N electrode surface and the metal pad surface of the P electrode is prepared on the ITO current spreading layer, and the light reflecting layer and the first metal electrode layer are prepared in the same yellow light process, which can improve the luminous brightness, improve the extraction efficiency of light, realize the cladding effect of the ITO current spreading layer, improve the adhesion, increase the manufacturing yield of the LED chip, and at the same time, adjusting the material of the first metal electrode layer and the thickness of the light reflecting layer can achieve better results.

[0127] The above only discloses a preferred embodiment of the present application, of course, cannot be limited by this to limit the scope of the present application, therefore, the equivalent changes made by the claims of the present application, still belong to the scope covered by the present application.

Claims

1. A method for preparing an LED chip, characterized in that: include: (1) providing a substrate, growing an epitaxial layer on the substrate, and then depositing a current blocking layer on the surface of the epitaxial layer; (2) coating a photoresist on the surface of the LED wafer obtained in (1), patterning the photoresist by a yellow light process, and then sequentially depositing a light reflective material and a first metal material, and removing and cleaning the photoresist to form a light reflective layer of a preset shape and a first metal electrode layer of a preset shape; (3) depositing ITO material on the surface of the LED wafer obtained in (2), and then forming an ITO current spreading layer of a preset shape through yellow light and etching; (4) coating a photoresist on the surface of the LED wafer obtained in (3), patterning the photoresist by a yellow light process, then depositing a second metal material, and performing a desmearing process to form a second metal electrode layer of a preset shape; (5) depositing a passivation protective layer on the surface of the LED wafer obtained in (4); The first metal electrode layer includes an interdigitated portion of a P electrode; The second metal electrode layer includes a metal electrode layer on the surface of the N-type layer and a metal pad layer on the surface of the P-type layer; The light reflecting layer comprises SiO2 layers and TiO2 layers periodically stacked from bottom to top, with the number of periods being 2 to 40; In each period, the thickness of the SiO2 layer is 10 nm to 300 nm; the thickness of the TiO2 layer is 10 nm to 200 nm.

2. The method for preparing an LED chip according to claim 1, wherein: The first metal electrode layer includes a first metal sublayer, a second metal sublayer and a third metal sublayer stacked in sequence from bottom to top; The thickness of the first metal sublayer is 5nm-100nm; The thickness of the second metal sublayer is 50nm~600nm; The thickness of the third metal sublayer is 5nm-100nm.

3. The method for preparing an LED chip according to claim 1, wherein: The thickness of the second metal electrode layer is 1 μm to 3 μm.

4. The method for preparing an LED chip according to claim 2, wherein: The metal material in the first metal sublayer is one of Al, Cr, Ti, and Ni; The metal material in the second metal sub-layer is Au; The metal material in the third metal sublayer is one of Cr, Ti, and Ni; The metal material of the second metal electrode layer is at least two of Cr, Al, Ti, Ni, Au, and Pt.

5. The method for preparing an LED chip according to claim 1, wherein: The time interval between forming the light reflecting layer and starting to deposit the material of the first metal electrode layer is less than or equal to 6 hours.

6. The method for preparing an LED chip according to claim 1, wherein: An edge angle between the light reflecting layer and the first metal electrode layer is less than 40°.

7. The method for preparing an LED chip according to claim 1, wherein: The material of the current blocking layer is SiO2, and the thickness of the current blocking layer is 50nm~600nm; The thickness of the ITO current spreading layer is 15nm~120nm; The material of the passivation protection layer is SiO2 or Al2O3, and the thickness of the passivation protection layer is 30nm~200nm.

8. An LED chip prepared according to the preparation method according to any one of claims 1 to 7.

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