Verification method and device for functional unit model in simulation system

Abstract

The embodiment of the application provides a kind of check method and device of functional unit model in simulation system, and the automatic verification of simulation model is realized by constructing model checking platform.Innovatively designed cross-compiler technology converts simulation model into functional unit model file, and establishes the mapping mechanism of structured variable and flattening variable.The system executes model checking in virtual machine environment, not only compares numerical deviation, but also analyzes the change trend between adjacent steps, realizes multi-dimensional accuracy verification.The method breaks through the limitation of traditional manual checking, and provides a systematic and automated solution for simulation model verification.

Description

Technical Field

[0001] The present application relates to the field of data processing, and in particular to a method and device for verifying a functional unit model in a simulation system. Background Art

[0002] Traditional simulation model verification methods often rely on manual judgment and lack systematic verification methods and standards. Existing technologies suffer from data consistency issues during model export and variable mapping, and the verification process lacks automated support. The system's collection and comparative analysis of simulation step data are also relatively simple, making it difficult to identify underlying model issues.

[0003] At the same time, existing systems have significant shortcomings in model verification within virtual machine environments. Traditional methods typically focus solely on numerical accuracy, ignoring the importance of data trends and lacking comprehensive anomaly logging and tracking mechanisms. Systems also tend to be mechanical in cross-platform model verification and data conversion, failing to fully leverage the advantages of modern virtualization technology.

[0004] Furthermore, existing technologies have limitations in verification report generation and anomaly analysis. The lack of fine-grained verification metric definitions and systematic anomaly classification methods results in insufficient credibility and traceability of verification results. Addressing these issues is crucial for improving the reliability and engineering practicality of simulation systems. Summary of the Invention

[0005] In response to the problems in the prior art, the present application provides a verification method and device for functional unit models in a simulation system, which can break through the limitations of traditional manual verification and provide a systematic and automated solution for simulation model verification.

[0006] In order to solve at least one of the above problems, the present application provides the following technical solutions:

[0007] In a first aspect, the present application provides a method for verifying a functional unit model in a simulation system, comprising:

[0008] Constructing a model verification platform, the model verification platform includes a simulation model generation module and a virtual machine verification module; the simulation model generation module exports the simulation model into a functional unit model file through cross-compilation technology, extracts the structured variables of the simulation model and generates flattened variables of the functional unit model, establishes a mapping table between the structured variables and the flattened variables, writes the mapping table into a description file of the functional unit model file, collects benchmark data of the simulation model at each simulation step, and stores the benchmark data in a resource directory of the functional unit model file in a time series;

[0009] Starting the virtual machine verification module to load the target operating system, the virtual machine verification module calls the functional unit model file to perform step simulation calculation, collects output data of the functional unit model at each simulation step, obtains the variable mapping relationship from the mapping table, and converts the output data into a corresponding structured form according to the variable mapping relationship to obtain data to be verified;

[0010] The benchmark data corresponding to the current step size is read from the resource directory, and the benchmark data is verified with the data to be verified. The verification includes: calculating the numerical deviation between the benchmark data and the data to be verified at the corresponding time, and judging whether the numerical deviation exceeds the preset tolerance range; calculating the change trend of the data to be verified between adjacent steps, and comparing the change trend with the change trend of the benchmark data; when the numerical deviation exceeds the tolerance range or the change trend is inconsistent, generating a verification anomaly flag, recording the step size position and data content corresponding to the verification anomaly flag, and writing the verification anomaly flag into the verification report.

[0011] Furthermore, the simulation model generation module exports the simulation model into a functional unit model file through cross-compilation technology, extracts the structured variables of the simulation model and generates flattened variables of the functional unit model, establishes a mapping table between the structured variables and the flattened variables, and writes the mapping table into a description file of the functional unit model file, including:

[0012] Reading the source code file and configuration parameters of the simulation model, compiling the source code file into an executable file of the target platform based on a cross-compiler, packaging the executable file and the configuration parameters of the simulation model to generate a functional unit model file, and storing the functional unit model file in a preset file directory;

[0013] Scan the global variables and local variables in the simulation model, generate a structured variable table according to the scope and data structure of the variables, expand the hierarchical structure in the structured variable table into a flat variable sequence, generate a unique identifier for each flat variable, establish a correspondence table between the structured variables and the flat variables, serialize the correspondence table and write it into the description file of the functional unit model file.

[0014] Furthermore, collecting the benchmark data of the simulation model at each simulation step and storing the benchmark data in a resource directory of the functional unit model file in a time series includes:

[0015] Run the simulation model to enter the data acquisition state, calculate the sampling time point according to the simulation step parameter set in the model configuration file, read the value of the structured variable in the simulation model at each sampling time point, form a data record item with the sampling time point and the corresponding structured variable value, and create an index table for the data record item according to the sampling sequence number;

[0016] Create a benchmark data file, write the data record items into the benchmark data file, sort the data record items in the benchmark data file according to the sampling sequence number, save the sorted benchmark data file to the resource directory of the functional unit model file, generate a check code for the benchmark data file and write it into the file header.

[0017] Furthermore, the starting of the virtual machine verification module to load the target operating system, the virtual machine verification module calling the functional unit model file to perform step length simulation calculation, includes:

[0018] Initialize the configuration parameters of the virtual machine verification module, start the virtual machine and load the target operating system image, set the memory allocation size and number of processor cores of the virtual machine, establish a file sharing area between the virtual machine and the host machine, and copy the functional unit model file to the running directory of the virtual machine, which is used to store temporary files during the model running process;

[0019] Read the functional unit model file from the running directory to the memory space of the virtual machine, parse the configuration parameters in the functional unit model file, set the start time and step interval of the simulation calculation according to the configuration parameters, initialize the input and output interfaces of the functional unit model, call the calculation function of the functional unit model to perform step simulation calculation, and store the calculation result of the calculation function to the memory buffer of the virtual machine.

[0020] Furthermore, collecting the output data of the functional unit model at each simulation step, obtaining the variable mapping relationship from the mapping table, and converting the output data into a corresponding structured form according to the variable mapping relationship to obtain the data to be verified, includes:

[0021] Accessing a memory buffer of the virtual machine, reading output data of the functional unit model at a current step, parsing a value and a timestamp of the output data according to a data storage format of the memory buffer, grouping the output data according to identifiers of flattened variables, and generating a data sequence of the flattened variables, the data sequence including variable identifiers, values, and timestamps;

[0022] read the mapping table from the description file of the functional unit model file, restore the data sequence of the flattened variable to a structured form based on the variable correspondence recorded in the mapping table, replace the identifier of the flattened variable with the identifier of the structured variable according to the variable correspondence, and store the converted structured data as to-be-verified data in a data cache area of the virtual machine.

[0023] Further, the reference data corresponding to the current step length is read from the resource directory, and the reference data is checked with the to-be-verified data. The checking includes: calculating the numerical deviation of the reference data and the to-be-verified data at the corresponding time, and judging whether the numerical deviation exceeds a preset tolerance range; calculating the change trend of the to-be-verified data between adjacent step lengths, and comparing the change trend with the change trend of the reference data, including:

[0024] The reference data file is read from the resource directory of the functional unit model file, the corresponding data record item in the reference data file is found according to the time stamp of the current step length, the numerical value of the structured variable in the data record item is matched with the to-be-verified data in the data cache area, the numerical deviation of each structured variable at the current time is calculated, the numerical deviation is compared with a preset tolerance threshold, and a numerical check result is generated;

[0025] The to-be-verified data of adjacent two step lengths in the data cache area is obtained, the difference value of each structured variable between adjacent step lengths is calculated, the change direction and amplitude of the to-be-verified data are judged according to the difference value, the data record item of the corresponding time period is read from the reference data file, the difference value of the reference data is calculated, and the difference characteristics of the to-be-verified data and the reference data are compared, and a trend check result is generated.

[0026] Further, when the numerical deviation exceeds the tolerance range or the change trend is inconsistent, a check exception identifier is generated, the step length position and data content corresponding to the check exception identifier are recorded, and the check exception identifier is written into a check report, including:

[0027] It is judged whether the numerical deviation in the numerical check result exceeds the tolerance threshold, and whether the difference characteristics of the to-be-verified data and the reference data in the trend check result are inconsistent. When any of the above conditions occurs, a check exception identifier is generated, and the check exception identifier contains an exception type, an exception level and an exception description.

[0028] Record the simulation step, structured variable identifier, benchmark data value and data value to be verified corresponding to the verification exception identifier, and write the verification exception identifier and its related data content into a verification report file according to a preset report format. The verification report file contains a verification overview, exception statistics and detailed records. The verification report file is saved to the resource directory of the functional unit model file.

[0029] In a second aspect, the present application provides a verification device for a functional unit model in a simulation system, comprising:

[0030] A platform building module is used to build a model verification platform, which includes a simulation model generation module and a virtual machine verification module; the simulation model generation module exports the simulation model into a functional unit model file through cross-compilation technology, extracts the structured variables of the simulation model and generates flattened variables of the functional unit model, establishes a mapping table between the structured variables and the flattened variables, writes the mapping table into a description file of the functional unit model file, collects benchmark data of the simulation model at each simulation step, and stores the benchmark data in a resource directory of the functional unit model file in a time series;

[0031] a mapping loading module, configured to start the virtual machine verification module to load a target operating system, the virtual machine verification module calling the functional unit model file to perform step-length simulation calculations, collecting output data of the functional unit model at each simulation step, obtaining a variable mapping relationship from the mapping table, and converting the output data into a corresponding structured form according to the variable mapping relationship to obtain data to be verified;

[0032] A model verification module is used to read the benchmark data corresponding to the current step size from the resource directory and verify the benchmark data with the data to be verified. The verification includes: calculating the numerical deviation between the benchmark data and the data to be verified at the corresponding time, and judging whether the numerical deviation exceeds the preset tolerance range; calculating the change trend of the data to be verified between adjacent steps, and comparing the change trend with the change trend of the benchmark data; when the numerical deviation exceeds the tolerance range or the change trend is inconsistent, generating a verification anomaly flag, recording the step position and data content corresponding to the verification anomaly flag, and writing the verification anomaly flag into the verification report.

[0033] In a third aspect, the present application provides an electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the steps of the method for verifying the functional unit model in the simulation system are implemented.

[0034] In a fourth aspect, the present application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the method for verifying the functional unit model in the simulation system.

[0035] In a fifth aspect, the present application provides a computer program product, comprising a computer program / instruction, which, when executed by a processor, implements the steps of the verification method of the functional unit model in the simulation system.

[0036] As can be seen from the above technical solution, the present application provides a method and device for verifying the functional unit model in a simulation system, which realizes the automatic verification of the simulation model by constructing a model verification platform. An innovative cross-compilation technology is designed to convert the simulation model into a functional unit model file, and a mapping mechanism between structured variables and flattened variables is established. The system performs model verification in a virtual machine environment, not only comparing numerical deviations, but also analyzing the changing trends between adjacent steps, thereby realizing multi-dimensional accuracy verification. This method breaks through the limitations of traditional manual verification and provides a systematic and automated solution for simulation model verification. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0038] Figure 1 This is a flow chart of a method for verifying a functional unit model in a simulation system according to an embodiment of the present application;

[0039] Figure 2 This is a second flow chart of a method for verifying a functional unit model in a simulation system according to an embodiment of the present application;

[0040] Figure 3 This is a third flow chart of a method for verifying a functional unit model in a simulation system according to an embodiment of the present application;

[0041] Figure 4 This is a fourth flow chart of a method for verifying a functional unit model in a simulation system according to an embodiment of the present application;

[0042] Figure 5 FIG5 is a fifth flow chart of a method for verifying a functional unit model in a simulation system according to an embodiment of the present application;

[0043] Figure 6FIG6 is a sixth flow chart of a method for verifying a functional unit model in a simulation system according to an embodiment of the present application;

[0044] Figure 7 FIG7 is a flow chart of a method for verifying a functional unit model in a simulation system according to an embodiment of the present application;

[0045] Figure 8 A structural diagram of a verification device for a functional unit model in a simulation system in an embodiment of the present application;

[0046] Figure 9 Schematic diagram of the structure of the electronic device in the embodiment of the present application.

[0047] Reference numerals:

[0048] Electronic device 9600, central processing unit 9100, memory 9140, communication module 9110, input unit 9120, audio processor 9130, display 9160, power supply 9170, buffer memory 9141, application / function storage unit 9142, data storage unit 9143, driver program storage unit 9144, antenna 9111, speaker 9131, microphone 9132. DETAILED DESCRIPTION

[0049] To make the purpose, technical solutions, and advantages of the embodiments of this application more clear, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0050] The acquisition, storage, use, and processing of data in this application's technical solution comply with relevant national laws and regulations.

[0051] Taking into account the problems existing in the prior art, the present application provides a method and device for verifying the functional unit model in a simulation system, which realizes the automated verification of the simulation model by constructing a model verification platform. An innovative cross-compilation technology is designed to convert the simulation model into a functional unit model file, and a mapping mechanism between structured variables and flattened variables is established. The system performs model verification in a virtual machine environment, not only comparing numerical deviations, but also analyzing the changing trends between adjacent steps, thereby achieving multi-dimensional accuracy verification. This method breaks through the limitations of traditional manual verification and provides a systematic and automated solution for simulation model verification.

[0052] In order to break through the limitations of traditional manual verification and provide a systematic and automated solution for simulation model verification, this application provides an embodiment of a verification method for a functional unit model in a simulation system, see Figure 1 The verification method of the functional unit model in the simulation system specifically includes the following contents:

[0053] Step S101: constructing a model verification platform, the model verification platform including a simulation model generation module and a virtual machine verification module; the simulation model generation module exports the simulation model into a functional unit model file through cross-compilation technology, extracts structured variables of the simulation model and generates flattened variables of the functional unit model, establishes a mapping table between the structured variables and the flattened variables, writes the mapping table into a description file of the functional unit model file, collects benchmark data of the simulation model at each simulation step, and stores the benchmark data in a resource directory of the functional unit model file in a time series;

[0054] Optionally, this embodiment employs a distributed architecture design during the construction of the model verification platform, breaking down complex verification tasks into independent functional modules. The simulation model generation module and the virtual machine verification module communicate via message queues, enabling asynchronous data transmission and parallel processing of tasks. Each module is equipped with an independent configuration management system, supporting runtime parameter adjustment and status monitoring.

[0055] In implementing cross-compilation technology, this embodiment builds a complete tool chain system. First, the compilation environment of the target platform is established, including the compiler, linker, and library files. Corresponding compilation rules are configured for different source code languages, such as C++ and Python. During the compilation process, platform-specific code segments are processed through preprocessing instructions to ensure that the generated functional unit model can run correctly on different hardware architectures. For example, for data structures that are sensitive to endianness, endianness conversion code is automatically inserted.

[0056] During the variable structure analysis process, this embodiment implements a multi-level code parsing mechanism. First, a lexical analyzer identifies variable declarations and definitions in the source code, and then a parser constructs an abstract syntax tree. For complex data structures, such as nested structures, unions, and multidimensional arrays, a tree traversal algorithm is used to extract the complete variable hierarchy. When processing template classes, the specific data type is determined through template instantiation analysis.

[0057] Flattened variables are generated using a standardized naming strategy. A variable identifier consists of multiple fields, including the original variable name, scope identifier, array index, and structure member path. For example, for the structure array "data[3].value", the generated flattened identifier is "data_3_value_f32", where the suffix indicates the data type. This naming method maintains variable readability while ensuring unique identifiers.

[0058] During the construction of the mapping table, this embodiment implements a bidirectional indexing mechanism. In addition to forward mapping from structured variables to flattened variables, a reverse lookup index is also established. The mapping table is stored in a tree data structure, with each node containing attribute information such as variable type, offset, and array dimensions. For dynamically allocated memory areas, a reference counting mechanism is used to track memory status and ensure data access security.

[0059] Functional unit model files are organized using a modular design. The file header contains version information, platform identifiers, and dependency information. The code segment is organized in a position-independent manner, supporting dynamic loading and relocation. The data segment is partitioned according to access attributes, such as storing read-only data, writable data, and uninitialized data separately. The resource segment uses paging management to support dynamic data loading and memory mapping.

[0060] During the description file generation process, this embodiment implements data compression and error detection mechanisms. For recurring data structure definitions, references are used to avoid redundant storage. The integrity of the description file is ensured by calculating a cyclic redundancy check code. The file format supports incremental updates; when the model structure changes, only the relevant description information needs to be updated.

[0061] During the benchmark data collection process, this embodiment implements adaptive sampling control. The sampling frequency is automatically adjusted based on the dynamic characteristics of the model, increasing the sampling density at critical time points. The collected data undergoes preprocessing, including outlier detection and data smoothing, to ensure data quality. For large-scale data streams, streaming processing is used to avoid memory overflow.

[0062] Time series data is stored using a layered architecture. The latest data is stored in a memory cache for fast access. Historical data is archived by time interval, and indexes are used to accelerate queries. Data files are stored in a columnar format, which facilitates compression and analysis of time series data. For long-term stored data, an automatic archiving and cleanup mechanism is implemented.

[0063] The configuration management of the virtual machine environment utilizes a template-based design. Multiple virtual machine configuration templates are predefined for different verification tasks, including parameters such as the number of processor cores, memory size, and disk space. Through a resource monitoring mechanism, virtual machine resource allocation is dynamically adjusted to ensure the stable operation of verification tasks.

[0064] This embodiment utilizes a versioned protocol in the module interface design. Data exchange between different modules follows a unified serialization format, supporting both forward and backward compatibility. The interface adapter pattern facilitates the integration of new functional modules and data formats. The interface definition includes a comprehensive error handling mechanism, ensuring graceful system degradation in the event of anomalies.

[0065] This refined implementation significantly improves the accuracy and efficiency of model verification. This solution demonstrates excellent scalability and reliability, particularly when dealing with large-scale, complex simulation models. The system's modular design and standardized interfaces provide a solid foundation for subsequent functional upgrades and maintenance.

[0066] Step S102: Starting the virtual machine verification module to load the target operating system, the virtual machine verification module calls the functional unit model file to perform step-length simulation calculation, collects output data of the functional unit model at each simulation step, obtains the variable mapping relationship from the mapping table, and converts the output data into a corresponding structured form according to the variable mapping relationship to obtain data to be verified;

[0067] Optionally, this embodiment employs a layered initialization strategy during the startup of the virtual machine verification module. First, the hardware abstraction layer (HAL) configures the virtual machine's basic environment, including the processor architecture, memory layout, and peripheral emulation. Regarding processor virtualization, an appropriate instruction set emulation method is selected based on the characteristics of the target operating system. Common instructions are binary translated to improve execution efficiency, while privileged instructions are fully emulated to ensure security.

[0068] This embodiment implements a dynamic resource allocation mechanism when loading the target operating system. The virtual memory management unit establishes an address space mapping, enabling on-demand allocation of physical memory. The system adaptively adjusts memory page size and cache strategies for functional unit models of varying sizes. For example, for data-intensive simulation models, the page size is increased to reduce page switching overhead; for compute-intensive models, the instruction cache prefetch strategy is optimized.

[0069] The loading process for functional unit model files utilizes a segment management scheme. By parsing the segment table information in the file header, the code, data, and resource segments are mapped to different memory areas of the virtual machine. For code segments that require relocation, dynamic symbol resolution and address correction are implemented. When loading data segments, a copy-on-write mechanism is implemented to support multiple instances sharing read-only data, improving memory efficiency.

[0070] Step-size simulation calculations utilize a precise timing control mechanism. A virtual clock manager synchronizes simulation time with physical time to ensure accurate step sizes. During each simulation cycle, the system first updates the model's input state and then calls the calculation function according to a predefined execution sequence. For multi-threaded parallel computations, thread-level scheduling and synchronization control are implemented.

[0071] In the data collection phase, this embodiment designs a multi-level cache structure. During model execution, a lightweight probe mechanism captures changes in key variables in real time. These probes are strategically placed at key locations within the computational function to ensure a complete record of the model's dynamic behavior. Collected data is first stored in a fast-access cache and then, when a certain amount has accumulated, is written to persistent storage in batches.

[0072] Variable mappings utilize an efficient search algorithm. Hash indexes are constructed to accelerate the conversion of flattened variables to structured ones. A recursive parsing mechanism is implemented for complex data structures, such as multidimensional arrays and nested structures. The system correctly handles conversions between different data types, including precision adjustment for basic types and reorganization of composite types.

[0073] During the structured conversion of output data, this embodiment implements an intelligent type inference mechanism. By analyzing the type information in the mapping table, it automatically selects the appropriate conversion method. For enumeration types, the correspondence between symbol names and values ​​is maintained; for floating-point numbers, conversions between different precisions are handled; and for strings, the consistency of the encoding format is ensured.

[0074] This embodiment employs standardized data organization when generating the data to be verified. The converted structured data is rearranged according to the original model's variable organization, facilitating comparison with baseline data. Data versioning is also implemented, supporting tracking of the change history of each variable value. For derived variables, the system can reconstruct their dependencies with the base variables.

[0075] Virtual machine resource management utilizes a dynamic optimization strategy. By monitoring CPU utilization, memory usage, and I / O load, resource allocation is adjusted appropriately. Under high load conditions, the system can dynamically expand virtual machine resources or adjust task priorities to ensure that critical computing processes are not impacted. For long-running verification tasks, a checkpoint mechanism is implemented to support state preservation and recovery.

[0076] This embodiment significantly improves the real-time performance and reliability of model verification through this sophisticated implementation. Especially when dealing with complex simulation models, this solution accurately captures the model's dynamic behavior and ensures the consistency of verification data through an efficient data conversion mechanism. The system's scalable design also provides a foundation for supporting more types of model verification.

[0077] Step S103: Read the benchmark data corresponding to the current step from the resource directory, and verify the benchmark data with the data to be verified. The verification includes: calculating the numerical deviation between the benchmark data and the data to be verified at the corresponding time, and judging whether the numerical deviation exceeds the preset tolerance range; calculating the change trend of the data to be verified between adjacent steps, and comparing the change trend with the change trend of the benchmark data; when the numerical deviation exceeds the tolerance range or the change trend is inconsistent, generating a verification abnormality mark, recording the step position and data content corresponding to the verification abnormality mark, and writing the verification abnormality mark into the verification report.

[0078] Optionally, this embodiment first constructs an efficient resource directory access mechanism during data verification. By establishing a time index tree of benchmark data, rapid location of data at a specific step size is achieved. The index tree uses a B+ tree structure, with leaf nodes storing the physical location information of data blocks and non-leaf nodes storing time interval identifiers. This design significantly improves the retrieval efficiency of large-scale time series data.

[0079] This embodiment implements an adaptive precision control strategy for calculating numerical deviations. For different types of numerical variables, the system dynamically adjusts comparison accuracy based on their physical meaning and dimensional characteristics. For example, a cyclic comparison method is used for angular data to handle cases spanning 360 degrees. For cumulant data, the propagation characteristics of errors in the time dimension are considered.

[0080] This embodiment employs a multi-dimensional assessment approach to determine tolerance ranges. Different tolerance calculation rules are assigned to different types of variables: fixed thresholds are used for state variables; percentage tolerances based on numerical ranges are used for process variables; and rate tolerances are calculated based on the sampling period for derivative variables. This differentiated tolerance strategy improves verification accuracy.

[0081] In trend analysis, this embodiment implements a sliding window data processing mechanism. By constructing local trend vectors between adjacent steps, the dynamic characteristics of the data are captured. Trend vectors contain not only the direction of change but also the rate of change and acceleration information. The system quantitatively assesses trend consistency by calculating the angle and modulus ratio of trend vectors.

[0082] This embodiment considers the impact of data noise when processing trend comparisons. By implementing an adaptive data smoothing algorithm, the interference of random fluctuations is effectively suppressed while maintaining the true trend characteristics. For signals with different characteristic frequencies, the system can automatically adjust the size of the smoothing window to ensure the accuracy of trend extraction.

[0083] Verification anomaly identification utilizes a multi-level judgment mechanism. First, deviations are checked at the numerical level, then consistency is verified at the trend level. Finally, comprehensive analysis is performed to generate a comprehensive assessment result. For detected anomalies, the system tracks their propagation path in both time and space, helping to locate the root cause.

[0084] This embodiment implements a detailed feature extraction mechanism during the generation of anomaly identifiers. Each anomaly identifier not only contains basic location and type information but also records the contextual data surrounding the anomaly, including historical values ​​of relevant variables, change trends, and correlation analysis results. This rich diagnostic information facilitates subsequent fault analysis.

[0085] This embodiment employs a hierarchical data structure to organize verification reports. Report content is organized chronologically and by anomaly severity, supporting multi-dimensional statistical analysis. By implementing a templated report generation mechanism, the report format is standardized and readable. For significant anomalies, the system automatically generates detailed analysis instructions.

[0086] Persistent data storage utilizes an incremental update strategy. Intermediate results and final reports generated during the verification process are written to the storage system through a transaction mechanism, ensuring data consistency and recoverability. A data compression mechanism is also implemented, significantly reducing storage overhead by identifying and encoding repetitive patterns.

[0087] This embodiment implements a real-time alert mechanism within the exception handling process. When a serious anomaly is detected, the system promptly notifies relevant personnel and provides preliminary diagnostic information. By configuring different levels of alert thresholds, a hierarchical response management strategy is implemented.

[0088] This embodiment achieves precise verification of simulation model behavior through this systematic verification scheme. Especially when dealing with complex dynamic systems, this scheme accurately identifies various abnormalities and provides detailed diagnostic information. The system's scalable design also provides a good foundation for supporting new verification requirements, significantly improving the reliability and efficiency of simulation verification.

[0089] As can be seen from the above description, the verification method of the functional unit model in the simulation system provided by the embodiment of the present application can realize the automatic verification of the simulation model by constructing a model verification platform. The cross-compilation technology is innovatively designed to convert the simulation model into a functional unit model file, and a mapping mechanism between structured variables and flattened variables is established. The system performs model verification in a virtual machine environment, not only comparing numerical deviations, but also analyzing the changing trends between adjacent step sizes, thereby realizing multi-dimensional accuracy verification. This method breaks through the limitations of traditional manual verification and provides a systematic and automated solution for simulation model verification.

[0090] In one embodiment of the verification method of the functional unit model in the simulation system of the present application, see Figure 2 , and can also include the following:

[0091] Step S201: reading the source code file and configuration parameters of the simulation model, compiling the source code file into an executable file of the target platform based on a cross-compiler, packaging the executable file and the configuration parameters of the simulation model to generate a functional unit model file, and storing the functional unit model file in a preset file directory;

[0092] Step S202: Scan the global variables and local variables in the simulation model, generate a structured variable table according to the scope and data structure of the variables, expand the hierarchical structure in the structured variable table into a flat variable sequence, generate a unique identifier for each flat variable, establish a correspondence table between structured variables and flat variables, serialize the correspondence table and write it into the description file of the functional unit model file.

[0093] Optionally, this embodiment first implements a complete file parsing mechanism when processing the source code files of the simulation model. A lexical analyzer identifies keywords, identifiers, and operators in the source code and establishes an initial symbol table. For source files written in different programming languages, the system can automatically identify their language characteristics and select the corresponding parsing strategy. For example, for C++ source files, template specialization and namespaces need to be processed; for Fortran source files, its unique array slicing syntax needs to be processed.

[0094] During the cross-compilation environment construction process, this embodiment implements a flexible toolchain configuration mechanism. For different target platform architectures, such as ARM, x86, or RISC-V, the system automatically selects the corresponding compiler front-end and back-end components. During the compilation process, multiple optimization passes, including instruction scheduling, register allocation, and memory alignment, are used to ensure that the generated target code has good execution efficiency.

[0095] This embodiment employs a hierarchical parameter management approach when processing configuration parameters. Configuration parameters are divided into three levels: model parameters, runtime parameters, and debugging parameters. Model parameters describe the basic characteristics of the simulation model; runtime parameters control the model's execution behavior; and debugging parameters are used for monitoring and diagnostics. This hierarchical design makes parameter management clearer and facilitates subsequent maintenance and adjustment.

[0096] When generating functional unit model files, this embodiment implements a modular file organization structure. The file header contains version information and platform identification, followed by a configuration parameter area, a code segment, and a data segment. By introducing a segment table management mechanism, different data types are efficiently organized. For example, read-only data and writable data are stored separately, facilitating the implementation of memory protection mechanisms.

[0097] The variable scanning process uses a recursive traversal strategy. The system accurately identifies the internal organization of complex data structures, such as nested structures and multidimensional arrays. When processing global variables, the impact of static and dynamic linking is considered; for local variables, their lifecycle and scope are analyzed.

[0098] This embodiment implements an intelligent type inference mechanism when generating a structured variable table. By analyzing the variable's definition and usage context, it determines its complete type information. For custom types, the system traces its type definition chain until a combination of base types is obtained. This in-depth analysis ensures the integrity of type information.

[0099] During the flattening process, this embodiment adopts a standardized naming strategy. The identifier of the flattened variable is generated by combining the original variable name, scope identifier, and path information. For example, for a structure member, its flattened identifier contains the complete access path from the root node to the leaf node. This naming method maintains the traceability of the variable and ensures the uniqueness of the identifier.

[0100] The corresponding relationship table is established using a bidirectional mapping mechanism. In addition to the forward mapping from structured variables to flattened variables, a reverse index is also established. This bidirectional mapping supports fast lookups during subsequent data conversions. Furthermore, the relationship table also records variable attribute information, such as data type and array dimensions.

[0101] This embodiment implements an efficient data compression mechanism during the serialization process. By analyzing repetitive patterns in the correspondence table and employing appropriate encoding methods, storage overhead is reduced. Serialized data is stored in a block-based manner, supporting incremental updates and partial loads, improving data access efficiency.

[0102] The description file is organized in an extensible format. In addition to basic variable mapping information, it also reserves extension fields for storing additional descriptive information. A versioning mechanism is implemented to ensure forward compatibility of the description file format.

[0103] This embodiment significantly improves the efficiency and reliability of model conversion and variable management through this systematic implementation. Especially when processing large-scale, complex models, this solution accurately captures and converts various variable information, providing a reliable data foundation for subsequent model validation. The system's scalable design also facilitates support for new programming languages ​​and data types.

[0104] In one embodiment of the verification method of the functional unit model in the simulation system of the present application, see Figure 3 , and can also include the following:

[0105] Step S301: Run the simulation model to enter the data acquisition state, calculate the sampling time point according to the simulation step parameter set in the model configuration file, read the value of the structured variable in the simulation model at each sampling time point, form a data record item with the sampling time point and the corresponding structured variable value, and create an index table for the data record item according to the sampling sequence number;

[0106] Step S302: Create a benchmark data file, write the data record items into the benchmark data file, sort the data record items in the benchmark data file according to the sampling sequence number, save the sorted benchmark data file to the resource directory of the functional unit model file, generate the verification code of the benchmark data file and write it into the file header.

[0107] Optionally, this embodiment implements a precise timing control mechanism during the data acquisition process of the simulation model. By parsing the step size parameter in the model configuration file, a sampling strategy based on a virtual clock is established. The sampling time points are calculated using an accumulator model, using integer multiples of the step size parameter to determine the precise moment of each sampling point, while also taking into account time accuracy and rounding error processing.

[0108] When the simulation model enters the data acquisition state, this embodiment implements a multi-level data caching mechanism. A circular buffer is established in memory to temporarily store sampled data. The buffer size is dynamically adjusted based on the sampling frequency and data volume, ensuring real-time data while avoiding excessive memory resource usage. If data exceeds the buffer capacity, the system automatically triggers data persistence.

[0109] This embodiment employs an efficient memory access strategy when reading variable values. By establishing a variable address mapping table, direct memory access is achieved, avoiding the overhead of frequent function calls. For complex data structures, such as multidimensional arrays and nested structures, the system uses a recursive traversal algorithm to ensure complete data capture.

[0110] Data records are organized using a compact storage format. Each record contains three basic fields: timestamp, variable identifier, and value. A unified serialization method is used for different types of variables to ensure data consistency. For example, floating-point data is encoded according to the IEEE 754 standard, and string data uses variable-length encoding, effectively reducing storage space.

[0111] This embodiment implements a multi-level indexing mechanism during index table construction. The primary index establishes a B+ tree structure based on the sampling sequence number, supporting fast random access. A timestamp index is also established to facilitate data queries by time range. The index table employs a sparse storage strategy, creating index records only for key sampling points, thus ensuring query efficiency while reducing storage overhead.

[0112] When creating a baseline data file, this embodiment implements a block-based writing mechanism. Data is organized into fixed-size blocks, each containing a complete set of record entries. Blocks are linked via a linked list structure, supporting dynamic file expansion. For each data block, the system calculates a checksum to verify data integrity.

[0113] The data sorting process utilizes an external sorting algorithm. Because the benchmark data can be large and cannot be loaded into memory all at once, the system first segments the data into multiple ordered segments and then uses a multi-way merge algorithm to perform the final sorting. A data compression mechanism is implemented during the sorting process, using differential encoding to reduce temporary file storage space.

[0114] This embodiment employs a hierarchical storage structure for resource directory management. Benchmark data files are organized by model version and acquisition time, facilitating version control and historical tracing. The directory structure is described by metadata files, which include file location information, data characteristics, and access permissions.

[0115] File verification codes are generated using a multi-verification mechanism. In addition to calculating a SHA-256 hash value for the entire data, segmented verification is performed on key parts of the file. This verification information is encoded and written into the file header, along with metadata such as the file format version and creation time.

[0116] This embodiment implements real-time monitoring of data integrity. During the data writing process, data correctness is verified through checksum calculations. When data anomalies are detected, the system automatically retries or switches to a backup storage path. Furthermore, a data recovery mechanism is implemented, allowing data collection to resume from a breakpoint.

[0117] To improve data access efficiency, this embodiment employs an optimized file organization strategy. Frequently accessed data segments are cached in memory, while less frequently accessed data is stored on secondary storage devices. By implementing a pre-read mechanism, I / O operation latency is reduced.

[0118] This embodiment significantly improves the efficiency and reliability of data acquisition and storage through this systematic implementation. This solution demonstrates excellent performance and stability, particularly when processing large-scale simulation data. The system's scalable design also facilitates support for new data acquisition requirements.

[0119] In one embodiment of the verification method of the functional unit model in the simulation system of the present application, see Figure 4 , and can also include the following:

[0120] Step S401: Initialize the configuration parameters of the virtual machine verification module, start the virtual machine and load the target operating system image, set the memory allocation size and number of processor cores of the virtual machine, establish a file sharing area between the virtual machine and the host machine, and copy the functional unit model file to the running directory of the virtual machine. The running directory is used to store temporary files during the model running process;

[0121] Step S402: read the functional unit model file from the running directory to the memory space of the virtual machine, parse the configuration parameters in the functional unit model file, set the start time and step interval of the simulation calculation according to the configuration parameters, initialize the input and output interface of the functional unit model, call the calculation function of the functional unit model to perform step simulation calculation, and store the calculation result of the calculation function to the memory buffer of the virtual machine.

[0122] Optionally, this embodiment employs a hierarchical configuration management strategy during the initialization of the virtual machine verification module. Configuration parameters are divided into three layers: system, application, and model. System-layer parameters control the basic operating environment of the virtual machine, application-layer parameters manage the simulation execution environment, and model-layer parameters define specific simulation behaviors. This hierarchical design ensures configuration flexibility and maintainability.

[0123] During virtual machine startup, this embodiment implements a dynamic resource allocation mechanism. By analyzing the scale and computational complexity of the functional unit model, the virtual machine's resource configuration is adaptively adjusted. For example, for computationally intensive models, the system allocates more processor cores; for data-intensive models, memory allocation is increased. Processor core allocation also takes into account the parallel nature of tasks, ensuring optimal resource utilization.

[0124] The file sharing area utilizes an efficient shared memory mechanism. By establishing memory mapping between the host and virtual machines, zero-copy data transfer is achieved. The shared area utilizes paging management to support efficient transfer of large-scale files. Access control mechanisms are also implemented to ensure data security.

[0125] This embodiment implements an intelligent file organization strategy for runtime directory management. Temporary files are stored by purpose, including intermediate calculation results, status snapshots, and log information. By implementing file lifecycle management, the system automatically cleans up expired temporary files, avoiding wasted storage space.

[0126] This embodiment uses a segmented loading strategy when loading functional unit model files. The model's code segment and read-only data segment are loaded first, followed by the writable data segment as needed. By implementing lazy loading of memory pages, memory usage during the initialization phase is significantly reduced. Frequently accessed data segments are pinned in memory to improve access efficiency.

[0127] Configuration parameter parsing utilizes a recursive, deep parsing approach. The system can handle complex parameter dependencies, ensuring that the order in which parameters are loaded complies with dependency constraints. A dynamic evaluation mechanism is implemented for parameter expressions, supporting computational relationships between parameters. Parameter validity is ensured through type checking and value range verification.

[0128] This embodiment implements a precise control mechanism for simulation time management. By establishing a virtual clock system, synchronization between simulation time and physical time is achieved. The step interval is set based on the dynamic characteristics of the model, using smaller step sizes for rapidly changing states and larger step sizes for slowly changing states, thereby improving computational efficiency.

[0129] The initialization of the input and output interfaces uses standardized interface encapsulation. By establishing a unified data exchange format, seamless conversion of different data types is achieved. The interface layer implements a data caching mechanism, using double buffering technology to ensure real-time and consistent data exchange.

[0130] This embodiment implements a complex task scheduling mechanism during the computation function call process. By analyzing the dependencies between computation tasks and constructing a task execution graph, an optimal parallel execution strategy is implemented. For computation processes with cyclic dependencies, the system uses iterative solutions to ensure convergence of the results.

[0131] Computation results are stored using a multi-level cache structure. Memory buffers are tiered based on data timeliness, with hot data stored in cache and cold data in regular memory. This improves data access hit rates by implementing cache prefetching and replacement strategies.

[0132] This embodiment, through this systematic implementation, significantly improves the performance and reliability of model verification in a virtual machine environment. This solution demonstrates excellent resource management and computational efficiency, particularly when processing complex simulation models. The system's scalable design also provides a foundation for supporting new simulation requirements.

[0133] In one embodiment of the verification method of the functional unit model in the simulation system of the present application, see Figure 5 , and can also include the following:

[0134] Step S501: accessing the memory buffer of the virtual machine, reading the output data of the functional unit model at the current step, parsing the value and timestamp of the output data according to the data storage format of the memory buffer, grouping the output data according to the identifier of the flattened variable, and generating a data sequence of the flattened variable, wherein the data sequence includes the variable identifier, the value and the timestamp;

[0135] Step S502: read the mapping table from the description file of the functional unit model file, restore the data sequence of the flattened variable to a structured form based on the variable correspondence recorded in the mapping table, replace the identifier of the flattened variable with the identifier of the structured variable according to the variable correspondence, and store the converted structured data as data to be verified in the data cache area of ​​the virtual machine.

[0136] Optionally, this embodiment implements an efficient page table-based memory mapping mechanism during virtual machine memory access. By establishing a multi-level mapping table from virtual addresses to physical addresses, fast access to the memory buffer is ensured. During access, memory prefetching technology is used to preload potentially needed data into the CPU cache based on the data's spatial locality, effectively reducing memory access latency.

[0137] This embodiment employs a flexible data decoding strategy for data storage format parsing. Dedicated parsers are implemented for different data types, such as fixed-point numbers, floating-point numbers, and strings. The parsers automatically select the appropriate decoding method by analyzing the type identifier in the data header. For example, for floating-point numbers in IEEE 754 format, bitwise operations are used to extract the sign, exponent, and mantissa bits, ensuring accurate restoration of the value.

[0138] This embodiment implements a precise timing management mechanism in timestamp processing. Timestamps are represented as 64-bit integers with nanosecond accuracy and support automatic conversion between different time units. By maintaining a global clock source, the system ensures time synchronization across multiple data sources, avoiding data misalignment caused by time inconsistencies.

[0139] The data grouping process utilizes an efficient hash index structure. By calculating hash values ​​for flattened variable identifiers, a fast mapping of variables to data blocks is established. The hash table uses open addressing to handle conflicts and maintains a low load factor through dynamic expansion, ensuring efficient lookups. For frequently accessed variable groups, the system maintains index information in a high-speed cache.

[0140] This embodiment achieves a compact data organization when generating data sequences. Each sequence record is stored using variable-length encoding, containing three basic fields: an identifier, a value, and a timestamp. For recurring identifiers, differential encoding is used to reduce storage space. The system also implements a block-based storage mechanism for sequences, with each data block containing complete index information, supporting parallel processing.

[0141] This embodiment uses a hierarchical caching strategy during mapping table access. Frequently used mappings are loaded into memory upon first access to establish a fast lookup table. For large mapping tables, paging is used to avoid excessive memory usage at once. The system manages the cache using a least-recently-used (LRU) algorithm, promptly eliminating infrequently used mappings.

[0142] The variable restoration process implements a recursive data structure reconstruction mechanism. Starting with flattened variables, complex data structures are gradually constructed by analyzing the hierarchical information in identifiers. When processing arrays and structures, the system verifies index ranges and member validity to ensure data structure integrity. For possible type conversions, safe type checking and conversion operations are implemented.

[0143] This embodiment utilizes intelligent namespace management during identifier replacement. By establishing a scope tree, variable visibility and naming conflicts are correctly handled. The system can identify and maintain inheritance relationships between variables, ensuring that the restored structured data conforms to the original semantic definition.

[0144] The data cache is managed using a multi-level storage architecture. Based on data access characteristics, hot data is stored in the cache, while cold data is stored in main memory or virtual memory. By implementing a predictive caching strategy, the system can pre-load data blocks that will be accessed, improving data access efficiency.

[0145] This embodiment ensures the reliability of the data conversion process by establishing a comprehensive data consistency checking mechanism. At each conversion node, data integrity is verified by calculating a checksum. If an anomaly is detected, the system automatically performs data repair or rollback operations and records detailed error information for subsequent analysis.

[0146] To support large-scale data processing, this embodiment implements a streaming processing framework. By establishing a data processing pipeline, operations such as data reading, conversion, and storage are parallelized. The system dynamically adjusts the degree of parallelism based on the processing load to maintain optimal processing efficiency. This design significantly improves data processing throughput, especially when processing large simulation model data.

[0147] This embodiment, through this systematic implementation, effectively addresses the efficiency and reliability issues of large-scale data processing in a virtual machine environment. This solution demonstrates excellent performance and stability, particularly when processing complex data structure conversions. The system's scalable design also provides a solid foundation for supporting new data formats and processing requirements.

[0148] In one embodiment of the verification method of the functional unit model in the simulation system of the present application, see Figure 6 , and can also include the following:

[0149] Step S601: Reading a benchmark data file from the resource directory of the functional unit model file, searching for a corresponding data record item in the benchmark data file according to the timestamp of the current step, matching the structured variable values ​​in the data record item with the data to be verified in the data buffer, calculating the numerical deviation of each structured variable at the current moment, comparing the numerical deviation with a preset tolerance threshold, and generating a numerical verification result;

[0150] Step S602: Obtain the data to be verified of two adjacent steps in the data cache area, calculate the differential value of each structured variable between adjacent steps, determine the change direction and amplitude of the data to be verified based on the differential value, read the data record items of the corresponding time period from the benchmark data file, calculate the differential value of the benchmark data, compare the differential features of the data to be verified and the benchmark data, and generate a trend verification result.

[0151] Optionally, this embodiment implements an efficient data indexing mechanism during the data verification process. By establishing a time index tree within the benchmark data file, rapid location of timestamps to data records is achieved. The index tree uses a B+ tree structure, with leaf nodes storing the correspondence between timestamps and data records, and non-leaf nodes storing time interval information, ensuring efficient search in large datasets.

[0152] During the data record matching process, this embodiment employs an intelligent data alignment strategy. Considering the potential for slight differences in sampling times between different data sources, the system implements a time window matching mechanism. By setting a time tolerance range, data records at adjacent time points are paired. For inconsistent sampling rates, interpolation algorithms are used to supplement missing data points.

[0153] This embodiment implements a multi-dimensional error analysis mechanism for calculating numerical deviations. Different error metrics are used for different types of variables. For example, for floating-point numbers, relative and absolute errors are calculated; for vector types, Euclidean distance and cosine similarity are calculated. The system also considers the impact of numerical range on error assessment, employing adaptive error calculation strategies for data of different magnitudes.

[0154] Tolerance thresholds utilize a hierarchical threshold management mechanism. Different levels of tolerance are set based on the importance and physical significance of the variable. Stricter thresholds are used for key control parameters, while a wider margin of error is permitted for intermediate calculation results. The system maintains threshold rules in configuration files and supports online adjustment.

[0155] This embodiment implements a robust numerical differentiation algorithm during differential value calculation. To account for roundoff errors and noise in numerical calculations, a central difference method is used to improve computational accuracy. For time series data, sliding window smoothing is used to reduce the impact of random fluctuations. The system also implements adaptive time step selection, improving efficiency while ensuring computational accuracy.

[0156] Change feature analysis utilizes a multi-feature fusion approach. In addition to calculating basic differential values, higher-order features such as rate of change and acceleration are also extracted. By establishing feature vectors, the system can comprehensively describe the dynamic characteristics of data. For periodically changing data, frequency domain analysis is implemented to identify the signal's primary frequency components.

[0157] This embodiment utilizes sequence similarity analysis technology in the trend verification phase. This solves the problem of time series alignment through a dynamic time warping algorithm. The system calculates metrics such as shape similarity and trend consistency, comprehensively assessing whether the data's changing trends match. In the case of phase differences, signal delay analysis is used to determine the optimal matching position.

[0158] The verification result generation process implements a multi-level evaluation system. The system assesses data consistency from three perspectives: point value comparison, interval statistics, and trend analysis. A comprehensive verification score is generated by weighted integration of the evaluation results from different dimensions. The evaluation results are stored in a structured format to support subsequent statistical analysis and visualization.

[0159] This embodiment implements an intelligent early warning mechanism for anomaly detection. By building a statistical model of data, it identifies abnormal numerical fluctuations and trend changes. The system can distinguish between sporadic anomalies and systematic deviations, providing a basis for fault diagnosis. For detected anomalies, a detailed analysis report is automatically generated, including the time, location, and possible causes of the anomaly.

[0160] To improve verification efficiency, this embodiment employs a parallel computing framework. Using data sharding technology, large datasets are divided into multiple independent computing tasks. The system dynamically adjusts the degree of parallelism based on available computing resources, fully utilizing the computing power of multi-core processors.

[0161] This embodiment significantly improves the accuracy and efficiency of simulation model verification through this systematic implementation. This solution demonstrates excellent performance and reliability, particularly when processing large-scale, multivariate simulation data. The system's scalable design also provides a foundation for supporting new verification requirements, enabling flexible adaptation to different simulation model verification scenarios.

[0162] In one embodiment of the verification method of the functional unit model in the simulation system of the present application, see Figure 7, and can also include the following:

[0163] Step S701: Determine whether the numerical deviation in the numerical verification result exceeds the tolerance threshold, and determine whether the differential features of the data to be verified and the reference data in the trend verification result are inconsistent. When any of the above situations occurs, generate a verification abnormality flag, which includes the abnormality type, abnormality level and abnormality description;

[0164] Step S702: Record the simulation step, structured variable identifier, benchmark data value and data value to be verified corresponding to the verification exception identifier, and write the verification exception identifier and its related data content into a verification report file according to a preset report format. The verification report file contains a verification overview, exception statistics and detailed records. The verification report file is saved to the resource directory of the functional unit model file.

[0165] Optionally, this embodiment implements a multi-dimensional anomaly identification mechanism during the verification anomaly judgment process. By establishing a layered anomaly assessment system, a refined analysis of numerical deviations and trend inconsistencies is performed. The assessment system includes two dimensions: immediate anomalies and cumulative anomalies. Immediate anomalies focus on numerical limit violations at a single point in time, while cumulative anomalies monitor the cumulative effects of deviations over consecutive time periods.

[0166] This embodiment employs an intelligent classification strategy to determine anomaly types. By analyzing the distribution characteristics of numerical deviations, anomalies are classified into three basic types: random fluctuations, systematic deviations, and sudden changes. For trend inconsistencies, analysis is conducted based on factors such as rate of change, acceleration, and inflection point characteristics to identify trend deviations, oscillation anomalies, and phase delays.

[0167] This embodiment establishes a grading mechanism based on impact when categorizing anomalies. By assessing the importance of variables in the model, the duration of the anomaly, and the magnitude of the deviation, anomalies are classified into four levels: warning, minor, severe, and fatal. The system also considers the impact of correlations between variables. When an anomaly occurs in a key variable, the anomaly level of related variables is increased.

[0168] Anomaly descriptions are generated using a template-based description engine. Based on the specific characteristics of the anomaly, an appropriate description pattern is selected from a library of pre-set description templates. Combined with actual numerical values ​​and trend information, an accurate and understandable anomaly description is generated. The description includes the anomaly's temporal and numerical characteristics, as well as possible cause analysis.

[0169] This embodiment implements a complete on-site protection mechanism for abnormal data recording. In addition to recording data at the moment the abnormality occurs, it also captures snapshots of data within a certain time window before and after the abnormality. This preservation of contextual information provides an important basis for subsequent fault analysis. The system also records environmental parameters and model status information at the time of the abnormality.

[0170] The verification report generation process utilizes a structured document organization approach. The report content is divided into three levels: overview, statistical analysis, and detailed records. The overview provides an overview of the verification task and key findings; the statistical analysis charts the distribution and trends of anomalies; and the detailed records provide chronologically detailed information on each anomaly.

[0171] This embodiment implements diverse report formats. By configuring different report templates, you can generate reports tailored to different user needs. For technical analysts, a technical report containing detailed data and diagnostic information is provided; for managers, a summary report with highlighted key points is generated.

[0172] To improve report readability, this embodiment implements intelligent data visualization. Through an adaptive chart generation mechanism, abnormal data is presented in an intuitive manner. The system automatically selects appropriate chart types based on data characteristics, such as trend charts, scatter plots, or heat maps. Important anomalies are automatically annotated and explained.

[0173] This embodiment employs a hierarchical storage strategy for resource directory management. Report files are stored in different storage tiers based on their importance and access frequency. Important exception reports are saved in multiple copies and indexed to support rapid retrieval and statistical analysis.

[0174] To support subsequent data mining and analysis, this embodiment implements structured storage of report data. Report content is converted into a standard data format, enabling query and analysis using database tools. The system also provides a report comparison function, allowing tracking of anomaly evolution and treatment effectiveness.

[0175] This embodiment significantly improves the reliability and traceability of model verification results through this systematic implementation. Especially during the verification process of complex models, this solution accurately captures and records various anomalies, providing strong support for model optimization and problem diagnosis. The system's scalable design also provides a foundation for supporting new verification requirements and reporting formats.

[0176] In order to break through the limitations of traditional manual verification and provide a systematic and automated solution for simulation model verification, the present application provides an embodiment of a verification device for a functional unit model in a simulation system for implementing all or part of the verification method for a functional unit model in a simulation system, see Figure 8 The verification device of the functional unit model in the simulation system specifically includes the following contents:

[0177] The platform building module 10 is used to build a model verification platform, which includes a simulation model generation module and a virtual machine verification module; the simulation model generation module exports the simulation model into a functional unit model file through cross-compilation technology, extracts the structured variables of the simulation model and generates flattened variables of the functional unit model, establishes a mapping table between the structured variables and the flattened variables, writes the mapping table into a description file of the functional unit model file, collects benchmark data of the simulation model at each simulation step, and stores the benchmark data in a resource directory of the functional unit model file in a time series;

[0178] a mapping loading module 20 configured to start the virtual machine verification module to load a target operating system, the virtual machine verification module calling the functional unit model file to perform step-length simulation calculations, collecting output data of the functional unit model at each simulation step, obtaining variable mapping relationships from the mapping table, and converting the output data into a corresponding structured form according to the variable mapping relationships to obtain data to be verified;

[0179] The model verification module 30 is used to read the benchmark data corresponding to the current step size from the resource directory, and verify the benchmark data with the data to be verified. The verification includes: calculating the numerical deviation between the benchmark data and the data to be verified at the corresponding time, and judging whether the numerical deviation exceeds the preset tolerance range; calculating the change trend of the data to be verified between adjacent steps, and comparing the change trend with the change trend of the benchmark data; when the numerical deviation exceeds the tolerance range or the change trend is inconsistent, generating a verification anomaly mark, recording the step position and data content corresponding to the verification anomaly mark, and writing the verification anomaly mark into the verification report.

[0180] From the above description, it can be seen that the verification device for the functional unit model in the simulation system provided by the embodiment of the present application can realize the automatic verification of the simulation model by constructing a model verification platform. The cross-compilation technology is innovatively designed to convert the simulation model into a functional unit model file, and a mapping mechanism between structured variables and flattened variables is established. The system performs model verification in a virtual machine environment, not only comparing numerical deviations, but also analyzing the changing trends between adjacent steps, thereby realizing multi-dimensional accuracy verification. This method breaks through the limitations of traditional manual verification and provides a systematic and automated solution for simulation model verification.

[0181] From a hardware perspective, in order to overcome the limitations of traditional manual verification and provide a systematic and automated solution for simulation model verification, the present application provides an embodiment of an electronic device for implementing all or part of the verification method for a functional unit model in a simulation system. The electronic device specifically includes the following:

[0182] A processor, a memory, a communications interface, and a bus; wherein the processor, memory, and communications interface communicate with each other via the bus; the communications interface is used to implement information transmission between a verification device for a functional unit model in a simulation system and related devices such as a core business system, a user terminal, and related databases; the logic controller can be a desktop computer, a tablet computer, a mobile terminal, etc., but this embodiment is not limited thereto. In this embodiment, the logic controller can be implemented with reference to the embodiments of the verification method for a functional unit model in a simulation system and the embodiments of the verification device for a functional unit model in a simulation system, the contents of which are incorporated herein and repeated parts are not repeated.

[0183] It is understandable that the user terminal may include a smart phone, a tablet electronic device, a network set-top box, a portable computer, a desktop computer, a personal digital assistant (PDA), a vehicle-mounted device, a smart wearable device, etc. Among them, the smart wearable device may include smart glasses, a smart watch, a smart bracelet, etc.

[0184] In practical applications, part of the verification method for the functional unit model in the simulation system can be executed on the electronic device side as described above, or all operations can be completed on the client device. The specific selection can be based on the processing capabilities of the client device and the limitations of the user's usage scenario. This application does not impose any restrictions on this. If all operations are completed on the client device, the client device may also include a processor.

[0185] The aforementioned client device may include a communication module (i.e., a communication unit) capable of establishing a communication connection with a remote server to facilitate data transmission with the server. The server may include a server at the task scheduling center or, in other implementation scenarios, a server on an intermediate platform, such as a server on a third-party server platform that is communicatively linked to the task scheduling center server. The server may comprise a single computer device, a server cluster consisting of multiple servers, or a distributed server configuration.

[0186] Figure 9 Schematic block diagram of the system structure of the electronic device 9600 according to an embodiment of the present application. Figure 9 As shown, the electronic device 9600 may include a central processing unit 9100 and a memory 9140; the memory 9140 is coupled to the central processing unit 9100. It is worth noting that the Figure 9 is exemplary; other types of structures may also be used to supplement or replace this structure to implement telecommunication functions or other functions.

[0187] In one embodiment, the verification method function of the functional unit model in the simulation system can be integrated into the central processing unit 9100. The central processing unit 9100 can be configured to perform the following control:

[0188] Step S101: constructing a model verification platform, the model verification platform including a simulation model generation module and a virtual machine verification module; the simulation model generation module exports the simulation model into a functional unit model file through cross-compilation technology, extracts structured variables of the simulation model and generates flattened variables of the functional unit model, establishes a mapping table between the structured variables and the flattened variables, writes the mapping table into a description file of the functional unit model file, collects benchmark data of the simulation model at each simulation step, and stores the benchmark data in a resource directory of the functional unit model file in a time series;

[0189] Step S102: Starting the virtual machine verification module to load the target operating system, the virtual machine verification module calls the functional unit model file to perform step-length simulation calculation, collects output data of the functional unit model at each simulation step, obtains the variable mapping relationship from the mapping table, and converts the output data into a corresponding structured form according to the variable mapping relationship to obtain data to be verified;

[0190] Step S103: Read the benchmark data corresponding to the current step from the resource directory, and verify the benchmark data with the data to be verified. The verification includes: calculating the numerical deviation between the benchmark data and the data to be verified at the corresponding time, and judging whether the numerical deviation exceeds the preset tolerance range; calculating the change trend of the data to be verified between adjacent steps, and comparing the change trend with the change trend of the benchmark data; when the numerical deviation exceeds the tolerance range or the change trend is inconsistent, generating a verification abnormality mark, recording the step position and data content corresponding to the verification abnormality mark, and writing the verification abnormality mark into the verification report.

[0191] As can be seen from the above description, the electronic device provided in the embodiment of the present application realizes the automated verification of the simulation model by constructing a model verification platform. An innovative cross-compilation technology is designed to convert the simulation model into a functional unit model file, and a mapping mechanism between structured variables and flattened variables is established. The system performs model verification in a virtual machine environment, not only comparing numerical deviations, but also analyzing the changing trends between adjacent step sizes, thereby achieving multi-dimensional accuracy verification. This method breaks through the limitations of traditional manual verification and provides a systematic and automated solution for simulation model verification.

[0192] In another embodiment, the verification device of the functional unit model in the simulation system can be configured separately from the central processing unit 9100. For example, the verification device of the functional unit model in the simulation system can be configured as a chip connected to the central processing unit 9100, and the verification method function of the functional unit model in the simulation system can be implemented through the control of the central processing unit.

[0193] like Figure 9 As shown, the electronic device 9600 may further include: a communication module 9110, an input unit 9120, an audio processor 9130, a display 9160, and a power supply 9170. It is worth noting that the electronic device 9600 does not necessarily have to include Figure 9 In addition, the electronic device 9600 may also include all components shown in Figure 9 For components not shown, reference may be made to the prior art.

[0194] like Figure 9 As shown, the central processing unit 9100 is sometimes also referred to as a controller or operation control, and may include a microprocessor or other processor device and / or logic device. The central processing unit 9100 receives input and controls the operation of various components of the electronic device 9600.

[0195] Memory 9140 can be, for example, one or more of a cache, flash memory, hard drive, removable media, volatile memory, non-volatile memory, or other suitable devices. It can store the aforementioned failure-related information and also store programs that execute the relevant information. The CPU 9100 can execute the programs stored in memory 9140 to implement information storage or processing.

[0196] The input unit 9120 provides input to the central processing unit 9100. The input unit 9120 may be, for example, a keypad or touch input device. The power supply 9170 is used to provide power to the electronic device 9600. The display 9160 is used to display objects such as images and text. The display may be, for example, an LCD display, but is not limited thereto.

[0197] The memory 9140 may be a solid-state memory, such as a read-only memory (ROM), random access memory (RAM), or SIM card. Alternatively, it may be a memory that retains information even when power is off, can be selectively erased, and is capable of storing additional data. Examples of such memory are sometimes referred to as EPROMs. The memory 9140 may also be some other type of device. The memory 9140 includes a buffer memory 9141 (sometimes referred to as a buffer). The memory 9140 may include an application / function storage unit 9142 for storing application programs and function programs, or processes used by the central processing unit 9100 to execute operations of the electronic device 9600.

[0198] The memory 9140 may also include a data storage unit 9143 for storing data, such as contacts, digital data, images, sounds, and / or any other data used by the electronic device. The driver storage unit 9144 of the memory 9140 may include various driver programs for communication functions of the electronic device and / or for executing other functions of the electronic device (such as messaging applications, address book applications, etc.).

[0199] The communication module 9110 is a transmitter / receiver that transmits and receives signals via the antenna 9111. The communication module 9110 (transmitter / receiver) is coupled to the central processor 9100 to provide input signals and receive output signals, which may be the same as the case of a conventional mobile communication terminal.

[0200] Based on different communication technologies, multiple communication modules 9110 may be provided in the same electronic device, such as cellular network modules, Bluetooth modules, and / or wireless local area network modules. The communication module 9110 (transmitter / receiver) is also coupled to a speaker 9131 and a microphone 9132 via an audio processor 9130, providing audio output via the speaker 9131 and receiving audio input from the microphone 9132, thereby implementing common telecommunication functions. The audio processor 9130 may include any suitable buffer, decoder, amplifier, etc. Furthermore, the audio processor 9130 is coupled to the central processing unit 9100, enabling local recording via the microphone 9132 and playback of stored audio via the speaker 9131.

[0201] The embodiments of the present application also provide a computer-readable storage medium capable of implementing all steps of the method for verifying a functional unit model in a simulation system in which the execution subject is a server or a client in the above-mentioned embodiments. The computer-readable storage medium stores a computer program. When the computer program is executed by a processor, the computer program implements all steps of the method for verifying a functional unit model in a simulation system in which the execution subject is a server or a client in the above-mentioned embodiments. For example, when the processor executes the computer program, the following steps are implemented:

[0202] Step S101: constructing a model verification platform, the model verification platform including a simulation model generation module and a virtual machine verification module; the simulation model generation module exports the simulation model into a functional unit model file through cross-compilation technology, extracts structured variables of the simulation model and generates flattened variables of the functional unit model, establishes a mapping table between the structured variables and the flattened variables, writes the mapping table into a description file of the functional unit model file, collects benchmark data of the simulation model at each simulation step, and stores the benchmark data in a resource directory of the functional unit model file in a time series;

[0203] Step S102: Starting the virtual machine verification module to load the target operating system, the virtual machine verification module calls the functional unit model file to perform step-length simulation calculation, collects output data of the functional unit model at each simulation step, obtains the variable mapping relationship from the mapping table, and converts the output data into a corresponding structured form according to the variable mapping relationship to obtain data to be verified;

[0204] Step S103: Read the benchmark data corresponding to the current step from the resource directory, and verify the benchmark data with the data to be verified. The verification includes: calculating the numerical deviation between the benchmark data and the data to be verified at the corresponding time, and judging whether the numerical deviation exceeds the preset tolerance range; calculating the change trend of the data to be verified between adjacent steps, and comparing the change trend with the change trend of the benchmark data; when the numerical deviation exceeds the tolerance range or the change trend is inconsistent, generating a verification abnormality mark, recording the step position and data content corresponding to the verification abnormality mark, and writing the verification abnormality mark into the verification report.

[0205] As can be seen from the above description, the computer-readable storage medium provided in the embodiment of the present application realizes the automated verification of the simulation model by constructing a model verification platform. An innovative cross-compilation technology is designed to convert the simulation model into a functional unit model file, and a mapping mechanism between structured variables and flattened variables is established. The system performs model verification in a virtual machine environment, not only comparing numerical deviations, but also analyzing the changing trends between adjacent step sizes, thereby achieving multi-dimensional accuracy verification. This method breaks through the limitations of traditional manual verification and provides a systematic and automated solution for simulation model verification.

[0206] The embodiments of the present application also provide a computer program product capable of implementing all steps of the method for verifying a functional unit model in a simulation system in which the execution subject is a server or a client in the above-mentioned embodiment. When the computer program / instructions are executed by a processor, the computer program / instructions implement the steps of the method for verifying a functional unit model in the simulation system. For example, the computer program / instructions implement the following steps:

[0207] Step S101: constructing a model verification platform, the model verification platform including a simulation model generation module and a virtual machine verification module; the simulation model generation module exports the simulation model into a functional unit model file through cross-compilation technology, extracts structured variables of the simulation model and generates flattened variables of the functional unit model, establishes a mapping table between the structured variables and the flattened variables, writes the mapping table into a description file of the functional unit model file, collects benchmark data of the simulation model at each simulation step, and stores the benchmark data in a resource directory of the functional unit model file in a time series;

[0208] Step S102: Starting the virtual machine verification module to load the target operating system, the virtual machine verification module calls the functional unit model file to perform step-length simulation calculation, collects output data of the functional unit model at each simulation step, obtains the variable mapping relationship from the mapping table, and converts the output data into a corresponding structured form according to the variable mapping relationship to obtain data to be verified;

[0209] Step S103: Read the benchmark data corresponding to the current step from the resource directory, and verify the benchmark data with the data to be verified. The verification includes: calculating the numerical deviation between the benchmark data and the data to be verified at the corresponding time, and judging whether the numerical deviation exceeds the preset tolerance range; calculating the change trend of the data to be verified between adjacent steps, and comparing the change trend with the change trend of the benchmark data; when the numerical deviation exceeds the tolerance range or the change trend is inconsistent, generating a verification abnormality mark, recording the step position and data content corresponding to the verification abnormality mark, and writing the verification abnormality mark into the verification report.

[0210] As can be seen from the above description, the computer program product provided in the embodiment of the present application realizes the automated verification of the simulation model by constructing a model verification platform. An innovative cross-compilation technology is designed to convert the simulation model into a functional unit model file, and a mapping mechanism between structured variables and flattened variables is established. The system performs model verification in a virtual machine environment, not only comparing numerical deviations, but also analyzing the changing trends between adjacent step sizes, thereby achieving multi-dimensional accuracy verification. This method breaks through the limitations of traditional manual verification and provides a systematic and automated solution for simulation model verification.

[0211] Those skilled in the art will appreciate that embodiments of the present invention may be provided as methods, apparatuses, or computer program products. Thus, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROMs, optical storage, etc.) containing computer-usable program code.

[0212] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (apparatus), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowcharts and / or block diagrams, as well as combinations of processes and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowcharts and / or block diagrams. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0213] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0214] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 Figure 1 A step that specifies a function in one or more boxes.

[0215] Specific embodiments are used in the present invention to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core ideas. At the same time, for those skilled in the art, according to the ideas of the present invention, there may be changes in the specific implementation methods and application scopes. In summary, the contents of this specification should not be understood as limiting the present invention.

Claims

1. A method for verifying a functional unit model in a simulation system, characterized in that: The method comprises: Constructing a model verification platform, the model verification platform including a simulation model generation module and a virtual machine verification module; The simulation model generation module exports the simulation model into a functional unit model file through cross-compilation technology, extracts structured variables of the simulation model and generates flattened variables of the functional unit model, establishes a mapping table between the structured variables and the flattened variables, writes the mapping table into a description file of the functional unit model file, collects benchmark data of the simulation model at each simulation step, and stores the benchmark data in a resource directory of the functional unit model file in a time series; Starting the virtual machine verification module to load the target operating system, the virtual machine verification module calls the functional unit model file to perform step simulation calculation, collects output data of the functional unit model at each simulation step, obtains the variable mapping relationship from the mapping table, and converts the output data into a corresponding structured form according to the variable mapping relationship to obtain data to be verified; The collecting output data of the functional unit model at each simulation step, obtaining a variable mapping relationship from the mapping table, and converting the output data into a corresponding structured form according to the variable mapping relationship to obtain data to be verified, includes: Accessing a memory buffer of the virtual machine, reading output data of the functional unit model at a current step, parsing a value and a timestamp of the output data according to a data storage format of the memory buffer, grouping the output data according to identifiers of flattened variables, and generating a data sequence of the flattened variables, the data sequence including variable identifiers, values, and timestamps; Reading the mapping table from the description file of the functional unit model file, restoring the data sequence of the flattened variables into a structured form based on the variable correspondence recorded in the mapping table, replacing the identifiers of the flattened variables with identifiers of the structured variables according to the variable correspondence, and storing the converted structured data as data to be verified in the data cache area of ​​the virtual machine; The benchmark data corresponding to the current step size is read from the resource directory, and the benchmark data is verified with the data to be verified. The verification includes: calculating the numerical deviation between the benchmark data and the data to be verified at the corresponding time, and judging whether the numerical deviation exceeds the preset tolerance range; calculating the change trend of the data to be verified between adjacent steps, and comparing the change trend with the change trend of the benchmark data; when the numerical deviation exceeds the tolerance range or the change trend is inconsistent, generating a verification anomaly flag, recording the step size position and data content corresponding to the verification anomaly flag, and writing the verification anomaly flag into the verification report.

2. The method for verifying a functional unit model in a simulation system according to claim 1, wherein: The simulation model generation module exports the simulation model into a functional unit model file through cross-compilation technology, extracts structured variables of the simulation model and generates flattened variables of the functional unit model, establishes a mapping table between the structured variables and the flattened variables, and writes the mapping table into a description file of the functional unit model file, including: Reading the source code file and configuration parameters of the simulation model, compiling the source code file into an executable file of the target platform based on a cross-compiler, packaging the executable file and the configuration parameters of the simulation model to generate a functional unit model file, and storing the functional unit model file in a preset file directory; Scan the global variables and local variables in the simulation model, generate a structured variable table according to the scope and data structure of the variables, expand the hierarchical structure in the structured variable table into a flat variable sequence, generate a unique identifier for each flat variable, establish a correspondence table between the structured variables and the flat variables, serialize the correspondence table and write it into the description file of the functional unit model file.

3. The method for verifying a functional unit model in a simulation system according to claim 1, wherein: The collecting of the benchmark data of the simulation model at each simulation step and storing the benchmark data in a resource directory of the functional unit model file in a time series includes: Run the simulation model to enter the data acquisition state, calculate the sampling time point according to the simulation step parameter set in the model configuration file, read the value of the structured variable in the simulation model at each sampling time point, form a data record item with the sampling time point and the corresponding structured variable value, and create an index table for the data record item according to the sampling sequence number; Create a benchmark data file, write the data record items into the benchmark data file, sort the data record items in the benchmark data file according to the sampling sequence number, save the sorted benchmark data file to the resource directory of the functional unit model file, generate a check code for the benchmark data file and write it into the file header.

4. The method for verifying a functional unit model in a simulation system according to claim 1, wherein: The starting of the virtual machine verification module to load the target operating system, wherein the virtual machine verification module calls the functional unit model file to perform step length simulation calculation, includes: Initialize the configuration parameters of the virtual machine verification module, start the virtual machine and load the target operating system image, set the memory allocation size and number of processor cores of the virtual machine, establish a file sharing area between the virtual machine and the host machine, and copy the functional unit model file to the running directory of the virtual machine, which is used to store temporary files during the model running process; Read the functional unit model file from the running directory to the memory space of the virtual machine, parse the configuration parameters in the functional unit model file, set the start time and step interval of the simulation calculation according to the configuration parameters, initialize the input and output interfaces of the functional unit model, call the calculation function of the functional unit model to perform step simulation calculation, and store the calculation result of the calculation function to the memory buffer of the virtual machine.

5. The method for verifying a functional unit model in a simulation system according to claim 1, wherein: The step of reading the benchmark data corresponding to the current step length from the resource directory and verifying the benchmark data with the data to be verified includes: calculating the numerical deviation between the benchmark data and the data to be verified at corresponding moments, and determining whether the numerical deviation exceeds a preset tolerance range; calculating the change trend of the data to be verified between adjacent step lengths, and comparing the change trend with the change trend of the benchmark data, including: Reading a benchmark data file from a resource directory of the functional unit model file, searching for a corresponding data record item in the benchmark data file according to a timestamp of a current step, matching a structured variable value in the data record item with the data to be verified in the data buffer, calculating a numerical deviation of each structured variable at the current moment, comparing the numerical deviation with a preset tolerance threshold, and generating a numerical verification result; Obtain the data to be verified of two adjacent steps in the data cache area, calculate the differential value of each structured variable between adjacent steps, determine the change direction and amplitude of the data to be verified based on the differential value, read the data record items of the corresponding time period from the benchmark data file, calculate the differential value of the benchmark data, compare the differential features of the data to be verified and the benchmark data, and generate a trend verification result.

6. The method for verifying a functional unit model in a simulation system according to claim 5, wherein: When the numerical deviation exceeds the tolerance range or the change trend is inconsistent, generating a calibration abnormality mark, recording the step position and data content corresponding to the calibration abnormality mark, and writing the calibration abnormality mark into the calibration report, including: Determine whether the numerical deviation in the numerical verification result exceeds the tolerance threshold, and determine whether the differential features of the data to be verified and the reference data in the trend verification result are inconsistent. When any of the above situations occurs, generate a verification abnormality flag, and the verification abnormality flag includes an abnormality type, abnormality level, and abnormality description; Record the simulation step, structured variable identifier, benchmark data value and data value to be verified corresponding to the verification exception identifier, and write the verification exception identifier and its related data content into a verification report file according to a preset report format. The verification report file contains a verification overview, exception statistics and detailed records. The verification report file is saved to the resource directory of the functional unit model file.

7. A device for verifying a functional unit model in a simulation system, characterized in that: The device comprises: A platform building module is used to build a model verification platform, which includes a simulation model generation module and a virtual machine verification module; the simulation model generation module exports the simulation model into a functional unit model file through cross-compilation technology, extracts the structured variables of the simulation model and generates flattened variables of the functional unit model, establishes a mapping table between the structured variables and the flattened variables, writes the mapping table into a description file of the functional unit model file, collects benchmark data of the simulation model at each simulation step, and stores the benchmark data in a resource directory of the functional unit model file in a time series; a mapping loading module, configured to start the virtual machine verification module to load a target operating system, the virtual machine verification module calling the functional unit model file to perform step-length simulation calculations, collecting output data of the functional unit model at each simulation step, obtaining a variable mapping relationship from the mapping table, and converting the output data into a corresponding structured form according to the variable mapping relationship to obtain data to be verified; A model verification module is used to read the benchmark data corresponding to the current step size from the resource directory and verify the benchmark data with the data to be verified. The verification includes: calculating the numerical deviation between the benchmark data and the data to be verified at the corresponding time, and judging whether the numerical deviation exceeds the preset tolerance range; calculating the change trend of the data to be verified between adjacent steps, and comparing the change trend with the change trend of the benchmark data; when the numerical deviation exceeds the tolerance range or the change trend is inconsistent, generating a verification anomaly flag, recording the step position and data content corresponding to the verification anomaly flag, and writing the verification anomaly flag into the verification report.

8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the program, the steps of the method for verifying a functional unit model in a simulation system according to any one of claims 1 to 6 are implemented.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method for verifying a functional unit model in a simulation system according to any one of claims 1 to 6 are implemented.

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