An automated wafer package inspection and sorting system

Abstract

The application discloses an automatic wafer packaging detection and sorting system, and relates to the field of semiconductor manufacturing and detection.The system comprises the following steps: automatically obtaining packaged wafers from packaging equipment and a warehouse by integrating automatic logistics and intelligent scheduling; detecting surface defects of the packaged wafers by combining AI analysis with high-precision camera multispectral detection; detecting the internal structure of the solder joints of the packaged wafers by combining AI technology with terahertz imaging and X-ray, and identifying defects such as cavities, cracks and welding quality; performing electrical detection on the packaged wafers by using flexible probes, and intelligently locating faults in combination with AI; simulating thermal cycle tests under extreme temperature changes, and monitoring thermal stress in real time; and simulating multiple reflow soldering processes by optimizing temperature curves and atmosphere control by using AI.The application integrates advanced detection technologies and intelligent means, improves the detection accuracy and sorting efficiency of wafer packaging, reduces production costs, and provides strong data support for continuous improvement.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing and detection, and in particular to an automated wafer packaging detection and sorting system. Background Art

[0002] Wafer packaging is a critical step in the semiconductor manufacturing process, directly impacting chip performance and reliability. As integrated circuits become more complex, issues such as solder joint quality, surface defects, and internal structural integrity within wafer packaging become more prominent. Traditional manual inspection and sorting are inefficient and lack precision, failing to meet the modern semiconductor industry's requirements for high yield, precision, and automation.

[0003] Therefore, there is an urgent need for an efficient automated system that can quickly and accurately perform quality inspection and intelligent sorting after wafer packaging is completed, especially in terms of solder joint detection, electrical performance detection, surface defect detection, etc. At the same time, AI technology can be used to further optimize the detection and sorting strategies to ensure the improvement of product quality and production efficiency, and meet the semiconductor industry's demand for efficient and high-reliability packaging. Summary of the Invention

[0004] In view of the above existing problems, the present invention is proposed.

[0005] Therefore, the present invention provides an automated wafer packaging detection and sorting system to solve the problem of automated detection and intelligent sorting after wafer packaging.

[0006] In order to solve the above technical problems, the present invention provides the following technical solutions:

[0007] In a first aspect, the present invention provides an automated wafer packaging detection and sorting system, which comprises:

[0008] Surface inspection module, used to detect surface defects of packaged wafers through high-precision camera multispectral detection combined with AI analysis;

[0009] Wafer package solder joint inspection module, which uses terahertz imaging and X-ray combined with AI technology to inspect the internal structure of packaged wafer solder joints and identify voids, cracks, and welding quality defects;

[0010] The electrical inspection module is used to perform electrical inspection on packaged wafers using flexible probes and intelligently locate faults using AI.

[0011] Thermal cycle detection module, used to simulate extreme temperature changes to perform thermal cycle tests and monitor thermal stress in real time;

[0012] Reflow soldering test module, which uses AI to optimize temperature curves and atmosphere control to simulate multiple reflow soldering processes;

[0013] The sorting strategy acquisition module is used to obtain AI-driven sorting strategies by collecting detection data, extracting key sorting features, and training classification models;

[0014] Wafer sorting module, which is used to automatically sort wafers with high precision using a flexible robot based on wafer packaging inspection results and AI-driven sorting strategies;

[0015] The data analysis and storage module is used to store wafer packaging inspection results and perform historical data analysis.

[0016] As a preferred solution of the automated wafer packaging inspection and sorting system of the present invention, the surface defects of the packaged wafers are detected by high-precision camera multispectral detection combined with AI analysis. The specific steps are as follows:

[0017] After the packaged wafer is placed on the inspection platform, a high-precision camera performs multispectral scanning on the packaged wafer surface to obtain multispectral image data;

[0018] Multispectral image data were denoised and enhanced using Gaussian filtering and histogram equalization;

[0019] Extracting feature information of the packaged wafer surface from the denoised and enhanced multispectral image data through edge detection, threshold segmentation, and feature point location methods;

[0020] The convolutional neural network is trained by multispectral image data of a large number of known well-packaged wafers and poorly packaged wafers to obtain a wafer multispectral recognition convolutional neural network.

[0021] The wafer multispectral recognition convolutional neural network combines the feature information of the packaged wafer surface to obtain the detection results of the packaged wafer surface.

[0022] As a preferred solution of the automated wafer packaging detection and sorting system of the present invention, wherein: terahertz imaging and X-ray detection are performed, the specific steps are as follows:

[0023] Terahertz imaging equipment detects the surface structure of packaged wafer solder joints and extracts morphological information of the solder joints;

[0024] X-ray inspection equipment analyzes the inside of solder joints to identify voids, cracks, and other weld quality defects;

[0025] The packaged wafer is placed in a terahertz imaging device and an X-ray detection device for scanning to obtain terahertz imaging and X-ray data.

[0026] As a preferred scheme of the automatic wafer packaging detection and sorting system, the internal structure of the packaged wafer solder joint is detected based on terahertz imaging and X-ray data combined with AI technology, and the specific steps are as follows,

[0027] The terahertz imaging and X-ray data are labeled to obtain a labeled training data set;

[0028] The labeled training data set is trained by a convolutional neural network through supervised learning, and a solder joint detection AI technology is obtained;

[0029] The terahertz imaging and X-ray data are fused, and the solder joint detection AI technology is combined to obtain the solder joint detection result of the packaged wafer.

[0030] As a preferred scheme of the automatic wafer packaging detection and sorting system, the internal structure of the packaged wafer solder joint is detected based on terahertz imaging and X-ray data combined with AI technology, and the specific steps are as follows,

[0031] A programmable flexible probe array is composed of a plurality of flexible probes that automatically adjust position and pressure through electronic control;

[0032] The programmable flexible probe array contacts each electrical contact of the packaged wafer to detect the resistance, voltage, current, impedance, conductivity, leakage current, capacitance, frequency response and noise of each electrical contact of the packaged wafer;

[0033] The resistance, voltage, current, impedance, conductivity, leakage current, capacitance, frequency response and noise of each electrical contact are used as electrical parameters;

[0034] Feature dimension reduction is performed by principal component analysis, and a support vector machine with a radial basis function kernel is used for training to obtain a fault location AI;

[0035] The fault location AI analyzes the electrical parameters to intelligently locate the fault and determine the specific area where the problem occurs, and obtains the electrical detection result of the packaged wafer.

[0036] As a preferred scheme of the automatic wafer packaging detection and sorting system, the internal structure of the packaged wafer solder joint is detected based on terahertz imaging and X-ray data combined with AI technology, and the specific steps are as follows,

[0037] The packaged wafer is placed in a thermal cycle test device, and the temperature change range and cycle number are set;

[0038] The temperature is simulated to change alternately, and the stress change data in each cycle is recorded by a strain gauge in real time.

[0039] After completing the thermal cycle test, the packaged wafers are subjected to surface inspection, solder joint inspection, and electrical inspection again to obtain the thermal cycle test results of the packaged wafers.

[0040] As a preferred solution of the automated wafer packaging detection and sorting system of the present invention, AI is used to optimize the temperature curve and atmosphere control to simulate multiple reflow soldering processes. The specific steps are as follows:

[0041] Collect a large amount of historical data covering different types of wafers and their optimal welding parameters, use this historical data on optimal welding parameters to train a neural network and obtain an AI algorithm for temperature curves;

[0042] Based on the type and size of the wafer package, the temperature curve AI algorithm analyzes historical welding data to generate the optimal temperature curve;

[0043] Using the generated optimal temperature curve, simulate the reflow process in a simulation environment;

[0044] During the reflow soldering process, the soldering temperature is monitored in real time through a temperature sensor, and the atmosphere control is dynamically adjusted according to the real-time monitored soldering temperature;

[0045] The real-time welding temperature curve and welding results of each welding are recorded, and the surface inspection, solder joint inspection and electrical inspection are performed again on the packaged wafer after the reflow soldering simulation is completed to obtain the reflow soldering simulation results of the packaged wafer.

[0046] As a preferred solution of the automated wafer packaging inspection and sorting system of the present invention, wherein: by collecting inspection data, extracting key sorting features and training classification models, an AI-driven sorting strategy is obtained. The specific steps are as follows:

[0047] Collecting inspection results of the packaged wafer surface, inspection results of the packaged wafer solder joints, electrical inspection results of the packaged wafer, thermal cycle test results of the packaged wafer, and reflow soldering simulation results of the packaged wafer as inspection data;

[0048] Extracting defect type features, defect location features, defect size features, and defect severity features from the inspection results of the packaged wafer surface;

[0049] Extract void size features, crack depth features, solder distribution features, and solder defect severity level features from the solder joint inspection results of packaged wafers;

[0050] Extract short circuit locations, open circuit locations, and high resistance area locations from the electrical inspection results of packaged wafers as key features for sorting electrical inspection results;

[0051] Extract stress variation curve characteristics, stress distribution characteristics and stress extreme value characteristics from the thermal cycle test results of packaged wafers;

[0052] Extract soldering defect features from reflow soldering simulation results of packaged wafers;

[0053] Based on the collected detection data and extracted features, information gain is used as the feature selection criterion, and cost-complexity pruning is adopted to train the decision tree to obtain an AI-driven sorting strategy.

[0054] As a preferred solution of the automated wafer packaging inspection and sorting system of the present invention, the wafer sorting module is used to automatically sort wafers with high precision through a flexible manipulator based on the wafer packaging inspection results and AI-driven sorting strategy. The specific steps are as follows:

[0055] The flexible manipulator combines high-precision cameras, torque sensors, distance sensors, tactile sensors, and suction cups to determine the specific position and arrangement of packaged wafers after inspection. The flexible manipulator control unit automatically adjusts the gripping force and angle.

[0056] Classify and sort packaged wafers based on AI-driven sorting strategies and flexible robotic arms;

[0057] Adjust sorting strategies in real time to accommodate different defect types and packaged wafer characteristics.

[0058] As a preferred solution of the automated wafer packaging detection and sorting system of the present invention, the specific steps of storing detection data and performing historical data analysis are as follows:

[0059] Format the test data and upload it to the cloud platform through the data transmission protocol and API interface;

[0060] Integrate big data analysis and storage capabilities on the cloud platform;

[0061] Use big data analysis to conduct trend analysis on test data and obtain trend analysis results;

[0062] The trend analysis results are combined with existing visualization tools for visual display.

[0063] The beneficial effects of the present invention are as follows: by integrating advanced optical detection, electrical testing and artificial intelligence technologies, all-round, high-precision and high-speed quality inspection and intelligent sorting of packaged wafers are achieved. The system can effectively identify quality problems such as poor solder joints, surface defects, and internal structural abnormalities, significantly improving the accuracy and efficiency of detection and reducing errors caused by manual operations. At the same time, with the help of AI algorithms to conduct in-depth analysis of detection data, the detection parameters and sorting strategies can be automatically adjusted to optimize the production process, improve the yield rate, and reduce waste generation. In addition, the system is highly flexible and scalable, can adapt to the packaging needs of wafers of different specifications and types, supports a multi-variety small-batch production model, provides strong technical support for semiconductor manufacturers, and helps promote technological progress and industrial upgrading in the entire industry. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0065] Figure 1 This is a system diagram of the automated wafer packaging detection and sorting system in Example 1.

[0066] Figure 2 This is a diagram of the structure of the wafer packaging solder joint detection module in Example 1. DETAILED DESCRIPTION

[0067] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0068] In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0069] Secondly, the term "one embodiment" or "embodiment" herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in various places throughout this specification does not necessarily refer to the same embodiment, nor does it refer to a separate or selective embodiment that is mutually exclusive of other embodiments.

[0070] Example 1, with reference to Figure 1 and Figure 2, which is the first embodiment of the present invention, provides an automated wafer packaging inspection and sorting system, including a surface inspection module, a surface inspection module, an electrical inspection module, a thermal cycle inspection module, a reflow soldering test module, a sorting strategy acquisition module, a wafer sorting module and a data analysis and storage module.

[0071] The surface inspection module is used to detect surface defects of packaged wafers through high-precision camera multispectral detection combined with AI analysis; the solder joint inspection module is used to use terahertz imaging and X-rays combined with AI technology to detect the internal structure of packaged wafer solder joints; the electrical inspection module is used to perform electrical inspection on packaged wafers through flexible probes, and intelligent fault location is performed in combination with AI; the thermal cycle inspection module is used to simulate extreme temperature changes for thermal cycle testing and monitor thermal stress in real time; the reflow soldering test module is used to use AI to optimize temperature curves and atmosphere control to simulate multiple reflow soldering processes; the sorting strategy acquisition module is used to obtain AI-driven sorting strategies by collecting inspection data, extracting key sorting features, and training classification models; the wafer sorting module is used to automatically sort wafers with high precision through a flexible robot based on the wafer packaging inspection results and AI-driven sorting strategies; the data analysis and storage module is used to store wafer packaging inspection results and perform historical data analysis.

[0072] Specifically, by integrating automated logistics and intelligent scheduling, the packaged wafers are automatically obtained from the packaging equipment and warehouse, including the following steps:

[0073] The system monitors the output of packaged wafers from the wafer packaging equipment and the inventory of packaged wafers in the warehouse in real time, and uses a scheduling algorithm based on priority scheduling rules for intelligent scheduling. Furthermore, it continuously and in real time monitors the output data of the packaging equipment to determine the time and quantity of each wafer batch completed. It also monitors the inventory status of packaged wafers stored in the warehouse to ensure the accuracy of information such as the quantity, type, and location of wafers in the warehouse. Based on the priority of different wafer batches (such as wafers that require urgent testing or wafers with high production volume), the scheduling algorithm determines which wafers should be transported to the inspection area first. The scheduling algorithm determines the order and path of logistics based on production plans, testing capabilities, and the importance or urgency of the wafers.

[0074] It should be noted that packaging equipment is used to package manufactured semiconductor wafers. Packaging refers to the physical encapsulation of the wafer and external interconnects to ensure mechanical and electrical performance. Priority scheduling rules determine the order in which tasks are executed based on their urgency, importance, inventory status, and other factors. For example, wafers with urgent orders receive a higher priority.

[0075] After the wafer packaging equipment completes packaging of wafers, it is transported to the warehouse through automated logistics. Furthermore, after the packaging equipment completes packaging of wafers, automated logistics uses tools such as conveyor belts, automatic guided vehicles (AGVs), and robotic arms to transfer the packaged wafers from the production line to the warehouse for temporary storage without human intervention.

[0076] It should be noted that automated logistics refers to the use of automated equipment (such as automated transport systems and robotic handling) to handle and deliver materials or products, reducing manual intervention and improving efficiency. The warehouse is the storage area for packaged wafers and features environmental control and automated management to ensure safe storage and rapid retrieval.

[0077] Based on the intelligent scheduling results, automated logistics extracts the packaged wafers from the warehouse and sends them to the inspection area.

[0078] It should be noted that after wafers are transported to the inspection area, automated logistics accurately place them on the inspection platform, preparing them for subsequent inspection operations. The inspection platform is a workbench used to place wafers and perform various inspection operations. The inspection platform is typically equipped with an automatic alignment device to ensure that the wafer remains stable during the inspection process.

[0079] Specifically, high-precision camera multispectral detection combined with AI analysis is used to detect surface defects of packaged wafers, including the following steps:

[0080] After the packaged wafer is placed on the inspection platform, a high-precision camera performs a multispectral scan of the packaged wafer surface to obtain multispectral image data. Furthermore, after the packaged wafer is placed on the inspection platform, the high-precision camera is automatically calibrated to ensure that the focal length, angle, and exposure time are appropriate for the specific wafer type and size to avoid image blur and overexposure. The packaged wafer surface is then scanned multispectrally to obtain multispectral image data.

[0081] It should be noted that multispectral scanning refers to the use of multiple wavelengths of light to image the surface of an object, typically including visible, infrared, and ultraviolet light, to capture detailed features across different spectrums. High-precision cameras, with their high resolution, can accurately capture minute surface details, making them suitable for demanding applications such as industrial inspection.

[0082] Multispectral image data is denoised and enhanced using Gaussian filtering and histogram equalization. Furthermore, upon receiving the multispectral image data, the image preprocessing process automatically begins, processing each image individually. Gaussian filtering is applied sequentially to each band. The filter's standard deviation and window size are dynamically adjusted based on the complexity of the wafer surface texture and the image noise level, ensuring that important details are preserved while removing noise. Histogram equalization is then applied to each denoised image to enhance image contrast. The equalization process automatically adjusts to the image's grayscale distribution, ensuring that image details, such as surface defects, are more clearly visible.

[0083] It should be noted that Gaussian filtering is a commonly used image processing technique. By smoothing an image using a Gaussian function, it can effectively remove noise while preserving edge information. Histogram equalization is an image enhancement technique that adjusts the grayscale distribution of an image, increasing its contrast and making details stand out more clearly. Denoising is the use of image processing techniques to reduce noise in an image, improving its quality and clarity. Enhancement refers to making key features more prominent by adjusting the image's contrast, brightness, and other factors.

[0084] Using edge detection, threshold segmentation, and feature point location, feature information of the packaged wafer surface is extracted from the denoised and enhanced multispectral image data. Furthermore, the image being used must be a multispectral image processed using Gaussian filtering and histogram equalization. Canny edge detection is performed on each channel (e.g., visible light, infrared, and ultraviolet) in the multispectral image to extract the edge contour of the wafer surface. After edge extraction for all channels, the system merges the edge information from different spectral bands. This process uses weighted averaging to ensure that edge information from all bands is fully utilized, forming a comprehensive edge map. The threshold segmentation operation first uses an adaptive thresholding method to dynamically adjust the threshold based on local image features. Based on the adaptive threshold, pixels in the image are divided into foreground and background, resulting in binarized foreground and background regions. Connected domain analysis is performed on the binarized foreground region to identify interconnected regions. Feature point detection is performed on the binarized foreground region using SIFT (Scale-Invariant Feature Transform). After initially detecting feature points, filtering is performed based on their intensity and local contrast, retaining the most significant and likely defect-representing features. Interpolation and morphological operations are also used to enhance the visibility of feature points. The coordinates, size, and orientation of each feature point are recorded to form a feature point set. Each feature point is associated with its corresponding edge information and connected region information.

[0085] It should be noted that SIFT (Scale-Invariant Feature Transform) is suitable for complex surface feature extraction and can find key points at different scales, especially suitable for detecting defects of different sizes in the surface.

[0086] A wafer multispectral recognition convolutional neural network is obtained by training a convolutional neural network with a large amount of known good packaged wafer and bad packaged wafer multispectral image data. Further, a large number of packaged wafer samples, including good packaged and bad packaged wafers, are obtained from the production line. Each sample obtains multispectral image data through multispectral scanning. The multispectral image of the bad packaged wafer is labeled using a labeling tool to mark the location, category and severity of the defect. These labeled data will be used as labels for the neural network to guide the model to learn how to distinguish between good wafers and bad wafers. The data set is divided into a training set, a validation set and a test set. The training set is used for model training, the validation set is used for parameter tuning and overfitting prevention, and the test set is used for the performance of the convolutional neural network model on unseen data. The cross-entropy loss function is used as the objective function of the convolutional neural network model. The Adam optimizer (adaptive momentum optimizer) is used to update the parameters of the convolutional neural network model. After training, a wafer multispectral recognition convolutional neural network is obtained.

[0087] The wafer multispectral recognition convolutional neural network combines the feature information of the packaged wafer surface to obtain the detection result of the packaged wafer surface. Further, the feature information of the packaged wafer surface is input into the wafer multispectral recognition convolutional neural network, and then the wafer multispectral recognition convolutional neural network locates the defect area according to the activation map for the bad packaged wafer, marks the defect location using a bounding box or contour line, and attaches the defect category (such as crack, scratch, etc.). A detection report is generated, including the wafer state (good packaging or bad packaging), the defect type (if there is a defect, the type of the defect is listed), and the defect location (the specific coordinates or area of the defect on the wafer).

[0088] Using terahertz imaging combined with X-ray and AI technology, the internal structure of the packaged wafer solder joint is detected, and voids, cracks and solder quality defects are identified, including the following steps,

[0089] The terahertz imaging device detects the surface structure of the packaged wafer solder joint and extracts the shape information of the solder joint. Further, the packaged wafer is placed in the terahertz imaging device, which emits terahertz waves and receives reflected waves to scan the surface structure of the wafer solder joint. By analyzing the reflected signals, the shape information of the solder joint is extracted, such as solder joint contour, surface defects (such as protrusions, depressions), etc.

[0090] The X-ray detection device analyzes the internal structure of the solder joint and identifies voids, cracks and solder quality defects. Further,

[0091] The packaged wafer is placed in a terahertz imaging device and an X-ray inspection device for scanning, generating terahertz imaging and X-ray data. Furthermore, the packaged wafer is placed in an X-ray inspection device, which uses X-rays to penetrate the solder joints and obtain internal structural information. The device detects X-ray attenuation and identifies defects such as voids and cracks within the solder joints. Using 3D imaging technology, a detailed internal structure diagram of the solder joint is generated, enabling analysis of solder quality and identifying potential structural issues.

[0092] Terahertz imaging and X-ray data are annotated to generate a labeled training dataset. Furthermore, key features of solder joints, such as surface defects, internal voids, and cracks, are annotated in the terahertz and X-ray data. Each data sample is labeled to indicate the defect type or weld quality, generating a labeled training dataset for AI model training.

[0093] Through supervised learning, a convolutional neural network was trained on a labeled training dataset using deep learning to develop AI technology for solder joint detection. Furthermore, labeled terahertz and X-ray datasets were fed into the convolutional neural network for supervised learning model training. The convolutional neural network automatically learned the characteristics of solder joint surface morphology and internal defects, associating these features with labels. Through multiple rounds of iteration and adjustment of network parameters, an AI model capable of detecting solder joint defects was ultimately developed, demonstrating high accuracy and reliability.

[0094] By fusing terahertz imaging and X-ray data and integrating them with AI solder joint inspection technology, solder joint inspection results for packaged wafers are obtained. Furthermore, terahertz imaging and X-ray data are integrated using multimodal fusion technology and combined with a previously trained solder joint inspection AI model to perform inference analysis on the new data. Based on the input multimodal data, the AI ​​model automatically identifies surface and internal defects in solder joints and outputs solder joint inspection results, including defect type, location, and a solder quality assessment report.

[0095] It should be noted that terahertz imaging is a non-contact, non-destructive imaging technology that uses the terahertz band (a frequency range of approximately 0.1 to 10 THz, between microwaves and infrared light) to detect the internal or surface structure of an object. Due to the high penetrating power of terahertz waves (capable of penetrating certain non-metallic materials such as plastics, ceramics, and semiconductors), it is widely used in areas such as inspecting electronic devices and packaged wafers. In wafer solder joint inspection, terahertz imaging can effectively capture surface morphological information of solder joints, such as surface cracks and unevenness, providing detailed data on the surface structure for solder joint inspection.

[0096] Specifically, electrical testing of packaged wafers is performed using flexible probes, and intelligent fault location is performed using AI, including the following steps:

[0097] A programmable flexible probe array consists of multiple flexible probes whose position and pressure are automatically adjusted through electronic control. Furthermore, the flexible probe array consists of multiple electronically controlled probes that automatically adjust their position and contact pressure as needed. The probes are made of flexible material, ensuring they can adapt to package wafers of varying shapes. Using a programmable controller, the probes can precisely align with the wafer's electrical contacts, ensuring stable contact across a wide range of package sizes and formats.

[0098] A programmable flexible probe array contacts each electrical contact on a packaged wafer, probing its resistance, voltage, current, impedance, conductivity, leakage current, capacitance, frequency response, and noise. Furthermore, the packaged wafer is placed at the flexible probe array's probing position, and the probes automatically align with the wafer's electrical contacts. The probe array precisely controls each probe, ensuring it contacts the corresponding electrical contact. It then detects and measures multiple key electrical parameters, including resistance, voltage, current, impedance, conductivity, leakage current, capacitance, frequency response, and noise. The probing process collects data in real time and transmits it to a processing unit.

[0099] The electrical parameters include resistance, voltage, current, impedance, continuity, leakage current, capacitance, frequency response and noise of each electrical connection.

[0100] Principal component analysis is used to reduce feature dimensionality, and a support vector machine (SVM) with a radial basis function (RBF) kernel is trained to generate a fault location AI. Furthermore, to simplify complex electrical parameter datasets, principal component analysis is first used to reduce the data dimensionality, retaining the most representative features and removing redundant information. Next, the reduced features are fed into a support vector machine (SVM) with a RBF kernel for training. Through supervised learning, the SVM learns to identify fault patterns, ultimately generating an AI model capable of detecting and locating faults.

[0101] Fault location AI analyzes electrical parameters for intelligent fault location, pinpointing the specific problem area and obtaining electrical test results for the packaged wafer. Furthermore, during the inference phase, the fault location AI analyzes the newly measured electrical parameters. Based on the characteristic patterns of the electrical parameters, the AI ​​model identifies potential faults and locates the specific fault area. These analysis results, including fault type and location, ultimately output the wafer's electrical test results, helping to inform further decisions, such as whether rework or repackaging is necessary.

[0102] It should be noted that the radial basis function (RBF) kernel-based support vector machine (SVM) is a powerful machine learning algorithm, particularly adept at handling nonlinear classification problems. SVMs separate data from different categories by finding the optimal decision boundary (hyperplane). The RBF kernel is a commonly used kernel function that maps input data from the original space to a high-dimensional feature space, making previously linearly inseparable data separable in the high-dimensional space. The RBF kernel's advantage lies in its ability to handle complex patterns and boundaries, making it suitable for high-dimensional data. It also excels in classification and fault detection of nonlinear features such as electrical parameters.

[0103] Specifically, the thermal cycle test simulates extreme temperature changes and monitors thermal stress in real time, including the following steps:

[0104] The packaged wafers are placed in a thermal cycler, with the temperature range and number of cycles set. Furthermore, the packaged wafers are placed in the thermal cycler, with the upper and lower temperature limits and number of cycles set. The temperature range typically simulates the extremes of actual use, such as from very low temperatures (-40°C) to very high temperatures (+125°C). The number of cycles determines how many times the wafer undergoes the heating and cooling cycles. Once the settings are complete, the equipment automatically begins the thermal cycle test.

[0105] To simulate extreme temperature fluctuations, the device alternates between heating and cooling. Strain gauges are used to monitor stress changes in the wafer during these temperature changes in real time, recording stress change data for each cycle. Furthermore, during thermal cycling testing, the device alternates between heating and cooling, simulating temperature fluctuations in extreme environments. Strain gauges are connected to monitor stress changes in the wafer during these temperature changes in real time. During each temperature cycle, the strain gauges record stress distribution and changes within the wafer, particularly stress changes in solder joints and packaging structures. This data is used to assess the impact of thermal cycling on the wafer's structural integrity.

[0106] After thermal cycling, the packaged wafers undergo surface inspection, solder joint inspection, and electrical inspection to obtain the thermal cycling test results. Furthermore, after thermal cycling, the wafers are removed from the equipment and subjected to multiple inspections. First, a surface inspection is performed to check for any visual damage or package cracks. Next, solder joint inspection is performed to check the solder joint morphology and internal structure for damage due to thermal stress. Finally, electrical inspection measures parameters such as resistance, voltage, and leakage current of the electrical contacts to ensure that their electrical performance has not degraded due to thermal cycling. Finally, a thermal cycling test result report is output.

[0107] It should be noted that thermal cycling testing is designed to assess the reliability and structural integrity of packaged wafers under extreme temperature fluctuations. By simulating real-world extreme temperature environments (such as repeated cycling from low to high temperatures), the aging process of wafer packaging materials and solder joints can be accelerated in a short period of time, revealing potential structural problems and defects. Real-time monitoring of wafer stress changes during temperature fluctuations using strain gauges provides a comprehensive understanding of the response of the package and solder joints under thermal stress, particularly detecting problems such as solder cracking and package damage. Subsequent surface inspection, solder joint inspection, and electrical testing help confirm that the wafer maintains functional integrity after thermal cycling. The importance of this test lies in its ability to identify potential failure modes in advance, ensuring the reliability and lifespan of the wafer in actual use environments, helping to improve product quality and reduce the risk of failure.

[0108] Specifically, AI is used to optimize the temperature curve and atmosphere control to simulate multiple reflow soldering processes, including the following steps:

[0109] A large amount of historical data covering different wafer types and their optimal soldering parameters is collected. This data is used to train a neural network and develop an AI algorithm for temperature curves. Furthermore, historical data on optimal soldering parameters for different wafer types, including heating time, temperature, and atmosphere, is collected. This data is fed into the neural network for training, allowing it to learn the optimal matching relationship between wafer type and soldering parameters. This generates an AI algorithm model capable of predicting the optimal temperature curve, ensuring the accuracy and reliability of the soldering process.

[0110] Based on the type and size of the wafer package, the temperature curve AI algorithm analyzes historical welding data to generate an optimal temperature curve. Furthermore, after inputting the type and size information of the packaged wafer, the temperature curve AI algorithm analyzes historical welding data to generate an optimal temperature curve. This curve contains specific temperature control parameters for each stage of heating, maintaining a constant temperature, and cooling, ensuring optimal temperature distribution and time control during the welding process, achieving high-quality welding.

[0111] Using the generated optimal temperature profile, simulate the reflow soldering process in a simulation environment. Furthermore, the generated optimal temperature profile is imported into the simulation environment to simulate the temperature changes during the soldering process. Precisely controlling the heating and cooling processes based on the temperature profile simulates the actual reflow soldering environment and behavior, allowing assessment of temperature management during the soldering process and early identification of potential soldering defects.

[0112] During the reflow soldering process, temperature sensors monitor the soldering temperature in real time and dynamically adjust the atmosphere control based on this real-time monitoring. Furthermore, during the actual reflow soldering process, temperature sensors monitor changes in soldering temperature in real time. If the temperature deviates from the set range, the system automatically adjusts the atmosphere control based on the sensor data, such as adjusting the gas flow rate or gas composition, to ensure that the soldering temperature always meets the optimal temperature curve, thus avoiding poor soldering or defects.

[0113] The real-time soldering temperature curve and soldering results for each soldering session are recorded. Surface inspection, solder joint inspection, and electrical inspection are then performed again on the packaged wafer after the reflow soldering simulation to obtain the reflow soldering simulation results for the packaged wafer. Through surface inspection, solder joint inspection, and electrical inspection, the soldering results during the reflow soldering simulation are confirmed and a reflow soldering results report for the wafer is output.

[0114] It should be noted that the wafer soldering process is optimized using AI algorithms to improve soldering quality and efficiency. By collecting large amounts of historical data, neural networks can learn the optimal soldering parameters for different wafer types and generate personalized optimal temperature curves. This ensures that temperature distribution and control time are optimal during the reflow soldering process, avoiding soldering defects. In addition, simulation and real-time temperature monitoring in the simulated environment can identify potential problems in advance and further optimize soldering conditions by dynamically adjusting atmosphere control. Ultimately, a combination of surface, solder joint, and electrical testing ensures that the quality of the wafers after soldering meets standards. Through the application of AI and data-driven feedback iteration, the overall process improves soldering accuracy, reduces defect rates, and optimizes the production process.

[0115] Specifically, by collecting detection data, extracting key sorting features and training classification models, an AI-driven sorting strategy is obtained, which includes the following steps:

[0116] The inspection results of the packaged wafer surface, the packaged wafer solder joint inspection results, the packaged wafer electrical inspection results, the packaged wafer thermal cycle test results and the packaged wafer reflow soldering simulation results are collected as inspection data.

[0117] Defect type, location, size, and severity characteristics are extracted from the surface inspection results of packaged wafers. Furthermore, the wafer surface inspection results are analyzed to extract relevant characteristic information about surface defects. This includes defect type (e.g., cracks, scratches), precise coordinates of defect location, defect size (e.g., length, width), and severity (minor, moderate, or severe), providing critical data for surface quality assessment.

[0118] Void size features, crack depth features, solder distribution features, and solder defect severity features are extracted from the solder joint inspection results of packaged wafers. Furthermore, the solder joint inspection data is processed to extract relevant features of solder defects. These include void size (such as diameter or volume), crack depth and length, solder distribution uniformity, and solder defect severity (such as minor or severe). These features are used to assess solder joint quality and its impact on wafer function.

[0119] From the electrical inspection results of packaged wafers, the locations of short circuits, opens, and high-resistance areas are extracted as key features for sorting the electrical inspection results. Furthermore, the electrical inspection results are analyzed to extract key feature information, including the specific locations of short circuits, precise locations of opens, and locations of high-resistance areas. These features can effectively identify failed electrical contacts and assess their impact on the wafer's overall electrical performance, helping to determine whether the wafer is acceptable.

[0120] From the thermal cycling test results of packaged wafers, stress variation curve features, stress distribution features, and stress extreme value features are extracted. Furthermore, stress-related features are extracted from the thermal cycling test data. These include the stress variation curve morphology, which reveals the wafer's stress response to temperature fluctuations; stress distribution features, which indicate areas of stress concentration; and stress extreme value features, which reflect the maximum stress values. These features allow the impact of thermal cycling on the wafer structure to be assessed.

[0121] Extract soldering defect signatures from reflow soldering simulation results of packaged wafers. Furthermore, analyze the reflow soldering simulation results to extract defect signatures generated during the soldering process. These signatures include the type, size, and distribution of defects such as incomplete solder melting, solder joint offset, and solder cracks. These signatures help assess soldering process stability and solder joint reliability, ensuring soldering quality meets requirements.

[0122] Based on the collected inspection data and extracted features, information gain is used as the feature selection criterion, and cost-complexity pruning is employed to train a decision tree to obtain an AI-driven sorting strategy. Furthermore, information gain is used to filter the extracted features to select the most valuable features for wafer sorting. Subsequently, a decision tree model is trained based on these filtered features, and cost-complexity pruning is used to optimize the model to avoid overfitting. Ultimately, an AI-driven sorting strategy is generated to automatically determine whether a wafer is qualified or not.

[0123] It should be noted that by collecting multiple inspection results from packaged wafers, key defect-related features such as surface defects, solder joint quality, and electrical performance are extracted. Information gain is used to select the most valuable features, and an AI-driven sorting strategy is generated through a decision tree model. The significance of this is that through data-driven automated analysis, sorting efficiency and accuracy are improved, ensuring more accurate and reliable wafer quality control, reducing human intervention and errors in the production process, and improving the automation level of the entire production line.

[0124] Specifically, based on the wafer packaging inspection results and AI-driven sorting strategy, a flexible robot is used to automatically sort wafers with high precision, including the following steps:

[0125] The flexible robot arm combines with high-precision cameras, torque sensors, distance sensors, tactile sensors and suction cups to determine the specific position and arrangement of the packaged wafers after inspection, and automatically adjusts the gripping force and angle through the flexible robot arm control unit.

[0126] Based on AI-driven sorting strategies and a flexible robotic arm, packaged wafers are categorized and sorted. Furthermore, the flexible robotic arm automatically performs sorting tasks based on the AI-driven sorting strategy. Based on the defect types identified by the AI ​​and the wafer inspection results, the robotic arm sorts the wafers into different sorting areas, such as qualified, rejected, or those awaiting further inspection. The robotic arm's flexible design ensures it can adapt to wafers of varying sizes and shapes, ensuring efficient and accurate sorting operations.

[0127] Sorting strategies are adjusted in real time to accommodate different defect types and packaged wafer characteristics. Furthermore, during the sorting process, sorting strategies are dynamically adjusted based on real-time detected defect types and wafer characteristics (such as size, material, and packaging method). The flexible robot adjusts its movements and paths based on the updated sorting strategy, ensuring adaptive sorting of wafers with different defect types, thereby improving sorting accuracy and efficiency.

[0128] It should be noted that through the combination of AI and sensor technology, an efficient and automated sorting process has been achieved, which can adapt to the characteristics of different wafers, reduce human operation errors, improve sorting accuracy and production efficiency, and ensure product quality consistency.

[0129] Specifically, storing test data and performing historical data analysis includes the following steps:

[0130] Format the test data and upload it to the cloud platform via data transmission protocols and APIs. Furthermore, the raw data obtained from various tests is formatted and standardized into a compatible standard format. This formatted data is uploaded to the cloud platform via pre-defined data transmission protocols (such as HTTP, MQTT, etc.) and APIs, ensuring the security and integrity of data transmission and preparing for subsequent analysis and storage.

[0131] Integrate big data analysis and storage functions on the cloud platform. Furthermore, the cloud platform integrates a big data analysis module and a storage module. The storage module is responsible for long-term storage of uploaded test data and provides an efficient query access interface. The big data analysis module processes massive amounts of data, supporting complex data mining, statistical analysis, and machine learning model training, providing technical support for trend analysis.

[0132] Big data analytics is used to analyze test data trends and generate trend analysis results. Furthermore, big data analysis is performed on test data uploaded to the cloud platform to identify patterns and changing trends. By analyzing test results over different time periods, we assess trends in wafer packaging, soldering, and electrical performance, predict potential quality issues or areas for improvement, and generate trend analysis results for user reference.

[0133] Trend analysis results are combined with existing visualization tools for visual display. Furthermore, trend analysis results from big data analysis can be combined with visualization tools (such as charts and dashboards) to generate intuitive visualizations. This graphical interface displays trends, anomalies, and predictions in the detected data, helping users quickly understand the underlying issues and trends, supporting decision-making and process optimization.

[0134] In summary, the present invention realizes all-round, high-precision, high-speed quality inspection and intelligent sorting of packaged wafers by integrating advanced optical inspection, electrical testing and artificial intelligence technologies. The system can effectively identify quality problems such as poor solder joints, surface defects, and internal structural abnormalities, significantly improving the accuracy and efficiency of inspection and reducing errors caused by manual operation. At the same time, with the help of AI algorithms to conduct in-depth analysis of inspection data, it can automatically adjust inspection parameters and sorting strategies, optimize production processes, improve yield rates, and reduce waste generation. In addition, the system is highly flexible and scalable, can adapt to the packaging needs of wafers of different specifications and types, supports a multi-variety small-batch production model, provides strong technical support for semiconductor manufacturers, and helps promote technological progress and industrial upgrading in the entire industry.

[0135] Example 2, referring to Table 1, is the second embodiment of the present invention. In order to further verify the technical solution of the present invention, experimental simulation data of an automated wafer packaging detection and sorting system is provided.

[0136] The system, using integrated automated logistics and intelligent scheduling modules, automatically retrieves packaged wafers from the warehouse and transports them to the inspection area. High-precision cameras perform multispectral scans of the wafer surface, using AI technology to identify surface defects such as cracks and scratches. Next, terahertz imaging and X-ray inspection equipment, combined with AI technology, inspect the internal structure of the solder joints for defects such as voids and cracks. A flexible probe array then performs electrical testing on the wafers, measuring key electrical parameters such as resistance and voltage. AI-powered fault location tools identify shorts and opens. Furthermore, the wafers are placed in a thermal cycling tester with a set temperature range (-40°C to +125°C) and a set number of cycles (500). Strain gauges monitor the stress distribution of the wafers in real time during temperature changes. Finally, using AI-optimized temperature profiles and atmosphere control, the wafers undergo multiple reflow soldering simulations, monitoring the soldering temperature in real time and dynamically adjusting the atmosphere based on sensor data to ensure defect-free soldering.

[0137] Throughout the experiment, the system automatically performed sorting tasks. AI-driven sorting strategies, combined with various test data, automatically determined whether wafers were qualified or not. Flexible robotic arms then sorted the wafers into different sorting areas, such as qualified, rejected, or those awaiting further inspection. All test data and sorting results were stored and uploaded to a cloud platform for historical data analysis.

[0138] The details are shown in Table 1 below:

[0139] Table 1 Wafer packaging inspection and sorting system experimental data table

[0140]

[0141] The above experimental data clearly demonstrate the innovation and advantages of the automated wafer packaging inspection and sorting system of the present invention in the inspection and sorting process.

[0142] In surface defect detection, the system effectively identified surface defects such as scratches and cracks on wafers A, C, D, and F, with significantly better accuracy than traditional manual detection methods. Secondly, in solder joint detection, the solder joint voids and crack depths of wafers C and F far exceeded those of other samples, indicating that the system can effectively identify internal solder defects through terahertz imaging and X-ray detection, and that the deep learning capabilities of AI technology greatly improve the accuracy of detection and the efficiency of defect identification. In addition, the electrical detection results of the flexible probe show that the resistance and voltage data of wafers A, C, and F deviate from the normal range, especially the resistance of wafer F reaches 0.3Ω, indicating that there may be electrical faults. The system quickly locates the problem area through the AI intelligent fault location tool.

[0143] In thermal cycle testing, the stress data monitored by the system shows that the maximum stress values of wafers C and F are higher (150MPa and 160MPa respectively), significantly higher than those of other samples, and after 500 thermal cycles, the defects on the surface and solder joints of wafers C and F are further aggravated, and they are finally judged to be unqualified. Compared to traditional manual detection and sorting methods, the system can comprehensively and automatically detect the surface, solder joints, electrical performance, and other aspects of wafers, and achieve high-precision sorting through AI-driven strategies, greatly improving production efficiency, reducing human error, and providing more accurate quality control for wafers, demonstrating the inventiveness and novelty of the invention.

[0144] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present application and not to limit it. Although the present application has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present application can be modified or replaced by equivalents without departing from the spirit and scope of the present application, and they should be included in the scope of the claims of the present application.

Claims

1. An automated wafer packaging inspection and sorting system, characterized by: include, Surface inspection module, used to detect surface defects of packaged wafers through high-precision camera multispectral detection combined with AI analysis; The solder joint inspection module is used to detect the internal structure of packaged wafer solder joints using terahertz imaging and X-ray combined with AI technology; The electrical inspection module is used to perform electrical inspection on packaged wafers using flexible probes and intelligently locate faults using AI. Thermal cycle detection module, used to simulate extreme temperature changes to perform thermal cycle tests and monitor thermal stress in real time; Reflow soldering test module, which uses AI to optimize temperature curves and atmosphere control to simulate multiple reflow soldering processes; The sorting strategy acquisition module is used to obtain AI-driven sorting strategies by collecting inspection data, extracting key sorting features, and training classification models; Wafer sorting module, which is used to automatically sort wafers with high precision using a flexible robot based on wafer packaging inspection results and AI-driven sorting strategies; Data analysis and storage module, used to store wafer packaging inspection results and perform historical data analysis; The packaged wafers are electrically inspected using flexible probes and intelligently located using AI. The specific steps are as follows: A programmable flexible probe array is composed of multiple flexible probes that automatically adjust their positions and pressures through electronic control; A programmable flexible probe array contacts each electrical contact of the packaged wafer to detect resistance, voltage, current, impedance, conductivity, leakage current, capacitance, frequency response and noise of each electrical contact of the packaged wafer; Resistance, voltage, current, impedance, conductivity, leakage current, capacitance, frequency response and noise of each electrical contact as electrical parameters; Perform feature dimensionality reduction through principal component analysis and train a support vector machine using a radial basis function kernel to obtain fault location AI. Fault location AI analyzes electrical parameters, performs intelligent fault location, identifies the specific area where the problem occurs, and obtains electrical test results for packaged wafers.

2. The automated wafer packaging inspection and sorting system according to claim 1, wherein: Through high-precision camera multispectral detection combined with AI analysis, the surface defects of packaged wafers are detected. The specific steps are as follows: After the packaged wafer is placed on the inspection platform, a high-precision camera performs multispectral scanning on the packaged wafer surface to obtain multispectral image data; Multispectral image data were denoised and enhanced using Gaussian filtering and histogram equalization; Extracting feature information of the packaged wafer surface from the denoised and enhanced multispectral image data through edge detection, threshold segmentation, and feature point location methods; The convolutional neural network is trained by multispectral image data of a large number of known well-packaged wafers and poorly packaged wafers to obtain a wafer multispectral recognition convolutional neural network. The wafer multispectral recognition convolutional neural network combines the feature information of the packaged wafer surface to obtain the detection results of the packaged wafer surface.

3. The automated wafer packaging inspection and sorting system according to claim 2, wherein: To perform terahertz imaging and X-ray detection, the specific steps are as follows: Terahertz imaging equipment detects the surface structure of packaged wafer solder joints and extracts morphological information of the solder joints; X-ray inspection equipment analyzes the inside of solder joints to identify voids, cracks, and other weld quality defects; The packaged wafer is placed in a terahertz imaging device and an X-ray detection device for scanning to obtain terahertz imaging and X-ray data.

4. The automated wafer packaging inspection and sorting system according to claim 3, wherein: Based on terahertz imaging and X-ray data combined with AI technology, the internal structure of the packaged wafer solder joints is detected. The specific steps are as follows: Annotate terahertz imaging and X-ray data to obtain labeled training datasets; Through supervised learning, a convolutional neural network is used to perform deep learning training on a labeled training data set to obtain AI technology for solder joint detection. The terahertz imaging and X-ray data are fused and combined with solder joint detection AI technology to obtain the solder joint detection results of packaged wafers.

5. The automated wafer packaging inspection and sorting system according to claim 4, wherein: Simulate extreme temperature changes to conduct thermal cycle tests and monitor thermal stress in real time. The specific steps are as follows: Place the packaged wafer in a thermal cycle test device and set the temperature range and number of cycles; Simulate extreme temperature changes by alternating between heating and cooling. Use strain gauges to monitor the stress changes in the wafer during temperature changes in real time, and record the stress change data in each cycle. After completing the thermal cycle test, the packaged wafers are subjected to surface inspection, solder joint inspection, and electrical inspection again to obtain the thermal cycle test results of the packaged wafers.

6. The automated wafer packaging inspection and sorting system according to claim 5, wherein: AI is used to optimize the temperature curve and atmosphere control to simulate multiple reflow soldering processes. The specific steps are as follows: Collect a large amount of historical data covering different types of wafers and their optimal welding parameters, use this historical data on optimal welding parameters to train a neural network and obtain an AI algorithm for temperature curves; Based on the type and size of the wafer package, the temperature curve AI algorithm analyzes historical welding data to generate the optimal temperature curve; Using the generated optimal temperature curve, simulate the reflow process in a simulation environment; During the reflow soldering process, the soldering temperature is monitored in real time through a temperature sensor, and the atmosphere control is dynamically adjusted according to the real-time monitored soldering temperature; The real-time welding temperature curve and welding results of each welding are recorded, and the surface inspection, solder joint inspection and electrical inspection are performed again on the packaged wafer after the reflow soldering simulation is completed to obtain the reflow soldering simulation results of the packaged wafer.

7. The automated wafer packaging inspection and sorting system according to claim 6, wherein: By collecting detection data, extracting key sorting features, and training classification models, we can obtain AI-driven sorting strategies. The specific steps are as follows: Collecting inspection results of the packaged wafer surface, inspection results of the packaged wafer solder joints, electrical inspection results of the packaged wafer, thermal cycle test results of the packaged wafer, and reflow soldering simulation results of the packaged wafer as inspection data; Extracting defect type features, defect location features, defect size features, and defect severity features from the inspection results of the packaged wafer surface; Extract void size features, crack depth features, solder distribution features, and solder defect severity level features from the solder joint inspection results of packaged wafers; Extract short circuit locations, open circuit locations, and high resistance area locations from the electrical inspection results of packaged wafers as key features for sorting electrical inspection results; Extract stress variation curve characteristics, stress distribution characteristics and stress extreme value characteristics from the thermal cycle test results of packaged wafers; Extract soldering defect features from reflow soldering simulation results of packaged wafers; Based on the collected detection data and extracted features, information gain is used as the feature selection criterion, and cost-complexity pruning is adopted to train the decision tree to obtain an AI-driven sorting strategy.

8. The automated wafer packaging inspection and sorting system according to claim 7, wherein: According to the wafer packaging inspection results and AI-driven sorting strategy, the flexible robot is used to automatically sort the wafers with high precision. The specific steps are as follows: The flexible manipulator combines high-precision cameras, torque sensors, distance sensors, tactile sensors, and suction cups to determine the specific position and arrangement of packaged wafers after inspection. The flexible manipulator control unit automatically adjusts the gripping force and angle. Classify and sort packaged wafers based on AI-driven sorting strategies and flexible robotic arms; Adjust sorting strategies in real time to accommodate different defect types and packaged wafer characteristics.

9. The automated wafer packaging inspection and sorting system according to claim 8, wherein: Store test data and perform historical data analysis. The specific steps are as follows: Format the test data and upload it to the cloud platform through the data transmission protocol and API interface; Integrate big data analysis and storage capabilities on the cloud platform; Use big data analysis to conduct trend analysis on test data and obtain trend analysis results; The trend analysis results are combined with existing visualization tools for visual display.

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