Modeling of multi-level etch process

Abstract

Methods, systems, and computer software are disclosed for predicting post-etch profiles of features at different depths. A method may include accessing a post-development resist profile of a feature. The method may also include applying an etch bias model on the post-development resist profile to obtain a post-etch profile, wherein the etch bias model correlates the etch bias with the etch depth.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. application 63 / 400,973, filed on August 25, 2022, and is incorporated herein by reference in its entirety. Technical Field

[0003] The description herein generally relates to multi-level etching processes. More specifically, the present disclosure includes apparatus, methods, and computer programs for performing and modeling multi-level etching processes. Background Art

[0004] A lithographic projection apparatus may be used, for example, in the manufacture of integrated circuits (ICs). In this case, a patterning device (e.g., a mask) may contain or provide a pattern corresponding to an individual layer of the IC (a "design layout"), and the pattern may be transferred to a target portion (e.g., including one or more dies) on a substrate (e.g., a silicon wafer) that has been coated with a layer of radiation-sensitive material ("resist") by methods such as irradiating the target portion through the pattern on the patterning device. Typically, a single substrate contains multiple adjacent target portions, and the lithographic projection apparatus transfers the pattern to the multiple adjacent target portions continuously, one target portion at a time. In one type of lithographic projection apparatus, the pattern on the entire patterning device is transferred to one target portion at a time; such an apparatus may also be referred to as a stepper. In an alternative apparatus, a stepping and scanning apparatus may cause the projection beam to scan over the patterning device in a given reference direction (the "scanning" direction) while causing the substrate to be synchronously moved parallel or antiparallel to the reference direction. Different portions of the pattern on the patterning device are gradually transferred to one target portion. Typically, since the lithographic projection apparatus will have a reduction ratio M (eg 4), the speed F at which the substrate is moved will be 1 / M times the speed at which the projection beam scans the patterning device.More information on lithographic apparatus can be found, for example, in US 6,046,792, which is incorporated herein by reference.

[0005] Before the pattern is transferred from the patterned device to the substrate, the substrate can undergo various processes, such as priming, resist coating and soft baking. After exposure, the substrate can be subjected to other processes ("post-exposure processes"), such as post-exposure baking (PEB), development, hard baking and measurement / inspection of the transferred pattern. This series of processes is used as the basis for making individual layers of the device (e.g., IC). The substrate can then undergo various processes, such as etching, ion implantation (doping), metallization, oxidation, chemical mechanical polishing, etc., all of which are intended to complete the individual layers of the device. If several layers are required in the device, the entire process or a variation thereof is repeated for each layer. Ultimately, the device will be present in each target portion on the substrate. These devices are then separated from each other by techniques such as cutting or sawing, whereby the individual devices can be mounted on a carrier, connected to pins, etc.

[0006] Therefore, manufacturing equipment (such as semiconductor equipment) generally involves using multiple manufacturing processes to process a substrate (e.g., a semiconductor wafer) to form various features and multiple layers of the equipment. Such layers and features are generally manufactured and processed using, for example, deposition, lithography, etching, chemical mechanical polishing, and ion implantation. Multiple devices can be made on multiple dies on a substrate, and then the multiple devices are separated into individual devices. The equipment manufacturing process can be considered a patterning process. The patterning process involves a patterning step, such as optical and / or nanoimprint lithography using a patterning device in a lithography apparatus to transfer the pattern on the patterned device to the substrate, and generally but optionally involves one or more related pattern processing steps, such as resist development by a developing device, baking the substrate using a baking tool, etching using a pattern using an etching device, etc.

[0007] As noted, photolithography is a central step in the manufacture of devices such as ICs, where patterns formed on a substrate define the functional elements of a device such as a microprocessor, memory chip, etc. Similar photolithography techniques are also used in the formation of flat panel displays, microelectromechanical systems (MEMS), and other devices.

[0008] As semiconductor manufacturing processes have continued to advance, the size of functional elements has continued to decrease, while the number of functional elements (such as transistors) per device has steadily increased over the decades, following a trend known as "Moore's Law." In the current state of the art, the layers of a device are manufactured using a lithography projection apparatus that projects a design layout onto a substrate using illumination from a deep ultraviolet illumination source, thereby creating individual functional elements with a size much smaller than 100 nm, i.e., less than half the wavelength of the radiation from the illumination source (e.g., a 193 nm illumination source).

[0009] According to the resolution formula CD = k1 × λ / NA, where λ is the wavelength of the radiation employed (e.g., 248 nm or 193 nm), NA is the numerical aperture of the projection optics in the lithographic projection apparatus, CD is the "critical dimension" - typically the minimum feature size printed - and k1 is an empirical resolution factor, the process of printing features whose size is smaller than the classical resolution limit of the lithographic projection apparatus can be referred to as low k1 lithography. In general, the smaller the k1, the more difficult it becomes to reproduce a pattern on a substrate that resembles the shape and size planned by the designer in order to achieve specific electrical functions and performance. In order to overcome these difficulties, complex fine-tuning steps are applied to the lithographic projection apparatus, the design layout, or the patterning device. These include, for example, but are not limited to, optimization of NA and optical coherence settings, customized illumination schemes, the use of phase-shifted patterning equipment, optical proximity correction (OPC, sometimes also referred to as "optical and process correction") in the design layout, or other methods generally defined as "resolution enhancement technology" (RET). The term "projection optics" as used herein should be broadly interpreted to cover various types of optical systems, including, for example, refractive optics, reflective optics, apertures, and catadioptric optics. The term "projection optics" may also include components operating according to any of these design types for collectively or individually directing, shaping, or controlling a projection radiation beam. The term "projection optics" may include any optical component in a lithographic projection apparatus, regardless of where the optical component is located in the optical path of the lithographic projection apparatus. Projection optics may include optical components for shaping, adjusting, and / or projecting radiation from a source before the radiation passes through a patterning device, and / or optical components for shaping, adjusting, and / or projecting radiation after the radiation passes through a patterning device. Projection optics typically do not include a source and a patterning device. Summary of the invention

[0010] A system, method, and computer software for predicting a post-etch profile of a feature at different depths are disclosed. In one aspect, a method includes: accessing a post-development resist profile of a feature; and applying an etch bias model on the post-development resist profile to obtain a post-etch profile, wherein the etch bias model relates etch bias to etch depth.

[0011] In some variations, the etch bias can be related to the etch depth based on the lateral position of the feature. The post-development resist profile can be a predicted resist profile, and the etch bias model can include a term indicating a convolution of a mask and a filter that calculates the etch depth. The post-etch profile can be a post-etch CD. Determining the post-development resist profile can include applying the resist model to a patterning device.

[0012] In some variations, determining the etch depth may be based on a distance of the feature from a reference position of a step feature mask. The step feature mask may indicate the location of the feature, and determining the etch depth includes convolving the step formation mask and the filter, the convolution generating a depth map, the depth map representing the depth at the location of the feature.

[0013] In some variations, the method may further include calibrating the etch bias model by determining a coefficient that modifies the convoluted etch bias contribution, the coefficient being calculated based on gauge data having etch bias values ​​for the feature at its corresponding depth. The gauge data may be CD and / or EP gauge data for the feature. The coefficient may be calculated using a linear solver to fit the measurement of the printed feature on the printed wafer.

[0014] In some variations, the method may include calculating an etch deviation using an etch deviation model, the etch deviation representing a displacement of a feature from a target feature position, and the post-etch profile is generated using the etch deviation. The filter may be a square filter or a multi-Gaussian filter.

[0015] In some variations, the etch bias model can be a machine learning model trained using gauge data, the method further comprising calculating an etch bias using the machine learning model, the etch bias representing a displacement of a feature from a target feature location, the predicted post-etch profile being generated using the etch bias. The machine learning model can be a convolutional neural network, and the filter can be a convolutional neural network filter including a weight for representing an etch depth at a location of the feature. The machine learning model can be trained using measurements of training features from printed wafers.

[0016] In an interrelated aspect, there may be a non-transitory computer-readable medium having recorded thereon instructions for predicting a post-etch profile of a feature at different depths, the instructions causing operations when executed by a computer having at least one programmable processor, including any of the operations in the above method embodiments.

[0017] In an interrelated aspect, there may be a system for predicting a post-etch profile of a feature at different depths, the system comprising: at least one programmable processor; and a non-transitory computer-readable medium having instructions recorded thereon, which when executed by a computer having at least one programmable processor causes operations including any of the operations in the above method embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate certain aspects of the subject matter disclosed herein and, together with the description, help explain some of the principles associated with the disclosed implementations.

[0019] Figure 1 A block diagram of various subsystems of a lithographic projection apparatus according to an embodiment of the present disclosure is shown.

[0020] Figure 2 An exemplary flow chart for simulating lithography in a lithography projection apparatus according to one embodiment of the present disclosure is shown.

[0021] Figure 3 An exemplary portion of a structure etched in step formation according to one embodiment of the present disclosure is shown.

[0022] Figure 4 An exemplary feature narrowing with depth in step formation is shown according to one embodiment of the present disclosure.

[0023] Figure 5 An exemplary depth dependency of a feature based on its lateral position in a design layout is shown according to one embodiment of the present disclosure.

[0024] Figure 6 An exemplary depth map based on the location of features in a patterning device is shown according to one embodiment of the present disclosure.

[0025] Figure 7 An exemplary process flow for generating a simulation feature incorporating etch bias according to one embodiment of the present disclosure is shown.

[0026] Figure 8 An exemplary process flow for generating simulation features using a machine learning model according to one embodiment of the present disclosure is shown.

[0027] Fig. 9 An exemplary filter for use with a machine learning model according to one embodiment of the present disclosure is shown.

[0028] Fig.10 is a block diagram of an example computer system according to one embodiment of the present disclosure.

[0029] Fig.11 is a schematic diagram of a lithography projection device according to an embodiment of the present disclosure.

[0030] Fig.12 is a schematic diagram of another lithography projection device according to an embodiment of the present disclosure.

[0031] Fig.13 is a detailed view of a lithography projection apparatus according to one embodiment of the present disclosure.

[0032] Fig.14is a detailed view of a source collector module of a lithographic projection apparatus according to one embodiment of the present disclosure. DETAILED DESCRIPTION

[0033] Although specific reference may be made to the manufacture of ICs in this text, it should be clearly understood that the description herein has many other possible applications. For example, it can be employed in the manufacture of integrated optical systems, guidance and detection patterns for magnetic domain memories, liquid crystal display panels, thin film magnetic heads, etc. The skilled person will understand that in the context of such alternative applications, any use of the terms "reticle", "wafer" or "die" in this text should be considered interchangeable with the more general terms "mask", "substrate" and "target portion", respectively.

[0034] In this document, the terms "radiation" and "beam" are used to cover all types of electromagnetic radiation, including ultraviolet radiation (e.g., having a wavelength of 365nm, 248nm, 193nm, 157nm or 126nm) and EUV (extreme ultraviolet radiation, e.g., having a wavelength in the range of about 5nm-100nm).

[0035] The patterned device may include or may form one or more design layouts. The design layout may be generated using a CAD (computer-aided design) program, a process commonly referred to as EDA (electronic design automation). Most CAD programs follow a set of predetermined design rules in order to generate a functional design layout / patterned device. These rules are set by process and design constraints. For example, the design rules define the spatial tolerance between devices (such as gates, capacitors, etc.) or interconnects to ensure that the devices or lines do not interact with each other in an undesirable manner. One or more of the design rule constraints may be referred to as a "critical dimension" (CD). The critical dimension of a device may be defined as the minimum width of a line or hole or the minimum space between two lines or two holes. Therefore, CD determines the overall size and density of the designed device. Of course, one of the goals in device fabrication is to faithfully reproduce the original design intent on a substrate (via a patterned device).

[0036] The term "mask" or "patterning device" as employed herein may be broadly interpreted as referring to a general patterning device that can be used to impart to an incident radiation beam a patterned cross-section corresponding to the pattern to be produced in a target portion of a substrate; the term "light valve" may also be used in this context. In addition to classical masks (transmissive or reflective; binary, phase-shifting, hybrid, etc.), other examples of such patterning devices include programmable mirror arrays and programmable LCD arrays.

[0037] An example of a programmable mirror array may be a matrix-addressable surface having a viscoelastic control layer and a reflective surface. The basic principle behind such a device is that (for example) addressed areas of the reflective surface reflect incident radiation as diffracted radiation, while non-addressed areas reflect incident radiation as undiffracted radiation. Using a suitable filter, the undiffracted radiation can be filtered out of the reflected beam, leaving only the diffracted radiation; in this way, the beam is patterned according to the addressing pattern of the matrix-addressable surface. The desired matrix addressing can be performed using appropriate electronic methods.

[0038] One example of a programmable LCD array is given in US Pat. No. 5,229,872, which is incorporated herein by reference.

[0039] Figure 1 A block diagram of various subsystems of a lithographic projection apparatus 10A according to one embodiment of the present disclosure is shown. The main components are: a radiation source 12A, which may be a deep ultraviolet excimer laser source or other type of source, including an extreme ultraviolet (EUV) source (as discussed above, the lithographic projection apparatus itself need not have a radiation source), illumination optics, such as those that define partial coherence (denoted as σ) and that may include optics 14A, 16Aa, and 16Ab that shape the radiation from source 12A; a patterning device 18A; and a transmission optic 16Ac that projects an image of the patterning device pattern onto a substrate plane 22A. An adjustable filter or aperture 20A at a pupil plane of the projection optics may limit the range of beam angles incident on the substrate plane 22A, where the maximum possible angle defines the numerical aperture NA of the projection optics = n sin (Θ max ), where n is the refractive index of the medium between the substrate and the last element of the projection optics, and θ max is the maximum angle of the beam emerging from the projection optics that can still be incident on the substrate plane 22A.

[0040] In a lithographic projection apparatus, a source provides irradiation (i.e., radiation) to a patterning device, and projection optics directs and shapes the irradiation onto a substrate via the patterning device. Projection optics may include at least some of components 14A, 16Aa, 16Ab, and 16Ac. An aerial image (AI) is a distribution of radiation intensity at the substrate level. A resist model may be used to calculate a resist image from an aerial image, an example of which may be found in U.S. Patent Application Publication No. US2009-0157630, the disclosure of which is incorporated herein by reference in its entirety. The resist model is only related to the properties of the resist layer (e.g., the effects of chemical processes occurring during exposure, post-exposure baking (PEB), and development). The optical properties of the lithographic projection apparatus (e.g., the properties of irradiation, patterning devices, and projection optics) indicate an aerial image and may be defined in an optical model. Since the patterning device used in the lithographic projection apparatus may be changed, it is desirable to separate the optical properties of the patterning device from the optical properties of the rest of the lithographic projection apparatus including at least a source and projection optics. Details of techniques and models for transforming a design layout into various lithographic images (e.g., aerial images, resist images, etc.), using those techniques and models to apply OPC and evaluate performance (e.g., in terms of process window) are described in U.S. Patent Application Publication Nos. US2008-0301620, 2007-0050749, 2007-0031745, 2008-0309897, 2010-0162197, and 2010-0180251, the disclosures of each of which are incorporated herein by reference in their entirety.

[0041] One aspect of understanding the lithography process is understanding the interaction of radiation and patterning devices. The electromagnetic field of the radiation after it passes through the patterning device can be determined based on the electromagnetic field of the radiation before the radiation reaches the patterning device and a function that characterizes the interaction. This function can be called a mask transfer function (which can be used to describe the interaction of a transmissive patterning device and / or a reflective patterning device).

[0042] The mask transfer function can have various different forms. One form is binary. A binary mask transfer function has either of two values ​​(e.g., zero and a positive constant) at any given position on a patterned device. A mask transfer function in binary form may be referred to as a binary mask. Another form is continuous. That is, the absolute value of the transmittance (or reflectance) of the patterned device is a continuous function of the position on the patterned device. The phase of the transmittance (or reflectance) may also be a continuous function of the position on the patterned device. A mask transfer function in continuous form may be referred to as a continuous tone mask or a continuous transmission mask (CTM). For example, a CTM may be represented as a pixelated image, where each pixel may be assigned a value between 0 and 1 (e.g., 0.1, 0.2, 0.3, etc.), rather than a binary value of 0 or 1. In one embodiment, a CTM may be a pixelated grayscale image, where each pixel has a value (e.g., a value in the range [-255, 255], a normalized value in the range [0, 1] or [-1, 1] or other suitable range).

[0043] The thin mask approximation, also known as Kirchhoff boundary conditions, is widely used to simplify the determination of the interaction of radiation and patterned devices. The thin mask approximation assumes that the thickness of the structures on the patterned device is very small compared to the wavelength, and the width of the structures on the mask is very large compared to the wavelength. Therefore, the thin mask approximation assumes that the electromagnetic field after the patterned device is the product of the incident electromagnetic field and the mask transfer function. However, as the lithography process uses radiation of shorter and shorter wavelengths, and the structures on the patterned device become smaller and smaller, the assumption of the thin mask approximation may be violated. For example, due to the finite thickness of the structure (such as the edge between the top surface and the sidewall) ("mask 3D effect" or "M3D"), the interaction of radiation with the structure may become significant. Including this scattering in the mask transfer function can enable the mask transfer function to better capture the interaction of radiation with the patterned device. The mask transfer function under the thin mask approximation can be referred to as a thin mask transfer function. The mask transfer function that includes M3D can be referred to as an M3D mask transfer function.

[0044] According to one embodiment of the present disclosure, one or more images may be generated. The image includes various types of signals that may be characterized by a pixel value or an intensity value of each pixel. Depending on the relative value of the pixels within the image, the signal may be referred to as, for example, a weak signal or a strong signal, as may be understood by a person of ordinary skill in the art. The terms "strong" and "weak" are relative terms based on the intensity values ​​of the pixels within the image, and the specific value of the intensity may not limit the scope of the present disclosure. In one embodiment, strong and weak signals may be identified based on a selected threshold. In one embodiment, the threshold may be fixed (e.g., the midpoint of the highest intensity and the lowest intensity of the pixels within the image). In one embodiment, a strong signal may refer to a signal having a value greater than or equal to the average signal value across the image, while a weak signal may refer to a signal having a value less than the average signal value. In one embodiment, the relative intensity value may be based on a percentage. For example, a weak signal may be a signal having an intensity less than 50% of the highest intensity of the pixels within the image (e.g., a pixel corresponding to a target pattern may be considered to be a pixel with the highest intensity). In addition, each pixel within the image may be considered to be a variable. According to the present embodiment, a derivative or partial derivative may be determined with respect to each pixel within the image, and the value of each pixel may be determined or modified based on an evaluation based on a cost function and / or a gradient-based calculation of a cost function. For example, a CTM image may include pixels, each of which is a variable that may take any real value.

[0045] Figure 2 An exemplary flow chart for simulating lithography in a lithography projection apparatus according to an embodiment of the present disclosure is shown. A source model 31 represents the optical properties of a source (including radiation intensity distribution and / or phase distribution). A projection optics model 32 represents the optical properties of the projection optics (including changes in radiation intensity distribution and / or phase distribution caused by the projection optics). A design layout model 35 represents the optical properties of a design layout (including changes in radiation intensity distribution and / or phase distribution caused by a design layout 33), which is a representation of the arrangement of features on or formed by a patterning device. From the design layout model 35, the projection optics model 32, and the design layout model 35, an aerial image 36 can be simulated. A resist image 38 can be simulated from the aerial image 36 using a resist model 37. The simulation of lithography can, for example, predict the shape and CD in the resist image.

[0046] More specifically, note that the source model 31 can represent the optical properties of the source, including but not limited to the numerical aperture setting, the illumination σ (σ) setting, and any specific illumination shape (e.g., off-axis radiation sources such as toroidal, quadrupole, dipole, etc.). The projection optics model 32 can represent the optical properties of the projection optics, including aberrations, distortions, one or more refractive indices, one or more physical sizes, one or more physical dimensions, etc. The design layout model 35 can represent one or more physical properties of a physical patterning device, as described, for example, in U.S. Patent No. 7,587,704, which is incorporated by reference in its entirety. The purpose of the simulation is to accurately predict, for example, edge placement, aerial image intensity slope, and / or CD, which can then be compared to the intended design. The intended design is typically defined as a pre-OPC design layout that can be provided in a standardized digital file format such as GDSII or OASIS or other file format.

[0047] From the design layout, one or more portions, referred to as "snippets," may be identified. In one embodiment, a set of snippets are extracted that represent complex patterns in the design layout (typically about 50 to 1000 snippets, although any number of snippets may be used). These patterns or snippets represent small portions of the design (i.e., circuits, cells, or patterns), and more specifically, snippets typically represent small portions that require special attention and / or verification. In other words, a snippet may be a portion of the design layout, or may be similar to or have similar behavior to a portion of the design layout, where one or more key features are identified through experience (including snippets provided by customers), through trial and error, or by running full-chip simulations. A snippet may contain one or more test patterns or gauge patterns.

[0048] An initial larger set of segments may be provided a priori by the customer based on one or more known key feature areas in the design layout that require specific image optimization. Alternatively, in another embodiment, an initial larger set of segments may be extracted from the entire design layout using some automatic (such as machine vision) or manual algorithm that identifies one or more key feature areas.

[0049] In a lithographic projection apparatus, as an example, the cost function can be expressed as

[0050]

[0051] where (z1, z2, …, z N ) are N design variables or their values. p (z1,z2,…,z N ) can be the design variables (z1, z2, …, z N ), such as the design variables (z1, z2, …, zN ) is the difference between the actual and expected values ​​of a characteristic for a set of values. p is with f p (z1,z2,…,z N ) is a weight constant associated with the edge of the pattern. For example, the characteristic may be the position of the edge of the pattern measured at a given point on the edge. p (z1,z2,…,z N ) can have different weights w p For example, if a particular edge has a narrow range of allowed positions, then f, which represents the difference between the actual position of the edge and the expected position, p (z1,z2,…,z N )’s weight w p Can be given higher values. f p (z1,z2,…,z N ) can also be a function of the interlayer characteristics, which in turn are the design variables (z1, z2, ..., z N ). Of course, CF(z1, z2, …, z N ) is not limited to the form in equation 1. CF(z1, z2, ..., z N ) may be in any other suitable form.

[0052] The cost function may represent any one or more suitable characteristics of the lithographic projection apparatus, the lithographic process, or the substrate, such as focus, CD, image offset, image distortion, image rotation, random variation, throughput, local CD variation, process window, inter-layer characteristics, or a combination thereof. In one embodiment, the design variables (z1, z2, ..., z N ) includes one or more selected from dose, global bias of the patterning device, and / or shape of the irradiation. Since the resist image is generally indicative of a pattern on the substrate, the cost function may include a function representing one or more characteristics of the resist image. For example, fp(z1, z2, ..., z N ) can simply be the distance between a point in the resist image and the expected position of that point (i.e., the edge placement error EPE p (z1,z2,…,z N )). Design variables can include any adjustable parameters, such as adjustable parameters of the source, patterning device, projection optics, dose, focus, etc.

[0053] The lithographic apparatus may include components collectively referred to as "wavefront manipulators", which can be used to adjust the shape of the wavefront and the intensity distribution and / or phase shift of the radiation beam. In one embodiment, the lithographic apparatus can adjust the wavefront and intensity distribution at any position along the optical path of the lithographic projection apparatus, such as before the patterning device, near the pupil plane, near the image plane, and / or near the focal plane. The wavefront manipulator can be used to correct or compensate for certain distortions of the wavefront and intensity distribution and / or phase shift caused by, for example, temperature changes in the source, patterning device, lithographic projection apparatus, thermal expansion of components of the lithographic projection apparatus, etc. Adjusting the wavefront and intensity distribution and / or phase shift can change the value of the characteristic represented by the cost function. This change can be simulated from a model or actually measured. The design variables may include parameters of the wavefront manipulator.

[0054] Design variables can have constraints, which can be expressed as (z1, z2, ..., z N )∈Z, where Z is a set of possible values ​​for the design variables. One possible constraint on the design variables may be imposed by the desired throughput of the lithographic projection apparatus. In the absence of such a constraint imposed by the desired throughput, the optimization may produce a set of values ​​for the design variables that are unrealistic. For example, if dose is the design variable, in the absence of such a constraint, the optimization may produce dose values ​​that make the throughput economically impossible. However, the usefulness of the constraint should not be interpreted as a requirement. For example, throughput may be affected by the pupil fill ratio. For some irradiation designs, a low pupil fill ratio may discard radiation, resulting in lower throughput. Throughput may also be affected by the resist chemistry. Slower resists (e.g., resists that require a higher amount of radiation to be properly exposed) result in lower throughput.

[0055] As used herein, the term "patterning process" means a process of producing etching of a substrate by applying light in a designated pattern as part of a photolithography process.

[0056] As used herein, the term "patterning device" may refer to an actual physical mask that affects / blocks incident light during a lithography process, but may also refer to a mathematical / analog construction of such a mask. For example, a patterning device may be an analog resist mask, where the features of the resist mask are adjusted / optimized by various processes as described herein.

[0057] As used herein, the term "target pattern" means an idealized pattern to be etched on a substrate.

[0058] As used herein, the term "print pattern" means a physical pattern on a substrate formed based on a design layout. The print pattern may include, for example, vias, contact holes, grooves, channels, recesses, edges, or other two-dimensional and three-dimensional features produced by a photolithography process.

[0059] As used herein, the term "process model" refers to a model that includes one or more models that simulate a patterning process. For example, a process model may include any combination of an optical model (e.g., a lens system / projection system used to deliver light during a lithography process, and may include modeling the final optical image of light reaching the photoresist), a mask model, a resist model (e.g., a physical effect on the resist, such as a chemical effect due to light, is modeled), an OPC model (e.g., a design layout may be performed and may include sub-resolution resist features (SRAFs), etc.), an imaging device model (e.g., a model of what an imaging device can image from a printed pattern).

[0060] As used herein, the term "imaging device" means any number of devices and associated computer hardware and software or a combination of such devices and associated computer hardware and software that can be configured to generate an image of a target (such as a printed pattern or portion thereof). Non-limiting examples of imaging devices may include: a scanning electron microscope (SEM), an X-ray machine, etc.

[0061] As used herein, the term "calibration" means to modify (eg, improve or fine-tune) and / or validate, such as a process model.

[0062] Figure 3 An exemplary portion of a structure etched in step formation according to one embodiment of the present disclosure is shown. In some lithography manufacturing processes, features such as lines, vias, etc. can be formed from conductive materials to form printed patterns such as for integrated circuits or computer memories. Such features can be printed at one or more levels, where one level is above another, and some of the features are connected between levels to form a three-dimensional printed pattern. A specific example of such a three-dimensional printed pattern can be found in NAND memory. Although the present disclosure is discussed using structures similar to those found in NAND memory, the concepts described herein can be used in any other application that can include printing complex three-dimensional structures.

[0063] Figure 3 A simplified depiction of a structure 310 having a step formation is shown. A structure having layers that have been removed in stages by an etching process 302 (eg, plasma etching or chemical etching) using a step formation mask 300 may be formed. Figure 3The structure 310 depicted in FIG. 3 has four layers 312, 314, 316, 318, where each layer has, for example, a conductive layer 320 (e.g., a tungsten layer) and an oxide layer 330 (e.g., a silicon oxide layer). The final step in creating the structure 310 is shown by moving the step formation mask to a location that blocks portion 304a (e.g., a portion of the oxide layer), thereby causing material 304b to be removed.

[0064] Figure 4 An exemplary feature that narrows with depth in step formation is shown according to one embodiment of the present disclosure. Figure 3 , once the step formation is formed, the structure 310 can be filled with additional oxide 330 to replace the material removed during the step formation process. A patterning device (e.g., step feature mask 400) having patterns 402, 404, 406, 408 can then be utilized to form features 412, 414, 416, 418 (e.g., contact holes or vias as generally depicted herein) by etching into the oxide down to a particular conductive layer.

[0065] Due to the small sizes involved, it may be important that some dimensions are close to the dimensional specifications that can be stated for the target pattern. An example of such a dimension may include the distance between adjacent features. A dimension between feature 412 and feature 414 is Figure 4 416, 418). As can be seen, at relatively shallow locations, the dimensions at the depth shown can be very close to the corresponding dimensions at the surface of structure 310, which in turn can be close to the specifications of the target pattern. In contrast, since some etching processes remove less material when etching deeper features (e.g., features 416, 418), the dimensions 430 between such features can significantly deviate from the dimensions set forth by the target pattern. However, in some embodiments, more material can be removed at deeper locations, thus acting to widen the features as the depth increases. When such deviations can be accurately predicted, any such deviations can be taken into account by optimizing the manufacturing process, including, for example, determining an optimized patterning device (e.g., a resist mask). Moreover, although the present disclosure shows only a few layers, in more practical applications, such structures can have dozens or even hundreds of layers, and therefore, the process of determining the effects of etching at various depths can be computationally expensive.

[0066] Figure 5 FIG. 3 shows an exemplary depth dependency of a feature based on its lateral position in a design layout according to one embodiment of the present disclosure. Figure 4 Reappearance, where Figure 5Also shown is a step feature mask 410 having features 402, 404, 406, 408. Predicting the post-etch profile of the feature at different depths can include accessing the post-development resist profile of the feature (e.g., a predicted or measured wafer resist profile). The resist profile can be determined by simulating the lithography process of a given specific patterning device (e.g., performing resist modeling as described herein). The resist profile can also be generated by measurements using optical or charged particle metrology or inspection devices. Embodiments of the present disclosure include applying an etching model (e.g., an etching bias model) on the post-development resist profile to obtain a post-etch profile, wherein the etching bias model relates the etching bias to the etching depth. For example, the post-etch profile can be the post-etch CD. Therefore, determining the post-development resist profile can include applying the resist model to the patterning device. As can be seen from the line drawn representing the depth 540, the depth dependence (or correlation) can be linear, although other mathematical forms of dependence are also contemplated as further described herein. This depth correlation can then be built into a model for determining or optimizing an etching process, a resist mask, etc. The model can be an etch model, an etch bias model, a machine learning model, or a non-machine learning model.

[0067] Figure 6 An exemplary depth map based on the location of features in a patterning device according to one embodiment of the present disclosure is shown. In some embodiments, the patterning device may include a step feature mask 400 that indicates the location of features at different levels of a step formation (as shown in structure 310). Figure 6 In the example of , determining the etch depth may include convolving a mask (e.g., step feature mask 300) with a filter 620, which produces a depth map 630 that represents the depth at the location of the feature. The depth map 630 is depicted by increasing shading from left to right, as would typically be produced by convolution with a constant value filter of the type illustrated by filter 620. For illustrative purposes, the locations of features 402-408 are shown where they would be relative to the step feature mask 300, and how the size of the features decreases at corresponding locations on the depth map 630 is also shown. The etch deviation can be related to the etch depth based on the lateral position (e.g., such as a distance 640) of the feature from a reference position 650 (e.g., an edge) of a patterning device (e.g., step feature mask 400. For Figure 6, the filter can be a square filter that produces a linear convolution that can represent a linear depth dependency. As used herein, "square" means a square function, for example, a two-term Heaviside step function, where the filter: is 0 outside the boundary and is 1 inside. Therefore, the term "square" does not mean that a square filter is necessarily a geometric square or has any particular geometric shape. In other embodiments, the filter can be a multi-Gaussian filter, which can be used to smooth the transition at the beginning of the depth profile. For example, the depth profile can smoothly transition from a constant depth (e.g., at the left portion of structure 310) to a linear decreasing function as shown. Other filters may include filters that themselves have linear transitions, thereby producing different depth dependencies after convolution. In general, the filter can have any value distribution so that when convolved with a step mask, the depth dependency of the features in the step mask is accurately produced by the convolution.

[0068] The present disclosure is not limited to any specific process or type of model configured to predict an etch profile from a resist profile. Figure 7 An exemplary process flow for generating a simulated feature incorporating an etch bias according to one embodiment of the present disclosure is shown. An etch bias can be an offset of a feature relative to a target pattern. Such an offset may occur due to an offset of a dimension as described herein, but may also be intentional and due to an offset caused by optimizing the lithography process to reduce some offsets in key locations. Thus, the disclosed modeling process can include determining an etch bias, which can be an output of the model or can be a parameter to be optimized (e.g., reduced) during optimization of the lithography process. An exemplary etch bias model is shown below in Equation 2:

[0069]

[0070] Here, C bias is a constant deviation that can be applied to account for systematic deviations in the predicted profile. The summation term is in the etch deviation term (X i ) and represents the contribution of different physical processes in determining the overall etch bias (e.g., load, aspect ratio, etc.). i The weights may be applied based on empirical measurements or simulations.

[0071] The last term in Equation 2 describes the convolution of a mask (e.g., step formation mask 300) with one or more filters (e.g., filter 620) that calculates the etch depth (e.g., by generating depth map 630). Figure 6 and Figure 7An example using a single filter is shown in FIG, but it is contemplated that any number (j) of filters may be convolved with the mask. Thus, the summation adds the contributions of all j convolutions with the j filters. In some embodiments, calibrating the above-described etch bias model may include determining (one or more) coefficients (C j ), the coefficient(s) (C j ) modifies the etch bias contribution of the convolution. Coefficient (C j ) can be calculated based on gauge data having etch deviation values ​​of the feature at its corresponding depth. In some embodiments, the gauge data can be CD and / or EP gauge data of the feature. In some embodiments, the coefficient (C) can be determined based on the measurement results of the printed feature on the printed wafer using a linear solver. j ).

[0072] Using the above, the disclosed process can then include calculating the etch deviation using the etch deviation model, which represents the displacement of the feature from the resist topography feature position. Therefore, the etch deviation can be used to generate the post-etch profile described herein.

[0073] Figure 7 The process flow depicted in 700 includes utilizing a step feature mask 710 (e.g., step feature mask 400) with an after-development inspection (ADI) model 720 (which may also be a lithography model including a resist model) to generate surface features 730 (e.g., resist profiles at the top level). Similarly, a step formation mask 740 (e.g., step formation mask 300) may be used with the ADI model 720 to generate a depth map 750. One detail is that the lithography model (which may also include a resist model) may change the shape of the features (e.g., as depicted by surface features 730 having a different shape than the features in the step feature mask 710, with the features in the step feature mask 710 reproduced in dashed lines for comparison). Similar changes may occur in the step formation mask 740 and be carried over to the resulting depth map 750. Because the etch depth is based on the distance from the reference location 650, such changes in the reference location (e.g., the edge of the depth map) can affect the calculated etch depth (based on the distance between the reference location and the feature location) and therefore affect the size of the features at those etch depths.

[0074] These surface features 730 and depth map 750 can be input into EB model 760 (Equation 2) together with the gauge data 770 utilized as described above. The output (EB) of EB model 760 can then be used to predict the accurate etching profile 780 of the features at all levels. As can be seen, the use of a step mask based on the feature position to capture depth dependency greatly reduces the computational overhead compared to using different masks at each level. Although the present disclosure describes the use of a single step mask, in other embodiments, the process can utilize other masks (e.g., a series of convolutions). However, the use of one (or more) masks provides computational benefits over requiring each layer of a highly hierarchical structure to have its own mask.

[0075] Figure 8 An exemplary process flow for generating simulation features using a machine learning model according to one embodiment of the present disclosure is shown. Figure 8 The process depicted in is similar in many ways to Figure 7 , but instead of utilizing the EB model 760 to determine the etch bias, the model may be a machine learning model 810 for determining the etch bias and the etch profile 820. Figure 8 As shown in FIG. 8 , the machine learning model 810 can be trained using gauge data 770, which is similar to the gauge data for Figure 7 8, but here the gauge data is used as an input to the machine learning model 810. Here, the process may include calculating the etch bias using the machine learning model, where the etch bias again represents the displacement of the feature from the target feature position. Also as previously described, the etch bias can be used to generate a predicted post-etch profile.

[0076] In another embodiment, the machine learning model 810 itself can directly predict the etch profile 820 at different depths given the depth map 750 and the resist profile (or target pattern) 730. Such an embodiment would omit the step formation mask 740 and would instead directly provide the depth map 750 to the machine learning model 810.

[0077] Fig. 9 An exemplary filter for use with a machine learning model according to one embodiment of the present disclosure is shown. In various embodiments, different machine learning models may be utilized to generate a predicted post-etch profile. The types of machine learning models may include, for example, convolutional neural networks (CNNs), recurrent neural networks (RNNs), artificial neural networks (ANNs), etc. Fig. 9In the example of , where the machine learning model is a convolutional neural network, the filter can be a convolutional neural network filter 910. The CNN filter 910 can include weights for representing the depth at the location of the feature. Also shown here is a depiction of the feature size as a function of depth, similar to Figure 6 Weights can be applied to various neurons in the layers of a CNN. A CNN can be trained according to various methods, such as training using measurements of training features from printed wafers, training using simulated features, etc. Figure 6 As shown in , the convolution of the step formation mask 740 with the CNN filter 910 can then generate a depth map 920, which can be used to determine the depth dependency and thereby determine the etch bias value, as previously described.

[0078] Fig.10 is a block diagram of an example computer system CS according to one embodiment of the present disclosure.

[0079] The computer system CS comprises a bus BS or other communication mechanism for transmitting information, and a processor PRO (or multiple processors) coupled to the bus BS for processing information. The computer system CS also comprises a main memory MM coupled to the bus BS, such as a random access memory (RAM) or other dynamic storage device, for storing information and instructions to be executed by the processor PRO. The main memory MM can also be used to store temporary variables or other intermediate information during the execution of the instructions to be executed by the processor PRO. The computer system CS also comprises a read-only memory (ROM) ROM or other static storage device coupled to the bus BS, for storing static information and instructions for the processor PRO. A storage device SD such as a magnetic disk or optical disk is provided and coupled to the bus BS for storing information and instructions.

[0080] The computer system CS can be coupled to a display DS via a bus BS, such as a cathode ray tube (CRT) or a flat panel or touch panel display, for displaying information to a computer user. An input device ID including alphanumeric and other keys is coupled to the bus BS for transmitting information and command selections to the processor PRO. Another type of user input device is a cursor control CC, such as a mouse, a trackball or cursor direction keys, for transmitting direction information and command selections to the processor PRO, and for controlling cursor movement on the display DS. The input device typically has two degrees of freedom on two axes, a first axis (e.g., x) and a second axis (e.g., y), which allows the device to specify a position in a plane. A touch panel (screen) display can also be used as an input device.

[0081] According to one embodiment, part of one or more methods described herein can be executed by computer system CS in response to processor PRO executing one or more sequences of one or more instructions contained in main memory MM. Such instructions can be read into main memory MM from another computer-readable medium such as storage device SD. The execution of the sequence of instructions contained in main memory MM causes processor PRO to execute the process steps described herein. One or more processors in a multiprocessing device can also be used to execute the sequence of instructions contained in main memory MM. In an alternative embodiment, a hardwired circuit can replace software instructions or be used in combination with software instructions. Therefore, the description herein is not limited to any specific combination of hardware circuits and software.

[0082] The term "computer-readable medium" as used herein refers to any medium that participates in providing instructions to the processor PRO for execution. This medium can take many forms, including but not limited to non-volatile media, volatile media and transmission media. Non-volatile media include, for example, optical disks or disks, such as storage devices SD. Volatile media include dynamic memory, such as main memory MM. Transmission media include coaxial cables, copper wires and optical fibers, including lines containing bus BS. Transmission media can also take the form of sound waves or light waves, such as sound waves or light waves generated during radio frequency (RF) and infrared (IR) data communication. Computer-readable media can be non-temporary, such as floppy disks, flexible disks, hard disks, magnetic tapes, any other magnetic media, CD-ROMs, DVDs, any other optical media, punch cards, paper tapes, any other physical media with patterns of holes, RAMs, PROMs, EPROMs, FLASH-EPROMs, any other memory chips or boxes. Non-temporary computer-readable media can have instructions recorded thereon. These instructions can realize any feature described herein when executed by a computer. Temporary computer-readable media can include carrier waves or other propagation electromagnetic signals.

[0083] Various forms of computer-readable media can be involved in carrying one or more sequences of one or more instructions to the processor PRO for execution. For example, the instruction can be initially carried on a disk of a remote computer. The remote computer can load the instruction into its dynamic memory and send the instruction via a telephone line using a modem. The modem local to the computer system CS can receive the data on the telephone line and convert the data into an infrared signal using an infrared transmitter. An infrared detector coupled to the bus BS can receive the data carried in the infrared signal and place the data on the bus BS. The bus BS carries the data to the main memory MM, and the processor PRO retrieves and executes the instruction from the main memory MM. The instruction received by the main memory MM can optionally be stored on a storage device SD before or after being executed by the processor PRO.

[0084] The computer system CS may also include a communication interface CI coupled to the bus BS. The communication interface CI provides a bidirectional data communication coupled to a network link NDL connected to the local area network LAN. For example, the communication interface CI may be an integrated services digital network (ISDN) card or a modem to provide a data communication connection to a telephone line of a corresponding type. As another example, the communication interface CI may be a local area network (LAN) card to provide a data communication connection to a compatible LAN. A wireless link may also be implemented. In any such implementation, the communication interface CI sends and receives electrical, electromagnetic or optical signals that carry digital data streams representing various types of information.

[0085] The network link NDL generally provides data communication to other data devices through one or more networks. For example, the network link NDL can provide a connection to the host computer HC through a local area network LAN. This can include data communication services provided by the global packet data communication network (now generally referred to as the "Internet" INT). The local area network LAN (Internet) all use electrical, electromagnetic or optical signals that transport digital data streams. The signals through the various networks and the signals on the network data link NDL and through the communication interface CI (which transports digital data to and from the computer system CS) are exemplary forms of carrier waves that transmit information.

[0086] The computer system CS can send messages and receive data, including program code, through (one or more) networks, network data links NDL and communication interfaces CI. In the Internet example, the host HC can send a request code for an application through the Internet INT, the network data link NDL, the local area network LAN and the communication interface CI. For example, such a downloaded application can provide all or part of the method described herein. The received code can be executed by the processor PRO when it is received, and / or stored in a storage device SD or other non-volatile memory for later execution. In this way, the computer system CS can obtain the application code in the form of a carrier wave.

[0087] Fig.11 is a schematic diagram of a lithography projection device according to an embodiment of the present disclosure.

[0088] The lithographic projection apparatus may include an illumination system IL, a first stage MT, a second stage WT and a projection system PS.

[0089] The illumination system IL may condition the radiation beam B. In this particular case, the illumination system also comprises a radiation source SO.

[0090] A first stage (eg, patterning device table) MT may be provided with a patterning device holder to hold a patterning device MA (eg, a reticle) and connected to a first positioner to accurately position the patterning device relative to the article PS.

[0091] A second worktable (substrate table) WT may be provided with a substrate holder to hold a substrate W (eg a resist coated silicon wafer) and connected to a second positioner to accurately position the substrate relative to the article PS.

[0092] A projection system ("lens") PS (eg, a refractive, reflective, or catadioptric optical system) can image the irradiated portion of the patterning device MA onto a target portion C of the substrate W (eg, comprising one or more dies).

[0093] As depicted herein, the apparatus may be transmissive (i.e., have a transmissive patterning device). However, in general, for example, it may also be reflective (have a reflective patterning device). The apparatus may employ a patterning device of a different type than a classical mask; examples include a programmable mirror array or an LCD matrix.

[0094] A source SO (e.g. a mercury lamp or an excimer laser, an LPP (laser produced plasma) EUV source) generates a radiation beam. This beam is fed into an illumination system (illuminator) IL, either directly or after having traversed a conditioning device (such as, for example, a beam expander Ex). The illuminator IL may include an adjustment device AD ​​for setting the outer and / or inner radial extent (commonly referred to as σ-outer and σ-inner, respectively) of the intensity distribution in the beam. In addition, it will typically include various other components, such as an integrator IN and a condenser CO. In this way, the beam B incident on the patterning device MA has a desired uniformity and intensity distribution in its cross section.

[0095] In some embodiments, the source SO may be within the housing of the lithographic projection device (for example, this is usually the case when the source SO is a mercury lamp), but it may also be remote from the lithographic projection device, the radiation beam it generates being guided into the device (for example, with the aid of appropriate guide mirrors); the latter case may be the case when the source SO is an excimer laser (for example, based on KrF, ArF or F2 lasers).

[0096] The beam PB can then intercept the patterning device MA held on the patterning device table MT. After having traversed the patterning device MA, the beam B can pass through the lens PL, which focuses the beam B on the target portion C of the substrate W. With the aid of the second positioning device (and the interferometric measurement device IF), the substrate table WT can be accurately moved, for example so as to position different target portions C in the path of the beam PB. Similarly, the first positioning device can be used to accurately position the patterning device MA relative to the path of the beam B, for example after mechanically retrieving the patterning device MA from the patterning device library or during scanning. Typically, the movement of the stage MT, WT can be achieved with the aid of a long-stroke module (coarse positioning) and a short-stroke module (fine positioning). However, in the case of a stepper (as opposed to a step and scan tool), the patterning device table MT may be connected only to a short-stroke actuator, or may be fixed.

[0097] The depicted tool can be used in two different modes, a step mode and a scan mode. In the step mode, the patterning device table MT remains essentially stationary and the entire patterning device image is projected at once (i.e. a single "flash") onto a target portion C. The substrate table WT can be moved in the x and / or y direction so that a different target portion C can be irradiated by the beam PB.

[0098] In scan mode, essentially the same scenario applies, except that a given target portion C is not exposed in a single "flash". Instead, the patterning device table MT may be moved in a given direction (the so-called "scanning direction", e.g. the y-direction) at a speed v, so that the projection beam B is scanned over the patterning device image; while the substrate table WT is simultaneously moved in the same or opposite direction at a speed V=Mv, where M is the magnification of the lens PL (typically M=1 / 4 or 1 / 5). In this way, a relatively large target portion C can be exposed without having to compromise resolution.

[0099] Fig.12 is a schematic diagram of another lithography projection apparatus (LPA) according to an embodiment of the present disclosure.

[0100] The LPA may comprise a source collector module SO, an illumination system (illuminator) IL configured to condition a radiation beam B (eg EUV radiation), a support structure MT, a substrate table WT and a projection system PS.

[0101] The support structure (e.g., patterning device stage) MT may be configured to support a patterning device (e.g., mask or reticle) MA and connected to a first positioner PM configured to accurately position the patterning device;

[0102] A substrate table (eg, wafer stage) WT may be configured to hold a substrate (eg, a resist-coated wafer) W and connected to a second positioner PW configured to accurately position the substrate.

[0103] The projection system (eg, a reflective projection system) PS may be configured to project the pattern imparted to the radiation beam B by the patterning device MA onto a target portion C of the substrate W (eg, comprising one or more dies).

[0104] As depicted here, the LPA can be reflective (e.g., using a reflective patterning device). It should be noted that because most materials are absorptive in the EUV wavelength range, the patterning device can have a multilayer reflector including, for example, a multi-stack of molybdenum and silicon. In one example, the multi-stack reflector has 40 layers of molybdenum and silicon pairs, where the thickness of each layer is a quarter wavelength. Even smaller wavelengths can be produced using X-ray lithography. Since most materials are absorptive at EUV and X-ray wavelengths, a thin sheet of patterned absorbing material on the patterning device topography (e.g., a TaN absorber on top of a multilayer reflector) defines where features will print (positive resist) or not print (negative resist).

[0105] The illuminator IL may receive an extreme ultraviolet radiation beam from a source collector module SO. Methods of generating EUV radiation include, but are not necessarily limited to, converting a material into a plasma state having at least one element (e.g., xenon, lithium, or tin) having one or more emission lines in the EUV range. In one such method, commonly referred to as laser produced plasma ("LPP"), a plasma may be generated by irradiating a fuel, such as a droplet, stream, or cluster of a material having a line-emitting element, with a laser beam. The source collector module SO may be part of an EUV radiation system that includes a laser for providing a laser beam to excite the fuel. The resulting plasma emits output radiation, such as EUV radiation, which is collected using a radiation collector disposed in the source collector module. The laser and the source collector module may be separate entities, such as when a CO2 laser is used to provide a laser beam for fuel excitation.

[0106] In this case, the laser may not be considered to form part of the lithographic apparatus, and the radiation beam may be delivered from the laser to the source collector module by means of a beam delivery system including, for example, appropriate guide mirrors and / or a beam expander. In other cases, the source may be an integral part of the source collector module, for example when the source is a discharge produced plasma EUV generator (commonly referred to as a DPP source).

[0107] The illuminator IL may include an adjuster for adjusting the angular intensity distribution of the radiation beam. Typically, at least the outer and / or inner radial extent of the intensity distribution in a pupil plane of the illuminator (commonly referred to as σ-outer and σ-inner, respectively) may be adjusted. Furthermore, the illuminator IL may include various other components, such as a multifaceted field and pupil mirror devices. The illuminator may be used to adjust the radiation beam to have a desired uniformity and intensity distribution in the cross-section of the radiation beam.

[0108] The radiation beam B may be incident on a patterning device (e.g., a mask) MA held on a support structure (e.g., a patterning device stage) MT and patterned by the patterning device. After reflection from the patterning device (e.g., a mask) MA, the radiation beam B passes through a projection system PS, which focuses the beam onto a target portion C of a substrate W. With the aid of a second positioner PW and a position sensor PS2 (e.g., an interferometric device, a linear encoder, or a capacitive sensor), the substrate table WT may be accurately moved, for example, so as to position a different target portion C in the path of the radiation beam B. Similarly, a first positioner PM and a further position sensor PS1 may be used to accurately position the patterning device (e.g., a mask) MA relative to the path of the radiation beam B. The patterning device (e.g., a mask) MA and the substrate W may be aligned using patterning device alignment marks M1, M2 and substrate alignment marks P1, P2.

[0109] The depicted apparatus LPA can be used in at least one of the following modes: a stepping mode, a scanning mode and a stationary mode.

[0110] In step mode, the support structure (e.g. patterning device table) MT and the substrate table WT are kept substantially stationary while an entire pattern imparted to the radiation beam is projected at one time (i.e. a single static exposure) onto a target portion C. The substrate table WT is then moved in the X and / or Y direction so that a different target portion C can be exposed.

[0111] In scan mode, the support structure (e.g., patterning device table) MT and the substrate table WT are scanned synchronously while a pattern imparted to the radiation beam is projected onto a target portion C (i.e., a single dynamic exposure). The speed and direction of the substrate table WT relative to the support structure (e.g., patterning device table) MT may be determined by the (de-)magnification and image reversal characteristics of the projection system PS.

[0112] In stationary mode, the support structure (e.g., patterning device table) MT is held substantially stationary, thereby holding the programmable patterning device, and the substrate table WT is moved or scanned while a pattern imparted to the radiation beam is projected onto a target portion C. In this mode, a pulsed radiation source is typically employed, and the programmable patterning device is updated as required after each movement of the substrate table WT or between successive radiation pulses during a scan. This mode of operation can be readily applied to maskless lithography utilizing a programmable patterning device, such as a programmable mirror array.

[0113] Fig.13 is a detailed view of a lithography projection apparatus according to one embodiment of the present disclosure.

[0114] As shown, the LPA may include a source collector module SO, an irradiation system IL, and a projection system PS. The source collector module SO is constructed and arranged so that a vacuum environment can be maintained in the closed structure ES of the source collector module SO. The EUV radiation emitting the thermal plasma HP can be formed by a plasma source generated by a discharge. The EUV radiation can be generated by a gas or vapor (e.g., Xe gas, Li vapor, or Sn vapor), wherein the thermal plasma HP is generated to emit radiation in the EUV range of the electromagnetic spectrum. The thermal plasma HP is generated by, for example, a discharge that causes at least partially ionized plasma. For efficient generation of radiation, a partial pressure of, for example, 10Pa of Xe, Li, Sn vapor, or any other suitable gas or vapor may be required. In one embodiment, a plasma that excites tin (Sn) is provided to generate EUV radiation.

[0115] The radiation emitted by the hot plasma HP is transferred from the source chamber SC into the collector chamber CC via an optional gas barrier or contaminant trap CT (also referred to as a contaminant barrier or foil trap in some cases) which is located in or behind the opening of the source chamber SC. The contaminant trap CT may include a channel structure. The contaminant collector CT may also include a gas barrier or a combination of a gas barrier and a channel structure. The contaminant trap or contaminant barrier CT further indicated herein includes at least a channel structure as known in the art.

[0116] The collector chamber CC may include a radiation collector CO, which may be a so-called grazing incidence collector. The radiation collector CO has an upstream radiation collector side US and a downstream radiation collector side DS. Radiation traversing the radiation collector CO may be reflected from the grating spectrum filter SF to be focused in a virtual source point IF along the optical axis indicated by the dash-dotted line 'O'. The virtual source point IF may be referred to as an intermediate focus, and the source collector module may be arranged such that the intermediate focus IF is located at or near an opening OP in the enclosed structure ES. The virtual source point IF is an image of the radiation emitting plasma HP.

[0117] The radiation then traverses an illumination system IL, which may include a polygonal field mirror device FM and a polygonal pupil mirror device PM, which are arranged to provide a desired angular distribution of radiation beam B at the patterning device MA, and a desired uniformity of radiation amplitude at the patterning device MA. When the radiation beam B is reflected at the patterning device MA held by the support structure MT, a patterned beam PB is formed, and the patterned beam PB is imaged by the projection system PS via the reflective element RE onto a substrate W held by the substrate table WT.

[0118] In general, more elements than shown may be present in the illumination optics unit IL and the projection system PS. Depending on the type of lithographic apparatus, a grating spectral filter SF may optionally be present. Furthermore, more mirrors may be present than shown in the figures, for example, from 1 to 6 additional reflective elements may be present in the projection system PS.

[0119] The collector optics CO may be a nested collector with a grazing incidence reflector GR, as in the example of a collector (or collector mirror). The grazing incidence reflector GR is arranged axisymmetrically around the optical axis O, and this type of collector optics CO may be used in combination with a discharge produced plasma source (commonly referred to as a DPP source).

[0120] Fig.14 is a detailed view of a source collector module SO of a lithographic projection apparatus LPA according to an embodiment of the present disclosure.

[0121] The source collector module SO can be part of the LPA radiation system. The laser LA can be arranged to deposit laser energy into a fuel such as xenon (Xe), tin (Sn) or lithium (Li), thereby generating a highly ionized plasma HP with an electron temperature of several tens of eV. The energy radiation generated during the deexcitation and recombination of these ions is emitted from the plasma, collected by the collector optical device CO at near normal incidence and focused onto an opening OP in the closed structure ES.

[0122] The concepts disclosed herein can simulate or mathematically model any general imaging system for imaging sub-wavelength features, and can be particularly useful for emerging imaging technologies that are capable of producing shorter and shorter wavelengths. Emerging technologies already in use include EUV (extreme ultraviolet) DUV lithography, which is capable of producing 193nm wavelengths with the aid of ArF lasers, and even 157nm wavelengths with the aid of fluorine lasers. In addition, EUV lithography is capable of producing wavelengths in the range of 20nm-50nm by using a synchrotron or by bombarding materials (solid or plasma) with high-energy electrons in order to produce photons in this range.

[0123] Embodiments of the present disclosure may be further described by the following clauses.

[0124] 1. A method for predicting a post-etch profile of a feature at different depths, the method comprising:

[0125] accessing a developed resist profile of the feature; and

[0126] An etch bias model is applied on the developed resist profile to obtain the post-etch profile, wherein the etch bias model relates etch bias to etch depth.

[0127] 2. The method of clause 1, wherein the etch bias is related to the etch depth based on a lateral position of a feature.

[0128] 3. The method of clause 1, wherein the developed resist profile is a predicted resist profile.

[0129] 4. The method of clause 1, wherein the etch bias model includes a term indicative of a convolution of a mask and a filter, the convolution calculating the etch depth.

[0130] 5. The method of clause 1, wherein the post-etch profile is a post-etch CD.

[0131] 6. The method of clause 1, wherein determining the developed resist profile comprises applying a resist model to a patterning device.

[0132] 7. The method of clause 1, wherein determining the etch depth is based on a distance of the feature from a reference location of a step feature mask.

[0133] 8. The method of clause 7, wherein the step feature mask indicates the location of the feature, and determining the etch depth comprises convolving the step feature mask and a filter, the convolution generating a depth map, the depth map representing the depth at the location of the feature.

[0134] 9. The method of clause 8, further comprising calibrating the etch bias model by determining coefficients that modify the convolved etch bias contribution, the coefficients being calculated based on gauge data having etch bias values ​​for the features at their respective depths.

[0135] 10. A method according to clause 9, wherein the gauge data is CD and / or EP gauge data of the feature.

[0136] 11. The method of clause 9, wherein the coefficients are calculated using a linear solver to fit measurements of printed features on a printed wafer.

[0137] 12. The method of clause 9, further comprising calculating the etch deviation using the etch deviation model, the etch deviation representing the displacement of the feature from a target feature position, the post-etch profile being generated using the etch deviation.

[0138] 13. The method of clause 8, wherein the filter is a square filter.

[0139] 14. The method of clause 8, wherein the filter is a multi-Gaussian filter.

[0140] 15. A method according to clause 8, wherein the etching deviation model is a machine learning model trained using gauge data, and the method also includes using the machine learning model to calculate the etching deviation, the etching deviation represents the displacement of the feature from the target feature position, and the predicted post-etching profile is generated using the etching deviation.

[0141] 16. A method according to clause 14, wherein the machine learning model is a convolutional neural network and the filter is a convolutional neural network filter, which includes a weight for representing the etching depth at the location of the feature.

[0142] 17. A method according to clause 14, wherein the machine learning model has been trained using measurements of training features from printed wafers.

[0143] 18. A non-transitory computer readable medium having recorded thereon instructions for predicting a post-etch profile of a feature at different depths, the instructions when executed by a computer having at least one programmable processor causing the operations of any of clauses 1 to 17.

[0144] 19. A system for predicting a post-etch profile of a feature at different depths, the system comprising:

[0145] at least one programmable processor; and

[0146] A non-transitory computer-readable medium having recorded thereon instructions which, when executed by a computer having the at least one programmable processor, cause the operations of any one of clauses 1 to 17.

[0147] Although the concepts disclosed herein may be used for imaging on substrates such as silicon wafers, it should be understood that the disclosed concepts may be used in any type of lithography imaging system, such as a lithography imaging system for imaging on substrates other than silicon wafers.

[0148] The combinations and sub-combinations of the elements disclosed herein constitute separate embodiments and are provided as examples only. Moreover, the above description is intended to be illustrative, not restrictive. Therefore, it will be apparent to those skilled in the art that modifications may be made as described without departing from the scope of the claims set forth below.

Claims

1. A non-transitory computer readable medium having recorded thereon instructions which, when executed by a computer having at least one programmable processor, cause the computer to perform a method of predicting a post-etch profile of a feature at different depths, the method comprising: accessing the developed resist profile of the feature; as well as An etch bias model is applied on the developed resist profile to obtain the post-etch profile, wherein the etch bias model relates etch bias to etch depth.

2. The medium of claim 1, wherein the etch bias is related to the etch depth based on a lateral position of a feature.

3. The medium of claim 1, wherein the developed resist profile is a predicted resist topography.

4. The medium of claim 1, wherein the etch bias model includes a term indicative of a convolution of a mask and a filter, the convolution calculating the etch depth. The medium of claim 1 , wherein the post-etch profile is a post-etch CD.

6. The medium of claim 1, wherein determining the developed resist profile comprises applying a resist model to a patterning device.

7. The medium of claim 1, wherein determining the etch depth is based on a distance of the feature from a reference location of a step feature mask.

8. The medium of claim 7, wherein the step feature mask indicates locations of the features, and determining the etch depth comprises convolving a step formation mask and a filter, the convolution generating a depth map, the depth map representing depths at the locations of the features.

9. The medium of claim 8, wherein the method includes calibrating the etch bias model by determining coefficients that modify the convolved etch bias contribution, the coefficients calculated based on gauge data having etch bias values ​​for the features at their respective depths.

10. The medium of claim 9, wherein the gauge data is CD and / or EP gauge data of the feature.

11. The medium of claim 9, wherein the coefficients are calculated using a linear solver to fit measurements of printed features on a printed wafer.

12. The medium of claim 9, wherein the method further comprises calculating the etch deviation using the etch deviation model, the etch deviation representing a displacement of the feature from a target feature position, the post-etch profile being generated using the etch deviation.

13. The medium of claim 8, wherein the filter is a square filter or a multi-Gaussian filter.

14. The medium of claim 8, wherein the etching deviation model is a machine learning model trained using gauge data, wherein the method further comprises calculating the etching deviation using the machine learning model, the etching deviation representing the displacement of the feature from the target feature position, and the predicted post-etching profile is generated using the etching deviation.

15. The medium of claim 14, wherein the machine learning model is a convolutional neural network and the filter is a convolutional neural network filter comprising a weight for representing the etch depth at the location of the feature.

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