Method and apparatus for suppressing current ripple

Abstract

The invention relates to a method and apparatus for suppressing current ripples. An example apparatus includes a low pass filter (308) and a high pass filter (310) coupled to a first current terminal of a first transistor (307); an input of a first amplifier (312) coupled to an output of the high pass filter (310); an input of a negative gain amplifier (314) coupled to an output of the first amplifier (312); an input of an adder (316) coupled to an output of the negative gain amplifier (314) and an output of the low pass filter (308); a first input of a second amplifier (322) coupled to an output of the adder (316); a control terminal of a second transistor (318) coupled to an output of the second amplifier (322), a second current terminal of the second transistor (318) coupled to the first input of the second amplifier (322); and a control terminal of a third transistor (320) coupled to the output of the second amplifier (322), a second current terminal of the third transistor (320) coupled to an output terminal.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This patent claims the benefit of U.S. Provisional Patent Application No. 63 / 531,051, filed on August 7, 2023. The entire text of U.S. Provisional Patent Application No. 63 / 531,051 is hereby incorporated by reference herein. Priority to U.S. Provisional Patent Application No. 63 / 531,051 is hereby claimed. Technical Field

[0003] The present description relates generally to circuits and, more particularly, to methods and apparatus for suppressing current ripple. Background Art

[0004] Power supplies provide electrical energy to electronic devices. Improvements in power supplies are intended to provide electrical energy with greater stability and reliability. Ripple current is the AC current flowing through the load components, which causes small fluctuations in the direct current (DC) voltage output and is a common phenomenon in power supplies. Variations in the DC voltage output are usually caused by switching or rectification processes within the power supply. Fluctuations in the DC voltage output may affect the performance of downstream connected electronic components or loads.

[0005] Ripple current (also called current ripple) is generated by an alternating current (AC) power supply and is a periodic waveform characterized by narrow bandwidth pulses with high amplitude. Therefore, it can be said that the ripple current is an AC current component "above" (e.g., superimposed) of a DC current waveform. The current ripple introduced into the downstream electronic components connected to the power supply is a periodic noise caused by the switching frequency in the switching power supply. The downstream electronic components use various methods to obtain available power from the power supply, and further use filters, amplifiers, and other regulators to process the changing voltage or current (e.g., signals), but the current ripple is transmitted from the power supply to the electronic circuit attached to the power supply. Therefore, the circuit integrates components such as capacitors, resistors, or metal oxide semiconductor field effect transistors (MOSFETs) to "suppress" the ripple. Therefore, ripple suppression is the ability of the circuit to maintain the output voltage regardless of the ripple fluctuations in the power supply.

[0006] The power supply rejection ratio (PSRR) is the ratio of the change in supply voltage to the resulting output voltage, and is a measure of how well a circuit rejects ripple from a power supply. In the case of a low dropout regulator (LDO), the PSRR is a measure of the output ripple voltage compared to the input ripple voltage over a wide frequency range (e.g., 10 Hz to 10 MHz). Summary of the invention

[0007] For a method and apparatus for suppressing current ripple, an example apparatus includes: a first transistor having a first current terminal, a control terminal, and a second current terminal, the second current terminal of the first transistor being coupled to a ground terminal; a low-pass filter having an input and an output, the input of the low-pass filter being coupled to the first current terminal of the first transistor; a high-pass filter having an input and an output, the input of the high-pass filter being coupled to the first current terminal of the first transistor; a first amplifier having an input and an output, the input of the first amplifier being coupled to the output of the high-pass filter; a negative gain amplifier having an input and an output, the input of the negative gain amplifier being coupled to the output of the first amplifier; an adder having a first input, a second an input and an output, the first input of the adder being coupled to the output of the negative gain amplifier, and the second input being coupled to the output of the low-pass filter; a second amplifier having a first input, a second input and an output, the first input being coupled to the output of the adder; a second transistor having a first current terminal, a control terminal and a second current terminal, the control terminal of the second transistor being coupled to the output of the second amplifier, and the second current terminal of the second transistor being coupled to the first input of the second amplifier; and a third transistor having a first current terminal, a control terminal and a second current terminal, the control terminal of the third transistor being coupled to the output of the second amplifier, and the second current terminal of the third transistor being coupled to an output terminal. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 is a block diagram showing power supply circuitry coupled to a processor.

[0009] Figure 2 yes Figure 1 Block diagram of an example low dropout (LDO) regulator of a power supply including feed-forward current ripple rejection (FFCRR) circuitry.

[0010] Figure 3 is a block diagram of an example LDO that includes an example of FFCRR circuitry.

[0011] Figure 4 is a flow chart showing the functionality of an example FFCRR circuit system.

[0012] The same reference numbers or other designators are used in the drawings to indicate the same or similar (functionally and / or structurally) features. DETAILED DESCRIPTION

[0013] The drawings are not necessarily to scale. In general, the same reference numerals in the drawings and the specification refer to the same or similar parts. Although the drawings show regions with clear lines and boundaries, some or all of these lines and / or boundaries may be idealized. In practice, boundaries and / or lines may be unobservable, mixed, and / or irregular.

[0014] The examples described herein can be used to implement a parallel feed-forward current ripple suppression (FFCRR) circuit system that counteracts the current ripple generated by a transfer transistor in a low dropout regulator circuit. The FFCRR circuit system is used in conjunction with a reference voltage, an amplifier, and a transfer element of an LDO. For example, the transfer element of the LDO circuit generates a current ripple. The FFCRR circuit senses the current flow through the transfer element, modifies the sensed current, and injects the modified current into the voltage output to counteract the current ripple generated by the transfer element. The FFCRR can be implemented as an integral part of the LDO, or can be a feed-forward current ripple suppression circuit attached to an existing LDO circuit.

[0015] Figure 1 is a block diagram of an example power supply circuit system 101 coupled to a mains power supply 102 and providing power to a load 103, the example power supply circuit system being Figure 1 The power supply circuit system 101 includes an AC power supply unit 104 , a DC power supply unit 106 and a low voltage dropout regulator 108 .

[0016] Figure 1 The connections of the block diagram components are shown. Mains supply 102 is coupled to AC power supply unit 104. The output of AC power supply unit 104 is coupled to DC power supply unit 106. The output Vin of DC power supply unit 106 is coupled to supply the Vin output to LDO circuit 108. LDO circuit 108 is connected to processor circuit system 103 as a load.

[0017] Mains supply 102 indicates power generation or connection to the grid as the main source of power. Mains is generated in a power plant and delivered through a network of power lines and transformers. The voltage and frequency of mains vary globally and are regionally dependent (e.g., 120 volts at 60 hertz). Mains supports electrical technologies that rely on power. Electricity is supplied by mains supply 102 in the form of alternating current, because the alternating nature of the current allows efficient transmission over a certain distance and facilitates the transmission of voltage through a transformer.

[0018] An AC power supply 104 connected to the mains supply 102 receives power from the mains grid in the form of alternating current. The AC power supply 104 converts the incoming electrical energy into voltage and current levels that are usable via the connected device. For example, the AC power supply 104 steps down the incoming mains supply voltage to a voltage suitable for use by the DC power supply 106. An example output from an example AC power supply would be a 1kHz sine wave provided by an AC signal generator (AC power supply 104) to a 5V DC power supply (DC power supply 106).

[0019] Depending on the application, different devices and applications have different requirements for the type of current used. Therefore, the DC power supply 106 is used to convert the incoming available AC power into available DC power. The DC power supply 106 is used to power electronic devices that require a stable voltage (for example, the DC power supply 106 provides 5V DC). This is achieved by incorporating components such as rectifiers, filters, and regulators to provide such a stable, consistent, and reliable voltage.

[0020] LDO 108 or low dropout regulator is a type of voltage regulator used in electronic circuits. When connected to DC power supply 106, LDO regulates output voltage (Vout) with "low dropout", which means that even when the input voltage (Vin) is only slightly higher than the desired output voltage, LDO can provide a stable output (Vout). LDO 108 achieves this by using a feedback loop to adjust the output voltage and maintain a consistent output. Therefore, LDO is used in situations where a stable and reliable voltage is required for the proper operation of the electronic circuit. LDO includes a reference voltage, an amplifier, and a pass element.

[0021] The load 103 is shown in Figure 1 103 is shown as a processor and is for illustration purposes only. Processor circuit system 103 may represent any electrical load or device within a broader class of electronic components or devices. The depiction is used as a general example to illustrate an electronic load, and the specific identification or function may vary. The specifications associated with the LDO are determined based on the electronic load to be used in conjunction with the LDO. Figure 1 As shown, an electronic load is connected to the LDO.

[0022] In operation, the mains supply 102 provides AC power to the AC power supply 104. The AC power supply 104 converts the input AC power from the mains supply 102 into AC power of a specific voltage, frequency, current, and form required by an attached downstream component (e.g., a DC power supply). Figure 1 In the diagram of FIG. 1 , the AC power supply unit 104 supplies voltage, frequency, current and form to the DC power supply unit 106 .

[0023] The DC power supply unit 106 converts the AC power into a stable DC voltage Vin. Vin can then be used to power, for example, Figure 1 The LDO 108 and other various electrical devices are powered.

[0024] When supplying Vin to Figure 1 In the case of the LDO 108, the LDO adjusts the input voltage Vin so that the output voltage Vout is obtained. The output voltage Vout is supplied to the load 103. Figure 1 In the example of , the processor circuitry is the load 103. Vout from the LDO circuit 108 powers the load 103 (eg, the processor circuitry) for operation.

[0025] Processor circuitry is one load that benefits from the ripple reduction scheme described through the implementation of a feed-forward current ripple reduction (FFCRR) circuit in conjunction with an LDO. Of course, other loads may be used in place of processor circuitry as described herein.

[0026] Figure 2 yes Figure 1 The circuit diagram of LDO 108. Figure 2 In the example of FIG. 1 , LDO 108 includes an error amplifier 202, a buffer 204, a pass element 206, and a FFCRR circuit 208. Also included is a load 103, which may be a processor circuitry represented by Rload 210. To attenuate resonance within the circuit (e.g., to stabilize the response of the circuit by storing energy), an equivalent series resistance resistor (RESR) 212 and a load capacitor 214 are included on a path to ground 216.

[0027] exist Figure 2 , an error amplifier 202 has a first input, a second input, and an output. The output of the error amplifier 202 is coupled to the input of a buffer 204. The output of the buffer 204 is coupled to the control terminal of a transfer element 206, which is a field effect transistor in this example. The first terminal of the transfer element 206 is coupled to Vin, and the second terminal is coupled in series to Rload 210, and then to ground 216.

[0028] FFCRR circuitry 208 is connected in parallel with pass element 206 by coupling at one terminal to Vin and a first terminal of pass element 206 and at a second terminal to a second terminal of pass element 206 and Vout. Similarly, a series combination of RESR 212 and load capacitor 214 is connected in parallel with Rload 210 by coupling at one end to Vout and at the other end to ground 216.

[0029] Figure 2 The operation of the LDO 108 begins with the error amplifier 202. The error amplifier compares the desired output voltage (Vref) to the actual output voltage and generates an error signal to indicate the comparison between the two voltages. The error signal is used to adjust the difference between the actual output and Vref, which helps maintain stability and accuracy in the electronic application of the circuit.

[0030] Once the error amplifier generates an error signal, the error signal is fed into a buffer 204. The buffer 204 is used to isolate different parts of the circuit from each other so that the driving capability of the circuit is not affected by the load conditions of the connected components. In fact, the buffer 204 helps to reduce signal degradation and reduce the effects of impedance mismatch.

[0031] After the error signal passes through buffer 204, the error signal is used as an input to a control gate on pass element 206. Figure 2 The pass element 206 , which is a transistor in the example, allows current to flow from a first current terminal, through the transistor, and out of a second current terminal when the control gate is enabled (eg, a signal is sent to the control gate of the pass element 206 ).

[0032] LDO 108 maintains a stable output voltage by adjusting pass element 206 to compensate for changes in the voltage source (Vin) and voltage output (Vout). The dropout voltage, or the minimum voltage difference between the input and output, ensures efficient voltage regulation. FFCRR 208 is used to offset any ripple current experienced by fluctuations in the power supply providing Vin.

[0033] Figure 3 is a block diagram of an example LDO 300 showing example components of the FFCRR circuitry 208 . Figure 3 The LDO 300 contains Figure 2 Error amplifier 202 , buffer 204 , pass element 206 , Rload 210 , RESR 212 , and load capacitor 214 of LDO 108 are shown.

[0034] have Figure 3 The components of the LDO of the parallel feed-forward current ripple suppression scheme 300 can be represented by stages: current sensing 301, sense current modification 305, and current cancellation 317. The stages can be combined and attached to the LDO circuit 108. Therefore, the stages can also be referred to as circuits: current sensing circuit 301; current modification circuit 305; and current cancellation circuit 317.

[0035] Figure 3 The LDO 300 also contains Figure 2208. The FFCRR 208 includes a sensing element 302, a sense amplifier 304, a first transistor 306, a second transistor 307, a low pass filter 308, a high pass filter 310, an amplifier 312, a negative gain amplifier 314, an adder 316, a third transistor 318, a fourth transistor 320, and a cancellation amplifier 322.

[0036] The current sensing stage 301 includes a sense transistor 302, a sense amplifier 304 (also known as an operational transconductance amplifier), and a first transistor 306. The control terminal of the sense transistor 302 is coupled to the control terminal of the pass element 206 of the LDO 300 to create a parallel path between Vin and ground. The first current terminal of the sense transistor 302 is coupled to Vin, and the second current terminal of the sense transistor 302 is coupled to the first terminal of the first transistor 306 and the first input of the sense amplifier 304. The second terminal of the sense amplifier 304 is coupled to a reference voltage (Vref). The output of the sense amplifier 304 is coupled to the control terminal of the first transistor 306. The second current terminal of the first transistor 306 is coupled to ground. Figure 3 In the example of , the sensing transistor 302 has a body terminal (not shown) connected to the second current terminal of the sensing transistor 302. In other examples, the body terminal of the sensing transistor 302 can be connected to ground. Figure 3 In an example, the first transistor 306 has a body terminal connected to ground. In other examples, the body terminal of the first transistor 306 can be connected to a second current terminal of the first transistor 306, which is coupled to ground.

[0037] In operation, the sensing stage is used to sense the current passing through the transfer element 206. The sense amplifier 304 and the first transistor 306 form a negative feedback loop, which in operation causes the voltage at the second current terminal of the sense transistor 302 to be equal to Vref. Vref is set to be equal to Vout. Therefore, the voltage at the second current terminal of the transfer element 206 is equal to the voltage at the second current terminal of the sense transistor 302. The size ratio between the transfer element 206 and the sense transistor 302 is set and defined as K to 1, which causes the reduced amount of current (1 / K) to be copied to the current sensing circuit 301.

[0038] The current flows through the first current terminal of the sensing transistor 302 and is transferred through the second current terminal controlled by the control terminal of the sensing transistor 302. For example, when the control terminal of the transfer element 206 is in effect, the control terminal of the sensing transistor 302 is also in effect. If there is a voltage error between the second current terminal of the sensing transistor 302 and Vref, the sense amplifier 304 is used to eliminate this voltage error by changing the voltage at the control terminal of the first transistor 306. The current then flows through the first transistor 306, which eliminates the voltage error. Therefore, the sensing current (1 / K) flows from Vin through the sensing transistor 302 and the first transistor 306 to ground. The sensing current amount (1 / K) is copied from the first transistor 306 to the second transistor 307 and further processed in the current modification stage 305.

[0039] The sensing current modification stage 305 includes a second transistor 307, a low pass filter 308, a high pass filter 310, an amplifier 312, a negative gain amplifier 314, and an adder 316. The second transistor 307 has a control terminal coupled to the output of the sensing amplifier 304 and connected in parallel with the control terminal of the first transistor 306 of the sensing stage 301. The second transistor 307 includes a first current terminal coupled to two signal paths connected in parallel to each other and a second current terminal coupled to ground. The first signal path includes a low pass filter 308 having an input coupled to the first current terminal of the second transistor 307. The low pass filter 308 has an output coupled to a first input of the adder 316. In the second signal path, the high pass filter 310 has an input coupled to the first current terminal of the second transistor 307. In addition, the output of the high pass filter 310 is coupled to the input of the amplifier 312. The amplifier 312 also has an output connected to the input of the negative gain amplifier 314. The output of the negative gain amplifier 314 is coupled to the second input of the adder 316.

[0040] The low pass filter 308 is a subcircuit that allows signals with frequencies below a certain cutoff frequency to pass while attenuating signals above the cutoff frequency. The low pass filter acts as a frequency dependent gate, passing lower frequency components of the signal while filtering out higher frequency elements. Figure 3 In the context of , a low pass filter allows the bias current to pass, or in other words, allows the constantly supplied signal (sense current) to pass while attenuating rapidly sensed fluctuations in the signal known as ripple current.

[0041] The high-pass filter 310 is a subcircuit designed to allow signals with frequencies above a certain cutoff frequency to pass through while attenuating signals below the cutoff frequency. The high-pass filter 310 allows higher frequency components of the signal to pass through while filtering out lower frequency components of the signal. Figure 3In the context of , the higher frequency components of the signal input to the high pass filter are copies of the ripple current that fluctuates from the bias signal.

[0042] Amplifier 312 is an amplifying component that increases the strength or amplitude of an input signal by a certain factor. Figure 3 In the example of , a gain of ten is associated with amplifier 312. The signal input into amplifier 312 will be increased tenfold and then output. The larger amplitude signal then has sufficient strength to be effectively transmitted and processed without distortion.

[0043] The negative gain amplifier 314 (which may also be referred to as an inverting amplifier) ​​is a subcircuit or component that takes an input signal and produces an output signal having an amplitude that is inverted and scaled relative to the input signal. In other words, the negative gain amplifier 314 introduces a phase shift of the input signal (e.g., approximately 180 degrees out of phase with the sense current ripple). Negative gain is then achieved by employing an inverting operational amplifier configuration, where the input signal is connected to the inverting terminal. As a result, a positive signal input into the negative gain amplifier 314 has a negative signal output, and a negative signal input into the negative gain amplifier 314 has a positive signal output. In both cases, the magnitude of the input and the magnitude of the output are equal.

[0044] In operation, the sensing current modification stage modifies the sensing current to generate a signal that can offset the current ripple generated from the Vin source. This is performed by passing the sensing and replica signals from the sensing stage in parallel through both a high-pass filter and a low-pass filter. The sensing and replica signal passes through a low-pass filter 308 to allow low-frequency signals to pass while attenuating high-frequency signals. In doing so, a baseline or bias signal is propagated to the next stage to establish an operating point for further signal processing. The sensing and replica signal passes through a high-pass filter 310 and then passes through an amplifier 312 and a negative gain amplifier 314 to allow high-frequency signals to pass while attenuating low-frequency signals. In this way, periodic signal fluctuations (current ripples) are captured. These periodic signal fluctuations are then amplified and inverted for later elimination. These two paths are added together for subsequent signal processing of the elimination stage.

[0045] The current cancellation stage 317 includes a third transistor 318, a cancellation transistor 320, and a cancellation amplifier 322. The third transistor 318 (also referred to as a feedback transistor) has a first current terminal, a second current terminal, and a control terminal. The first current terminal is coupled to Vin. The second current terminal is coupled to a first input terminal of the cancellation amplifier 322 and the output of the adder 316 from the current modification stage. The control terminal of the third transistor 318 is coupled to the output of the cancellation amplifier 322 and the control terminal of the cancellation transistor 320. The second current terminal of the cancellation transistor 320 is connected to the output of the example device, which is in the example device. Figure 3In the example of , a LDO is provided. A first current terminal of the cancellation transistor is coupled to Vin, and a second current terminal of the cancellation transistor 320 is coupled to Vout. Furthermore, a second input of the cancellation amplifier 322 is coupled to a reference voltage Vref.

[0046] The cancellation amplifier 322 is used to reduce the undesirable signal or noise from its output. The cancellation amplifier 322 employs a feedback mechanism that senses the undesirable signal by having a signal input at a first terminal. This input is compared with the desired signal (Vref) input at the second terminal of the cancellation amplifier 322. Thus, a signal opposite to the undesirable signal is generated at Vout.

[0047] The second current terminal of the third transistor 318 is equal to Vref due to the feedback mechanism formed by the third transistor 318 and the cancellation amplifier 322. The control terminal of the third transistor 318 is controlled by the output of the cancellation amplifier 322. When the control terminal of the third transistor 318 is controlled by the output of the cancellation amplifier 322, the output of the cancellation amplifier 322 causes the current in the third transistor 318 to be equal to the current at the output of the adder 316 from the current modification stage by controlling the current from Vin to flow through the third transistor 318.

[0048] The first current terminal of the elimination transistor 320 and the first current terminal of the third transistor 318 are coupled to Vin. The control terminal of the elimination transistor 320 and the control terminal of the third transistor are coupled to each other. The feedback mechanism formed by the third transistor 318 and the elimination amplifier 322 makes the second current terminal of the third transistor 318 equal to the Vref voltage. The Vref voltage is equal to the Vout voltage. Therefore, the voltage of the second current terminal of the third transistor 318 is equal to the voltage of the second current terminal of the elimination transistor 320.

[0049] The ratio of the current through the third transistor 318 to the current through the cancellation transistor 320 is determined by the ratio between the size of the third transistor 318 and the size of the cancellation transistor 320. Figure 3 In the example of FIG. 3 , the size of the cancellation transistor 320 is K / 10 times the size of the third transistor 318. The ripple current flowing through the cancellation transistor 320 is K / 10 times the ripple current in the third transistor 318. Therefore, the magnitude of the ripple current flowing through the cancellation transistor 320 is equal to the ripple current in the pass element 206.

[0050] In operation, the cancellation stage operates to inject the modified sense current into the Vout node. By using the cancellation amplifier 322, the third transistor 318 and the cancellation transistor 320, the sensed and subsequently modified signal is introduced to Vout. The output of the cancellation amplifier 322 controls the control terminals of the third transistor 318 and the cancellation transistor 320, which in turn controls the current through the third transistor 318 and the cancellation transistor 320. The cancellation transistor 320 allows current to flow from Vin through the cancellation transistor 320 and flow to Vout determined by the third transistor 318, because the third transistor 318 forms a feedback mechanism with the cancellation amplifier 322 to receive the output current of the adder, and then controls the current through the cancellation transistor 320 by modifying the voltage at the control terminal of the cancellation transistor 320.

[0051] In the operation of the LDO with parallel feed-forward current ripple suppression scheme 300, the stages operate together to cancel the change in current through the pass element 206. This is done by passing a current (cancellation current) opposite to the change in current due to noise through the pass element 206. The cancellation current is generated by using the FFCRR 208, which senses the amount of current fluctuating through the pass element 206, replicates the current fluctuation, modifies the current fluctuation by filtering, inverting, and amplifying the signal. The generated cancellation current is then introduced to the Vout node to cancel the change in current through the pass element 206.

[0052] The relationship between the transconductance of the transistor and the gain of the amplifier is interrelated. For any amount of current through the pass element 206, the sensing stage senses the current ratio K:1. The gain of the amplifier 312 in the current modification stage can be selected. The amount of current allowed through the third transistor 318 must be equal to the amount of current through the sensing transistor 302. Therefore, the cancellation transistor 320 must have a transconductance K at the strength of the amplifier.

[0053] exist Figure 3 In the example of , the transfer element 206 is a transfer transistor with a transconductance of K. The transconductance of the sense transistor 302 is 1, and effectively steps the current down by K:1. The amplifier 312 can be selected to have a gain of G, Figure 3In the example of , the gain is ten. The transconductance of the third transistor (feedback transistor) 318 is equal to the transconductance of the sense transistor 302 (e.g., 1) so that the current through the third transistor 318 is equal to the current at the output of the adder 316. The current flow is controlled by the output of the cancellation amplifier 322, which forms a feedback loop with the third transistor 318. The formation of the feedback loop combined with controlling the current through the third transistor 318 to be equal to the current output of the adder 316 makes the feedback mechanism of the cancellation amplifier 322 a control for the cancellation transistor 320. Thus, the transconductance of the cancellation transistor 320 is K / G, and at Figure 3 In the example of , the transconductance is K / 10.

[0054] Figure 4 4 is a flow chart showing the functionality of the feed-forward current ripple suppression circuit system. The process begins at block 402, where the sensing stage senses the current flow through the transfer element 206. For example, the ripple current in the transfer element 206 is quantized as A. The sensing stage senses the current through the transfer element 206 and copies the ripple current to the sensing transistor 302 at the value of A / K.

[0055] After sensing the current through the transfer element 206, the parallel path allows the current to be modified. In the first path, shown by block 404, the current is filtered by a low pass filter. The low pass filter allows low frequency signals to pass while attenuating high frequency signals. This filters out undesirable noise, signals, and fluctuations in the input signal and only allows a certain lower frequency component to be transmitted to bias the next stage.

[0056] In the second path shown, after sensing the Figure 4 After the current of the transfer element 206 is captured, block 406 shows the signal being filtered through a high pass filter. The high pass filter allows high frequency signals to be transmitted while attenuating low frequency signals. This allows fluctuations in the input signal to pass through while filtering out undesirable lower frequency signals. The fluctuations in the input signal are then modified by being amplified in block 408 and then inverted in block 410. The amplification and subsequent inversion of the signal allows most of the captured current ripple through the transfer element 206 to be amplified for further signal processing.

[0057] Once the input signal is sensed at 402, biased by block 404, and filtered and modified by blocks 406, 408, and 410, the two processed signal components are added together by adder 316 in block 412. The combination of the bias signal and the inverted replica of the ripple current allows for subsequent injection of a signal for canceling the current ripple.

[0058] Subsequent injection of a signal for canceling the current ripple occurs at block 414, where the cancellation stage of the LDO with parallel feed-forward current ripple suppression scheme 300 uses cancellation element 320 to inject a signal into Vout, where the ripple current is canceled. The Vout of the LDO can then be used as an input to Rload 210, which is Figure 1 1 is shown as processor circuitry 110 .

[0059] As used herein, the term "transistor" has been used as an open term to include field effect transistors (FETs) or transistors of any other technology. The term transistor should be interpreted as a semiconductor device used for electronic switching and amplification, regardless of structural or operational differences. Even though some transistors utilize bipolar junctions and carriers, and some transistors (e.g., FETs) rely on electric fields to control current flow, both embodiments are contemplated.

[0060] "Include" and "comprising" (and all forms and tenses thereof) are used herein as open-ended terms. Thus, whenever a technical solution uses any form of "include" or "comprising" (e.g., comprises, comprising, includes, including, having, etc.) as a leading phrase or employed within any type of technical solution quotation, additional elements, terms, etc. may be present without departing from the scope of the corresponding technical solution or quotation. As used herein, when the phrase "at least" is used as a transitional term, such as in the leading phrase of a technical solution, it is open-ended in the same manner as the terms "include" and "comprising". The term "and / or", when used, for example, in the form of A, B, and / or C, refers to any combination or subset of A, B, C, such as (1) only A, (2) only B, (3) only C, (4) A and B, (5) A and C, (6) B and C, or (7) A and B and C. As used herein in the context of describing structures, components, items, objects, and / or things, the phrase "at least one of A and B" is intended to refer to embodiments that include any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. Similarly, as used herein in the context of describing structures, components, items, objects, and / or things, the phrase "at least one of A or B" is intended to refer to embodiments that include any of the following: (1) at least one A; (2) at least one B; or (3) at least one A and at least one B. As used herein in the context of describing the execution or performance of processes, instructions, actions, activities, and / or steps, the phrase "at least one of A and B" is intended to refer to embodiments that include any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. Similarly, as used herein in the context of describing the execution or performance of a process, instruction, action, activity, and / or step, the phrase "at least one of A or B" is intended to refer to an embodiment that includes any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B.

[0061] As used herein, singular references (e.g., "a / an", "first", "second", etc.) do not exclude the plural. As used herein, the term "a" or "an" object refers to one or more of the objects. The terms "one / an", "one or more", and "at least one" are used interchangeably herein. In addition, although listed separately, multiple components, elements, or actions may be implemented by, for example, the same entity or object. In addition, although individual features may be included in different examples or technical solutions, these features may be combined, and the inclusion in different examples or technical solutions does not imply that the combination of features is not feasible and / or not advantageous.

[0062] In this specification, the term "and / or" (when used in the form of, for example, A, B, and / or C, etc.) refers to any combination or subset of A, B, C, such as: (a) only A; (b) only B; (c) only C; (d) A and B; (e) A and C; (f) B and C; and (g) A and B and C. Also, as used herein, the phrase "at least one of A or B" (or "at least one of A and B") refers to embodiments that include any of the following: (a) at least one A; (b) at least one B; and (c) at least one A and at least one B.

[0063] In this specification, the term "coupled" may encompass connections, communications, or signal paths that achieve a functional relationship consistent with this specification. For example, if device A generates a signal to control device B to perform an action, then: (a) in a first instance, device A is coupled to device B through a direct connection; or (b) in a second instance, device A is coupled to device B through an intermediate component C, provided that the intermediate component C does not change the functional relationship between device A and device B, so that device B is controlled by device A via the control signal generated by device A.

[0064] Numerical identifiers such as "first", "second", "third", etc. are only used to distinguish elements of substantially the same type in terms of structure and / or function. These identifiers used in the detailed description are not necessarily consistent with the identifiers used in the claims.

[0065] A device "configured to" perform a task or function may be configured (e.g., programmed and / or hardwired) by the manufacturer at the time of manufacture to perform the function, and / or may be configured (or reconfigurable) by a user after manufacture to perform the function and / or other additional or alternative functions. The configuration may be performed through firmware and / or software programming of the device, through the construction and / or layout of the device's hardware components and interconnections, or a combination thereof.

[0066] As used herein, the terms "terminal", "node", "interconnection", "pin" and "lead" are used interchangeably. Unless specifically stated to the contrary, these terms are generally used to refer to the interconnections between device elements, circuit elements, integrated circuits, devices or other electronic devices or semiconductor components or their terminals.

[0067] A circuit or device described herein as including certain components may actually be adapted to be coupled to those components to form the described circuit system or device. For example, a structure described as including one or more semiconductor elements (e.g., transistors), one or more passive elements (e.g., resistors, capacitors, and / or inductors), and / or one or more sources (e.g., voltage and / or current sources) may actually include only semiconductor elements within a single physical device (e.g., a semiconductor die and / or an integrated circuit (IC) package), and may be adapted to be coupled to at least some of the passive elements and / or sources to form the described structure at the time of manufacture or after manufacture, for example, by an end user and / or a third party.

[0068] The circuit described herein can be reconfigured to include the replaced components to provide functionality similar to the functionality available before the component replacement at least in part. Unless otherwise stated, the components shown as resistors generally represent any one or more elements coupled in series and / or in parallel to provide the impedance amount represented by the resistor shown. For example, the resistor or capacitor shown and described as a single component herein can actually be a plurality of resistors or capacitors coupled in parallel between the same nodes, respectively. For example, the resistor or capacitor shown and described as a single component herein can actually be a plurality of resistors or capacitors coupled in series between the two nodes identical to a single resistor or capacitor, respectively. Although some elements of the described examples are included in the integrated circuit and other elements are outside the integrated circuit, in other examples, additional or fewer features can be incorporated into the integrated circuit. In addition, some or all of the features shown as being outside the integrated circuit can be included in the integrated circuit, and / or some features shown as being inside the integrated circuit can be incorporated outside the integrated circuit. As used herein, the term "integrated circuit" means one or more circuits that are: (i) incorporated in / on a semiconductor substrate; (ii) incorporated in a single semiconductor package; (iii) incorporated into the same module; and / or (iv) incorporated in / on the same printed circuit board.

[0069] The use of the phrase "ground" in the foregoing description includes chassis ground, ground wire ground, floating ground, virtual ground, digital ground, common ground, and / or any other form of ground connection that is applicable or suitable for the teachings of this specification. Unless otherwise stated, "about," "substantially," or "substantially" preceding a value means + / - 10% of the stated value, or if the value is zero, means a reasonable range of values ​​around zero.

[0070] Modifications to the described examples are possible, and other examples are possible, within the scope of the claims.

[0071] Based on the foregoing, it should be understood that example systems, devices, articles, and methods for preventing common mode propagation and lockup of frequency divider circuits have been described. The described systems, devices, articles, and methods improve the efficiency of using computing devices by improving stability, reducing output voltage variations, and reducing the impact of load changes in low dropout regulators. This produces a more reliable and consistent power supply, especially in applications where stable voltage is advantageous. The described systems, devices, articles, and methods therefore relate to one or more improvements in the operation of machines such as computers or other electronic and / or mechanical devices.

[0072] The attached claims are hereby incorporated by reference into this detailed description. Although certain example systems, devices, articles, and methods have been described herein, the coverage of this patent is not limited thereto. On the contrary, this patent covers all systems, devices, articles, and methods that fall completely within the scope of the claims of this patent.

Claims

1. A circuit comprising: a first transistor having a first current terminal, a control terminal, and a second current terminal, the second current terminal of the first transistor being coupled to a ground terminal; a low pass filter having an input and an output, the input of the low pass filter being coupled to the first current terminal of the first transistor; a high pass filter having an input and an output, the input of the high pass filter being coupled to the first current terminal of the first transistor; a first amplifier having an input and an output, the input of the first amplifier being coupled to the output of the high pass filter; a negative gain amplifier having an input and an output, the input of the negative gain amplifier being coupled to the output of the first amplifier; an adder having a first input, a second input and an output, the first input of the adder being coupled to the output of the negative gain amplifier, the second input being coupled to the output of the low pass filter; a second amplifier having a first input, a second input, and an output, the first input being coupled to the output of the adder; a second transistor having a first current terminal, a control terminal, and a second current terminal, the control terminal of the second transistor being coupled to the output of the second amplifier, the second current terminal of the second transistor being coupled to the first input of the second amplifier; as well as A third transistor has a first current terminal, a control terminal, and a second current terminal, the control terminal of the third transistor being coupled to the output of the second amplifier, and the second current terminal of the third transistor being coupled to an output terminal.

2. The circuit according to claim 1, wherein: The second transistor has a body terminal, the body terminal of the second transistor being coupled to the second current terminal of the second transistor. 3 . The circuit of claim 1 , wherein the third transistor has a body terminal, the body terminal of the third transistor being coupled to the second current terminal of the third transistor.

4. The circuit of claim 1 , further comprising a current sensing circuit, the current sensing circuit comprising: a fourth transistor having a first current terminal, a control terminal, a body terminal, and a second current terminal, the body terminal being coupled to the second current terminal of the fourth transistor; a third amplifier having a first input, a second input coupled to the second current terminal of the fourth transistor, and an output; as well as A fifth transistor having a first current terminal, a control terminal and a second current terminal, the first current terminal of the fifth transistor being coupled to the second current terminal of the fourth transistor, the control terminal being coupled to the output of the third amplifier. 5 . The circuit of claim 4 , wherein the control terminal of the first transistor is coupled to the control terminal of the fifth transistor. The circuit of claim 4 , wherein the third amplifier is an operational transconductance amplifier.

7. The circuit of claim 4, further comprising a sixth transistor having a first current terminal, a control terminal, and a second current terminal, the second current terminal of the sixth transistor being coupled to the output terminal, the control terminal of the sixth transistor being coupled to the control terminal of the fourth transistor.

8. The circuit of claim 7, wherein the sixth transistor has a body terminal, the body terminal of the sixth transistor being coupled to the second current terminal of the sixth transistor.

9. The circuit of claim 7, wherein: The fourth transistor is configured to sense a first current in the sixth transistor; and The fourth transistor having a second current is stepped down according to a first ratio.

10. The circuit of claim 9, wherein: The second transistor has a third current configured to be related to a fluctuation of the second current multiplied by a gain associated with the first amplifier.

11. The circuit of claim 10, wherein the third transistor has a fourth current that steps up according to the first ratio divided by the gain associated with the first amplifier.

12. The circuit of claim 1, wherein the first transistor, the second transistor, and the third transistor are field effect transistors.

13. The circuit of claim 1, wherein the control terminal of the first transistor is coupled to a current sensing circuit.

14. The circuit of claim 1, wherein: the second input of the second amplifier being coupled to a first voltage source; The first current terminal of the second transistor is coupled to a second voltage source; and The first current terminal of the third transistor is coupled to the second voltage source.

15. A low voltage dropout regulator circuit, comprising: an error amplifier having a first input coupled to a reference voltage, a second input coupled to the output of the low dropout regulator, and an output; a buffer having an input and an output, the input of the buffer being coupled to the output of the error amplifier; a pass transistor having a control terminal, a first current terminal coupled to the output of the buffer, and a second current terminal coupled to the output of the low dropout regulator; as well as A feed-forward current ripple suppression circuit has an input and an output, the input of the feed-forward current ripple suppression circuit being coupled to the first current terminal of the pass transistor, the output of the feed-forward current ripple suppression circuit being coupled to the output of the low dropout regulator.

16. The low dropout regulator circuit according to claim 15, wherein the feed-forward current ripple suppression circuit comprises: a current sensing stage including a sense transistor; a sense current modification stage including an amplifier; and Current cancellation stage, which contains: a feedback transistor; and Eliminate transistors.

17. The low dropout regulator circuit of claim 16, wherein: the sense transistor having a first current terminal, a control terminal, a bulk terminal, and a second current terminal, the control terminal of the sense transistor being coupled to the control terminal of the pass transistor; and The cancellation transistor has a first current terminal, a control terminal, and a second current terminal, the second current terminal of the cancellation transistor being coupled to the output of the low dropout regulator.

18. The low dropout regulator circuit of claim 17, wherein: The transconductance of the feedback transistor is equal to the transconductance of the sensing transistor; and The transconductance of the cancellation transistor is equal to the transconductance of the pass transistor divided by the gain of the amplifier.

19. A low voltage dropout regulator circuit, comprising: an error amplifier configured to generate an error signal of a comparison of the output voltage with a reference voltage; a buffer configured to stabilize the output voltage; a pass transistor configured to control a flow of current through the pass transistor; as well as A feed-forward current ripple suppression circuit is connected in parallel with the transfer transistor, and the feed-forward current ripple suppression circuit comprises: a sense transistor configured to sense the current passing through the pass transistor; an amplifier having a gain, the amplifier being configured to amplify a signal for further processing, the signal being indicative of a current ripple through the pass transistor; a feedback transistor configured to form a feedback loop with the cancellation amplifier, wherein a voltage of a first current terminal of the feedback transistor is equal to the reference voltage; as well as A cancellation transistor is configured to inject the signal indicative of current ripple into the output of the low dropout regulator circuit, the signal indicative of current ripple being 180 degrees out of phase with the sensed current ripple.

20. The low dropout regulator circuit of claim 19, wherein: The transconductance of the transfer transistor is K; The gain of the amplifier is G; and The transconductance of the cancellation transistor is K / G.

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