A low-voltage high-precision linear calibration circuit, current source and electric device
By introducing N negative feedback circuits and calibration units into a low-voltage, high-precision linear calibration circuit, and using MOS switches and control signals to modulate the voltage, the problem of output voltage drift is solved, achieving high-precision and reliable control of multiple output voltages, which is suitable for electronic measurement and control systems.
Patent Information
- Application Number
- CN202411735113.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-29
- Publication Date
- 2025-11-21
- Estimated Expiration
- 2044-11-29
AI Technical Summary
The output voltage of the low-voltage, high-precision linear calibration circuit is easily affected by temperature changes, resulting in insufficient accuracy of the current source output.
Using N negative feedback circuits and identical calibration and reference units, voltage modulation is achieved using MOS switches and control signals. Through Cascode cascade structure and ultra-low threshold voltage reverse well technology, the output impedance and current replication accuracy of the current mirror are enhanced. Combined with differential input pairs and current mirror load circuit, a bias signal matching the voltage difference is generated.
It improves the output accuracy and reliability of low-voltage high-precision linear calibration circuits, and realizes precise control of various output voltages, making it suitable for electronic measurement and control systems.
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Figure CN119440158B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of electronic circuits, in particular to a low-voltage high-precision linear calibration circuit, a current source and an electrical equipment. BACKGROUND
[0002] The low-voltage high-precision linear calibration circuit is a circuit specially designed for realizing high-precision linear calibration in a low-voltage environment. Such a circuit has a wide range of applications in the fields of electronic measurement, control systems, instruments and meters, etc.
[0003] In the prior art, the output voltage of the low-voltage high-precision linear calibration circuit may drift with temperature changes, so that the output of the current source is not accurate enough. SUMMARY
[0004] Therefore, the embodiments of the present application provide a low-voltage high-precision linear calibration circuit, a current source and an electrical equipment to provide a current source capable of accurate output.
[0005] To achieve the above object, the embodiments of the present application provide the following technical solutions.
[0006] A low-voltage high-precision linear calibration circuit comprises:
[0007] N negative feedback circuits, and calibration units and N reference units of the same structure, wherein N is a positive integer not less than 1;
[0008] The calibration unit and the reference unit comprise a first control switch, a first MOS switch tube, a second MOS switch tube, a third MOS switch tube and a fourth MOS switch tube.
[0009] The first control switch has a stationary contact, a first moving contact and a second moving contact, the stationary contact is connected to the control end of the first MOS switch tube, the first moving contact is used to be connected to a first power supply, and the second moving contact is used to obtain a first control signal.
[0010] The first end of the first MOS switch tube is used to be connected to the first power supply.
[0011] The first end of the second MOS switch tube is used to be connected to the second end of the first MOS switch tube, the control end of the second MOS switch tube is used to obtain a second control signal, the back gate of the second MOS switch tube is used to be connected to the first power supply.
[0012] The control end of the third MOS switch tube is used to obtain a third control signal, the first end of the third MOS switch tube is connected to the second end of the second MOS switch tube, the back gate of the third MOS switch tube is used to be connected to a second power supply, and the second end of the third MOS switch tube is connected to a first output node.
[0013] The control end of the fourth MOS switch tube is used for obtaining a fourth control signal, the first end of the fourth MOS switch tube is connected with the second end of the second MOS switch tube, the back gate of the fourth MOS switch tube is connected with the second power supply, and the second end of the fourth MOS switch tube is connected with a second output node.
[0014] N negative feedback circuits correspond to the reference units one by one, the first input end of the negative feedback circuit is connected with the first output node, the second input end of the negative feedback circuit is connected with the second output node, and the output end of each negative feedback circuit is connected with the back gate of the first MOS switch tube in the corresponding reference unit.
[0015] Optionally, in the low-voltage high-precision linear calibration circuit, the second MOS switch tube is in a cascode cascade structure.
[0016] Optionally, in the low-voltage high-precision linear calibration circuit, the third MOS switch tube and the fourth MOS switch tube are switch tubes realized based on a reverse well process of an ultra-low threshold voltage.
[0017] Optionally, in the low-voltage high-precision linear calibration circuit, the negative feedback circuit comprises:
[0018] a load capacitor, a second control switch, a differential input pair, a current mirror load circuit, a current mirror load, and a tail current source switch tube.
[0019] The first end of the load capacitor is connected with the output end of the negative feedback circuit, and the second end of the load capacitor is grounded.
[0020] The second control switch has a stationary contact, a first moving contact and a second moving contact, the first moving contact of the second control switch is connected with the output of the negative feedback circuit, and the stationary contact of the second control switch is connected with the first output end of the current mirror load circuit.
[0021] The input end of the current mirror load circuit is connected with a third power supply, the first output end of the current mirror load circuit is connected with the first input end of the current mirror load, the fourth output end of the current mirror load circuit is connected with the second input end of the current mirror load, and the tail current source switch tube is connected with the third power supply.
[0022] The first input end of the differential input pair is connected with the second output end of the current mirror load circuit, the second input end of the differential input pair is connected with the third output end of the current mirror load circuit, the first control end of the differential input pair serves as the first input end of the negative feedback circuit, and the second control end of the differential input pair serves as the second input end of the negative feedback circuit.
[0023] The input end of the tail current source switch tube is connected with the output end of the differential input pair, the output end of the tail current source switch tube is grounded, and the control end of the tail current source switch tube is used to obtain a preset voltage bias.
[0024] Optionally, in the low-voltage high-precision linear calibration circuit, the current mirror load circuit comprises:
[0025] a fifth MOS switch tube, a sixth MOS switch tube, a seventh MOS switch tube and an eighth MOS switch tube;
[0026] The first end of the fifth MOS switch tube, the sixth MOS switch tube, the seventh MOS switch tube and the eighth MOS switch tube serves as the input end of the current mirror load circuit;
[0027] The gate of the fifth MOS switch tube and the sixth MOS switch tube is interconnected, the gate of the sixth MOS switch tube is further connected with the second end of the sixth MOS switch tube, the second end of the fifth MOS switch tube serves as the first output end of the current mirror load circuit, and the second end of the sixth MOS switch tube serves as the second output end of the current mirror load circuit;
[0028] The gate of the seventh MOS switch tube and the eighth MOS switch tube is interconnected, the gate of the seventh MOS switch tube is further connected with the second end of the seventh MOS switch tube, the second end of the seventh MOS switch tube serves as the third output end of the current mirror load circuit, and the second end of the eighth MOS switch tube serves as the fourth output end of the current mirror load circuit;
[0029] The differential input pair comprises:
[0030] a ninth MOS switch tube and a tenth MOS switch tube;
[0031] The output end of the ninth MOS switch tube and the tenth MOS switch tube serves as the output end of the differential input pair;
[0032] The first end of the ninth MOS switch tube serves as the first input end of the differential input pair, and the control end of the ninth MOS switch tube serves as the first control end;
[0033] The first end of the tenth MOS switch tube serves as the first input end of the differential input pair, and the control end of the tenth MOS switch tube serves as the second control end;
[0034] The current mirror load comprises:
[0035] an eleventh MOS switch tube and a twelfth MOS switch tube;
[0036] The second end of the eleventh MOS switch tube and the twelfth MOS switch tube is the output end of the current mirror load.
[0037] The gate of the eleventh MOS switch tube and the twelfth MOS switch tube is interconnected, the first end of the eleventh MOS switch tube is the first input end of the current mirror load, and the first end of the twelfth MOS switch tube is the second input end of the current mirror load.
[0038] Optionally, in the low-voltage high-precision linear calibration circuit, the first MOS switch tube and the second MOS switch tube are PMOS switch tubes, and the third MOS switch tube and the fourth MOS switch tube are NMOS switch tubes.
[0039] Optionally, in the low-voltage high-precision linear calibration circuit, the fifth MOS switch tube, the sixth MOS switch tube, the seventh MOS switch tube, and the eighth MOS switch tube are PMOS switch tubes.
[0040] The ninth MOS switch tube, the tenth MOS switch tube, the eleventh MOS switch tube, and the twelfth MOS switch tube, and the tail current source switch tube are NMOS switch tubes.
[0041] Optionally, in the low-voltage high-precision linear calibration circuit, further comprising:
[0042] A first output resistor and a second output resistor;
[0043] The first end of the first output resistor is connected to the first output node;
[0044] The first end of the second output resistor is connected to the second output node;
[0045] At this time, the second end of the first output resistor and the second output resistor is the output end of the low-voltage high-precision linear calibration circuit.
[0046] A current source comprising the low-voltage high-precision linear calibration circuit of any one of the above.
[0047] A power utilization device comprising the current source.
[0048] Based on the technical scheme, in the working process of the circuit, the first control switch in the calibration unit is in conduction between the fixed contact and the second movable contact under the action of the control signal, the fourth MOS switch in the calibration unit is in conduction under the control of the third control signal and the fourth control signal, the calibration unit generates a calibration voltage at the second output node, when the first control switch in one of the reference units is closed, the third control signal in the reference power supply controls the third MOS switch to be in conduction, at this time, the reference unit generates a calibration voltage at the first output node, at this time, the negative feedback circuit outputs a modulation voltage based on the voltage values of the first output node and the second output node, the modulation voltage is applied to the back gate of the first MOS switch in the reference unit corresponding to the negative feedback structure, the voltage serves as the bias voltage of the first MOS switch, and then the voltage at the first output node is modulated, so that the output result of the low-voltage high-precision linear calibration circuit is more accurate and reliable, thereby, the currents generated by the calibration power supply and the reference unit generate a pressure difference on the first output node / second output node, so as to realize the function of the DAC. BRIEF DESCRIPTION OF DRAWINGS
[0049] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained without creative labor based on the provided drawings.
[0050] Figure 1 The circuit structure schematic diagram of the low-voltage high-precision linear calibration circuit disclosed in the embodiments of the present application is shown in the figure.
[0051] Figure 2 The circuit structure schematic diagram of the negative feedback circuit disclosed in the embodiments of the present application is shown in the figure. DETAILED DESCRIPTION
[0052] The technical solutions in the embodiments of the present application will be described clearly and completely in the following with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, not all. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the protection scope of the present application.
[0053] The present application discloses a low-voltage high-precision linear calibration circuit capable of providing various output voltages from low to high, as shown in Figure 1 The circuit comprises:
[0054] The calibration unit 100, N negative feedback circuits S&H and N reference units 200, wherein N is a positive integer not less than 1; wherein the circuit structure of the calibration unit 100 and each reference unit 200 is the same.
[0055] The calibration unit 100 and the reference unit 200 comprise a first control switch SC1, a first MOS switch tube P00, a second MOS switch tube P01, a third MOS switch tube N01 and a fourth MOS switch tube N02.
[0056] The first control switch SC1 has a static contact, a first moving contact and a second moving contact, the static contact is connected with the control end of the first MOS switch tube P00, the first moving contact is used for being connected with the first power supply VCC, and the second moving contact is used for obtaining a first control signal BIAS0, and the size of the current flowing through the first MOS switch tube P00 is controlled through the first control signal BIAS0.
[0057] The first end of the first MOS switch tube P00 is used for being connected with the first power supply; wherein the back gate of the first MOS switch tube P00 in the calibration unit 100 is connected with the first power supply VCC, and the back gate of the first MOS switch tube P00 in the reference unit 200 is connected with the output end of the corresponding negative feedback circuit S&H.
[0058] The first end of the second MOS switch tube P01 is used for being connected with the second end of the first MOS switch tube P00, the control end of the second MOS switch tube P01 is used for obtaining a second control signal VCAS, the back gate of the second MOS switch tube P01 is used for being connected with the first power supply, and the gate of the second MOS switch tube P01 is controlled through the second control signal VCAS to form a cascode current mirror and increase impedance. The cascode current mirror is a high-performance current mirror structure widely used in analog integrated circuit design, which forms a cascode structure by introducing an additional transistor, significantly improves the impedance of the output end, thereby reducing the influence of load changes on the output current and reducing the interference of channel length modulation effect on the accuracy of current replication. This structure makes the cascode current mirror have the advantages of high output impedance and high current replication accuracy, and is suitable for differential pair load, double-ended input single-ended output and other functions. Although it may bring challenges such as reduced output swing and stability problems, by optimizing transistor size, gate length and other parameters and adopting advanced technologies such as gain improvement, its performance and stability can be further improved. Therefore, the cascode current mirror plays an important role in analog integrated circuit design and provides reliable technical support for current replication and signal processing.
[0059] The control end of the third MOS switch tube N01 is used for obtaining a third control signal OFF, the first end of the third MOS switch tube N01 is connected with the second end of the second MOS switch tube P01, the back gate of the third MOS switch tube N01 is used for being connected with a second power supply, and the second end of the third MOS switch tube N01 is connected with a first output node; when the third control signal OFF=1, the third MOS switch tube N01 is turned on.
[0060] The control end of the fourth MOS switch tube N02 is used for obtaining a fourth control signal ON, the first end of the fourth MOS switch tube N02 is connected with the second end of the second MOS switch tube P01, the back gate of the fourth MOS switch tube N02 is used for being connected with the second power supply, and the second end of the fourth MOS switch tube N02 is connected with a second output node; when the fourth control signal ON=1, the fourth MOS switch tube N02 is turned on, and the third control signal OFF and the fourth control signal ON are non-overlapping control signals.
[0061] N negative feedback circuits S&H correspond to the reference units 200 one by one, the first input end of the negative feedback circuit S&H is connected with the first output node, the second input end of the negative feedback circuit S&H is connected with the second output node, and the output end of each negative feedback circuit S&H is connected with the back gate of the first MOS switch tube P00 in the reference unit 200 corresponding to the negative feedback circuit S&H.
[0062] In the above circuit, the control signal of the control end of the first control switch SC1 can be a high level, when the control signal is a high level signal, the second moving contact of the first control switch SC1 is connected to the BIAS0 node, a first control signal is obtained, and the second moving contact and the static contact are turned on, at this time, the first control signal BIAS0 is applied to the first MOS switch tube P00 through the first control switch SC1, when the control signal of the control end of the first control switch SC1 is a low level, the first moving contact of the first control switch SC1 is connected to a first power supply, the first moving contact and the static contact are turned on, and the voltage of the first voltage source VCC is applied to the control end of the first MOS switch tube P00.
[0063] At the calibration moment, the first control switch SC1 in the calibration unit 100 is turned on by the static contact and the second moving contact under the action of the control signal, and under the control of the third control signal OFF and the fourth control signal ON, the fourth MOS switch tube N02 in the calibration unit 100 is turned on, and the calibration unit 100 generates a calibration voltage on the second output node. When the first control switch SC1 in one of the reference units 200 is closed, the third control signal OFF in the reference power supply controls the third MOS switch tube N01 to be turned on, at this time, the reference unit 200 generates a calibration voltage on the first output node, at this time, the negative feedback circuit S&H outputs a modulation voltage latch based on the voltage values of the first output node and the second output node, which is applied to the back gate of the first MOS switch tube P00 in the reference unit 200 corresponding to the negative feedback structure. The voltage serves as the bias voltage of the first MOS switch tube P00, and further modulates the voltage on the first output node. Thus, the calibration power supply and the reference unit 200 generate a voltage difference on the first output node / second output node, thereby realizing the function of the DAC. The working principles of the other reference units 200 are similar, so that the number of reference units 200 in the working state controlled by the controller can obtain calibrated 1 times, 2 times, …, N times of reference currents, so that the output results of the low-voltage high-precision linear calibration circuit are more accurate and reliable.
[0064] In the technical solution disclosed in the embodiment, the second MOS switch tube P01 can be a cascode cascade structure, which aims to eliminate high-frequency interference caused by parasitic capacitance and improve the output resistance of the current mirror composed of the third MOS switch tube N01 and the fourth MOS switch tube N02. The third MOS switch tube N01 and the fourth MOS switch tube N02 are switch tubes realized based on a super low threshold voltage (SLVT) reverse well process, and the back gate of the third MOS switch tube N01 and the fourth MOS switch tube N02 is connected to the second power supply VCC2 to reduce the gate threshold voltage (threshold voltage) VTH of the switch tube.
[0065] The structure of the negative feedback circuit S&H is a sampling structure, which aims to generate a bias signal matched with the voltage difference between the first output node and the second output node to the back gate of the first MOS switch tube P00. The specific structure of the negative feedback circuit S&H can be selected by the user as needed, for example, see Figure 2 The negative feedback circuit S&H disclosed in the embodiment of the application comprises:
[0066] The load capacitor C11, the second control switch SC, the differential input pair, the current mirror load circuit, the current mirror load, and the tail current source switch tube M15;
[0067] The first end of the load capacitor C11 is connected to the output end of the negative feedback circuit S&H, and the second end of the load capacitor C11 is grounded.
[0068] The second control switch SC has a static contact, a first moving contact and a second moving contact, the first moving contact of the second control switch SC is connected to the output end of the negative feedback circuit, and the static contact of the second control switch SC is connected to the first output end of the current mirror load circuit.
[0069] The input end of the current mirror load circuit is connected to the third power supply, the first output end of the current mirror load circuit is connected to the first input end of the current mirror load, and the fourth output end of the current mirror load circuit is connected to the second input end of the current mirror load.
[0070] The first input end of the differential input pair is connected to the second output end of the current mirror load circuit, the second input end of the differential input pair is connected to the third output end of the current mirror load circuit, the first control end of the differential input pair serves as the first input end of the negative feedback circuit S&H, and the second control end of the differential input pair serves as the second input end of the negative feedback circuit S&H.
[0071] The input end of the tail current source switch tube M15 is connected to the output end of the differential input pair, the output end of the tail current source switch tube M15 is grounded, and the control end of the tail current source switch tube M15 is used to obtain a preset voltage bias, so that the tail current source switch tube M15 provides a stable current.
[0072] In the calibration phase, the second control switch SC is closed (the static contact of the second switch SC is connected to the first moving contact), the first output end VON of the current mirror load is connected to the load capacitor C11 and the output end of the negative feedback circuit S&H, the first control end INP of the differential input pair is connected to the second output node, and the second control end INN of the differential input pair is connected to the first output node. When the reference current on the first output node is less than the calibration current on the second output node, the voltage collected by the first control end INP of the differential input pair is lower than the voltage collected by the second control end INN of the differential input pair. At this time, the output voltage of the output end VO of the negative feedback circuit S&H is low, which is applied to the back gate of the first MOS switch tube P00 of the corresponding reference unit 200, thereby increasing the current source of the first MOS switch tube P00, and thereby increasing the reference current on the first output node, so as to make the reference current equal to the calibration current.
[0073] The low-voltage high-precision linear calibration circuit, when calibrating the order, opens (disconnects the static contact and the first movable contact of the second control switch SC) the second control switch SC, and the load capacitor C11 provides a voltage to the output end VO of the negative feedback circuit S&H, which is applied to the back gate of the corresponding first MOS switch tube P00. The low-voltage high-precision linear calibration circuit, when working normally, maintains the voltage across the load capacitor C11 at a stable voltage value.
[0074] The application also discloses a differential input pair, a current mirror load circuit and a specific circuit structure of the current mirror load circuit, which are described in detail in Figure 2 The current mirror load circuit comprises:
[0075] a fifth MOS switch tube PM11, a sixth MOS switch tube PM12, a seventh MOS switch tube PM13 and an eighth MOS switch tube PM14;
[0076] The first end of the fifth MOS switch tube PM11, the sixth MOS switch tube PM12, the seventh MOS switch tube PM13 and the eighth MOS switch tube PM14 serves as the input end of the current mirror load circuit;
[0077] The gate of the fifth MOS switch tube PM11 and the sixth MOS switch tube PM12 is interconnected, the gate of the sixth MOS switch tube PM12 is also connected to the second end of the sixth MOS switch tube PM12, the second end of the fifth MOS switch tube PM11 serves as the first output end of the current mirror load circuit, and the second end of the sixth MOS switch tube PM12 serves as the second output end of the current mirror load circuit;
[0078] The gate of the seventh MOS switch tube PM13 and the eighth MOS switch tube PM14 is interconnected, the gate of the seventh MOS switch tube PM13 is also connected to the second end of the seventh MOS switch tube PM13, the second end of the seventh MOS switch tube PM13 serves as the third output end of the current mirror load circuit, and the second end of the eighth MOS switch tube PM14 serves as the fourth output end of the current mirror load circuit;
[0079] The differential input pair comprises:
[0080] a ninth MOS switch tube M11 and a tenth MOS switch tube M12;
[0081] The output end of the ninth MOS switch tube M11 and the tenth MOS switch tube M12 serves as the output end of the differential input pair;
[0082] The first end of the ninth MOS switch tube M11 is used as the first input end of the differential input pair, and the control end of the ninth MOS switch tube M11 is used as the first control end.
[0083] The first end of the tenth MOS switch tube M12 is used as the first input end of the differential input pair, and the control end of the tenth MOS switch tube M12 is used as the second control end.
[0084] The current mirror load comprises.
[0085] The eleventh MOS switch tube M13 and the twelfth MOS switch tube M14.
[0086] The second ends of the eleventh MOS switch tube M13 and the twelfth MOS switch tube M14 are used as the output ends of the current mirror load.
[0087] The gates of the eleventh MOS switch tube M13 and the twelfth MOS switch tube M14 are interconnected, the first end of the eleventh MOS switch tube M13 is used as the first input end of the current mirror load, and the first end of the twelfth MOS switch tube M14 is used as the second input end of the current mirror load.
[0088] In the above scheme disclosed by the embodiment of the application, the type of each switch tube can be selected by the user as required, for example, in the scheme, the first MOS switch tube P00 and the second MOS switch tube P01 are PMOS switch tubes, and the third MOS switch tube N01 and the fourth MOS switch tube N02 are NMOS switch tubes.
[0089] The fifth MOS switch tube PM11, the sixth MOS switch tube PM12, the seventh MOS switch tube PM13, and the eighth MOS switch tube PM14 are PMOS switch tubes, and the ninth MOS switch tube M11, the tenth MOS switch tube M12, the eleventh MOS switch tube M13, the twelfth MOS switch tube M14, and the tail current source switch tube M15 are NMOS switch tubes.
[0090] In the technical scheme disclosed by the embodiment, in order to prevent the output of the circuit from being too large and damaging the subsequent circuit, the above circuit further comprises a first output resistor RP and a second output resistor RN, the first end of the first output resistor RP is connected with the first output node, the first end of the second output resistor RN is connected with the second output node, and the second ends of the first output resistor RP and the second output resistor RN are grounded. At this time, the output voltage of the first output node is the voltage across the first output resistor RP, and the output voltage of the second output node is the voltage across the second output resistor RN.
[0091] Corresponding to the above scheme, the application further discloses a current source, which comprises the low-voltage high-precision linear calibration circuit according to any one of the above.
[0092] Corresponding to the above scheme, the application further discloses a current source, which comprises the low-voltage high-precision linear calibration circuit according to any one of the above.
[0093] The various embodiments are described in the specification by way of progression, each building on the last to facilitate ease of understanding. The same reference numerals are used consistently throughout the specification and drawings to refer to elements in multiple embodiments. The various embodiments can be described in the specification by way of progression, each building on the last to facilitate ease of understanding. The same reference numerals are used consistently throughout the specification and drawings to refer to elements in multiple embodiments.
[0094] The above description of disclosed embodiments provides enough information to enable those skilled in the art to make and use the application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein can be applied to other embodiments without departing from the spirit or scope of the application. Therefore, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A low-voltage, high-precision linear calibration circuit, characterized in that, include: N negative feedback circuits, a calibration unit with the same structure, and N reference units, where N is a positive integer not less than 1; The calibration unit and reference unit include: a first control switch, a first MOS switch, a second MOS switch, a third MOS switch, and a fourth MOS switch; The first control switch has a stationary contact, a first moving contact, and a second moving contact. The stationary contact is connected to the control terminal of the first MOS switch, the first moving contact is used to connect to a first power supply, and the second moving contact is used to acquire a first control signal. The first terminal of the first MOS switch is used to connect to the first power supply. The first terminal of the second MOS switch is used to connect to the second terminal of the first MOS switch, the control terminal of the second MOS switch is used to acquire the second control signal, and the back gate of the second MOS switch is used to connect to the first power supply. The control terminal of the third MOS switch is used to acquire a third control signal. The first terminal of the third MOS switch is connected to the second terminal of the second MOS switch. The back gate of the third MOS switch is used to connect to the second power supply. The second terminal of the third MOS switch is connected to the first output node. The control terminal of the fourth MOS switch is used to acquire the fourth control signal. The first terminal of the fourth MOS switch is connected to the second terminal of the second MOS switch. The back gate of the fourth MOS switch is used to connect to the second power supply. The second terminal of the fourth MOS switch is connected to the second output node. N negative feedback circuits correspond one-to-one with the reference unit. The first input terminal of the negative feedback circuit is connected to the first output node, the second input terminal of the negative feedback circuit is connected to the second output node, and the output terminal of each negative feedback circuit is connected to the back gate of the first MOS switch in the corresponding reference unit.
2. The low-voltage, high-precision linear calibration circuit according to claim 1, characterized in that, The second MOS switch is a cascode cascaded structure.
3. The low-voltage, high-precision linear calibration circuit according to claim 1, characterized in that, The third and fourth MOS switches are switches implemented using an ultra-low threshold voltage reverse well process.
4. The low-voltage, high-precision linear calibration circuit according to claim 1, characterized in that, The negative feedback circuit includes: Load capacitor, second control switch, differential input pair, current mirror load circuit, current mirror load and tail current source switch transistor; The first terminal of the load capacitor is connected to the output terminal of the negative feedback circuit, and the second terminal of the load capacitor is grounded. The second control switch has a stationary contact, a first moving contact, and a second moving contact. The first moving contact of the second control switch is connected to the output terminal of the negative feedback circuit, and the stationary contact of the second control switch is connected to the first output terminal of the current mirror load circuit. The input terminal of the current mirror load circuit is connected to the third power supply, the first output terminal of the current mirror load circuit is connected to the first input terminal of the current mirror load, and the fourth output terminal of the current mirror load circuit is connected to the second input terminal of the current mirror load. The first input terminal of the differential input pair is connected to the second output terminal of the current mirror load circuit, the second input terminal of the differential input pair is connected to the third output terminal of the current mirror load circuit, the first control terminal of the differential input pair serves as the first input terminal of the negative feedback circuit, and the second control terminal of the differential input pair serves as the second input terminal of the negative feedback circuit. The input terminal of the tail current source switch is connected to the output terminal of the differential input pair, the output terminal of the tail current source switch is grounded, and the control terminal of the tail current source switch is used to obtain a preset voltage bias.
5. The low-voltage, high-precision linear calibration circuit according to claim 4, characterized in that, The current mirror load circuit includes: The fifth MOS switch, the sixth MOS switch, the seventh MOS switch, and the eighth MOS switch; The first terminals of the fifth, sixth, seventh, and eighth MOS switches serve as the input terminals of the current mirror load circuit. The gates of the fifth MOS switch and the sixth MOS switch are interconnected, and the gate of the sixth MOS switch is also connected to the second terminal of the sixth MOS switch. The second terminal of the fifth MOS switch serves as the first output terminal of the current mirror load circuit, and the second terminal of the sixth MOS switch serves as the second output terminal of the current mirror load circuit. The gates of the seventh MOS switch and the eighth MOS switch are interconnected. The gate of the seventh MOS switch is also connected to the second terminal of the seventh MOS switch. The second terminal of the seventh MOS switch serves as the third output terminal of the current mirror load circuit, and the second terminal of the eighth MOS switch serves as the fourth output terminal of the current mirror load circuit. The differential input pairs include: The ninth and tenth MOS switches; The output terminals of the ninth and tenth MOS switches serve as the output terminals of the differential input pair. The first terminal of the ninth MOS switch is used as the first input terminal of the differential input pair, and the control terminal of the ninth MOS switch is used as the first control terminal. The first terminal of the tenth MOS switch is used as the first input terminal of the differential input pair, and the control terminal of the tenth MOS switch is used as the second control terminal. The current mirror load includes: The eleventh and twelfth MOS switches; The second terminals of the eleventh MOS switch and the twelfth MOS switch serve as the output terminals of the current mirror load; The gates of the eleventh MOS switch and the twelfth MOS switch are interconnected. The first terminal of the eleventh MOS switch serves as the first input terminal of the current mirror load, and the first terminal of the twelfth MOS switch serves as the second input terminal of the current mirror load.
6. The low-voltage, high-precision linear calibration circuit according to claim 1, characterized in that, The first and second MOS switches are PMOS switches, and the third and fourth MOS switches are NMOS switches.
7. The low-voltage, high-precision linear calibration circuit according to claim 5, characterized in that, The fifth, sixth, seventh, and eighth MOS switches are PMOS switches; The ninth, tenth, eleventh, and twelfth MOS switches, as well as the tail current source switch, are NMOS switches.
8. The low-voltage, high-precision linear calibration circuit according to claim 1, characterized in that, Also includes: First output resistor and second output resistor; The first terminal of the first output resistor is connected to the first output node; The first output of the second output resistor is connected to the second output node; At this time, the second terminals of the first output resistor and the second output resistor serve as the output terminals of the low-voltage high-precision linear calibration circuit.
9. A current source, characterized in that, Includes the low-voltage, high-precision linear calibration circuit as described in any one of claims 1-8.
10. An electrical appliance, characterized in that, Includes the current source as described in claim 9.
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