MCU verification method and system
By monitoring the MCU bus to generate random data and configure registers, the MCU verification process is simplified, the progress delay problem caused by the complexity of existing methods is solved, and efficient verification and rapid marketization are achieved.
Patent Information
- Application Number
- CN202310974138.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-08-03
- Publication Date
- 2025-02-14
Smart Images

Figure CN119441018A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of MCU chip design verification, and in particular to an MCU verification method and system. Background Art
[0002] MCU chip design verification refers to the process of verifying the function and performance of the microcontroller unit (MCU) chip. During the design verification phase, the engineering team will use various tools and methods to confirm whether the chip meets the design requirements, can correctly execute instructions, process data, and can operate reliably in various application scenarios. Through MCU chip design verification, the quality and reliability of the chip can be improved, the failure rate can be reduced, and the chip can be ensured to work properly in various application fields, so as to ensure that the chip design meets expectations and can be successfully put into market use.
[0003] At present, the verification of MCU mainly involves splitting the entire system into modules, building a corresponding verification platform for each module, thereby completing the functional behavior verification of each module, and then doing integrated verification. Among them, the Universal Verification Methodology (UVM) can be used to build a verification platform, and the UVM platform framework is used for verification. However, because the MCU itself belongs to a lightweight system on chip (SoC), in the existing verification methodology verification structure, each peripheral or main core should build a corresponding random verification environment, and after the module-level verification is completed, the system must be verified, and the functional coverage and code coverage must be collected, which will affect the lightweight MCU project progress and postpone the time to market of new products.
[0004] Based on this, a new solution is needed. Summary of the invention
[0005] The main purpose of the present invention is to provide a MCU verification method and system.
[0006] To achieve the above object, the present invention provides an MCU verification method, comprising the following steps:
[0007] Monitoring the MCU bus, and generating random data related to the test case of the module to be verified when detecting that the MCU has a write operation on the register of the module to be verified;
[0008] Writing the random data into a storage module;
[0009] When executing the test case, the MCU reads the random data stored in the storage module;
[0010] Using the random data to configure the register of the module to be verified, and generating a configuration file;
[0011] The module to be verified executes corresponding functions according to the configuration file to complete the verification.
[0012] In the MCU verification method provided by the present invention, before the step of generating random data related to the test case of the module to be verified, when the MCU bus is monitored and it is detected that the MCU has a write operation on the register of the module to be verified, the method further includes:
[0013] Compile the assembly source file of the module to be verified;
[0014] The assembly source file is stored in the MCU.
[0015] The MCU verification method provided by the present invention also includes:
[0016] The test case is generated according to the MCU instruction set and the assembly source file.
[0017] In addition, to achieve the above purpose, the present invention also provides an MCU verification system, including an MCU, a storage module, a module to be verified and a random verification platform based on UVM, wherein the MCU is connected to the storage module, the module to be verified and the random verification platform, and the random verification platform is also connected to the storage module.
[0018] The random verification platform is used to monitor the MCU bus, and when it is detected that the MCU has a write operation on the register of the module to be verified, generates random data related to the test case of the module to be verified, and writes the random data into the storage module;
[0019] The MCU is used to read the random data stored in the storage module when executing the test case, configure the register of the module to be verified by using the random data, and generate a configuration file;
[0020] The module to be verified is used to execute corresponding functions according to the configuration file.
[0021] In the MCU verification system provided by the present invention, the MCU is also used to generate the test case according to the pre-written assembly source file of the module to be verified and the MCU instruction set.
[0022] In the MCU verification system provided by the present invention, the random verification platform includes a monitor, a random number generator and a driver, the monitor is connected to the random number generator, the random number generator is connected to the driver,
[0023] The monitor is used to monitor the MCU bus, and when it is detected that the MCU has a write operation on the register of the module to be verified, sends a random data generation instruction to the random number generator;
[0024] The random number generator is used to generate random data related to the test case of the module to be verified;
[0025] The driver is used to write the random data into the storage module.
[0026] In addition, to achieve the above purpose, the present invention also provides an MCU verification device, including:
[0027] Memory for storing computer programs;
[0028] A processor is used to implement the steps of the MCU verification method as described above when executing the computer program.
[0029] In addition, to achieve the above-mentioned purpose, the present invention also provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the MCU verification method described above are implemented.
[0030] In the present invention, when the verification platform detects that the MCU performs a write operation on the register of the module to be verified, random data related to the test case of the module to be verified is generated and written into the storage module; subsequently, when the MCU executes the test case, the random data in the storage module is written into the module to be tested to complete the random verification of the entire system and peripherals. Compared with the traditional master-slave verification component for each peripheral, this method simplifies the entire verification process; combined with the random characteristics of UVM itself, the MCU kernel completes the random verification of all modules to be verified and storage, and no longer relies solely on the system verification directly configured by the host kernel, thereby enhancing the random coverage; the verification platform interface is simple, flexible, and easy to reuse. BRIEF DESCRIPTION OF THE DRAWINGS
[0031] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art are briefly introduced below. Obviously, the drawings in the following description are only embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on the provided drawings without creative work:
[0032] Figure 1 A schematic diagram of the flow of the MCU verification method provided in the first embodiment of the present invention;
[0033] Figure 2 The figure shows the comparison of the test progress of the prior art verification method and the verification method of the present invention;
[0034] Figure 3 The schematic diagram of the MCU verification system provided by the first embodiment of the present invention is shown. DETAILED DESCRIPTION
[0035] In order to facilitate understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. Typical embodiments of the present invention are given in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive.
[0036] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used in the specification of the present invention herein are only for the purpose of describing specific embodiments and are not intended to limit the present invention.
[0037] The general idea of the present invention is: in view of the problem of complicated verification process existing in the existing verification method, a MCU verification method and system are provided, and when the verification platform detects that the MCU performs a write operation on the register of the module to be verified, random data related to the test case of the module to be verified is generated and written into the storage module; then, when the MCU executes the test case, the random data in the storage module is written into the module to be tested to complete the random verification of the entire system and peripherals. Compared with the traditional master-slave verification component for each peripheral, this method simplifies the entire verification process; combined with the random characteristics of UVM itself, the MCU kernel is combined to complete the random verification of all modules to be verified and storage, and the system verification is no longer directly configured by the host kernel, which enhances the random coverage rate; the interface of the verification platform is simple, flexible, and easy to reuse. Thus, the entire digital development process can be accelerated, the effect of rapidly improving the coverage rate of verification functions and code coverage rate is achieved, the random verification effect of MCU is enhanced, and the tape-out is successfully completed once.
[0038] In order to better understand the above-mentioned technical scheme, the above-mentioned technical scheme will be described in detail below in conjunction with the accompanying drawings and specific implementation methods. It should be understood that the embodiments of the present invention and the specific features in the embodiments are detailed descriptions of the technical scheme of the present application, rather than limitations on the technical scheme of the present application. In the absence of conflict, the embodiments of the present invention and the technical features in the embodiments can be combined with each other.
[0039] Embodiment 1
[0040] Reference Figure 1 , Figure 1 The flowchart of an embodiment of the MCU verification method of the present invention is shown in FIG. In one embodiment, the MCU verification method includes:
[0041] Step S10, monitoring the MCU bus, and when detecting that the MCU has a write operation on the register of the module to be verified, generating random data related to the test case of the module to be verified;
[0042] Specifically, in one embodiment of the present invention, monitor (monitor) of random verification platform based on UVM monitors whether MCU bus has the read-write of register to be verified module, when monitoring has write register to occur, utilize random number generator to generate the random data relevant to the test case of described module to be verified. In the present invention, utilize UVM overall framework to include env, agent, sequence, sequencer, driver and other structures, carry out random read-write of storage, utilize fork join and forever statement in sv to monitor system bus always, this behavior is random verification platform behavior, therefore do not consume test time, this makes the register operation of verification module to be completed in MCU kernel before the moment, reserve time for operand random generation, no longer occupy MCU verification itself verification time.
[0043] Step S20, writing the random data into a storage module;
[0044] Specifically, in one embodiment of the present invention, after the random verification platform generates random data related to the test case of the module to be verified through a random number generator, the random data is stored in the storage module through the driver of the random verification platform. The storage module is used as a transmission medium for parameters and calculation results, and acts as a bridge between the MCU core and the random verification platform.
[0045] Step S30, when executing the test case, the MCU reads the random data stored in the storage module;
[0046] Step S40, configuring the register of the module to be verified using the random data to generate a configuration file;
[0047] Step S50: the module to be verified executes corresponding functions according to the configuration file to complete verification.
[0048] Specifically, in one embodiment of the present invention, when the MCU executes the corresponding test case, the MCU kernel will read the random data in the storage module to configure the register of the module to be verified related to the test case. When a series of functional register configurations are completed, the MCU completes the corresponding functions and completes the functional verification of the module through the monitor or formal verification of the random verification platform. Among them, completing the functional verification of the module through the monitor or formal verification belongs to the content known to those skilled in the art, and the present invention will not be repeated here.
[0049] Furthermore, before step S10, the method further includes:
[0050] Compile the assembly source file of the module to be verified;
[0051] Storing the assembly source file in the MCU;
[0052] The test case is generated according to the MCU instruction set and the assembly source file.
[0053] Specifically, in one embodiment of the present invention, the assembly source file corresponding to the module to be verified is first written, and the previously defined macro operations are contained within the file to define the operable storage space; secondly, write registers, read checks, random writes, random writes and reads, and random reads and writes are defined according to the MCU instruction set, and the MCU source configuration file is composed of these macro definitions.
[0054] The present invention stores the random data of the test case in the storage module, and no longer relies solely on the host kernel to directly configure the system verification, thereby enhancing the random coverage. Practice has proved that this verification method accelerates the rapid convergence of verification. Compared with traditional directional testing and full UVM random verification, this method combines the module verification and system verification of lightweight on-chip systems, greatly improving the verification efficiency. Figure 2 The MCU and UVM joint verification platform proposed in the present invention speeds up the progress of the entire project and advances the time to market for the product.
[0055] Embodiment 2
[0056] The present invention also provides an MCU verification system, comprising an MCU 10, a storage module 20, a module to be verified 40 and a random verification platform 40 based on UVM, wherein the MCU is connected to the storage module, the module to be verified and the random verification platform, and the random verification platform is also connected to the storage module.
[0057] Specifically, in one embodiment of the present invention, the random verification platform is used to monitor the MCU bus. When it is detected that the MCU has a write operation on the register of the module to be verified, random data related to the test case of the module to be verified is generated, and the random data is written into the storage module.
[0058] Specifically, in one embodiment of the present invention, the MCU is used to read the random data stored in the storage module when executing the test case, configure the registers of the module to be verified using the random data, and generate a configuration file; and is also used to generate the test case based on the pre-written assembly source file and MCU instruction set of the module to be verified.
[0059] Specifically, in an embodiment of the present invention, the module to be verified is used to execute a corresponding function according to the configuration file.
[0060] Furthermore, in one embodiment of the present invention, the random verification platform includes a monitor 310, a random number generator 320 and a driver 330, the monitor is connected to the random number generator, the random number generator is connected to the driver, the monitor is used to monitor the MCU bus, and when it is detected that the MCU has a write operation on the register of the module to be verified, the monitor sends a random data generation instruction to the random number generator; the random number generator is used to generate random data related to the test case of the module to be verified; and the driver is used to write the random data into the storage module.
[0061] Those skilled in the art will appreciate that the above is an embodiment of the MCU verification device provided by an embodiment of the present invention, and the system and device belong to the same inventive concept as the above-mentioned MCU verification method. For details not fully described in the embodiment of the MCU verification device, reference can be made to the embodiment of the above-mentioned MCU verification method.
[0062] The embodiment of the present invention further provides an MCU verification device, which may include:
[0063] Memory for storing computer programs;
[0064] The processor can implement the following steps when executing the computer program stored in the above memory:
[0065] Monitor the MCU bus, and when it is detected that the MCU has a write operation on the register of the module to be verified, generate random data related to the test case of the module to be verified; write the random data into a storage module; when the MCU executes the test case, read the random data stored in the storage module; configure the register of the module to be verified using the random data to generate a configuration file; the module to be verified executes the corresponding function according to the configuration file to complete the verification.
[0066] The embodiment of the present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the following steps can be implemented;
[0067] Monitor the MCU bus, and when it is detected that the MCU has a write operation on the register of the module to be verified, generate random data related to the test case of the module to be verified; write the random data into a storage module; when the MCU executes the test case, read the random data stored in the storage module; configure the register of the module to be verified using the random data to generate a configuration file; the module to be verified executes the corresponding function according to the configuration file to complete the verification.
[0068] The computer-readable storage medium may include: a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and other media that can store program codes.
[0069] In the description provided herein, a large number of specific details are described. However, it is understood that embodiments of the present invention can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.
[0070] Similarly, it should be understood that in order to streamline the present disclosure and aid in understanding one or more of the various inventive aspects, in the above description of exemplary embodiments of the present invention, various features of the present invention are sometimes grouped together into a single embodiment, figure, or description thereof. However, this disclosed method should not be interpreted as reflecting the intention that the claimed invention requires more features than those explicitly recited in each claim. More specifically, as reflected in the claims below, inventive aspects lie in less than all the features of the individual embodiments disclosed above. Therefore, the claims that follow the specific embodiment are hereby expressly incorporated into the specific embodiment, with each claim itself serving as a separate embodiment of the present invention.
[0071] Those skilled in the art will appreciate that the modules in the devices in the embodiments can be adaptively changed and arranged in one or more devices different from the embodiments. The modules or units or components in the embodiments can be combined into one module or unit or component, and in addition they can be divided into multiple submodules or subunits or subassemblies. Except that at least some of such features and / or processes or units are mutually exclusive, all features disclosed in this specification and all processes or units of any method or device disclosed in this manner can be combined in any combination. Unless otherwise clearly stated, each feature disclosed in this specification can be replaced by an alternative feature providing the same, equivalent or similar purpose.
[0072] In addition, those skilled in the art will appreciate that, although some embodiments described herein include certain features included in other embodiments but not other features, the combination of features of different embodiments is meant to be within the scope of the present invention and form different embodiments. For example, any one of the claimed embodiments may be used in any combination.
[0073] The various component embodiments of the present invention can be implemented in hardware, or in software modules running on one or more processors, or in a combination thereof. It should be understood by those skilled in the art that a microprocessor or digital signal processor (DSP) can be used in practice to implement some or all of the functions of some or all of the components in the embodiments of the present invention. The present invention can also be implemented as a device or apparatus program (e.g., computer program and computer program product) for executing part or all of the methods described herein. Such a program implementing the present invention can be stored on a computer-readable medium, or can have the form of one or more signals. Such a signal can be downloaded from an Internet website, or provided on a carrier signal, or provided in any other form.
[0074] It should be noted that the above embodiments illustrate the present invention rather than limit it, and that those skilled in the art may devise alternative embodiments without departing from the scope of the appended claims. In the claims, any reference symbol between brackets should not be constructed as a limitation to the claims. The word "one" or "an" preceding an element does not exclude the presence of a plurality of such elements. The present invention may be implemented by means of hardware including a number of different elements and by means of a suitably programmed computer. Several of these devices may be embodied by the same hardware item. The use of the words first, second, and third, etc. does not indicate any order. These words may be interpreted as names.
Claims
1. A MCU verification method, characterized in that: The following steps are involved: Monitoring the MCU bus, and generating random data related to the test case of the module to be verified when detecting that the MCU has a write operation on the register of the module to be verified; Writing the random data into a storage module; When executing the test case, the MCU reads the random data stored in the storage module; Using the random data to configure the register of the module to be verified, and generating a configuration file; The module to be verified executes corresponding functions according to the configuration file to complete the verification.
2. The MCU verification method according to claim 1, characterized in that: Before the step of generating random data related to the test case of the module to be verified when monitoring the MCU bus and detecting that the MCU has a write operation on the register of the module to be verified, the method further includes: Compile the assembly source file of the module to be verified; The assembly source file is stored in the MCU.
3. The MCU verification method according to claim 2, characterized in that: Also includes; The test case is generated according to the MCU instruction set and the assembly source file.
4. An MCU verification system, characterized in that: The invention comprises an MCU, a storage module, a module to be verified and a random verification platform based on UVM, wherein the MCU is connected to the storage module, the module to be verified and the random verification platform, and the random verification platform is also connected to the storage module. The random verification platform is used to monitor the MCU bus, and when it is detected that the MCU has a write operation on the register of the module to be verified, generates random data related to the test case of the module to be verified, and writes the random data into the storage module; The MCU is used to read the random data stored in the storage module when executing the test case, configure the register of the module to be verified by using the random data, and generate a configuration file; The module to be verified is used to execute corresponding functions according to the configuration file.
5. The MCU verification system as claimed in claim 4, characterized in that: The MCU is also used to generate the test case according to the pre-written assembly source file of the module to be verified and the MCU instruction set.
6. The MCU verification system as claimed in claim 4, characterized in that: The random verification platform includes a monitor, a random number generator and a driver, wherein the monitor is connected to the random number generator, and the random number generator is connected to the driver. The monitor is used to monitor the MCU bus, and when it is detected that the MCU has a write operation on the register of the module to be verified, sends a random data generation instruction to the random number generator; The random number generator is used to generate random data related to the test case of the module to be verified; The driver is used to write the random data into the storage module.
7. An MCU verification device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the MCU verification method according to any one of claims 1 to 3 when executing the computer program.
8. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the MCU verification method according to any one of claims 1 to 3 are implemented.