A control method, device, and storage medium for a consumable chip.

By dynamically setting address information in the consumable chip and utilizing the address information and calculation strategy randomly generated by the main control chip, the problem of easy counterfeiting of consumable chips is solved, achieving higher security and detection accuracy.

CN119444254BActive Publication Date: 2025-10-31ZHUHAI PANTUM ELECTRONICS CO LTD
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Patent Information

Application Number
CN202411537193.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-10-30
Publication Date
2025-10-31
Estimated Expiration
2044-10-30

AI Technical Summary

Technical Problem

Existing consumable chips use simple communication methods, are easy to imitate, and have low security.

Method used

The main control chip randomly generates the first address information and address calculation strategy information. The consumable chip determines the second address information based on this information and performs a bit setting operation. The main control chip determines whether the chip is genuine based on the communication results.

Benefits of technology

This increases the difficulty of cracking consumable chips, enhances security, and ensures the legitimate rights and interests of genuine chips.

✦ Generated by Eureka AI based on patent content.

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Abstract

This application provides a control method, apparatus, and storage medium for a consumable chip. The method includes a main control chip sending randomly generated first address information and address calculation strategy information to the consumable chip; the consumable chip determining second address information based on the address calculation strategy information and the first address information, and performing a bit-setting operation; the main control chip communicating with the consumable chip based on the second address information; if normal communication is achieved, the current consumable chip is determined to be a genuine consumable chip. In this application embodiment, the first address information and address calculation strategy information are randomly generated by the main control chip, providing numerous possible examples. The specific rules are difficult to crack, effectively increasing the compatibility difficulty of counterfeit chips and ensuring the security of genuine consumable chips.
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Description

Technical Field

[0001] This application relates to the field of image forming technology, and more specifically to a control method, apparatus and storage medium for a consumable chip. Background Technology

[0002] Image forming equipment is equipped with a removable consumable unit to supply printing consumables, such as ink for inkjet printers or toner for laser printers. A consumable chip is typically installed on the housing of the consumable unit, storing consumable information such as consumable model, capacity, and remaining quantity. After the consumable unit is installed in the image forming equipment, the main control chip of the image forming equipment can communicate with the consumable chip.

[0003] Currently, the communication method between the main control chip and the consumable chip is relatively simple. Usually, the main control chip directly reads and writes to the electrically erasable programmable read-only memory (EEPROM) in the consumable chip. The consumable chip is relatively easy to counterfeit, and its security is difficult to guarantee. Summary of the Invention

[0004] In view of this, this application provides a control method, device and storage medium for consumable chips, so as to solve the problems of easy counterfeiting and low security of consumable chips in the prior art.

[0005] In a first aspect, embodiments of this application provide a control method for a consumable chip, applied to a consumable chip, comprising:

[0006] Receive the first address information and address calculation strategy information sent by the main control chip;

[0007] The second address information of the consumable chip is determined based on the first address information and the address calculation strategy information;

[0008] Based on the second address information, communication is conducted with the main control chip to determine whether the consumable chip is a genuine consumable chip based on the communication result.

[0009] In an optional embodiment, determining the second address information of the consumable chip based on the first address information and the address calculation strategy information includes:

[0010] The address operation strategy information is parsed to obtain the operation code;

[0011] Based on the mapping relationship between preset operation codes and preset operations, determine the target operation corresponding to the operation code;

[0012] The target operation is performed on the first address information to obtain the second address information; wherein, the preset operation includes, but is not limited to, address random matching operation and address interference operation, the address random matching operation is used to characterize that the first address information does not contain interference information, and the address interference operation is used to characterize that the first address information contains the interference information.

[0013] In an optional embodiment, when the preset operation is an address random matching operation, determining the target operation corresponding to the preset operation code based on the mapping relationship between the preset operation code and the preset operation includes:

[0014] If the least significant bit of the operand is 1, then the target operation is determined to be the inversion of all bits of the address code according to the mapping relationship;

[0015] If the middle bit of the operand is 1, then the target operation is determined to be the inversion of the middle bit of the address code according to the mapping relationship;

[0016] If the second least significant bit of the operand is 1, then the target operation is determined to be a high-low position swap operation of the address code according to the mapping relationship.

[0017] In an optional embodiment, when the preset operation is an address interference operation, determining the target operation corresponding to the preset operation code based on the mapping relationship between the preset operation code and the preset operation includes:

[0018] If the least significant bit of the arithmetic code is 1, then the target operation is determined to be an operation of taking the highest three bits of the address code according to the mapping relationship;

[0019] If the second least significant bit of the operand is 1, then the target operation is determined to be an operation of taking the lowest three bits of the address code according to the mapping relationship.

[0020] In one optional embodiment, the consumable chip is configured with a memory, and the step of communicating with the main control chip based on the second address information to determine whether the consumable chip is a genuine consumable chip includes:

[0021] Based on the second address information, the memory is set by an address bit operation;

[0022] If the address of the memory can be set normally within a preset time, the memory communicates with the main control chip.

[0023] If the memory can communicate normally with the main control chip, then the consumable chip is determined to be a genuine consumable chip.

[0024] In an optional embodiment, the method further includes: if the memory cannot be set normally within a preset time, then the consumable chip is determined to be a non-genuine consumable chip.

[0025] The system sends a message indicating a failed bit setting to the main control chip.

[0026] Secondly, embodiments of this application provide a control method for a consumable chip, applied to a main control chip, the method comprising:

[0027] In response to a communication request, the consumable chip is sent first address information and address calculation strategy information;

[0028] After receiving feedback that the address setting of the consumable chip is normal, communication is conducted with the consumable chip based on the second address information to determine whether the consumable chip is a genuine consumable chip based on the communication result; wherein, the feedback carries the second address information determined by the consumable chip based on the address calculation strategy information and the first address information.

[0029] In one optional embodiment, the step of responding to a communication request and sending first address information and address calculation strategy information to the consumable chip includes:

[0030] In response to a communication request, a candidate address code is randomly selected as the first address information;

[0031] Obtain the operation code corresponding to the candidate address code, where each operation code is used to represent a candidate operation;

[0032] The operation code is encoded to obtain the address operation strategy information;

[0033] The first address information and the address calculation strategy information are sent to the consumable chip.

[0034] In one optional embodiment, the step of communicating with the consumable chip based on the second address information to determine whether the consumable chip is a genuine consumable chip based on the communication result includes:

[0035] If the main control chip can communicate normally with the consumable chip based on the second address information, then the consumable chip is determined to be a genuine consumable chip.

[0036] If the main control chip cannot communicate normally with the consumable chip based on the second address information, then the consumable chip is determined to be a non-genuine consumable chip.

[0037] In one optional embodiment, normal communication is characterized by normal read operation and / or normal write operation of the consumable chip.

[0038] Thirdly, embodiments of this application provide a control device for a consumable chip, the control device including a consumable chip and a main control chip, the control device comprising:

[0039] The main control chip is used to respond to communication requests and send first address information and address calculation strategy information to the consumable chip;

[0040] The consumable chip is used to receive and determine the second address information of the consumable chip based on the first address information and the address calculation strategy information;

[0041] The consumable chip is also used to set the second address information and feed back the result of the setting operation to the main control chip;

[0042] The main control chip is also used to communicate with the consumable chip based on the second address information after receiving feedback that the address of the consumable chip is set normally, so as to determine whether the consumable chip is a genuine consumable chip based on the communication result.

[0043] Fourthly, embodiments of this application provide an electronic device, including a memory for storing computer program instructions and a processor for executing the program instructions, wherein when the computer program instructions are executed by the processor, the electronic device is triggered to execute the method described in the first aspect or the method described in the second aspect.

[0044] Fifthly, embodiments of this application provide a computer-readable storage medium including a stored program, wherein, when the program is executed, it controls the device where the computer-readable storage medium is located to perform the method described in the first aspect or the method described in the second aspect.

[0045] In a sixth aspect, embodiments of this application provide a computer program product comprising executable instructions that, when executed on a computer, cause the computer to perform the method described in the first aspect or the method described in the second aspect.

[0046] Using the solution provided in this application embodiment, the main control chip sends randomly generated first address information and address calculation strategy information to the consumable chip. The consumable chip determines second address information based on the address calculation strategy information and the first address information, and performs a bit-setting operation. The main control chip communicates with the consumable chip based on the second address information. If normal communication is achieved, the current consumable chip is determined to be a genuine consumable chip. In this application embodiment, the first address information and address calculation strategy information are randomly generated by the main control chip, providing numerous possible examples. The specific rules are difficult to crack, effectively increasing the compatibility difficulty of counterfeit chips and ensuring the security of genuine consumable chips. Attached Figure Description

[0047] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0048] Figure 1 This is an example schematic diagram of a control method for a consumable chip provided in an embodiment of this application;

[0049] Figure 2 A schematic diagram illustrating the circuit of the main control chip and consumable chip provided in the embodiments of this application;

[0050] Figure 3 A schematic diagram illustrating another circuit example of a main control chip and a consumable chip provided in an embodiment of this application;

[0051] Figure 4 A flowchart illustrating a control method for a consumable chip provided in an embodiment of this application;

[0052] Figure 5 A flowchart illustrating another control method for a consumable chip provided in an embodiment of this application;

[0053] Figure 6 A flowchart illustrating another control method for a consumable chip provided in an embodiment of this application;

[0054] Figure 7 A flowchart illustrating another control method for a consumable chip provided in an embodiment of this application;

[0055] Figure 8 A schematic diagram illustrating another example of a main control chip and a consumable chip provided in an embodiment of this application;

[0056] Figure 9 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0057] To better understand the technical solution of this application, the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0058] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0059] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0060] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0061] Common image forming equipment typically includes a removable consumable unit. This unit contains consumables (such as ink or toner), and a consumable chip for recording consumable data is mounted on the unit's casing. (See reference...) Figure 1 An image forming apparatus may include an image forming device and a consumable device. The image forming device performs image forming-related operations to output a printed image. The consumable device consists of replaceable parts within the image forming apparatus. For example, when the image forming apparatus is an inkjet printer, laser printer, 3D printer, label printer, or dot matrix printer, the corresponding consumable device includes ink cartridges, toner cartridges, drum units, toner cartridges, ribbon cartridges, etc.

[0062] The consumable chip is an electronic device with storage function. When the consumable device is installed on the image forming device, the consumable chip communicates with the main control chip of the image forming device. This communication connection can be through contacts, antennas, or coils, and this application embodiment does not limit this. It should be noted that the consumable chip stores information including raw data, which is information related to the image forming device. For example, the raw data can include at least one of the following categories: (1) imaging control related parameters, such as printing engine control parameter information, specifically high pressure control parameters, fixing temperature parameters, paper feed speed control parameters, etc. When the image forming device is a color printer, it also includes color calibration parameter information or calibration patterns; (2) consumable related parameters, such as various proportional factors for calculating toner consumption; or basic attribute information of the consumable, wherein the basic attribute information of the consumable can specifically be consumable model, consumable serial number, consumable capacity life, etc. It should be noted that those skilled in the art can also design the consumable chip to store other types of raw data according to actual needs, and this application embodiment does not limit this.

[0063] The main control chip and consumable chip simulate an I2C bus using General Purpose Input Output (GPIO) pins, and then communicate based on this simulated I2C bus. The I2C bus includes clock and data lines; the data lines are used to transmit data, and the clock lines are used to synchronize the clocks of both devices. The I2C bus structure is simple, reducing system cost and improving system reliability.

[0064] Reference Figure 2 The main control board houses the SoC (System on Chip), while the consumable board contains consumable chips and EEPROM (Electrically Erasable Programmable Read-Only Memory), with the EEPROM serving as the memory for the consumable chips. Both the SoC and EEPROM simulate I2C clock and data lines via two GPIO pins. Specifically, the SoC's A pin and the EEPROM's C pin are connected to simulate the clock line, and the SoC's B pin and the EEPROM's D pin are connected to simulate the data line. The SoC also has a power supply (VCC) pin and a ground (GND) pin, which are connected to the consumable board via wires to provide power and ground to the EEPROM. The EEPROM's E, F, and G pins are address bits; setting these three address bits to high or low allows for EEPROM address setting. Figure 2 For example, pins E and F are connected to VCC via resistors R1 and R2 respectively, with a high potential, while pin G is grounded, with a low potential. Therefore, the current EEPROM address is 110. This address is only an example; in other embodiments, the EEPROM address can be set to other values.

[0065] After the consumable device is installed on the image forming equipment, the main control chip can perform read / write operations on the EEPROM based on the EEPROM's address bits. Currently, the address bits of the EEPROM are usually fixed values, with low complexity. The specific information of these address bits is easily cracked, resulting in low security and allowing the consumable chip to be counterfeited. When the address bits of the counterfeit chip are set to be the same as those of the genuine consumable chip, the main control chip can also communicate with the counterfeit chip.

[0066] To address the above problems, this application provides a method for controlling consumable chips. By dynamically setting the address bits of the EEPROM, the difficulty of cracking the address bit information can be effectively increased, thus improving security.

[0067] Reference Figure 3 ,and Figure 2The difference shown is that, in this embodiment of the application, a microcontroller unit (MCU) is added to the consumable board. On the one hand, the MCU shares clock and data lines with the EEPROM and is connected to the corresponding clock and data lines of the main control chip to interact with the main control chip. On the other hand, it is also connected to the EEPROM through address lines (E / F / G pins) to modify the address bits of the EEPROM.

[0068] Figure 4 This is a flowchart illustrating a control method for a consumable chip provided in an embodiment of this application. The method is applied to a main control chip, such as... Figure 4 As shown, the method may include:

[0069] Step 401: Respond to the communication request and send the first address information and address calculation strategy information to the consumable chip.

[0070] Step 402: After receiving feedback that the address setting of the consumable chip is normal, communication is conducted with the consumable chip based on the second address information to determine whether the consumable chip is a genuine consumable chip based on the communication result; wherein, the feedback carries the second address information determined by the consumable chip based on the address calculation strategy information and the first address information.

[0071] In this embodiment, the first address information represents a set of address codes, which are fake address codes used to hide the real address bits for communication with the consumable chip. The address operation strategy information represents the operation performed on the address codes in the first address information, which is a calculation rule for obtaining the real address bits for communication with the consumable chip. The first address information and the address operation strategy information are not unique. In response to the communication request of the consumable chip, the main control chip randomly generates the first address information and the address operation strategy information and sends them to the consumable chip. After receiving the information, the consumable chip processes the first address information based on the address operation strategy information to obtain the second address information. The second address information indicates the final communication address of the consumable chip. If the main control chip can communicate with the consumable chip based on the second address information and receives feedback that the address bits of the consumable chip are set normally, then the current consumable chip can be determined to be a genuine consumable chip. If the main control chip cannot communicate normally with the consumable chip based on the second address information, then the current consumable chip can be determined to be a non-genuine consumable chip. If feedback indicating that the address setting of the consumable chip failed is received, the main control chip will not communicate with the consumable chip, thus determining that the consumable chip is a non-genuine consumable chip.

[0072] In one optional embodiment, in order to improve detection accuracy, when the setting operation of the consumable chip fails once, the setting operation will be repeated multiple times within a preset time. If the chip is not set normally within the preset time, the address setting is determined to have failed.

[0073] In one optional embodiment, the process by which the main control chip randomly generates the first address information and the address operation strategy information can be as follows: First, a candidate address code is randomly selected as the first address information. Then, the operation code corresponding to the candidate address code is obtained, and the operation code is encoded to obtain the address operation strategy information. Based on the mapping relationship between the optional candidate address codes and the operation codes, and the mapping relationship between the operation codes and the operations, the main control chip can store optional combinations, each combination containing an address code and a corresponding operation code (operation). In response to a communication request, the main control chip can select any combination from multiple combinations and send it to the consumable chip.

[0074] In one optional embodiment, the operation includes, but is not limited to, address random matching and address interference. Address random matching indicates that the first address information does not contain interference information, while address interference indicates that the first address information contains interference information. This interference information is used to mask the real address communicating with the consumable chip, making the real address difficult to identify and thus increasing the difficulty of cracking the real address. Specifically, the number of address codes in the first address information can be used to determine whether the operation uses address random matching or address interference. In this embodiment, if the number of address codes in the first address information exceeds the number of real address codes communicating with the consumable chip, it indicates that the operation uses address interference. If the number of address codes in the first address information is equal to or less than the number of real address codes communicating with the consumable chip, it indicates that the operation uses address random matching.

[0075] Furthermore, if the number of real address codes in consumable information communication is greater than the number of address codes in the first address information, zeros are padded to ensure that the number of address codes after calculation is consistent with the number of real address codes.

[0076] Each operand code represents a candidate operation on an address code. Different address codes and different operand codes (candidate operations) will result in different second address information. Therefore, the information sent from the main control chip to the consumable chip is not fixed, and the final communication address determined by the consumable chip is also not fixed. Compared to setting the communication address of the consumable chip to a fixed value, this embodiment of the application increases the difficulty of cracking the consumable chip and protects the security of genuine consumable chips by dynamically setting the communication address of the consumable chip.

[0077] Figure 5 This is a flowchart illustrating a control method for a consumable chip provided in an embodiment of this application. The method is applied to an MCU, such as... Figure 5 As shown, the method may include:

[0078] Step 501: Receive the first address information and address calculation strategy information sent by the main control chip.

[0079] Step 502: Determine the second address information of the consumable chip based on the first address information and the address calculation strategy information.

[0080] Step 503: Communicate with the main control chip based on the second address information, and determine whether the consumable chip is a genuine consumable chip based on the communication result.

[0081] In this embodiment, the consumable chip can obtain an operation code by parsing the address operation strategy information. The consumable chip internally stores a mapping relationship between preset operation codes and preset operations. Among multiple mapping relationships, the target operation corresponding to the current operation code can be determined. The preset operation and the target operation can be considered as operations performed on the first address information. The consumable chip performs this target operation on the first address information to obtain the second address information. This second address information is used to characterize the actual address bit that can communicate with the consumable chip. Subsequently, the consumable chip can communicate with the main control chip based on the second address information. If normal communication is achieved, the current consumable chip can be confirmed as a genuine consumable chip.

[0082] In one optional embodiment, the preset operations include, but are not limited to, address random matching operations and address interference operations. The address random matching operation is used to characterize that the first address information does not contain interference information, and the address interference operation is used to characterize that the first address information contains interference information. Specifically, when the first address information does not contain interference information, the first address information and the second address information can be considered to have the same data bits, and the address random matching operation is used to modify the specific values ​​of each data bit in the first address information to obtain the second address information. When the first address information contains interference information, the first address information and the second address information can be considered to have different data bits, and the address interference operation is used to delete the interference information in the first address information to obtain the second address information.

[0083] The consumable chip determines different target operations based on different operation codes, and then performs operations on the received first address information to obtain different second address information. The consumable chip determines whether the target operation is a random address matching operation or an address interference operation by parsing the number of operation codes obtained from the address operation strategy information. This method is consistent with the determination method used in the main control chip and will not be elaborated here. Taking the case where the consumable chip identifies the first address information using a random address matching operation as an example, for a random address matching operation, assuming the operation code after parsing the address operation strategy information has five data bits and the address code of the first address information has three data bits, if the least significant bit of the operation code is 1, the consumable chip can determine that the target operation is an inversion of all bits of the address code, which is represented by inverting all address code values ​​in the first address information. In other words, the mapping relationship between the operation code and the operation is not unique. As long as the least significant bit of the operation code is 1 and the other address code bits are randomly combined, the target operation corresponding to that operation code can be determined to be an inversion of all bits of the address code. For example, the target operation corresponding to the operands "001", "011", "111", and "101" is the inversion of all bits of the address code. To further enhance security, a unique mapping relationship is defined between the operand and the operation: only when the least significant bit of the operand is 1 and all other bits are 0 can the target operation be determined to be the inversion of all bits of the address code. Similarly, if the middle bit of the operand is 1, the target operation is determined to be the inversion of the middle bit of the address code, which means inverting the value of the address code in the middle position of the first address information. If the second least significant bit of the operand is 1, the target operation is determined to be the swapping of the highest and lowest address bits, which means exchanging the values ​​of the highest and lowest address bits in the first address information.

[0084] The following is a specific embodiment using a unique mapping relationship. When the operation code is "00001" and the address code of the first address information is "110", the consumable chip detects that the least significant bit of the operation code is 1 and the other bits are 0. According to the mapping relationship, the target operation can be determined to be the inversion of all bits of the address code. The consumable chip inverts all bits of "110" to obtain "001", which is the address code indicated by the second address information.

[0085] When the operation code is "00100" and the address code of the first address information is "110", the consumable chip detects that the middle bit of the operation code is 1 and the other bits are 0. According to the mapping relationship, it can be determined that the target operation is the inversion of the middle bit of the address code. The consumable chip inverts the middle bit of "110" to get "100", and "100" is the address code indicated by the second address information.

[0086] When the operation code is "10000" and the address code of the first address information is "110", the consumable chip detects that the highest bit of the operation code is 1 and the other bits are 0. According to the mapping relationship, it can be determined that the target operation is a high-low bit swap operation of the address code. The consumable chip swaps the high and low bits of "110" to get "011", and "011" is the address code indicated by the second address information.

[0087] Taking the identification of the first address information by the consumable chip using address interference operation as an example, for address interference operation, assuming the operation code after address operation strategy information parsing has three data bits and the address code of the first address information has five data bits, if the least significant bit of the operation code is 1, the consumable chip determines the target operation as taking the highest three bits of the address code according to the mapping relationship, which means selecting the highest three data bits from the first address information. In other words, the data not selected in the first address information is interference information. If the second least significant bit of the operation code is 1, the consumable chip determines the target operation as taking the lowest three bits of the address code according to the mapping relationship, which means selecting the lowest three data bits from the first address information.

[0088] The following explanation uses a specific example of a unique mapping relationship. When the operation code is "001" and the address code of the first address information is "11011", the consumable chip determines that the target operation is an address interference operation and detects that the least significant bit of the operation code is 1. According to the mapping relationship, the target operation can be determined to be an operation of taking the highest three bits of the address code. The consumable chip selects the highest three bits of "11011" to obtain "110", which is the address code indicated by the second address information.

[0089] When the operation code is "010" and the address code is "11011", the consumable chip determines that the target operation is an address interference operation and detects that the second lowest bit of the operation code is 1. According to the mapping relationship, it can be determined that the target operation is an operation of taking the lowest three bits of the address code. The consumable chip selects the lowest three bits of "11011" to obtain "011", and "011" is the address code indicated by the second address information.

[0090] The above is merely an exemplary description of the target operation. In other embodiments, the data bits of the address code and the operand code may include other numbers, for example, both the address code and the operand code may be 4 data bits. The target operation may also include other operation methods, such as inverting the high or low bits, inverting the middle bits, inverting odd bits, inverting even bits, taking the middle three bits, etc., which are not limited here.

[0091] The consumable chip is equipped with an EEPROM memory. Based on the second address information, the consumable chip performs an address setting operation on the memory. If the address setting is successful within a preset time, the memory can communicate with the main control chip. If the memory and main control chip communicate successfully, the consumable chip is determined to be a genuine product. If the address setting fails within the preset time, the consumable chip is determined to be a counterfeit product, and the consumable chip sends a setting failure message to the main control chip.

[0092] In this embodiment, based on different first address information and address calculation strategy information, the consumable chip can determine the corresponding second address information, thereby enabling flexible setting of the communication address. With multiple options available for the second address information, the consumable chip is difficult to crack or counterfeit, ensuring the security of genuine consumable chips and protecting the legitimate rights and interests of manufacturers.

[0093] Figure 6 This is a flowchart illustrating a control method for a consumable chip provided in an embodiment of this application. The method is mainly executed by the main control chip 61 and the MCU 62, such as... Figure 6 As shown, the method may include:

[0094] 601. The main control chip 61 randomly generates the first address information and the address calculation strategy information.

[0095] 602. The main control chip 61 sends the first address information and address calculation strategy information to the MCU 62.

[0096] 603.MCU62 determines the second address information based on the first address information and the address calculation strategy information.

[0097] 604.MCU62 performs a set operation on the EEPROM based on the second address information.

[0098] 605. After the set operation is executed, the MCU62 sends a feedback message to the main control chip 61 indicating that the set operation was successful.

[0099] 606. The main control chip 61 performs read / write operations on the address bits of the EEPROM based on the second address information.

[0100] 607.MCU62 provides feedback on the results of read / write operations.

[0101] 608. When the main control chip 61 detects that the read / write operation can be executed normally, it continues communication; when it detects that the read / write operation cannot be executed normally, it terminates communication and displays an error message.

[0102] In this embodiment, the first address information is an address code randomly generated by the main control chip 61 (such as the aforementioned candidate address code), and the address operation strategy information includes a target operation on the first address information. The MCU 62 processes the first address information based on the target operation indicated in the address operation strategy information to obtain second address information that can communicate with the consumable chip. The MCU 62 performs a set operation on the EEPROM based on the second address information, that is, sets the address of the EEPROM to the address code indicated by the second address information.

[0103] by Figure 3 For example, when the address code of the second address information is "001", the MCU62 can set the E pin to low level, the F pin to low level, and the G pin to high level. After the setting operation is completed, the MCU62 can notify the main control chip 61 of a successful setting, indicating normal operation. The main control chip 61 can then address the EEPROM based on "001" and perform read / write operations. If the read / write operation is successful, the main control chip 61 can determine that the current consumable chip is a genuine consumable chip, and normal communication can proceed thereafter.

[0104] In one optional embodiment, if the EEPROM setting fails, the MCU 62 will also feed back the setting failure information to the main control chip 61. The main control chip 61 can directly determine that the current consumable chip is a non-genuine consumable chip, and will not communicate with the consumable chip subsequently, and will display the error information on the control panel. If the EEPROM setting succeeds, but the main control chip 61 cannot perform read / write operations on the EEPROM based on the second address information, the main control chip 61 will also determine that the current consumable chip is a non-genuine consumable chip.

[0105] In this embodiment, the address code of the first address information consists of multiple data bits, and the first address information has multiple options. Similarly, the operation code also consists of multiple data bits, and the address operation strategy information has multiple options. The options for the information sent by the main control chip 61 to the MCU 62 are the product of the two. For example, if the first address information has 8 options and the address operation strategy information has 32 options, then the information sent by the main control chip 61 to the MCU 62 has a total of 8 * 32 = 256 options. The specific number of options is not limited. Since the information sent by the main control chip 61 may be different each time, the compatibility difficulty of non-genuine consumable chips is greatly increased, ensuring the security of genuine consumable chips.

[0106] Figure 7 This is a flowchart illustrating a control method for a consumable chip provided in an embodiment of this application. This method can be applied to a main control chip. Figure 7 As shown, the method may include:

[0107] Step 701: Randomly generate first address information and address operation strategy information.

[0108] Step 702: Send the first address information and address calculation strategy information to the MCU.

[0109] Step 703: Receive the setting result information sent by the MCU.

[0110] Step 704: Determine whether the setting operation was successful. If the setting was successful, proceed to step 705; otherwise, proceed to step 708.

[0111] Step 705: Perform read / write operations on the EEPROM based on the second address information.

[0112] Step 706: Determine if the read / write operation is successful. If successful, proceed to step 707; otherwise, proceed to step 708.

[0113] Step 707: Confirm that the current consumable chip is a genuine consumable chip.

[0114] Step 708: Confirm that the current consumable chip is a non-genuine consumable chip.

[0115] The following example illustrates that when the second address information is "110", the MCU performs a set operation on the EEPROM based on "110". Figure 3 For example, the MCU sets the E pin to high level, the F pin to high level, and the G pin to low level. After setting, the MCU sends a set information to the main control chip, which includes the result of the set operation, including whether the set was successful or failed.

[0116] If the setting fails, the main control chip can directly confirm that the current consumable chip is a non-genuine consumable chip. If the setting succeeds, it performs read / write operations on the EEPROM based on the second address information. The main control chip and genuine consumable chips are manufactured by the same company, and the main control chip and MCU store the same target operation and operation code mapping relationship. Therefore, the second address information can be considered a known quantity for the main control chip. If the current consumable chip is genuine, the EEPROM address will be set to the same as the second address information, and the main control chip's read / write operation can be completed. If the current consumable chip is non-genuine, because the EEPROM address setting is more complex and difficult for non-genuine consumable chips to crack, the EEPROM address in a non-genuine consumable chip usually will not be the same as the second address information. Through the results of the read / write operations, the main control chip can accurately determine whether the current consumable chip is genuine or whether the current consumable device is manufactured by the original manufacturer.

[0117] In one alternative embodiment, the MCU is configured in a manner that is not unique. Figure 3In one configuration, the MCU connects to the main control chip via existing clock and data lines, and the EEPROM's three address pins connect to the MCU. This does not require additional wiring or consume additional resources of the SoC. Another configuration method can be found by referring to... Figure 8 The main control chip adds a set of Universal Asynchronous Receiver / Transmitter (UART) interfaces, including: a data receive RX interface and a data transmit TX interface.

[0118] In one optional embodiment, the first address information and address calculation strategy information can also be implemented using analog signals. For example, the main control chip can send a voltage value to the MCU; a voltage value between 0V and 0.8V can represent 001, a voltage value between 0.8V and 1.2V can represent 010, and other address information and address calculation strategy information can also be used to represent the corresponding voltage values. After receiving the voltage value, the MCU can determine the corresponding first address information and address calculation strategy information based on its internally configured protocol, and then determine the second address information and perform a setting operation.

[0119] This application embodiment also provides a control device for a consumable chip, which includes a consumable chip and a main control chip. Specifically, the main control chip is used to respond to a communication request and send first address information and address calculation strategy information to the consumable chip; the consumable chip is used to receive and determine second address information of the consumable chip based on the first address information and address calculation strategy information; the consumable chip is also used to set the second address information and feed back the result of the setting operation to the main control chip; the main control chip is also used to communicate with the consumable chip based on the second address information after receiving feedback that the address setting of the consumable chip is normal, so as to determine whether the consumable chip is a genuine consumable chip based on the communication result. The specific process can be referred to the description in the above method flowchart.

[0120] Corresponding to the above embodiments, this application also provides an electronic device that can be used to implement the above-described main control chip. Figure 9 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. The electronic device 900 may include a processor 901, a memory 902, and a communication unit 903. These components communicate through one or more buses. Those skilled in the art will understand that the structure of the electronic device shown in the figure does not constitute a limitation on the embodiment of this application. It may be a bus topology or a star topology, and may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0121] The communication unit 903 is used to establish a communication channel, enabling the electronic device to communicate with other devices. It receives user data from other devices or sends user data to other devices.

[0122] The processor 901 serves as the control center of the electronic device, connecting various parts of the device via interfaces and lines. It executes software programs, instructions, and / or modules stored in the memory 902, and calls data stored in the memory to perform various functions and / or process data. The processor may be composed of integrated circuits (ICs), such as a single packaged IC or multiple packaged ICs with the same or different functions connected together. For example, the processor 901 may consist only of a central processing unit (CPU). In this embodiment, the CPU may have a single processing core or include multiple processing cores.

[0123] The memory 902 is used to store the execution instructions of the processor 901. The memory 902 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk or optical disk.

[0124] When the execution instructions in memory 902 are executed by processor 901, the electronic device 900 is able to perform operations. Figure 4 or Figure 5 Some or all of the steps in the illustrated embodiments.

[0125] In a specific implementation, this application also provides a computer storage medium, wherein the computer storage medium may store a program, and when the program is executed, it may include some or all of the steps of the control method for the consumable chip provided in this application. The storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), or a random access memory (RAM), etc.

[0126] In a specific implementation, this application also provides a computer program product, wherein the computer program product includes executable instructions, which, when executed on a computer, cause the computer to perform some or all of the steps in various embodiments of the control method for consumable chips provided in this application.

[0127] This application also provides a non-transitory computer-readable storage medium that stores computer instructions, which cause the computer to execute the control method for the consumable chip provided in this application.

[0128] The aforementioned non-transitory computer-readable storage medium may be any combination of one or more computer-readable media. A computer-readable medium may be a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium may be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of computer-readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), or flash memory, optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this document, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in connection with an instruction execution system, apparatus, or device.

[0129] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including—but not limited to—electromagnetic signals, optical signals, or any suitable combination thereof. Computer-readable signal media may also be any computer-readable medium other than computer-readable storage media, capable of transmitting, propagating, or transmitting programs for use by or in connection with an instruction execution system, apparatus, or device.

[0130] The program code contained on a computer-readable medium may be transmitted using any suitable medium, including—but not limited to—wireless, wire, optical fiber, RF, etc., or any suitable combination thereof.

[0131] Those skilled in the art will clearly understand that the techniques in the embodiments of this application can be implemented using software plus necessary general-purpose hardware platforms. Based on this understanding, the technical solutions in the embodiments of this application, or the parts that contribute to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application or some parts of the embodiments.

[0132] The same or similar parts between the various embodiments in this specification can be referred to mutually. In particular, the device embodiments and terminal embodiments are basically similar to the method embodiments, so the description is relatively simple, and the relevant parts can be referred to the description in the method embodiments.

Claims

1. A control method for a consumable chip, characterized in that, Applied to consumable chips, the method includes: Receive the first address information and address calculation strategy information sent by the main control chip; The second address information of the consumable chip is determined based on the first address information and the address calculation strategy information; Based on the second address information, communication is performed with the main control chip to determine whether the consumable chip is a genuine consumable chip based on the communication result. The second address information is used to perform address setting operations on the memory. Determining the second address information of the consumable chip based on the first address information and the address calculation strategy information includes: The address operation strategy information is parsed to obtain the operation code; Based on the mapping relationship between preset operation codes and preset operations, determine the target operation corresponding to the operation code; The target operation is performed on the first address information to obtain the second address information; wherein, the preset operation includes address random matching operation and address interference operation, the address random matching operation is used to characterize that the first address information does not contain interference information, and the address interference operation is used to characterize that the first address information contains the interference information.

2. The method according to claim 1, characterized in that, When the preset operation is an address random matching operation, determining the target operation corresponding to the preset operation code based on the mapping relationship between the preset operation code and the preset operation includes: If the least significant bit of the operand is 1, then the target operation is determined to be the inversion of all bits of the address code according to the mapping relationship; If the middle bit of the operand is 1, then the target operation is determined to be the inversion of the middle bit of the address code according to the mapping relationship; If the second least significant bit of the operand is 1, then the target operation is determined to be a high-low position swap operation of the address code according to the mapping relationship.

3. The method according to claim 1, characterized in that, When the preset operation is an address interference operation, determining the target operation corresponding to the preset operation code based on the mapping relationship between the preset operation code and the preset operation includes: If the least significant bit of the arithmetic code is 1, then the target operation is determined to be an operation of taking the highest three bits of the address code according to the mapping relationship; If the second least significant bit of the operand is 1, then the target operation is determined to be an operation of taking the lowest three bits of the address code according to the mapping relationship.

4. The method according to claim 1, characterized in that, The consumable chip is equipped with a memory. The step of communicating with the main control chip based on the second address information to determine whether the consumable chip is a genuine consumable chip includes: Based on the second address information, the memory is set by an address bit operation; If the address of the memory can be set normally within a preset time, the memory communicates with the main control chip. If the memory can communicate normally with the main control chip, then the consumable chip is determined to be a genuine consumable chip.

5. A control method for a consumable chip, characterized in that, Applied to a main control chip, the method includes: In response to a communication request, the consumable chip is sent first address information and address calculation strategy information; After receiving feedback that the address setting of the consumable chip is normal, communication is conducted with the consumable chip based on the second address information to determine whether the consumable chip is a genuine consumable chip based on the communication result; wherein, the feedback carries the second address information determined by the consumable chip based on the address calculation strategy information and the first address information; The response to the communication request, sending first address information and address calculation strategy information to the consumable chip, includes: In response to a communication request, a candidate address code is randomly selected as the first address information; Obtain the operation code corresponding to the candidate address code, where each operation code is used to represent a candidate operation; The operation code is encoded to obtain the address operation strategy information; The first address information and the address calculation strategy information are sent to the consumable chip.

6. The method according to claim 5, characterized in that, The step of communicating with the consumable chip based on the second address information, and determining whether the consumable chip is a genuine consumable chip based on the communication result, includes: If the main control chip can communicate normally with the consumable chip based on the second address information, then the consumable chip is determined to be a genuine consumable chip. If the main control chip cannot communicate normally with the consumable chip based on the second address information, then the consumable chip is determined to be a non-genuine consumable chip.

7. A control device for a consumable chip, characterized in that, The control device includes a consumable chip and a main control chip, and the control device includes: The main control chip is used to respond to communication requests and send first address information and address calculation strategy information to the consumable chip; The consumable chip is used to receive and determine the second address information of the consumable chip based on the first address information and the address calculation strategy information; The consumable chip is also used to set the second address information and feed back the result of the setting operation to the main control chip; The main control chip is also used to communicate with the consumable chip based on the second address information after receiving feedback that the address of the consumable chip is set normally, so as to determine whether the consumable chip is a genuine consumable chip based on the communication result. The main control chip is specifically used to respond to communication requests, randomly select a candidate address code as the first address information; obtain the operation code corresponding to the candidate address code, each operation code being used to represent a candidate operation; encode the operation code to obtain the address operation strategy information; and send the first address information and the address operation strategy information to the consumable chip. The consumable chip is specifically used to parse the address operation strategy information to obtain the operation code; determine the target operation corresponding to the operation code according to the mapping relationship between the preset operation code and the preset operation; perform the target operation on the first address information to obtain the second address information; wherein, the preset operation includes address random matching operation and address interference operation, the address random matching operation is used to characterize that the first address information does not contain interference information, and the address interference operation is used to characterize that the first address information contains the interference information.

8. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes a stored program, wherein, when the program is executed, it controls the device on which the computer-readable storage medium is located to perform the method of any one of claims 1 to 4 or the method of claim 5 or 6.

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