Semiconductor device

Abstract

An embodiment provides a semiconductor device capable of improving transmission characteristics of a high-frequency signal. According to one embodiment, a semiconductor device includes a substrate, a transistor provided on the substrate, a light-receiving element, and a light-emitting element. The substrate, the transistor, the light-emitting element, and the light-receiving element are arranged in the first direction in this order.

Description

[0001] Reference to related applications

[0002] This application claims the priority of Japanese Patent Application No. 2023-127828 (filing date: August 4, 2023) as a basic application. The present application incorporates the entire contents of the basic application by reference. Technical Field

[0003] Embodiments relate to a semiconductor device. Background Art

[0004] As a semiconductor device, a photorelay device is known. A photorelay device is a device that includes a semiconductor relay including a light emitting element and a light receiving element. A photorelay device is a contactless relay used for transmitting an AC signal or a DC signal. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide a semiconductor device capable of improving the transmission characteristics of high-frequency signals.

[0006] The semiconductor device of the embodiment includes a substrate, a transistor provided on the substrate, a light receiving element, and a light emitting element. The substrate, the transistor, the light emitting element, and the light receiving element are arranged in this order in a first direction. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 It is a perspective view showing an example of the overall structure of the optical relay device according to the first embodiment.

[0008] Figure 2 It is a plan view showing a plan layout of various elements included in the optical relay device according to the first embodiment.

[0009] Figure 3 An example of a cross-sectional structure of the optical relay device according to the first embodiment is shown along the Figure 2 Cross-sectional view along line III-III.

[0010] Figure 4 An example of a cross-sectional structure of the optical relay device according to the first embodiment is shown along the Figure 2 Cross-sectional view of line IV-IV.

[0011] Figure 5 An example of a cross-sectional structure of the optical relay device according to the first embodiment is shown along the Figure 2 Cross-sectional view of the VV line.

[0012] Figure 6 1 is a circuit diagram showing an example of a circuit configuration of the photorelay device according to the first embodiment.

[0013] Figure 7 This is a cross-sectional view showing an example of the cross-sectional structure of the optical relay device according to the first embodiment during the manufacturing process.

[0014] Figure 8 This is a cross-sectional view showing an example of the cross-sectional structure of the optical relay device according to the first embodiment during the manufacturing process.

[0015] Fig. 9 This is a cross-sectional view showing an example of the cross-sectional structure of the optical relay device according to the first embodiment during the manufacturing process.

[0016] Fig.10 This is a cross-sectional view showing an example of the cross-sectional structure of the optical relay device according to the first embodiment during the manufacturing process.

[0017] Fig.11 It is a cross-sectional view showing an example of the cross-sectional structure of the optical relay device according to the second embodiment.

[0018] Fig.12 It is a cross-sectional view showing an example of the cross-sectional structure of the optical relay device according to the second embodiment.

[0019] Fig.13 This is a cross-sectional view showing an example of a cross-sectional structure of the optical relay device according to the second embodiment during the manufacturing process.

[0020] Fig.14 This is a cross-sectional view showing an example of a cross-sectional structure of the optical relay device according to the second embodiment during the manufacturing process.

[0021] Fig.15 It is a perspective view showing an example of the overall structure of the optical relay device according to the third embodiment.

[0022] Fig.16 It is a cross-sectional view showing an example of the cross-sectional structure of the optical relay device according to the third embodiment.

[0023] Description of Reference Numerals

[0024] 1, 1A, 1B ... photorelay device; 10, 10B ... substrate; 12, 14, 72, 74, 74A ... insulator layer; 11, 13, 15, 71, 73, 75 ... wiring layer; 12-1, 13-1, 14-1, 72-1, 73-1, 74-1 ... insulator; 20a, 20b ... MOSFET; 21a, 21b, 22a, 22b, 23a, 23b, 31, 32, 33, 34, 51, 52, 60, 61, 62, 63, 90-1, 91-1, 91-2, 92-1, 92-2, 93-1, 93-2, 95-1, 97-1, 97- 2…electrode; 30…light-receiving element; 30a…control circuit; 30b…photodiode; 40…adhesive layer; 50…light-emitting element; 70, 70A, 70B…intermediate substrate; 80, 81, 80B, 81B…input terminal; 82a, 82b…output terminal; 85, 87a, 87b, 91-3, 91-4, 91-5, 92-3, 92-4, 92-5, 93-3, 93-4, 93-5, 95-2, 97-3, 97-3B, 97-4, 97-5…conductor; 90, 91, 92, 93, 94, 95, 96, 97, 98…wiring; 100…sealing resin. DETAILED DESCRIPTION

[0025] The following describes the embodiments with reference to the accompanying drawings. Each embodiment illustrates an apparatus or method for realizing the technical idea of ​​the invention. The drawings are schematic or conceptual, and the dimensions and ratios of the drawings are not necessarily the same as in reality. The technical idea of ​​the invention is not determined by the shape, structure, and arrangement of the constituent elements.

[0026] In the following description, components having substantially the same function and structure are denoted by the same reference numerals. When there is no need to distinguish components denoted by reference numerals containing the same characters, these components are referred to by reference numerals containing only characters.

[0027] A first embodiment will be described. In this embodiment, a photorelay device will be described as an example of a semiconductor device.

[0028] Figure 1 It is a perspective view showing an example of the overall structure of the optical relay device according to the first embodiment. Figure 2 Yes means Figure 1 A plan view of the planar layout of various components included in the photorelay device.

[0029] like Figure 1 and Figure 2As shown, the photorelay device 1 includes two transistors 20a and 20b, a light receiving element 30, an adhesive layer 40, a light emitting element 50, electrodes 60, 61, 62 and 63, input terminals 80 and 81, output terminals 82a and 82b, and wirings 90, 91, 92, 93, 94, 95, 96, 97 and 98. The transistors 20a and 20b are, for example, MOSFETs (Metal Oxide Semiconductor Field Effect Transistor). Hereinafter, the case where the transistors 20a and 20b are MOSFETs (MOSFETs 20a and 20b) will be described. The MOSFETs 20a and 20b are arranged opposite to the light receiving element 30, the adhesive layer 40 and the light emitting element 50.

[0030] Hereinafter, the direction from the MOSFET 20a and 20b toward the light receiving element 30 and the light emitting element 50 is defined as the Z direction or the upper direction. The direction from the light receiving element 30 and the light emitting element 50 toward the MOSFET 20a and 20b is defined as the lower direction. The plane intersecting the Z direction is defined as the XY plane. The directions intersecting each other in the XY plane are defined as the X direction and the Y direction. That is, Figure 2 The upper portion of the plan view corresponds to the plan layout of the light receiving element 30, the adhesive layer 40, and the light emitting element 50 when the optical relay device 1 is viewed in the upward direction. Figure 2 The lower portion of the plan view corresponds to the plan layout of the MOSFETs 20a and 20b, the electrodes 60, 61, 62, and 63, the input terminals 80 and 81, and the output terminals 82a and 82b when the photorelay device 1 is viewed in the downward direction.

[0031] MOSFETs 20a and 20b are, for example, enhancement type n-channel MOS transistors. MOSFETs 20a and 20b are used to control the AC signal or DC signal to be transmitted. When MOSFETs 20a and 20b are in the on state, the photorelay device 1 transmits a signal, and when MOSFETs 20a and 20b are in the off state, the photorelay device 1 does not transmit a signal.

[0032] MOSFET 20a (hereinafter, also referred to as "MOS1") includes electrodes 21a, 22a, and 23a. Electrode 21a functions as a drain electrode of MOSFET 20a. Electrode 22a functions as a source electrode of MOSFET 20a. Electrode 23a functions as a gate electrode of MOSFET 20a. Electrode 21a is provided on the lower surface of MOSFET 20a. Electrodes 22a and 23a are provided on the upper surface of MOSFET 20a.

[0033] MOSFET 20b (hereinafter also referred to as "MOS2") has the same structure as MOSFET 20a. For example, MOSFET 20b is arranged side by side with MOSFET 20a in the Y direction. The arrangement of MOSFET 20a and MOSFET 20b is arbitrary.

[0034] MOSFET 20b includes electrodes 21b, 22b, and 23b. Electrode 21b functions as a drain electrode of MOSFET 20b. Electrode 22b functions as a source electrode of MOSFET 20b. Electrode 23b functions as a gate electrode of MOSFET 20b. Electrode 21b is provided on the lower surface of MOSFET 20b. Electrodes 22b and 23b are provided on the upper surface of MOSFET 20b. Figure 1 and Figure 2 In the example of FIG. 2 , the electrodes 22a and 23a included in the MOSFET 20a are arranged in a plane-symmetrical manner with the electrodes 22b and 23b included in the MOSFET 20b with respect to the plane extending in the X direction and the Z direction.

[0035] The light receiving element 30 is a PDA (Photo Diode Array) or a phototransistor. Figure 1 and Figure 2 In the figure, the case where the light receiving element 30 is a PDA is shown. The case where the light receiving element 30 is a PDA is described below. The light receiving element 30 is arranged above the MOSFET 20a and the MOSFET 20b. A light receiving surface is provided on the lower surface of the light receiving element 30. In other words, the light receiving surface of the light receiving element 30 faces the side (lower side direction) where the MOSFET 20a and the MOSFET 20b are arranged.

[0036] The light receiving element 30 includes electrodes 31, 32, 33, and 34. The electrodes 31, 32, 33, and 34 are provided on the lower surface of the light receiving element 30. For example, the electrodes 31 and 33 are electrically connected via a wiring (not shown) provided in the light receiving element 30. For example, the electrodes 32 and 34 are electrically connected via a wiring (not shown) provided in the light receiving element 30. For example, the electrodes 31, 32, 33, and 34 are protruding electrodes. The electrode 31 is connected to the electrode 22a of the MOSFET 20a via the wiring 91. The electrode 32 is connected to the electrode 23a of the MOSFET 20a via the wiring 92. The electrode 33 is connected to the electrode 22b of the MOSFET 20b via the wiring 93. The electrode 34 is connected to the electrode 23b of the MOSFET 20b via the wiring 94.

[0037] The light emitting element 50 is, for example, an LED (Light Emitting Diode). The light emitting element 50 is provided on the lower surface of the light receiving element 30 via the adhesive layer 40. That is, the light emitting element 50 is arranged between the MOSFETs 20a and 20b and the light receiving element 30. In addition, the adhesive layer 40 uses an insulating material having light transmittance. A light irradiation surface is provided on the upper surface of the light emitting element 50. The light irradiation surface of the light emitting element 50 is opposite to the light receiving surface of the light receiving element 30.

[0038] The light emitting element 50 includes electrodes 51 and 52. The electrodes 51 and 52 are provided on the lower surface of the light emitting element 50. One of the electrodes 51 and 52 is an anode electrode of the light emitting element 50, and the other is a cathode electrode of the light emitting element 50. The electrode 51 is connected to the electrode 62 via wirings 95 and 97. The electrode 52 is connected to the electrode 63 via wirings 96 and 98.

[0039] The electrodes 60 and 61 are provided on the lower surfaces of the MOSFETs 20a and 20b, respectively. The electrodes 60 and 61 are arranged in the Y direction. The electrode 60 is electrically connected to the electrode 21a of the MOSFET 20a. The electrode 61 is electrically connected to the electrode 21b of the MOSFET 20b.

[0040] The electrodes 62 and 63 are arranged at substantially the same positions in the Z direction as the electrodes 60 and 61 so as to be aligned in the X direction, for example. The electrodes 62 and 63 are aligned in the Y direction.

[0041] Input terminals 80 and 81 are provided below electrodes 62 and 63, respectively. Input terminal 80 is connected to electrode 62 via a conductor not shown. Input terminal 81 is connected to electrode 63 via a conductor not shown. Input terminals 80 and 81 are connected to an external power source not shown. The power source is an AC power source or a DC power source. A voltage for controlling the photorelay device 1 is applied to input terminals 80 and 81.

[0042] The output terminals 82a and 82b are provided below the electrodes 60 and 61, respectively. The output terminal 82a is connected to the electrode 60 via a conductor not shown. The output terminal 82b is connected to the electrode 61 via a conductor not shown. The output terminals 82a and 82b are connected to an external circuit not shown, etc., respectively. Thus, an AC or DC signal is transmitted from the power supply to the circuit via the photorelay device 1.

[0043] Figure 3 An example of a cross-sectional structure of the optical relay device according to the first embodiment is shown along the Figure 2 Cross-sectional view along line III-III. Figure 4 An example of a cross-sectional structure of the optical relay device according to the first embodiment is shown along the Figure 2 Cross-sectional view of line IV-IV. Figure 5 An example of a cross-sectional structure of the optical relay device according to the first embodiment is shown along the Figure 2 Cross-sectional view of the VV line. Figure 3 This corresponds to a YZ cross section of a portion of the optical relay device 1 including the wirings 90 , 91 , and 93 . Figure 4 This corresponds to an XZ cross section of a portion of the optical relay device 1 including the wirings 91 and 92 . Figure 5 This corresponds to an XZ cross section of a portion of the optical relay device 1 including the wiring 95 .

[0044] First, refer to Figure 3 , Figure 4 and Figure 5 The overall structure of the photorelay device 1 will be described.

[0045] like Figure 3 , Figure 4 and Figure 5 As shown, the optical relay device 1 further includes a substrate 10 , an intermediate substrate 70 , and a sealing resin 100 .

[0046] The substrate 10 is, for example, a flexible substrate (FPC: Flexible Printed Circuits) using polyimide, a resin substrate, or a polyimide substrate. The substrate 10 includes wiring layers 11, 13, and 15 and insulator layers 12 and 14. The substrate 10 includes, for example, a five-layer structure stacked in the order of wiring layer 11, insulator layer 12, wiring layer 13, insulator layer 14, and wiring layer 15 facing upward. The substrate 10 has an opening portion that is a hole that penetrates the wiring layer 15 and the insulator layer 14 and reaches the wiring layer 13. MOSFETs 20a and 20b are arranged in the opening portion of the substrate 10. That is, MOSFETs 20a and 20b are provided at positions that intersect with the substrate 10 in the XY plane. The upper portion of the substrate 10 is in contact with the lower portion of the intermediate substrate 70.

[0047] The intermediate substrate 70 is, for example, a resin substrate, a polyimide substrate, or a silicon substrate. The intermediate substrate 70 includes wiring layers 71, 73, and 75 and insulator layers 72 and 74. The intermediate substrate 70 includes, for example, a five-layer structure stacked in the order of wiring layer 71, insulator layer 72, wiring layer 73, insulator layer 74, and wiring layer 75. The wiring layer 71 of the intermediate substrate 70 is in contact with the upper portions of the wiring layer 15 of the substrate 10 and the MOSFETs 20a and 20b, respectively. The wiring layer 75 of the intermediate substrate 70 is in contact with the lower portions of the light receiving element 30 and the light emitting element 50, respectively. Therefore, the substrate 10, the MOSFETs 20a and 20b, the intermediate substrate 70, the light emitting element 50, and the light receiving element 30 are arranged in this order in the Z direction.

[0048] The sealing resin 100 is, for example, a mold resin having light-shielding properties, and covers the MOSFETs 20 a and 20 b , the light-receiving element 30 , the light-emitting element 50 , and the intermediate substrate 70 , thereby protecting them from physical or electrical interference.

[0049] Next, refer to Figure 3 and Figure 4 A structure for electrically connecting MOSFETs 20a and 20b and output terminals 82a and 82b will be described.

[0050] The wiring layer 11 includes output terminals 82a and 82b. The insulating layer 12 includes conductors 87a and 87b and an insulator 12-1. The wiring layer 13 includes electrodes 60 and 61 and an insulator 13-1.

[0051] Electrode 60 is connected to electrode 21a of MOSFET 20a. Electrode 61 is connected to electrode 21b of MOSFET 20b. Insulator 13-1 insulates electrode 60 and electrode 61 from each other. Conductor 87a functions as a through hole extending in the Z direction in insulator 12-1 to connect the upper surface of output terminal 82a and the lower surface of electrode 60. Conductor 87b functions as a through hole extending in the Z direction in insulator 12-1 to connect the upper surface of output terminal 82b and the lower surface of electrode 61. Figure 4 In the example of FIG. 8 , three conductors 87 a are provided, but the number of conductors 87 a may be one or more. The same applies to the conductor 87 b.

[0052] With the above-described structure, MOSFETs 20a and 20b and output terminals 82a and 82b are electrically connected.

[0053] Next, refer to Figure 3 and Figure 4 A structure for electrically connecting the MOSFETs 20 a and 20 b and the light receiving element 30 will be described.

[0054] Wiring layer 71 includes electrodes 90-1, 91-1, 92-1, and 93-1. Insulator layer 72 includes conductors 91-4, 92-4, and 93-4, and insulator 72-1. Wiring layer 73 includes insulator 73-1 and conductors 91-3, 92-3, and 93-3. Insulator layer 74 includes conductors 91-5, 92-5, and 93-5, and insulator 74-1. Wiring layer 75 includes electrodes 91-2, 92-2, and 93-2.

[0055] Electrodes 90-1, 91-1, 91-2, 92-1, 92-2, 93-1 and 93-2 are made of conductive paste such as silver or gold. Electrodes 90-1, 91-1, 92-1 and 93-1 are not in contact with each other in wiring layer 71 and are not electrically connected. Electrodes 91-2, 92-2 and 93-2 are not in contact with each other in wiring layer 75 and are not electrically connected.

[0056] The electrode 90-1 corresponds to the wiring 90. The structure corresponding to the wiring 90 electrically connects the electrode 22a of the MOSFET 20a and the electrode 22b of the MOSFET 20b.

[0057] The electrodes 91-1 and 91-2 and the conductors 91-3, 91-4, and 91-5 correspond to the wiring 91. The structure corresponding to the wiring 91 electrically connects the light receiving element 30 and the electrode 22a of the MOSFET 20a.

[0058] The electrodes 92-1 and 92-2 and the conductors 92-3, 92-4, and 92-5 correspond to the wiring 92. The structure corresponding to the wiring 92 electrically connects the light receiving element 30 and the electrode 23a of the MOSFET 20a.

[0059] The electrodes 93-1 and 93-2 and the conductors 93-3, 93-4, and 93-5 correspond to the wiring 93. The structure corresponding to the wiring 93 electrically connects the light receiving element 30 and the electrode 22b of the MOSFET 20b.

[0060] The electrode 90 - 1 extends in the Y direction so that both ends are in contact with the upper surface of the electrode 22 a of the MOSFET 20 a and the upper surface of the electrode 22 b of the MOSFET 20 b .

[0061] The electrode 91-1 is in contact with the upper surface of the electrode 22a of the MOSFET 20a. The electrode 91-2 is in contact with the lower surface of the electrode 31. The conductor 91-3 has a function of adjusting the positional deviation between the electrode 22a and the electrode 31 when viewed in the Z direction, for example. The conductor 91-4 functions as a through hole extending in the Z direction in the insulator 72-1 to connect the upper surface of the electrode 91-1 and the lower surface of the conductor 91-3. The conductor 91-5 functions as a through hole extending in the Z direction in the insulator 74-1 to connect the upper surface of the conductor 91-3 and the lower surface of the electrode 91-2.

[0062] The electrode 92-1 is in contact with the upper surface of the electrode 23a of the MOSFET 20a. The electrode 92-2 is in contact with the lower surface of the electrode 32. The conductor 92-3 has a function of adjusting the positional deviation between the electrode 23a and the electrode 32 when viewed in the Z direction, for example. The conductor 92-4 functions as a through hole extending in the Z direction in the insulator 72-1 to connect the upper surface of the electrode 92-1 and the lower surface of the conductor 92-3. The conductor 92-5 functions as a through hole extending in the Z direction in the insulator 74-1 to connect the upper surface of the conductor 92-3 and the lower surface of the electrode 92-2.

[0063] The electrode 93-1 is in contact with the upper surface of the electrode 22b of the MOSFET 20b. The electrode 93-2 is in contact with the lower surface of the electrode 33. The conductor 93-3 has a function of adjusting the positional displacement between the electrode 22b and the electrode 33 when viewed in the Z direction, for example. The conductor 93-4 functions as a through hole extending in the Z direction in the insulator 72-1 to connect the upper surface of the electrode 93-1 with the lower surface of the conductor 93-3. The conductor 93-5 functions as a through hole extending in the Z direction in the insulator 74-1 to connect the upper surface of the conductor 93-3 with the lower surface of the electrode 93-2.

[0064] In addition, although Figure 3 and Figure 4 Although not shown in the figure, the intermediate substrate 70 further includes a structure corresponding to the wiring 94. The structure corresponding to the wiring 94 electrically connects the light receiving element 30 and the electrode 23b of the MOSFET 20b. The structure corresponding to the wiring 94 is the same as the structure corresponding to the wiring 92. In addition, the insulator 73-1 insulates the conductors 91-3, 92-3, 93-3 and the conductor corresponding to the conductor 92-3 in the wiring 94 from each other.

[0065] With the above-described structure, the MOSFETs 20 a and 20 b and the light receiving element 30 are electrically connected.

[0066] Next, refer to Figure 5 A structure for electrically connecting the input terminals 80 and 81 and the light emitting element 50 will be described.

[0067] The wiring layer 11 further includes an input terminal 80. The insulating layer 12 further includes a conductor 85. The wiring layer 13 further includes an electrode 62. The insulating layer 14 further includes a conductor 95-2. The wiring layer 15 further includes an electrode 95-1.

[0068] The wiring layer 71 further includes an electrode 97-1. The insulator layer 72 further includes a conductor 97-4. The wiring layer 73 further includes a conductor 97-3. The insulator layer 74 further includes a conductor 97-5. The wiring layer 75 further includes an electrode 97-2.

[0069] The electrode 95-1 and the conductor 95-2 correspond to the wiring 95. The electrodes 97-1 and 97-2 and the conductors 97-3, 97-4, and 97-5 correspond to the wiring 97. The structures corresponding to the wirings 95 and 97 electrically connect the light emitting element 50 and the electrode 62.

[0070] The conductor 85 functions as a through hole extending in the Z direction in the insulator 12-1 to connect the upper surface of the input terminal 80 with the lower surface of the electrode 62. The conductor 95-2 functions as a through hole extending in the Z direction in the insulator 14-1 to connect the upper surface of the electrode 62 with the lower surface of the electrode 95-1. The electrode 62 is insulated from the electrodes 60 and 61 by the insulator 13-1.

[0071] Electrode 97-1 is in contact with the upper surface of electrode 95-1. Electrode 97-2 is in contact with the lower surface of electrode 51. Conductor 97-3 has a function of adjusting the positional displacement between electrode 95-1 and electrode 51 when viewed in the Z direction, for example. Conductor 97-3 is insulated from conductors 91-3, 92-3, 93-3 and the conductor corresponding to conductor 92-3 in wiring 94 by insulator 73-1. Conductor 97-4 functions as a through hole extending in the Z direction in insulator 72-1 to connect the upper surface of electrode 97-1 with the lower surface of conductor 97-3. Conductor 97-5 functions as a through hole extending in the Z direction in insulator 74-1 to connect the upper surface of conductor 97-3 with the lower surface of electrode 97-2.

[0072] In addition, Figure 5 Although not shown in the figure, the wiring layer 11 further includes an input terminal 81. The insulator layer 12 further includes a conductor that electrically connects the electrode 63 and the input terminal 81. The wiring layer 13 further includes an electrode 63. The insulator layer 14 and the wiring layer 15 further include a structure corresponding to the wiring 96. The intermediate substrate 70 further includes a structure corresponding to the wiring 98. The electrode 63 is insulated from the electrodes 60, 61, and 62 by the insulator 13-1. The conductor that electrically connects the electrode 63 and the input terminal 81 is the same as the structure corresponding to the conductor 85. The structure corresponding to the wirings 96 and 98 electrically connects the electrode 52 of the light-emitting element 50 and the electrode 62. The structure corresponding to the wiring 96 is the same as the structure corresponding to the wiring 95. The structure corresponding to the wiring 98 is the same as the structure corresponding to the wiring 97. The conductor corresponding to the conductor 97-3 in the wiring 98 is insulated from the conductor 97-3 by the insulator 73-1. The structure corresponding to the wirings 96 and 98 electrically connects the light emitting element 50 and the electrode 63 .

[0073] With the above-described structure, the input terminals 80 and 81 are electrically connected to the light emitting element 50 .

[0074] Figure 6 1 is a circuit diagram showing an example of a circuit configuration of the optical relay device according to the first embodiment. Figure 6 An example of the circuit configuration of the optical relay device 1 according to the first embodiment will be described.

[0075] like Figure 6 As shown, the light emitting element 50 is connected to input terminals 80 and 81. An input voltage for controlling the photorelay device 1 is applied to the input terminals 80 and 81.

[0076] The light receiving element 30 is, for example, a photodiode array including a control circuit 30a and several to several tens of photodiodes 30b connected in series. Both ends of the plurality of photodiodes 30b connected in series are connected to the control circuit 30a.

[0077] The gates of MOSFETs 20a and 20b are commonly connected to the anode of the light receiving element 30. The sources of MOSFETs 20a and 20b are commonly connected to the cathode of the light receiving element 30. The drain of MOSFET 20a is connected to the output terminal 82a. The drain of MOSFET 20b is connected to the output terminal 82b.

[0078] When the light emitting element 50 on the input side is turned on (light emitting state), the light receiving element 30 driving the MOSFETs 20a and 20b receives light from the light emitting element 50, and generates a voltage of, for example, 7 V to more than 10 V. As a result, the MOSFETs 20a and 20b are turned on, and the output terminals 82a and 82b are electrically connected. In addition, when the light emitting element 50 is turned off (light extinguishing state), the MOSFETs 20a and 20b are turned off, and the output terminals 82a and 82b are not electrically connected.

[0079] Next, an example of a method for manufacturing the optical relay device according to the first embodiment will be described. Figure 7 , Figure 8 , Fig. 9 and Fig.10 This is a cross-sectional view showing an example of the cross-sectional structure of the optical relay device according to the first embodiment during the manufacturing process. Figure 7 , Figure 8 , Fig. 9 and Fig.10 The cross section shown corresponds to Figure 3 Cross section shown.

[0080] First, substrate 10 without openings, MOSFETs 20a and 20b, light receiving element 30, light emitting element 50, and intermediate substrate 70 are formed. Light receiving element 30 and light emitting element 50 are bonded via adhesive layer 40 so that the light receiving surface and the light emitting surface face each other.

[0081] Next, if Figure 7 As shown, an opening is formed in the substrate 10 by, for example, laser processing. The electrodes 60 and 61 are exposed by the laser processing.

[0082] Next, if Figure 8 As shown, the electrode 21a of the MOSFET 20a is bonded to the upper surface of the electrode 60, and the electrode 21b of the MOSFET 20b is bonded to the upper surface of the electrode 61. Thus, the MOSFETs 20a and 20b are supported by the substrate 10.

[0083] Next, if Fig. 9 As shown in FIG. 1 , an intermediate substrate 70 is provided on the upper surface of the substrate 10 and the MOSFETs 20a and 20b. Specifically, the electrode 22a of the MOSFET 20a is bonded to the electrodes 90-1 and 91-1 of the intermediate substrate 70. The electrode 22b of the MOSFET 20b is bonded to the electrodes 90-1 and 93-1 of the intermediate substrate. Fig. 9 Although not shown, the electrode 23a of the MOSFET 20a is bonded to the electrode 92-1 of the intermediate substrate 70. The electrode 23b of the MOSFET 20b is bonded to the electrode on the lower surface side of the intermediate substrate 70 corresponding to the wiring 94. The electrode 95-1 is bonded to the electrode 97-1 of the intermediate substrate 70. The electrode corresponding to the wiring 96 is bonded to the electrode on the lower surface side of the intermediate substrate 70 corresponding to the wiring 98. Thus, the intermediate substrate 70 is supported by the substrate 10 and the MOSFETs 20a and 20b.

[0084] Next, if Fig.10 As shown in FIG. 1 , a light receiving element 30 and a light emitting element 50 are provided on the upper surface of the intermediate substrate 70 and are bonded together via an adhesive layer 40. Specifically, the electrode 31 of the light receiving element 30 is bonded to the electrode 91-2 of the intermediate substrate 70, and the electrode 33 of the light receiving element 30 is bonded to the electrode 93-2 of the intermediate substrate 70. Fig.10 Although not shown, the electrode 32 of the light receiving element 30 is bonded to the electrode 92-2 of the intermediate substrate, and the electrode 34 of the light receiving element 30 is bonded to the electrode on the upper surface side of the intermediate substrate corresponding to the wiring 94. In addition, the electrode 51 of the light emitting element 50 is bonded to the electrode 97-2 of the intermediate substrate 70, and the electrode 52 of the light emitting element 50 is bonded to the electrode on the upper surface side of the intermediate substrate corresponding to the wiring 98.

[0085] Next, the structure obtained through the above steps except for the lower portion is sealed with the sealing resin 100. Thus, the optical relay device 1 is manufactured.

[0086] In a photorelay device, a light receiving element and a light emitting element are sometimes arranged between a MOSFET (output terminal) and an electrode (input terminal). In this case, coupling capacitance is generated between the light receiving element and the input terminal and between the light receiving element and the output terminal. Due to the influence of this coupling capacitance, for example, the high-frequency transmission characteristics of 1 GHz or more may deteriorate. In addition, for example, if the length of the wire connecting the light receiving element and the MOSFET is increased, the transmission characteristics may deteriorate in a lower frequency region due to the influence of the open short stub.

[0087] According to the structure of the first embodiment, the light receiving element 30 and the light emitting element 50 are arranged above the MOSFET 20a and the MOSFET 20b. As a result, the coupling capacitance generated between the light receiving element 30 and the input terminals 80 and 81 and between the light receiving element 30 and the output terminals 82a and 82b can be reduced. In addition, by arranging the light receiving element 30 and the light emitting element 50 above the MOSFET 20a and the MOSFET 20b, the length of the circuit connecting the electrode of the light receiving element 30 with the electrode of the MOSFET 20a and the MOSFET 20b can be relatively shortened. Similarly, the length of the circuit connecting the electrode of the light emitting element 50 with the input terminal provided on the lower layer of the substrate 10 can be relatively shortened. Therefore, the influence of the open short stub can be moved to a higher frequency region. Therefore, the transmission characteristics of the high frequency signal of the semiconductor device can be improved.

[0088] Furthermore, according to the configuration of the first embodiment, by arranging the light receiving element 30 and the light emitting element 50 above the MOSFET 20a and the MOSFET 20b, the installation area of ​​the photorelay device 1 can be reduced. That is, the photorelay device 1 can be miniaturized.

[0089] In addition, by using a multilayer substrate as the intermediate substrate 70, it is possible to adjust the positional deviation between the electrodes 22a and 23a of the MOSFET 20a and the electrodes 22b and 23b of the MOSFET 20b and the electrodes 31, 32, 33, and 34 of the light receiving element 30 when viewed in the Z direction. Similarly, it is possible to adjust the positional deviation between the electrodes 51 and 52 of the light emitting element 50 and the electrodes of the input terminals 80 and 81 when viewed in the Z direction. That is, the possibility of malfunction caused by the positional deviation of the electrodes during manufacturing can be reduced.

[0090] In addition, MOSFETs 20a and 20b are arranged in the recessed portion of the substrate 10. That is, MOSFETs 20a and 20b are arranged at positions intersecting with the substrate 10 in the XY plane. As a result, the position of the upper surface of the region where MOSFETs 20a and 20b are not arranged in the substrate 10 can be aligned with the position of the upper surface of MOSFETs 20a and 20b in the Z direction. Therefore, the load of the light receiving element 30, the light emitting element 50, and the intermediate substrate 70 can be dispersed to the substrate 10 and the MOSFETs 20a and 20b. Therefore, the manufacturing load when realizing a structure in which the light receiving element 30 and the light emitting element 50 are arranged above the MOSFETs 20a and 20b can be reduced.

[0091] Next, the second embodiment will be described. Hereinafter, the structure and manufacturing method that are different from the first embodiment will be mainly described.

[0092] Fig.11 and Fig.12 It is a cross-sectional view showing an example of the cross-sectional structure of the optical relay device according to the second embodiment. Fig.11 Corresponding to the first embodiment Figure 3 . Fig.12 Corresponding to the first embodiment Figure 5 .

[0093] like Fig.11 and Fig.12 As shown, the optical relay device 1A includes an intermediate substrate 70A instead of the intermediate substrate 70 in the first embodiment. The configuration of the optical relay device 1A other than the intermediate substrate 70A is the same as the configuration other than the intermediate substrate 70 in the first embodiment.

[0094] The intermediate substrate 70A includes an insulator layer 74A instead of the insulator layer 74. The insulator layer 74A includes an insulator 74-1A as a base. The intermediate substrate 70A has an opening portion as a hole that penetrates the wiring layer 75 and the insulator layer 74A and reaches the wiring layer 73. The light emitting element 50 is arranged in the opening portion of the intermediate substrate 70A. That is, the light emitting element 50 in the second embodiment is provided at a position intersecting with the intermediate substrate 70A in the XY plane.

[0095] By providing the opening, the intermediate substrate 70A does not include the electrode 97-2 and the conductor 97-5 as structures corresponding to the wiring 97. Furthermore, the light emitting element 50 is provided so that the electrode 51 is in contact with the upper surface of the conductor 97-3.

[0096] Furthermore, by providing the light receiving element 30 in the opening, the intermediate substrate 70A and the light receiving element 30 are close enough to be connected even through a flat electrode. Therefore, the electrodes 31, 32, 33, and 34 of the light receiving element 30 may be flat electrodes instead of protruding electrodes.

[0097] In addition, although Fig.11 and Fig.12 Although illustration is omitted, the structure corresponding to wiring 98 is the same as the structure corresponding to wiring 97.

[0098] With the above-described structure, the input terminals 80 and 81 are electrically connected to the light emitting element 50 .

[0099] Next, an example of a method for manufacturing the optical relay device according to the second embodiment will be described. Fig.13 and Fig.14 This is a cross-sectional view showing an example of a cross-sectional structure of the optical relay device according to the second embodiment during the manufacturing process. Fig.13 Corresponding to the first embodiment Fig. 9 . Fig.14 Corresponding to the first embodiment Fig.10 .

[0100] First, an opening is formed in advance in the intermediate substrate 70A without an opening, for example, by laser processing. The conductor 97-3 and the conductor corresponding to the wiring 98 of the intermediate substrate 70A are exposed by the laser processing. Figure 7 and Figure 8 The substrate 10 and the MOSFETs 20a and 20b are provided in the same manner as in the described steps.

[0101] Then, if Fig.13 As shown in FIG. 1 , an intermediate substrate 70A is provided on the upper surface of the substrate 10 and the MOSFETs 20a and 20b. The specific bonding relationship is the same as that in the first embodiment. Fig. 9 same.

[0102] Next, if Fig.14 As shown in FIG. 1 , a light receiving element 30 and a light emitting element 50 are provided on the upper surface of the intermediate substrate 70A and are bonded together by an adhesive layer 40. At this time, at least a portion of the light emitting element 50 is shaped so as to be accommodated in the opening of the intermediate substrate 70A. Specifically, the electrode 51 of the light emitting element 50 is bonded to the conductor 97-3 of the intermediate substrate 70A. Fig.14 Although not shown, the electrode 52 of the light emitting element 50 is bonded to the conductor corresponding to the wiring 98 of the intermediate substrate 70A. The bonding relationship between the light receiving element 30 and the MOSFETs 20a and 20b is similar to that in the first embodiment. Fig.10 same.

[0103] Next, the structure obtained through the above steps except for the lower portion is sealed with the sealing resin 100. Thus, the optical relay device 1A is manufactured.

[0104] According to the configuration of the second embodiment, since the height of the photorelay device can be suppressed, the photorelay device can be miniaturized.

[0105] According to the configuration of the second embodiment, the light receiving element 30 and the light emitting element 50 are arranged above the MOSFET 20a and the MOSFET 20b as in the first embodiment. Therefore, the transmission characteristics of high frequency signals of the semiconductor device can be improved.

[0106] Next, a third embodiment will be described. Hereinafter, the structure and manufacturing method that are different from the first embodiment will be mainly described.

[0107] Fig.15 It is a perspective view showing an example of the overall structure of the optical relay device according to the third embodiment. Fig.16 2 is a cross-sectional view showing an example of a cross-sectional structure of an optical relay device according to the third embodiment. Fig.15 In order to make the internal structure clear, the substrate 10, the intermediate substrate 70 and the sealing resin 100 are omitted.

[0108] like Fig.15 and Fig.16 As shown, the optical relay device 1B of this embodiment includes a substrate 10B instead of the substrate 10 in the first embodiment. In addition, an intermediate substrate 70B is provided instead of the intermediate substrate 70 in the first embodiment. The structure of the optical relay device 1B other than the substrate 10 and the intermediate substrate 70 is the same as the structure of the first embodiment other than the substrate 10 and the intermediate substrate 70.

[0109] The photorelay device 1B includes input terminals 80B and 81B instead of the input terminals 80 and 81. Unlike the first embodiment, the input terminals 80B and 81B are not included in the substrate 10B. The input terminals 80B and 81B have, for example, a plate-like shape extending along the YZ plane, and are provided on the side surface outside the sealing resin 100 in the X direction. The input terminals 80B and 81B are provided at a position intersecting the substrate 10B and the intermediate substrate 70B.

[0110] The intermediate substrate 70B extends in the X direction and is in contact with the input terminal 80B. The intermediate substrate 70B includes a conductor 97-3B instead of the conductor 97-3. The conductor 97-3B is included in the wiring layer 73. The conductor 97-3B extends to the end of the intermediate substrate 70B in the X direction and is electrically connected to the input terminal 80B.

[0111] Since the intermediate substrate 70B is in contact with the input terminal 80B, the substrate 10B does not include the electrode 62, the conductor 85, and the wiring 95. In addition, the intermediate substrate 70B does not include the electrode 97-1 and the conductor 97-4 as structures corresponding to the wiring 97. The input terminal 80B is connected to the electrode 51 of the light emitting element 50 through the wiring 97.

[0112] In addition, although Fig.16 Although illustration is omitted, the structure corresponding to wiring 98 is the same as the structure corresponding to wiring 97.

[0113] With the above-described structure, the input terminals 80B and 81B are electrically connected to the light emitting element 50 .

[0114] Input terminals 80B and 81B may be manufactured by using MID (Molded Interconnect Device) technology to provide electrodes on the surface of sealing resin 100. By using MID technology, input terminals 80B and 81B can be arranged on the outer surface of sealing resin 100.

[0115] According to the structure of this embodiment, the length of the wiring connecting the input terminal and the light emitting element can be further shortened. As a result, the influence of the open stub can be moved to a higher frequency region. Therefore, the transmission characteristics of high-frequency signals of the semiconductor device can be improved.

[0116] Furthermore, according to the structure of this embodiment, the installation area of ​​the photorelay device can be further reduced. In other words, the photorelay device can be miniaturized.

[0117] As a modification of the optical relay device 1B of the third embodiment described above, an optical relay device in which the light emitting element 50 is housed in the opening of the intermediate substrate 70A as in the second embodiment is conceivable. In this modification, the height of the optical relay device can be suppressed.

[0118] In addition to the above-described embodiments, examples of conceivable embodiments will be given. For example, the medium that electrically connects the MOSFET to the light-receiving element is not limited to the intermediate substrate. It is also possible to use wires to construct the same electrical connection relationship as the described embodiments. For example, the support method of the light-receiving element and the light-emitting element is not limited to supporting from below. It is also possible to use a structure such as a support table to support the light-receiving element and the light-emitting element from above.

[0119] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These new embodiments can be implemented in various other ways, and various omissions, substitutions, and changes can be made without departing from the scope of the subject matter of the invention. These embodiments and their variations are included in the scope and subject matter of the invention, and are included in the invention described in the claims and the scope of their equivalents.

Claims

1. A semiconductor device, characterized in that: have: a first substrate; A first transistor is disposed on the first substrate; Light receiving element; as well as A light emitting element, disposed on the light receiving element; The first substrate, the first transistor, the light emitting element, and the light receiving element are arranged in this order in a first direction.

2. The semiconductor device according to claim 1, wherein The semiconductor device further includes a second substrate provided between the first substrate and the first transistor and the light receiving element and the light emitting element.

3. The semiconductor device according to claim 2, wherein: Also available: a first wiring electrically connecting a gate of the first transistor and a first electrode of the light receiving element; and a second wiring electrically connecting the source of the first transistor and the second electrode of the light receiving element; The first wiring and the second wiring are provided on the surface and inside of the second substrate so as to pass through the second substrate along the first direction.

4. The semiconductor device according to claim 3, wherein: The first electrode and the second electrode of the light receiving element are protruding electrodes.

5. The semiconductor device according to claim 2, wherein: Also available: Input terminal; as well as a third wiring electrically connecting the input terminal to a third electrode of the light emitting element; The third wiring includes a first portion provided on the surface and inside of the second substrate.

6. The semiconductor device according to claim 5, wherein: The third wiring further includes a second portion disposed on the surface and inside of the first substrate, The first portion of the third wiring is arranged in such a manner as to pass through the second substrate along the first direction, The second portion of the third wiring is arranged in such a manner as to pass through the first substrate along the first direction, The input terminal is disposed on the first substrate.

7. The semiconductor device according to claim 5, wherein: The input terminal is arranged in a second direction intersecting the first direction with the first substrate, the second substrate, the first transistor, the light receiving element, and the light emitting element, and is arranged to intersect the first substrate and the second substrate.

8. The semiconductor device according to claim 7, wherein: The input terminal is connected to a side surface of the second substrate. A first portion of the third wiring extends along the second direction in the second substrate and is in contact with the input terminal on a side surface of the second substrate.

9. The semiconductor device according to claim 1, wherein: Also available: A first output terminal is provided on the first substrate; and a fourth wiring electrically connecting the first output terminal and the drain of the first transistor; The fourth conductor is disposed on the surface and inside of the first substrate so as to penetrate the first substrate along the first direction.

10. The semiconductor device according to claim 1, wherein The first transistor is provided at a position intersecting the first substrate in a second direction intersecting the first direction.

11. The semiconductor device according to claim 2, wherein: The light emitting element is provided at a position intersecting the second substrate in a second direction intersecting the first direction.

12. The semiconductor device according to claim 1, wherein The semiconductor device further includes a second transistor provided on the first substrate. The first substrate, the second transistor, the light emitting element, and the light receiving element are arranged in this order in the first direction, A source of the first transistor and a source of the second transistor are electrically connected to each other.

13. The semiconductor device according to claim 12, wherein: The semiconductor device further includes a second substrate provided between the first substrate, the first transistor, the second transistor, the light receiving element, and the light emitting element.

14. The semiconductor device according to claim 13, wherein: Also available: a fifth wiring electrically connecting the source of the first transistor and the source of the second transistor; a first wiring electrically connecting the gate of the first transistor and the first electrode of the light receiving element; a sixth wiring electrically connecting the gate of the second transistor and the third electrode of the light receiving element; as well as a second wiring electrically connecting the source of the first transistor and the source of the second transistor to the second electrode of the light receiving element; The first transistor and the second transistor are arranged in a third direction intersecting the first direction, The fifth wiring is provided on the surface of the second substrate in a manner extending along the third direction, The first wiring, the second wiring, and the sixth wiring are provided on the surface and inside of the second substrate so as to pass through the second substrate along the first direction.

15. The semiconductor device according to claim 14, wherein: The first electrode, the second electrode, and the third electrode of the light receiving element are protruding electrodes.

16. The semiconductor device according to claim 12, wherein: Also available: A first output terminal and a second output terminal are provided on the first substrate; a fourth wiring electrically connecting the first output terminal and the drain of the first transistor; as well as a seventh wiring electrically connecting the second output terminal and the drain of the second transistor; The fourth wiring and the seventh wiring are provided on the surface and inside of the first substrate so as to pass through the first substrate along the first direction.

17. The semiconductor device according to claim 12, wherein: The first transistor and the second transistor are provided at positions intersecting the first substrate in a second direction intersecting the first direction.

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