Vertical Cavity Surface Emitting Laser Array and Its Manufacturing Method, Chip, and Lidar

By forming a proton injection region in the vertical cavity surface emission laser array and using a two-layer passivation layer structure, the problem of insufficient electrode isolation is solved, and the device is high reliability and safety is achieved.

CN119447985BActive Publication Date: 2025-06-24ZHEJIANG EAGLE SEMICON TECH CO LTD
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Patent Information

Application Number
CN202411672609.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-11-21
Publication Date
2025-06-24
Estimated Expiration
2044-11-21

AI Technical Summary

Technical Problem

In the existing vertical cavity surface emission laser array, the isolation between adjacent electrodes is insufficient, resulting in short circuits, incorrect lighting and other problems, resulting in device failure, deterioration of reliability and even safety risks.

Method used

By forming a first passivation layer and a second passivation layer in the epitaxial layer and proton injection is performed therebetween, a proton injection region is formed to achieve electrical isolation, while a two-layer passivation layer structure is adopted between the metal connecting layer and the first electrode to ensure effective isolation.

Benefits of technology

Effective isolation between electrodes is achieved, the risk of device failure and short circuit is reduced, and the reliability and safety of the device is improved.

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Abstract

The present invention relates to a vertical cavity surface emitting laser array, a manufacturing method thereof, a chip, and a lidar. The method includes: providing an epitaxial layer including a first mirror, an active layer, and a second mirror sequentially stacked on a substrate; performing mesa etching on the epitaxial layer to form a first trench; forming a first electrode in the first trench; forming a first passivation layer covering the first electrode; performing proton implantation to form a proton implantation region; forming a second passivation layer covering the first passivation layer; forming a metal wiring layer for electrically connecting a plurality of second electrodes, and insulating and isolating the metal wiring layer from the first electrode through the first passivation layer and the second passivation layer. The first passivation layer of the present invention adopts a relatively thin thickness to reduce its blocking effect on the proton implantation for forming the proton implantation region, and the two-layer passivation layer structure can avoid poor passivation layer quality, thereby ensuring effective isolation between the metal wiring layer and the first electrode and reducing the risk of device failure and short circuit.
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Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor lasers, and particularly to a vertical cavity surface emitting laser array, a vertical cavity surface emitting laser chip, a manufacturing method of a vertical cavity surface emitting laser array, and a lidar. Background Art

[0002] With the continuous development of semiconductor technology, vertical-cavity surface-emitting lasers (VCSELs) are widely used in fields such as optical communication, optical interconnection, and optical sensing due to their easy integration characteristics. Two-dimensional (2D) addressable VCSEL arrays have become candidate light sources for systems such as 3D sensing and advanced lidar because of their characteristics of zoned lighting and low power consumption.

[0003] Exemplary 2D addressable VCSELs adopt a coplanar electrode structure, that is, both the P-type electrode and the N-type electrode are distributed on the front side of the chip. This electrode design improves the device integration and optimizes the management of the electrical and thermal distributions of the device. Insufficient isolation between adjacent electrodes will lead to situations such as short circuits and mis-lighting, resulting in device failure, poor reliability, and even safety risks. The probability of this risk occurring increases significantly with the increase in device integration. Therefore, an effective method is needed to achieve insulation isolation between the electrodes. Summary of the Invention

[0004] Based on this, it is necessary to provide a manufacturing method of a vertical cavity surface emitting laser array with good isolation effect between electrodes.

[0005] A manufacturing method of a vertical cavity surface emitting laser array, comprising: providing an epitaxial layer; wherein, the epitaxial layer includes a first mirror, an active layer, and a second mirror sequentially stacked on a substrate; performing mesa etching on the epitaxial layer to form a first trench; wherein, the first trench exposes a partial surface of the first mirror and separates adjacent mesas, and one mesa is part of a vertical cavity surface emitting laser; forming a plurality of first electrodes on the partial surface of the first mirror in the first trench and electrically connected to the first mirror, several first electrodes are located near the first sidewall of the first trench, several first electrodes are located near the second sidewall of the first trench, and the positions of the first sidewall and the second sidewall are opposite; forming a first passivation layer covering the first electrodes; performing proton implantation, and protons pass downward through the first passivation layer to form a proton implantation region in the first mirror between the first electrode near the first sidewall and the first electrode near the second sidewall; forming a second passivation layer covering the first passivation layer, and the thickness of the first passivation layer is less than the thickness of the second passivation layer; forming a metal wiring layer for electrically connecting several second electrodes; the metal wiring layer is insulated and isolated from several first electrodes through the first passivation layer and the second passivation layer; wherein, each of the second electrodes is formed before forming the metal wiring layer, each of the second electrodes is electrically connected to the second mirror, and the polarities of each of the first electrodes and each of the second electrodes are opposite.

[0006] In the above manufacturing method of the vertical cavity surface emitting laser array, proton implantation is performed between the steps of forming the first passivation layer and the second passivation layer. The first passivation layer adopts a relatively thin thickness to reduce its blocking effect on proton implantation and achieve effective proton implantation, so as to ensure the electrical isolation of the proton implantation region formed by effective proton implantation between the first electrode near the first sidewall and the first electrode near the second sidewall. And a two-layer passivation layer structure (the first passivation layer and the second passivation layer) is adopted between the metal wiring layer and the first electrode. Compared with a single-layer passivation layer structure, on the premise of ensuring the thickness of the passivation layer between the metal wiring layer and the first electrode, it can avoid the defect caused by the over-thick passivation layer formed at one time, thus avoiding poor passivation layer quality, ensuring the effective isolation between the metal wiring layer and the first electrode, and reducing the risk of device failure and short circuit.

[0007] In one embodiment, after forming the plurality of first electrodes and before the step of forming the first passivation layer covering the first electrodes, it further includes a step of etching at the position between the first electrode near the first sidewall and the first electrode near the second sidewall to form an isolation trench.

[0008] In one embodiment, after the mesa etching and before the step of forming the first passivation layer covering the first electrode, it further includes a step of etching at a position between the first electrode near the first sidewall and the first electrode near the second sidewall to form an isolation trench.

[0009] In one embodiment, the step of forming the first mirror includes: forming a first distributed Bragg reflector; forming a first conductive layer on the first distributed Bragg reflector; the first conductive layer has the same conductivity type as the first distributed Bragg reflector; the step of forming the second mirror includes: forming a second distributed Bragg reflector; forming a second conductive layer on the second distributed Bragg reflector; the second conductive layer has the same conductivity type as the second distributed Bragg reflector, and the conductivity types of the first distributed Bragg reflector and the second distributed Bragg reflector are opposite; the step of forming a plurality of first electrodes on a partial surface of the first mirror and electrically connected to the first mirror in the first trench includes forming the plurality of first electrodes on a partial surface of the first conductive layer; each of the second electrodes is formed on the second conductive layer.

[0010] In one embodiment, the first distributed Bragg reflector and the first conductive layer are N-type layers, and the N-type doping concentration of the first conductive layer is greater than the N-type doping concentration of the first distributed Bragg reflector; the second distributed Bragg reflector and the second conductive layer are P-type layers, and the P-type doping concentration of the second conductive layer is greater than the P-type doping concentration of the second distributed Bragg reflector.

[0011] In one embodiment, the metal wiring layer extends along the first sidewall, the bottom of the first trench, and the second sidewall to connect the second electrodes on adjacent mesas.

[0012] In one embodiment, each of the second electrodes is formed before the step of mesa etching; the manufacturing method further includes a step of forming a third passivation layer covering the second electrodes before mesa etching.

[0013] In one embodiment, it further includes a step of partially oxidizing the second mirror to form an oxide layer in a partial area of the second mirror near the active layer.

[0014] In one embodiment, the bottom of the proton implantation region formed by the step of proton implantation extends into the substrate.

[0015] In one embodiment, after forming the metal wiring layer, it further includes: thinning the back surface of the substrate; depositing backside metal on the thinned substrate.

[0016] In one embodiment, the material of the substrate is a low-doped group III-V compound.

[0017] In one embodiment, the manufacturing method is used to manufacture a vertical-cavity surface-emitting laser array in a two-dimensional addressable vertical-cavity surface-emitting laser chip.

[0018] It is also necessary to provide a vertical-cavity surface-emitting laser array.

[0019] A vertical-cavity surface-emitting laser array includes a plurality of vertical-cavity surface-emitting lasers. Each vertical-cavity surface-emitting laser includes: a substrate; a first mirror located on the substrate; an active layer located on the first mirror; a second mirror located on the active layer; a first electrode located on a partial surface of the first mirror and electrically connected to the first mirror; a second electrode located on the second mirror and electrically connected to the second mirror, the polarities of the first electrode and the second electrode being opposite; a first passivation layer covering the first electrode; a second passivation layer covering the first passivation layer, the thickness of the first passivation layer being less than that of the second passivation layer; a metal wiring layer electrically connecting the second electrodes of adjacent vertical-cavity surface-emitting lasers, the metal wiring layer being insulated from the first electrode by the first passivation layer and the second passivation layer; wherein, the vertical-cavity surface-emitting laser array further has a first trench located between adjacent vertical-cavity surface-emitting lasers, the first trench exposing a partial surface of the first mirror, several first electrodes of the vertical-cavity surface-emitting laser array being located at positions close to the first sidewall of the first trench, several first electrodes being located at positions close to the second sidewall of the first trench, the positions of the first sidewall and the second sidewall being opposite; the vertical-cavity surface-emitting laser array further includes a proton implantation region in the first mirror, the proton implantation region being located between the first electrode close to the first sidewall and the first electrode close to the second sidewall and being in the first mirror.

[0020] For the above vertical-cavity surface-emitting laser array, the first passivation layer adopts a relatively thin thickness to reduce its blocking effect on the proton implantation for forming the proton implantation region, realizing effective proton implantation, thereby ensuring the electrical isolation of the proton implantation region from the first electrode close to the first sidewall and the first electrode close to the second sidewall. And a two-layer passivation layer structure (the first passivation layer and the second passivation layer) is adopted between the metal wiring layer and the first electrode. Compared with a single-layer passivation layer structure, on the premise of ensuring the thickness of the passivation layer between the metal wiring layer and the first electrode, it can avoid the defect caused by the over-thick passivation layer formed at one time, thereby avoiding poor passivation layer quality, ensuring the effective isolation between the metal wiring layer and the first electrode, and reducing the risk of device failure and short circuit.

[0021] In one embodiment, part of the proton implantation region is located in the first passivation layer, and there is no proton implantation region in the second passivation layer.

[0022] It is also necessary to provide a vertical cavity surface emitting laser chip including the aforementioned vertical cavity surface emitting laser array.

[0023] In one embodiment, the vertical cavity surface emitting laser chip is a two-dimensional addressable vertical cavity surface emitting laser chip.

[0024] It is also necessary to provide a lidar including the aforementioned vertical cavity surface emitting laser chip and a drive circuit for driving the chip to work. Description of the Drawings

[0025] To better describe and illustrate the embodiments and / or examples of the inventions disclosed herein, one or more drawings may be referred to. Additional details or examples used to describe the drawings should not be considered as limiting the scope of any of the disclosed inventions, the currently described embodiments and / or examples, and the currently understood best mode of these inventions.

[0026] Figure 1 is a flowchart of a method for manufacturing a vertical cavity surface emitting laser array in an embodiment of the present application.

[0027] Figure 2a is a schematic structural diagram of a vertical cavity surface emitting laser array after step S150 in an embodiment of the present application. Figure 2b The Figure 2a first trench 211 and isolation trench 213 in the shown structure are framed with a dashed line box.

[0028] Figure 3 is a schematic structural diagram of a vertical cavity surface emitting laser array after step S160 in an embodiment of the present application.

[0029] Figure 4 is a schematic structural diagram of a vertical cavity surface emitting laser array after step S170 in an embodiment of the present application.

[0030] Figure 5 is a schematic structural diagram of a vertical cavity surface emitting laser array after step S180 in an embodiment of the present application.

[0031] Figure 6 is a flowchart of a method for manufacturing a vertical cavity surface emitting laser array in another embodiment of the present application.

[0032] Figure 7 is a schematic diagram of an oxide layer of a VCSEL in an embodiment of the present application. Detailed Description of the Embodiments

[0033] For ease of understanding the present invention, the present invention will be described more fully hereinafter with reference to the accompanying drawings. Preferred embodiments of the invention are shown in the drawings. However, the present invention may be embodied in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided so that the disclosure of the present invention will be thorough and complete.

[0034] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terms used herein in the description of the present invention are for the purpose of describing particular embodiments only and are not intended to limit the present invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0035] It should be understood that when an element or layer is referred to as being "on", "adjacent to", "connected to" or "coupled to" another element or layer, it can be directly on, adjacent to, connected or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on", "directly adjacent to", "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below may be denoted as a second element, component, region, layer or section without departing from the teachings of the present invention.

[0036] Spatial relationship terms such as "under", "below", "beneath", "underneath", "above", "over", etc. are used herein for convenience in describing the relationship of one element or feature to another element or feature shown in the figures. It should be understood that, in addition to the orientation shown in the figures, spatial relationship terms are intended to include different orientations of the device in use and operation. For example, if the device in the figures is flipped, then an element or feature described as "under" or "beneath" or "underneath" another element or feature will be oriented "over" the other element or feature. Thus, the exemplary terms "under" and "beneath" can include both an upper and a lower orientation. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatial descriptors used herein are to be interpreted accordingly.

[0037] The purpose of the terms used herein is only to describe specific embodiments and is not a limitation of the present invention. As used herein, the singular forms "a", "an" and "the" are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprising" and / or "including", when used in this specification, identify the presence of the stated features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups. As used herein, the term "and / or" includes any and all combinations of the associated listed items.

[0038] Embodiments of the invention are described herein with reference to cross-sectional views that are schematic illustrations of ideal embodiments (and intermediate structures) of the invention. As such, variations from the shapes as illustrated, for example due to manufacturing techniques and / or tolerances, are to be expected. Accordingly, embodiments of the present invention should not be limited to the particular shapes of regions shown herein but should include shape deviations resulting, for example, from manufacturing. For example, an implanted region shown as rectangular will typically have rounded or curved features at its edges and / or an implanted concentration gradient, rather than a binary change from the implanted region to the non-implanted region. Similarly, a buried region formed by implantation can result in some implantation in the region between the buried region and the surface through which the implantation takes place. Thus, the regions shown in the figures are substantially schematic in nature, and their shapes are not intended to show the actual shape of the regions of the device and are not intended to limit the scope of the present invention.

[0039] Figure 1 is a flowchart of a method for manufacturing a vertical cavity surface emitting laser array in an embodiment of the present application, including the following steps:

[0040] S110, form a first mirror, an active layer, and a second mirror on a substrate.

[0041] In an embodiment of the present application, an epitaxial layer is provided, including a first mirror 220, an active layer 230, and a second mirror 240 formed in sequence on a substrate 210 (i.e., a wafer).

[0042] In an embodiment of the present application, the material of the substrate 210 is a low-doped group III-V compound, and the group III-V compound refers to a compound including group III elements and group V elements, such as GaAs. The conduction types of the first mirror 220 and the second mirror 240 are opposite, that is, one is N-type doped and the other is P-type doped. In an embodiment of the present application, the first mirror 220 is an N-type layer and the second mirror 240 is a P-type layer.

[0043] S120, form a second electrode.

[0044] Form a plurality of second electrodes 246 that are electrically connected to the second mirror 240. Since the vertical cavity surface emitting laser array includes a plurality of channels, and each channel includes a plurality of optical emitter units (the VCSEL array includes a plurality of VCSELs), step S120 thus requires forming a plurality of second electrodes 246 of the VCSEL array. It can be understood that the step of forming the second electrodes 246 can also be carried out in subsequent steps during the manufacturing process of the entire VCSEL array. In an embodiment of the present application, a passivation layer (the third passivation layer, Figure 2a not marked in

[0045] S130, perform mesa etching to form a first trench.

[0046] Perform photolithography and etching on the front surface of the epitaxial layer to form a first trench 211, thereby dividing a plurality of mesas arranged in an array. The first trench 211 exposes a part of the surface of the first mirror 220 and separates adjacent mesas. Each mesa is a part of a VCSEL.

[0047] S140, form a first electrode.

[0048] Form a plurality of first electrodes 226 that are located on a part of the surface of the first mirror 220 in the first trench 211 and are electrically connected to the first mirror 220. The first electrodes 226 of adjacent VCSELs are arranged oppositely, that is, a part of the first electrodes (denoted as the first electrodes 226a) are located at a position close to the first sidewall of the first trench 211 (i.e., Figure 2a the left sidewall of the first trench 211 in Figure 2a ), and another part of the first electrodes (denoted as the first electrodes 226b) are located at a position close to the second sidewall of the first trench 211 (i.e.,

[0049] the right sidewall of the first trench 211 in

[0050] ), and the positions of the first sidewall and the second sidewall are opposite. The first electrode 226 and the second electrode 246 have opposite polarities, that is, one is a cathode electrode and the other is an anode electrode. Figure 2a .

[0051] S160, form a proton implantation region between adjacent first electrodes.

[0052] Proton implantation is performed, and protons pass downward through the first passivation layer 252 to form a proton implantation region 214 in the first mirror 220 between the first electrode 226a and the first electrode 226b. After step S160 is completed, the structure of the VCSEL array can be referred to Figure 3 . The proton implantation region 214 formed by proton implantation is a high-resistance / insulating region, thereby strengthening the electrical isolation between the first electrode 226a and the first electrode 226b. Since the thickness of the first passivation layer 252 is designed to be relatively thin, the first passivation layer 252 has a small barrier to proton implantation, thus ensuring effective proton implantation. In an embodiment of the present application, the bottom of the proton implantation region 214 extends into the substrate 210. In an embodiment of the present application, a part of the proton implantation region 214 is formed in the first passivation layer 252. In an embodiment of the present application, effective proton implantation can also be ensured by increasing the energy of proton implantation.

[0053] S170, form a second passivation layer covering the first passivation layer.

[0054] Since the thickness of the first passivation layer 252 is relatively thin, a double-passivation layer structure is obtained by forming the second passivation layer 254, thickening the passivation layer, and strengthening the insulation ability. After step S170 is completed, the structure of the VCSEL array can be referred to Figure 4 .

[0055] S180, form a metal wiring layer that electrically connects a plurality of second electrodes.

[0056] The metal wiring layer 260 extends along the first sidewall, bottom, and second sidewall of the first trench 211 to connect the second electrodes 246 on adjacent platforms. The metal wiring layer 260 is insulated from a plurality of first electrodes 226 by the first passivation layer 252 and the second passivation layer 254. After step S180 is completed, the structure of the VCSEL array can be referred to Figure 5 . As described above, the step of forming the second electrode 246 can also be performed after step S130, but must be performed before step S180.

[0057] In an embodiment of the present application, the metal wiring layer 260 is formed by electroplating (Plating). Before electroplating, the passivation layer on the second electrode 246 needs to be opened to make the metal wiring layer 260 contact the second electrode 246 through the hole.

[0058] In the manufacturing method of the above vertical cavity surface emitting laser array, proton implantation is performed between the steps of forming the first passivation layer 252 and the second passivation layer 254. The first passivation layer 252 has a relatively thin thickness to reduce its blocking effect on proton implantation, enabling effective proton implantation, thereby ensuring electrical isolation of the proton implantation region 214 formed by effective proton implantation from the first electrodes 226a and 226b. Moreover, a two-layer passivation layer structure (the first passivation layer 252 and the second passivation layer 254) is adopted between the metal wiring layer 260 and the first electrode 226. Compared with a single-layer passivation layer structure, it can avoid the formation of a too-thick passivation layer in one step, which may cause defects, while ensuring the thickness of the passivation layer between the metal wiring layer 260 and the first electrode 226, thus avoiding poor passivation layer quality, ensuring effective isolation between the metal wiring layer 260 and the first electrode 226, and reducing the risk of device failure and short circuit.

[0059] Figure 6 It is a flowchart of the manufacturing method of the vertical cavity surface emitting laser array in another embodiment of the present application. In this embodiment, after step S140 and before step S150, there is also step S142: etching is performed at the position between the first electrodes 226a and 226b to form an isolation trench 213.

[0060] To facilitate distinguishing the positions of the first trench 211 and the isolation trench 213, Figure 2b the first trench 211 is framed by a thick dashed line box, and the isolation trench 213 is framed by a thin dashed line box. The isolation trench 213 can prevent current from flowing horizontally from the bottom of the first electrode 226a to the first electrode 226b, thereby strengthening the electrical isolation between the first electrode 226a and the first electrode 226b. In another embodiment of the present application, the step of etching to form the isolation trench 213 can also be performed after step S130 and before step S150. That is, either the first electrode 226 can be formed first and then the isolation trench 213 can be etched, or the isolation trench 213 can be etched first and then the first electrode 226 can be formed.

[0061] In an embodiment of the present application, the first mirror 220 includes a first distributed Bragg reflector (DBR) 222 and a first conductive layer 224. Forming the first mirror 220 includes forming the first distributed Bragg reflector 222 and forming the first conductive layer 224 on the first distributed Bragg reflector 222. Accordingly, step S140 is to form the first electrode 226 on the first conductive layer 224. The first conductive layer 224 has the same conductivity type as the first distributed Bragg reflector 222. For example, both the first conductive layer 224 and the first distributed Bragg reflector 222 are N-type layers. In an embodiment of the present application, the doping concentration of the first conductive layer 224 is greater than that of the first distributed Bragg reflector 222, so as to form an ohmic contact with the first electrode 226 (for example, form an N-Metal) and reduce the resistance.

[0062] In an embodiment of the present application, step S142 is to etch the first conductive layer 224 and the first distributed Bragg reflector 222 between the first electrode 226a and the first electrode 226b, and the bottom of the isolation trench 213 formed by etching enters the first distributed Bragg reflector 222.

[0063] In an embodiment of the present application, the second mirror 240 includes a second distributed Bragg reflector 242 and a second conductive layer 244. Forming the second mirror 240 includes forming the second distributed Bragg reflector 242 and forming the second conductive layer 244 on the second distributed Bragg reflector 242. Accordingly, step S120 is to form the second electrode 246 on the second conductive layer 244. The second conductive layer 244 has the same conductivity type as the second distributed Bragg reflector 242. For example, both the second conductive layer 244 and the second distributed Bragg reflector 242 are P-type layers. In an embodiment of the present application, the doping concentration of the second conductive layer 244 is greater than that of the second distributed Bragg reflector 242, so as to form an ohmic contact with the second electrode 246 (for example, form a P-Metal) and reduce the resistance. In an embodiment of the present application, the second conductive layer 244 is a P-type heavily doped GaAs or InP material.

[0064] In an embodiment of the present application, the mesa includes the second conductive layer 244, the second distributed Bragg reflector 242, the active layer 230, and the first conductive layer 224. The cross-section of the mesa can be circular, elliptical, polygonal, asymmetric, etc. In an embodiment of the present application, each optical transmitter unit includes the second conductive layer 244, the second distributed Bragg reflector 242, the active layer 230, the first conductive layer 224, the first distributed Bragg reflector 222, and the substrate 210.

[0065] In one embodiment of the present application, it further includes step S132: partially oxidizing the second mirror to form an oxide layer.

[0066] In Figure 6 In the illustrated embodiment, step S132 is to partially oxidize the second distributed Bragg reflector 242 after step S130 and before step S140, so that an oxide layer 241 is formed in a partial area of the second distributed Bragg reflector 242 close to the active layer 230. Figure 7 The position of the oxide layer 241 in one embodiment is shown. The oxide layer 241 can play a role in reducing the junction capacitance of the VCSEL and improving the modulation bandwidth of the VCSEL. The area surrounded by the oxide layer 241 in the middle of the oxide layer 241 is the current confinement hole 243.

[0067] In one embodiment of the present application, the materials of the passivation layers (including the first passivation layer 252, the second passivation layer 254, and the third passivation layer) can be oxides of silicon, nitrides of silicon, etc.

[0068] In one embodiment of the present application, after step S180, it further includes:

[0069] S192, thinning the back surface of the substrate.

[0070] The back surface of the substrate 210 (the back surface of the wafer) is the side of the substrate 210 facing away from the first mirror 220.

[0071] S194, depositing backside metal on the thinned substrate.

[0072] On the other hand, the present application correspondingly provides a vertical cavity surface emitting laser (VCSEL) array, which includes a plurality of vertical cavity surface emitting lasers. Each vertical cavity surface emitting laser includes a substrate 210, a first mirror 220, an active layer 230, a second mirror 240, a first electrode 226, a second electrode 246, a first passivation layer 252, a second passivation layer 254, and a metal wiring layer 260. The structure of the VCSEL array can be referred to Figure 5, the first mirror 220 is located on the substrate 210. The active layer 230 is located on the first mirror 220. The second mirror 240 is located on the active layer 230. The first electrode 226 is located on a partial surface of the first mirror 220 and is electrically connected to the first mirror 220. The second electrode 246 is located on the second mirror 240 and is electrically connected to the second mirror 240. The polarities of the first electrode 226 and the second electrode 246 are opposite, i.e., they are the cathode electrode and the anode electrode respectively. The first passivation layer 252 covers the first electrode 226. The second passivation layer 254 covers the first passivation layer 252, and the thickness of the first passivation layer 252 is less than that of the second passivation layer 254. The metal wiring layer 260 is electrically connected to the second electrodes 246 on adjacent VCSELs, and the metal wiring layer 260 is insulated from the first electrode 226 by the first passivation layer 252 and the second passivation layer 254.

[0073] Among them, the VCSEL array further has a first trench 211 located between adjacent vertical-cavity surface-emitting lasers VCSELs. The first trench 211 exposes a partial surface of the first mirror 220. A plurality of first electrodes 226a of the VCSEL array are located at positions close to the first sidewall of the first trench 211, and a plurality of first electrodes 226b are located at positions close to the second sidewall of the first trench 211, and the positions of the first sidewall and the second sidewall are opposite. The VCSEL array further includes a proton implantation region 214 in the first mirror 220, and the proton implantation region 214 is in the first mirror 220 below the region between the first electrode 226a and the first electrode 226b (actually between the first electrode 226a and the first electrode 226b).

[0074] For the above VCSEL array, the first passivation layer 252 is adopted with a relatively thin thickness to reduce its blocking effect on the proton implantation for forming the proton implantation region 214, so as to achieve effective proton implantation, thereby ensuring the electrical isolation of the proton implantation region 214 from the first electrode 226a and the first electrode 226b. And a two-layer passivation layer structure (the first passivation layer 252 and the second passivation layer 254) is adopted between the metal wiring layer 260 and the first electrode 226. Compared with a single-layer passivation layer structure, on the premise of ensuring the passivation layer thickness between the metal wiring layer 260 and the first electrode 226, it can avoid the passivation layer formed at one time being too thick and thus generating defects, resulting in poor passivation layer quality, thereby ensuring the effective isolation between the metal wiring layer 260 and the first electrode 226 and reducing the risk of device failure and short circuit.

[0075] In an embodiment of the present application, since the proton implantation region 214 is formed by proton-implanting the first mirror 220 and the substrate 210 after forming the first passivation layer 252, part of the proton implantation region 214 is located in the first passivation layer 252, and there is no proton implantation region 214 in the second passivation layer 254.

[0076] In one embodiment of the present application, at a position between the first electrodes 226a and 226b at the bottom of the first trench 211, a concave isolation trench 213 is further formed. The isolation trench 213 can prevent current from flowing horizontally from the bottom of the first electrode 226a to the first electrode 226b, thereby strengthening the electrical isolation between the first electrode 226a and the first electrode 226b.

[0077] In one embodiment of the present application, the first mirror 220 includes a first distributed Bragg reflector 222 and a first conductive layer 224. Correspondingly, the first electrode 226 is located on the first conductive layer 224. The first conductive layer 224 has the same conductivity type as the first distributed Bragg reflector 222. For example, both the first conductive layer 224 and the first distributed Bragg reflector 222 are N-type layers. In one embodiment of the present application, the doping concentration of the first conductive layer 224 is greater than that of the first distributed Bragg reflector 222, so as to form an ohmic contact with the first electrode 226 (such as forming an N-Metal) and reduce the resistance.

[0078] In one embodiment of the present application, the second mirror 240 includes a second distributed Bragg reflector 242 and a second conductive layer 244. Correspondingly, the second electrode 246 is located on the second conductive layer 244. The second conductive layer 244 has the same conductivity type as the second distributed Bragg reflector 242. For example, both the second conductive layer 244 and the second distributed Bragg reflector 242 are P-type layers. In one embodiment of the present application, the doping concentration of the second conductive layer 244 is greater than that of the second distributed Bragg reflector 242, so as to form an ohmic contact with the second electrode 246 (such as forming a P-Metal) and reduce the resistance.

[0079] In one embodiment of the present application, each VCSEL includes a light emitter unit, and each light emitter unit includes a second conductive layer 244, a second distributed Bragg reflector 242, an active layer 230, a first conductive layer 224, a first distributed Bragg reflector 222, and a substrate 210.

[0080] In one embodiment of the present application, the materials of the passivation layers can be oxides of silicon, nitrides of silicon, etc.

[0081] The manufacturing method of the vertical cavity surface emitting laser array of the present application and the vertical cavity surface emitting laser array are based on the same inventive concept. For the content not specifically described in the vertical cavity surface emitting laser array, reference can be made to the introduction of the manufacturing method of the vertical cavity surface emitting laser array above.

[0082] The present application correspondingly provides a vertical cavity surface emitting laser chip, which includes the vertical cavity surface emitting laser array described in any of the foregoing embodiments. In an embodiment of the present application, the chip is a two-dimensional addressable vertical cavity surface emitting laser chip.

[0083] The present application correspondingly provides a lidar (Light Detection and Ranging, LiDAR), which includes a transmitting end and a receiving end. The transmitting end includes the aforementioned two-dimensional addressable vertical cavity surface emitting laser chip as a light source, a driving circuit for driving the chip to work, a deflection module for adjusting the field of view (FOV) of the lidar, etc. The receiving end includes a photosensitive chip, etc.

[0084] It should be understood that although the steps in the flowchart of the present application are shown in sequence according to the indication of the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless there is a clear description in this article, there is no strict order limit for the execution of these steps, and these steps can be executed in other orders. Moreover, at least some of the steps in the flowchart of the present application may include multiple steps or multiple stages. These steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be executed alternately or alternately with at least some of the steps or stages in other steps or other steps.

[0085] In the description of this specification, the descriptions referring to terms such as "some embodiments", "other embodiments", "ideal embodiments", etc. mean that the specific features, structures, materials or features described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0086] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features of the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0087] The above-described embodiments only represent several implementation manners of the present application. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A method for manufacturing a vertical cavity surface emitting laser array, comprising: Providing an epitaxial layer; wherein the epitaxial layer comprises a first reflector, an active layer and a second reflector which are sequentially stacked on a substrate; Performing mesa etching on the epitaxial layer to form a first groove; wherein the first groove exposes a portion of the surface of the first reflector and separates adjacent mesas, and one mesa is a portion of a vertical cavity surface emitting laser; A plurality of first electrodes are formed in the first groove and are located on a portion of the surface of the first reflector and are electrically connected to the first reflector, wherein some of the first electrodes are located near a first side wall of the first groove, and some of the first electrodes are located near a second side wall of the first groove, and the first side wall and the second side wall are located opposite to each other; forming a first passivation layer covering the first electrode; Performing proton implantation, whereby protons pass downward through the first passivation layer to form a proton implantation region in a first reflector between a first electrode close to the first side wall and a first electrode close to the second side wall; forming a second passivation layer covering the first passivation layer, wherein the thickness of the first passivation layer is less than the thickness of the second passivation layer; Forming a metal wiring layer electrically connecting the plurality of second electrodes; the metal wiring layer and the plurality of first electrodes are insulated and isolated by the first passivation layer and the second passivation layer; Wherein, each of the second electrodes is formed before forming the metal wiring layer, each of the second electrodes is electrically connected to the second reflector, and each of the first electrodes has opposite polarity to each of the second electrodes.

2. The method for manufacturing a vertical cavity surface emitting laser array according to claim 1, characterized in that: After forming the plurality of first electrodes and before the step of forming the first passivation layer covering the first electrodes, the method further comprises etching between the first electrode close to the first sidewall and the first electrode close to the second sidewall to form an isolation groove; or After the mesa etching and before the step of forming the first passivation layer covering the first electrode, the step further includes etching between the first electrode close to the first side wall and the first electrode close to the second side wall to form an isolation groove.

3. The method for manufacturing a vertical cavity surface emitting laser array according to claim 1, characterized in that: The step of forming the first reflector comprises: forming a first distributed Bragg reflector; forming a first conductive layer on the first distributed Bragg reflector; the first conductive layer and the first distributed Bragg reflector have the same conductivity type; The step of forming the second reflector comprises: forming a second distributed Bragg reflector; forming a second conductive layer on the second distributed Bragg reflector; the second conductive layer and the second distributed Bragg reflector have the same conductivity type, and the first distributed Bragg reflector and the second distributed Bragg reflector have opposite conductivity types; The step of forming a plurality of first electrodes in the first groove, which are located on a partial surface of the first reflector and are electrically connected to the first reflector, includes forming the plurality of first electrodes on a partial surface of the first conductive layer; each of the second electrodes is formed on the second conductive layer.

4. The method for manufacturing a vertical cavity surface emitting laser array according to claim 3, characterized in that: The first distributed Bragg reflector and the first conductive layer are N-type layers, and the N-type doping concentration of the first conductive layer is greater than the N-type doping concentration of the first distributed Bragg reflector; The second distributed Bragg reflector and the second conductive layer are P-type layers, and the P-type doping concentration of the second conductive layer is greater than the P-type doping concentration of the second distributed Bragg reflector.

5. The method for manufacturing a vertical cavity surface emitting laser array according to claim 1, characterized in that: The metal wiring layer extends along the first side wall, the bottom of the first trench and the second side wall, so as to connect the second electrodes on the adjacent mesas; and / or Each of the second electrodes is formed before the step of performing mesa etching; the manufacturing method further comprises the step of forming a third passivation layer covering the second electrodes before performing mesa etching.

6. The method for manufacturing a vertical cavity surface emitting laser array according to claim 1, characterized in that: The method further comprises the step of partially oxidizing the second reflector to form an oxide layer on a partial area of ​​the second reflector close to the active layer; and / or The bottom of the proton implantation region formed by the proton implantation step extends into the substrate.

7. The method for manufacturing a vertical cavity surface emitting laser array according to claim 1, characterized in that: After forming the metal wiring layer, the method further includes: performing backside thinning on the substrate; The back metal is deposited on the thinned substrate.

8. A vertical cavity surface emitting laser array, comprising a plurality of vertical cavity surface emitting lasers, characterized in that: Each of the vertical cavity surface emitting lasers comprises: substrate; A first reflector, located on the substrate; an active layer, located on the first reflector; a second reflector, located on the active layer; A first electrode, located on a portion of the surface of the first reflector and electrically connected to the first reflector; a second electrode, located on the second reflector and electrically connected to the second reflector, wherein the polarities of the first electrode and the second electrode are opposite; a first passivation layer, covering the first electrode; a second passivation layer, covering the first passivation layer, wherein the thickness of the first passivation layer is smaller than that of the second passivation layer; A metal wiring layer electrically connected to the second electrode of the adjacent vertical cavity surface emitting laser, wherein the metal wiring layer is insulated and isolated from the first electrode by the first passivation layer and the second passivation layer; Among them, the vertical cavity surface emitting laser array is also provided with a first groove located between adjacent vertical cavity surface emitting lasers, the first groove exposes a part of the surface of the first reflector, a number of first electrodes of the vertical cavity surface emitting laser array are located near the first side wall of the first groove, and a number of first electrodes are located near the second side wall of the first groove, and the positions of the first side wall and the second side wall are relative; the vertical cavity surface emitting laser array also includes a proton injection region located in the first reflector, the proton injection region is located between the first electrode near the first side wall and the first electrode near the second side wall, and is located in the first reflector; part of the proton injection region is located in the first passivation layer, and there is no proton injection region in the second passivation layer.

9. A vertical cavity surface emitting laser chip, comprising the vertical cavity surface emitting laser array according to claim 8, characterized in that: The vertical cavity surface emitting laser chip is a two-dimensionally addressable vertical cavity surface emitting laser chip.

10. A laser radar, characterized in that: The invention comprises the vertical cavity surface emitting laser chip as claimed in claim 9 and a driving circuit for driving the chip to operate.

Citation Information

Patent Citations

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