Capturing and tracking integrated frequency hopping self-synchronizing circuit and method based on edge detection

Abstract

The invention relates to the technical field of communication and anti-interference, in particular to an ultra-wideband frequency hopping circuit and a fast synchronization method, which adopt an image frequency rejection receiving framework to dehop wideband microwave frequency hopping signals to obtain intermediate frequency signals, and adopt a mode of combining dual-channel AD differential sampling and rising edge detection with threshold detection to realize fast synchronization of the ultra-wideband frequency hopping signals. Precise identification and tracking of the phase of the envelope detection signal are realized, rapid following hopping of the local oscillation frequency hopping signal of the receiver is further realized, and the problems of complex synchronization circuit, poor acquisition precision, long synchronization process establishment time and the like in the traditional frequency hopping synchronization process are solved. According to the invention, while high-precision frequency hopping synchronization is realized, hardware resources are saved, and synchronization establishment time is shortened.

Description

Technical Field

[0001] The present invention relates to the technical field of communication and anti-interference, and in particular to a capture and tracking integrated frequency hopping self-synchronization circuit and method based on edge detection. Background Art

[0002] With the rapid development of information technology, the massive number of wireless devices and data interactions have made limited frequency resources more crowded, resulting in increasingly serious interference between each other and increasingly complex electromagnetic environments. The need for anti-interference, anti-interception and multi-access communications has become more urgent. In response to this situation, the most effective solution is to use spread spectrum communication technology.

[0003] Frequency hopping communication is one of the most popular spread spectrum communication technologies. Compared with traditional fixed frequency communication, it has the advantages of anti-interference, low interception probability, multi-address networking and anti-fading capabilities. Frequency hopping synchronization technology refers to the process of aligning the frequency and phase of the received frequency hopping signal with the local frequency hopping signal. As one of the most critical technologies in the frequency hopping communication system, the speed and reliability of synchronization directly affect the performance of the entire system.

[0004] The traditional frequency hopping synchronization method includes two processes: capture and tracking. The acquisition process completes coarse synchronization and reduces the clock error to within 1 frequency hopping cycle. The tracking process completes fine synchronization and minimizes the clock error. In the prior art, the phase-locked loop principle is generally used to complete the tracking process of synchronization information. There are two commonly used phase-locked loops: τ-jitter phase-locked loop and delay phase-locked loop, both of which belong to "lead-lag type lock loop". The delay phase-locked loop needs to use two leading and lagging frequency hopping carriers to generate error signals. The structure is relatively complex and consumes hardware resources, while the τ-jitter phase-locked loop uses a single phase-locked loop to detect the error signal. The structure is relatively simple, consumes less hardware resources, and is easy to implement in hardware. However, both phase-locked loops need to extract the specific error size between the local frequency hopping clock and the transmitting end frequency hopping clock, and determine whether the local frequency hopping clock is ahead or behind, and then continuously adjust the local frequency hopping clock according to the error size and the lead-lag indication signal, which will cause the entire synchronization time of "coarse synchronization + fine synchronization" to be too long. Therefore, it is necessary to study a synchronization circuit architecture and method that has a relatively simple structure and can quickly achieve synchronization. Summary of the invention

[0005] The purpose of the present invention is to provide an edge detection-based capture and tracking integrated frequency hopping self-synchronization circuit and method to achieve high-security frequency hopping communication ultra-wideband, high hopping speed and low-complexity frequency hopping de-hopping and frequency hopping synchronization.

[0006] To achieve the above object, the present invention adopts the following technical solution:

[0007] A capture and tracking integrated frequency hopping self-synchronization circuit based on edge detection, comprising: an antenna, a low noise amplifier, an image frequency suppression mixer, a low pass filter, an AGC amplifier, and a control module;

[0008] The antenna is used to receive a broadband frequency hopping signal, and send the broadband frequency hopping signal to the image rejection mixer after amplifying it through a low noise amplifier;

[0009] The image frequency rejection mixer comprises an I / Q mixer and a 90° bridge; the I / Q mixer receives the frequency hopping signal and the microwave local oscillator signal after low noise amplification, performs image frequency rejection down-conversion on the frequency hopping signal under the drive of the microwave local oscillator signal, realizes de-hopping to obtain the intermediate frequency signal, and transmits it to the low-pass filter in sequence through the 90° bridge;

[0010] The low-pass filter is used to suppress high-frequency clutter in the intermediate frequency signal;

[0011] The AGC amplifier receives the intermediate frequency signal output by the low-pass filter, and divides it into two paths after power amplification, one of which is output as the output signal; and the other is transmitted to the synchronization circuit module;

[0012] The synchronization circuit module includes an envelope detector, an analog-to-digital converter, an FPGA module, a frequency synthesizer and a bandpass filter; the envelope detector receives the intermediate frequency signal amplified by the AGC amplifier, and extracts the envelope signal from the intermediate frequency signal and transmits it to the analog-to-digital converter; the analog-to-digital converter samples the envelope signal to obtain a digital envelope signal and transmits it to the FPGA module; the FPGA module is used to perform filtering and de-jittering, rising edge detection, threshold detection, high-level counting and other processing on the received digital envelope signal in sequence, and generate a frequency control word for realizing frequency hopping synchronization tracking according to the processing result; the frequency synthesizer receives the frequency control word provided by the FPGA module, generates a microwave local oscillator signal of the corresponding frequency according to the received frequency control word, and transmits it to the I / Q mixer through the bandpass filter.

[0013] Furthermore, the FPGA module includes a filtering and debouncing module, a rising edge detection module, a threshold detection module, a PN code generation module, a high level counting module and an SPI communication module;

[0014] The filtering and de-jittering module receives the digital envelope signal provided by the analog-to-digital converter and eliminates the jitter in the digital envelope signal to reduce the false alarm probability caused by the jitter and ensure the capture accuracy;

[0015] The rising edge detection module receives the digital envelope signal after jitter elimination, and identifies the rising edge in the digital envelope signal, and triggers the threshold detection module to work after identifying the rising edge; the threshold detection module judges the level after the rising edge, and when it is a high level, it accumulates time, and when the time accumulation reaches a preset time threshold, it triggers the PN code generation module to generate a pseudo-random sequence code corresponding to the frequency hopping frequency and sends it to the SPI communication module, and triggers the high level counting module to accumulate the high level time;

[0016] When the high level time accumulated by the high level counting module reaches the preset threshold time, the trigger enabling SPI communication module generates a corresponding frequency control word according to the received pseudo-random sequence code and sends it to the frequency synthesizer.

[0017] Furthermore, the rising edge detection module uses two registers to delay two beats for logical judgment to perform rising edge detection; if the previous state D[1] is a low level and the next state D[0] is a high level, it is a rising edge.

[0018] Furthermore, the cut-off frequency f of the low-pass filter is T Greater than the frequency f of the intermediate frequency signal IF , which is less than the intermediate frequency signal frequency f IF The sum of the channel spacing △f.

[0019] Furthermore, the AGC amplifier is an automatic gain control amplifier.

[0020] A capture and tracking integrated frequency hopping self-synchronization method based on edge detection comprises the following steps:

[0021] Step 1, receiving a frequency hopping signal;

[0022] Step 2, performing image frequency suppression down-conversion processing on the frequency hopping signal to obtain an intermediate frequency signal, and performing low-pass filtering, power amplification, and envelope detection processing on the intermediate frequency signal in sequence to obtain an envelope signal with the same frequency as the frequency hopping period;

[0023] Step 3, using an analog-to-digital converter to sample the high-level envelope signal and the low-level envelope signal, and converting them into digital envelope signals after performing differential processing;

[0024] Step 4: Under the system clock, use the FPGA chip to process the digital envelope signal to generate a frequency control word for controlling the frequency hopping;

[0025] Step 5: Generate a microwave local oscillator signal according to the frequency control word to drive the frequency hopping signal to perform down-conversion processing to achieve frequency hopping synchronous tracking.

[0026] After adopting the above technical solution, the present invention has the following advantages:

[0027] 1. The present invention adopts an automatic gain control amplifier to realize channel compensation within the broadband frequency hopping bandwidth, which can improve the unevenness and synchronization loss problems caused by large broadband fading changes;

[0028] 2. The present invention adopts a dual-channel detection and dual-channel sampling scheme, and the influence of temperature drift can be eliminated through differential operation;

[0029] 3. The present invention adopts a method combining rising edge detection and threshold detection to simultaneously realize the capture and tracking processes in the traditional frequency hopping method, thereby simplifying the synchronization time and saving hardware resources. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 A schematic diagram of the structure of the acquisition and tracking integrated frequency hopping self-synchronization circuit based on edge detection provided in this embodiment;

[0031] Figure 2 It is a flow chart of frequency hopping self-synchronization based on edge detection for acquisition and tracking integration;

[0032] Figure 3 It is a principle block diagram of frequency hopping synchronization based on edge detection;

[0033] Figure 4 The waveform of the envelope detector output signal on an oscilloscope after frequency hopping synchronization provided in the embodiment.

[0034] Reference numerals:

[0035] 1-antenna; 2-low noise amplifier; 3-I / Q amplifier; 4-90° bridge; 5-low pass filter; 6-AGC amplifier; 7-envelope detector; 8-analog to digital converter; 9-FPGA module; 901-filter de-jitter module; 902-rising edge detection module; 903-threshold detection module; 904-PN code generation module; 905-high level counting module; 906-SPI communication module; 10-frequency synthesizer; 11-bandpass filter. DETAILED DESCRIPTION

[0036] In order to make the purpose, technical scheme and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the embodiments and the accompanying drawings. The exemplary embodiments of the present invention and their description are only used to explain the present invention and are not intended to limit the present invention. The technical scheme of the present invention is described in detail below in conjunction with the accompanying drawings and the embodiments.

[0037] like Figure 1As shown, this embodiment discloses an edge detection-based capture and tracking integrated frequency hopping self-synchronization circuit, including: an antenna, a low-noise amplifier, an image frequency suppression mixer, a low-pass filter, an AGC amplifier, and a control module. The input end of the low-noise amplifier is connected to the antenna, and the output end is connected to the input end of the AGC amplifier via the image frequency suppression mixer and the low-pass filter in sequence. The first output end of the AGC amplifier is the output end of the entire circuit, and the second output end is connected to the input end of the control module. The output end of the control module is connected to the image frequency suppression mixer. The control module is composed of an envelope detector, an analog-to-digital converter, an FPGA module, a frequency synthesizer and a bandpass filter connected in series in sequence; wherein, the envelope detector is connected to the second output end of the AGC amplifier as the input end of the control module, and the bandpass filter is connected to the image frequency suppression mixer as the output end of the control module. The components are described in detail as follows:

[0038] The antenna receives the broadband frequency hopping signal, and sends the broadband frequency hopping signal to the image rejection mixer after being amplified by a low noise amplifier.

[0039] The image suppression mixer is composed of an I / Q mixer and a 90° bridge. The I / Q mixer 3 is a four-port device, the RF input port is connected to the low noise amplifier 2, the local oscillator port is connected to the bandpass filter 11, the I and Q intermediate frequency output ports are respectively connected to the through port and the coupling port of the 90° bridge, the isolation end of the 90° bridge 4 is connected to a 50 ohm matching load, and the output end is connected to a low-pass filter. The image suppression mixer is used to perform image suppression down-conversion on the frequency hopping signal under the drive of the microwave local oscillator signal, so as to realize de-hopping and obtain the intermediate frequency signal. The image suppression mixer of this embodiment receives the microwave local oscillator signal as the microwave local oscillator signal after bandpass filtering, that is, it only receives the upper sideband or lower sideband of the microwave local oscillator signal, eliminating the possibility that the frequency hopping signal appearing at the mirror frequency will interfere with the synchronous detection of the frequency hopping signal. The center frequency of the output signal of the 90° bridge 4 is f i +f IF -f j , the frequency range is the same as the receive frequency hopping frequency range.

[0040] Low pass filter cutoff frequency f T Need to be greater than the frequency f of the intermediate frequency signal IF , less than the intermediate frequency f IF and the sum of the channel spacing △f (f IF +△f); the stopband bandwidth must be greater than the frequency hopping bandwidth, and the stopband suppression must be greater than 20dB; it is used for the 90° bridge output higher than f IF The high frequency signal (i.e. f IF +n*△f) to filter out the signal, so that the output signal only has the signal with a frequency of f IF Or no signal.

[0041] The AGC amplifier amplifies the power of the received intermediate frequency signal. An automatic gain control amplifier is selected as the amplifier of this embodiment. On the one hand, the amplifier is used to perform gain compensation on the intermediate frequency signal output by the low-pass filter according to the channel attenuation characteristics to ensure the signal flatness of the de-hopping signal within the frequency hopping bandwidth; on the other hand, the receiver gain is dynamically adjusted according to the change of the transmission distance to compensate for the path loss and ensure that the output power level is within the optimal input power range of the envelope detector.

[0042] The envelope detector is used to perform envelope detection on the received intermediate frequency signal to obtain a high-level envelope signal and a low-level envelope signal. The rising edge time of the envelope detector directly affects the synchronization accuracy. In this embodiment, the detection rising edge time is in the nanosecond level, which is sufficient to ensure the rising edge detection accuracy and synchronization accuracy; its detection frequency is greater than f IF .

[0043] The analog-to-digital converter samples the high-level envelope signal and the low-level envelope signal, and converts them into digital envelope signals after differential processing. The sampling rate of this embodiment is 50 MHz.

[0044] The FPGA module is the core module of the integrated frequency hopping self-synchronization circuit for capture and tracking in this embodiment, and is composed of a filter de-jitter module, a rising edge detection module, a threshold detection module, a PN code generation module, a high-level counting module, and an SPI communication module. The filter de-jitter module is the input end of the FPGA module, and receives the digital envelope signal provided by the analog-to-digital converter; it is used to filter out the jitter in the digital envelope signal, which is the burr signal generated by the internal switch switching of the frequency synthesizer, so as to reduce the false alarm probability caused by the burr signal while ensuring the capture accuracy; when in use, the filtering time of the filter de-jitter module is slightly longer than the jitter time of the burr signal T burrThe rising edge detection module uses two registers to delay two beats for logical judgment to detect the rising edge; that is, two registers are used to store the previous state D[1] and the next state D[0], and the rising edge is judged by logical combination (~D[1]&&D[0]); if the previous state D[1] is low level and the next state D[0] is high level, it is a rising edge. After the rising edge is identified, the threshold detection module is triggered to work and the threshold indication signal time_cnt=0 is reset. The threshold detection module determines the level after the rising edge; if it is a high level, the threshold indication signal time_cnt is increased by 1; if it is a low level, the threshold detection module is reset and the rising edge detection module is re-executed; if time_cnt = Tgate, the threshold detection passes, triggering the PN code generation module to generate the next pseudo code sequence and prepare to send it, and at the same time triggering the high level counting module, resetting the high level counting indication signal high_cnt = 0; Tgate is a time threshold set manually, which should not be greater than the difference between the frequency hopping period Ts and the time Tspi required for the SPI communication module to send SPI data once, that is, Tgate≤Ts-Tspi. The high level counting module is used to achieve precise control of the frequency control word sending time, specifically: if it is a high level, high_cnt is increased by 1; if it is a low level, the high level counting module and the threshold detection module are reset, and the rising edge detection module is re-executed; if high_cnt = Ts-Tspi-Tgate, the high level counting module passes and triggers the SPI communication module. The SPI communication module sends the received pseudo-random code sequence provided by the PN code generation module to the frequency synthesizer, which generates the next frequency to ensure that the frequency in the next frequency hopping cycle is the same as the frequency of the received signal, thereby achieving frequency hopping synchronization.

[0045] According to the above-mentioned acquisition and tracking integrated frequency hopping self-synchronization circuit based on edge detection, this embodiment also provides an acquisition and tracking integrated frequency hopping self-synchronization method based on edge detection, such as Figure 2 As shown, the following steps are included:

[0046] Step 1: After power-on, the transmitter sends a frequency hopping signal, and the receiver receives the frequency hopping signal. The frequency of the frequency hopping signal is f i +f IF (i=0,1…N-1, N is the number of frequency hopping points) and the period is Ts.

[0047] Step 2: Perform image frequency suppression down-conversion processing on the frequency hopping signal to obtain an intermediate frequency signal, and perform low-pass filtering, power amplification, and envelope detection processing on the intermediate frequency signal in sequence to obtain an envelope signal with the same frequency as the frequency hopping period.

[0048] Step 3: Use the analog-to-digital converter to sample the high-level envelope signal and the low-level envelope signal through dual channels, subtract them to eliminate the influence of temperature drift, and then convert them into digital envelope signals.

[0049] Step 4: Under the 50MHz system clock, use the FPGA chip to process the digital envelope signal and generate a frequency control word for controlling the frequency hopping. Specifically:

[0050] Rising edge detection: The rising edge detection is performed by delaying two registers for two beats and performing logical judgment. When the received signal voltage is higher than the threshold voltage, the rising edge is identified, otherwise the detection state is maintained continuously;

[0051] Threshold detection: The high level after the rising edge is accumulated over time. When the accumulated time reaches the preset threshold time, the detection is considered to have passed; the PN code generation module is triggered to generate and provide a pseudo-random sequence code to the SPI communication module, and the high-level counting module works.

[0052] High level counting: starting high level counting from the threshold detection; if high_cnt = Ts-Tspi-Tgate, the high level counting module triggers the SPI communication module to send a random sequence code to the frequency synthesizer to pre-compensate the communication time of the SPI communication module.

[0053] Step 5: The frequency synthesizer generates a microwave local oscillator signal according to the frequency control word to drive the frequency hopping signal to perform down-conversion processing to achieve frequency hopping synchronous tracking.

[0054] Figure 3 This is a schematic diagram of the rising edge detection principle provided by an embodiment of the present disclosure. It can be seen that the signal envelope rising edge time and the sampling clock frequency are directly related to the tracking accuracy.

[0055] Figure 4 It is the waveform of the envelope detector output signal on the oscilloscope after frequency hopping synchronization provided by the embodiment of the present disclosure. The rectangular square wave represents the detection signal within a frequency hopping cycle, the gap between the rectangular square waves corresponds to the frequency switching time, and the continuous detection waveform indicates that the present embodiment achieves stable synchronization of the frequency hopping signal.

[0056] In summary, the edge detection-based capture and tracking integrated frequency hopping self-synchronization circuit and method provided in this embodiment uses only one synchronization loop to implement the function of a traditional τ-jitter phase-locked loop, and simultaneously implements the two functions of capture and tracking in the traditional method, which not only saves hardware resources but also shortens the synchronization establishment time.

[0057] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that any other changes, modifications, substitutions, combinations, and simplifications that do not deviate from the spirit and principles of the present invention should be regarded as equivalent replacement methods and are included in the protection scope of the present invention.

Claims

1. A capture and tracking integrated frequency hopping self-synchronization circuit based on edge detection, comprising: Antenna, low noise amplifier, image rejection mixer, low pass filter, AGC amplifier, and control module, characterized in that: The antenna is used to receive a broadband frequency hopping signal, and send the broadband frequency hopping signal to the image rejection mixer after amplifying it through a low noise amplifier; The image frequency rejection mixer comprises an I / Q mixer and a 90° bridge; the I / Q mixer receives the frequency hopping signal and the microwave local oscillator signal after low noise amplification, performs image frequency rejection down-conversion on the frequency hopping signal under the drive of the microwave local oscillator signal, realizes de-hopping to obtain the intermediate frequency signal, and transmits it to the low-pass filter in sequence through the 90° bridge; The low-pass filter is used to suppress high-frequency clutter in the intermediate frequency signal; The AGC amplifier receives the intermediate frequency signal output by the low-pass filter, and divides it into two paths after power amplification, one of which is output as the output signal; and the other is transmitted to the synchronization circuit module; The synchronization circuit module includes an envelope detector, an analog-to-digital converter, an FPGA module, a frequency synthesizer and a bandpass filter; the envelope detector receives the intermediate frequency signal amplified by the AGC amplifier, and extracts the envelope signal from the intermediate frequency signal and transmits it to the analog-to-digital converter; the analog-to-digital converter samples the envelope signal to obtain a digital envelope signal and transmits it to the FPGA module; the FPGA module is used to perform filtering and de-jittering, rising edge detection, threshold detection, high-level counting and other processing on the received digital envelope signal in sequence, and generate a frequency control word for realizing frequency hopping synchronization tracking according to the processing result; the frequency synthesizer receives the frequency control word provided by the FPGA module, generates a microwave local oscillator signal of the corresponding frequency according to the received frequency control word, and transmits it to the I / Q mixer through the bandpass filter.

2. The edge detection-based acquisition and tracking integrated frequency hopping self-synchronization circuit according to claim 1, characterized in that: The FPGA module includes a filtering and de-jittering module, a rising edge detection module, a threshold detection module, a PN code generation module, a high level counting module and an SPI communication module; The filtering and de-jittering module receives the digital envelope signal provided by the analog-to-digital converter and eliminates the jitter in the digital envelope signal to reduce the false alarm probability caused by the jitter and ensure the capture accuracy; The rising edge detection module receives the digital envelope signal after jitter elimination, and identifies the rising edge in the digital envelope signal, and triggers the threshold detection module to work after identifying the rising edge; the threshold detection module judges the level after the rising edge, and when it is a high level, it accumulates time, and when the time accumulation reaches a preset time threshold, it triggers the PN code generation module to generate a pseudo-random sequence code corresponding to the frequency hopping frequency and sends it to the SPI communication module, and triggers the high level counting module to accumulate the high level time; When the high level time accumulated by the high level counting module reaches the preset threshold time, the trigger enabling SPI communication module generates a corresponding frequency control word according to the received pseudo-random sequence code and sends it to the frequency synthesizer.

3. The edge detection-based acquisition and tracking integrated frequency hopping self-synchronization circuit according to claim 2, characterized in that: The rising edge detection module uses two registers to delay two beats for logical judgment to perform rising edge detection; if the previous state D[1] is a low level and the next state D[0] is a high level, it is a rising edge.

4. The edge detection-based acquisition and tracking integrated frequency hopping self-synchronization circuit according to claim 1, characterized in that: The cut-off frequency f of the low-pass filter T Greater than the frequency f of the intermediate frequency signal IF , which is less than the intermediate frequency signal frequency f IF The sum of the channel spacing △f.

5. The acquisition and tracking integrated frequency hopping self-synchronization circuit based on edge detection according to any one of claims 1 to 4, characterized in that: The AGC amplifier is an automatic gain control amplifier.

6. A capture and tracking integrated frequency hopping self-synchronization method based on edge detection, comprising the following steps: Step 1, receiving a frequency hopping signal; Step 2, performing image frequency suppression down-conversion processing on the frequency hopping signal to obtain an intermediate frequency signal, and performing low-pass filtering, power amplification, and envelope detection processing on the intermediate frequency signal in sequence to obtain an envelope signal with the same frequency as the frequency hopping period; Step 3, using an analog-to-digital converter to sample the high-level envelope signal and the low-level envelope signal, and converting them into digital envelope signals after performing differential processing; Step 4: Under the system clock, use the FPGA module to process the digital envelope signal to generate a frequency control word for controlling the frequency hopping; Step 5: Generate a microwave local oscillator signal according to the frequency control word to drive the frequency hopping signal to perform down-conversion processing to achieve frequency hopping synchronous tracking.

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