IGBT structure and semiconductor device

Abstract

The invention discloses an IGBT structure and a semiconductor device, and the IGBT structure comprises a substrate, a drift region of a first conduction type, a collector region of a second conduction type, an active gate, a body region of the second conduction type, a first doped region of the second conduction type, an emitter region of the first conduction type, and a second doped region of the second conduction type. The active gate extends into the drift region from the first main surface to the second main surface; the first doped region and the body region are respectively arranged on two sides of the active gate and are positioned on one side, facing the first main surface, of the drift region; the emitter region is located on one side, facing the first main surface, of the body region and located between two adjacent active gates, the emitter region comprises a first emitter region and a second emitter region, and the first emitter region and the second emitter region respectively cover at least part of the first body region and the second body region; the doping concentration of the second doped region is greater than the doping concentration of the body region. According to the IGBT structure and the semiconductor device, conductivity modulation of a narrow mesa between the active gates can be effectively avoided, and the CIBL effect is avoided.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductors, and in particular to an IGBT structure and a semiconductor device. Background Art

[0002] At present, IGBT (Insulated Gate Bipolar Transistor) is a MOS-bipolar compound transistor developed on the basis of Metal Oxide Semiconductor Field Effect Transistor (MOSFET). It has the common advantages of power bipolar transistors and power MOSFETs, and has different advantages in on-state voltage drop and switching, thus becoming a core device in power supply, drive and control circuits.

[0003] In the related technology, the ultra-narrow mesa structure IGBT can achieve the theoretical silicon limit, and this structure effectively reduces the conduction loss. However, due to the narrow mesa, the P-body region is completely inverted to an N-type electron channel, and the back holes are injected into the N-type electron channel, followed by conductivity modulation in the channel (usually refers to the phenomenon that the resistivity of semiconductor materials decreases significantly with the increase of carrier concentration under high injection conditions), resulting in the collector induced barrier lowering (CIBL) effect.

[0004] Improvements are therefore needed to at least partially address the above-mentioned problems. Summary of the invention

[0005] A series of simplified concepts are introduced in the Summary of the Invention section, which will be further described in detail in the Detailed Description of the Invention section. The Summary of the Invention section of this application does not mean to attempt to define the key features and essential technical features of the claimed technical solution, nor does it mean to attempt to determine the scope of protection of the claimed technical solution.

[0006] In order to at least partially solve the above problems, according to a first aspect of the present application, an IGBT structure is provided, comprising:

[0007] A substrate, the substrate having a first main surface and a second main surface located on the opposite side of the first main surface, the first main surface and the second main surface are arranged at intervals along a first direction;

[0008] a drift region of a first conductivity type, the drift region being disposed between the first main surface and the second main surface;

[0009] A collector region of a second conductivity type, the collector region being arranged on a side of the drift region facing the second main surface;

[0010] an active gate extending from the first main surface to the second main surface into the drift region;

[0011] a body region of a second conductivity type, disposed in the substrate outside the active gate and located on a side of the drift region facing the first main surface, the body region comprising a first body region and a second body region spaced apart along the second direction, wherein the second direction is perpendicular to the first direction;

[0012] a first doped region of a second conductivity type, wherein the first doped region and the body region are respectively disposed on two sides of the active gate and located on a side of the drift region facing the first main surface;

[0013] an emitter region of a first conductivity type, the emitter region being located on a side of the body region facing the first main surface and between two adjacent active gates, the emitter region comprising a first emitter region and a second emitter region, the first emitter region and the second emitter region being spaced apart in the second direction, and the first emitter region and the second emitter region respectively covering at least a portion of the first body region and the second body region;

[0014] a dummy gate, wherein the dummy gate extends from the first main surface to the second main surface into the drift region, the dummy gate and the active gate are arranged at intervals along a third direction, the first doped region is located outside the dummy gate, and the third direction is perpendicular to the first direction and the second direction;

[0015] A second doping region of a second conductivity type is disposed between the first body region and the second body region and is located on a side of the drift region facing the first main surface, and a doping concentration of the second doping region is greater than a doping concentration of the body region.

[0016] The above technical solution has the following advantages and beneficial effects: according to the IGBT structure of the present invention, the first emitter region and the second emitter region cover the first body region and the second body region respectively, a second doping region is provided between the first body region and the second body region, and the doping concentration of the second doping region is greater than that of the first body region and the second body region, so that the injected carriers (such as holes) can be dispersed to the second doping region with low potential, thereby reducing the holes flowing through the first body region and the second body region, which can effectively limit the conductivity modulation of the narrow table between the active gates and prevent the occurrence of CIBL effect.

[0017] Optionally, a doping concentration of the first doping region is greater than a doping concentration of the body region.

[0018] The above technical solution has the following advantages and beneficial effects: by making the doping concentration of the first doping region greater than the doping concentration of the body region, the holes injected from the back side can be dispersed to the first doping region with low potential (such as the P+ region) in the third direction, thereby reducing the holes flowing through the body region, and effectively limiting the conductivity modulation of the narrow mesas between the gates, thereby limiting the CIBL effect.

[0019] Optionally, it also includes a third doping region arranged between the first body region and the second body region, the doping concentration of the third doping region is lower than the doping concentration of the body region, wherein the third doping region and the second doping region are arranged in contact along the third direction.

[0020] The above technical solution has the following advantages and beneficial effects: during the IGBT turn-on process, as the active gate voltage rises, an electron channel will be generated first due to the low doping concentration in the third doping region. The electrons first flow horizontally (in the second direction) from the first emitter region and the second emitter region through the channel in the third doping region, and then flow vertically (in the first direction) to the drift region and accumulate under the third doping region, thereby accelerating the disappearance of the depletion region and solving the problem of the tailing of the collector-emitter voltage drop during the turn-on process.

[0021] Optionally, the number of the third doping regions is at least two, and along the third direction, the third doping regions are located on both sides of the second doping region.

[0022] The above technical solution has the following advantages and beneficial effects: through such a setting method, electrons can be better enabled to flow from the first emission region and the second emission region horizontally (second direction) through the third doped region channel, and then flow vertically (first direction) to the drift region, and accumulate under the third doped region, thereby accelerating the disappearance of the depletion region and solving the problem of the tailing of the collector-emitter voltage drop during the turn-on process.

[0023] Optionally, the number of the third doping regions is at least two, the number of the second doping regions is at least two, and along the third direction, the second doping regions and the third doping regions are alternately arranged.

[0024] The above technical solution has the following advantages and beneficial effects: by setting the third doping region and the third doping region in this way, it is also possible to effectively limit the conductivity modulation of the narrow mesas between the gates, thereby limiting the CIBL effect and solving the problem of the tailing of the collector-emitter voltage drop during the turn-on process.

[0025] Optionally, the IGBT structure further includes: an insulating layer, which is arranged on the first main surface, and a contact hole is provided in a portion of the insulating layer corresponding to the emitter region; an emitter metal, which is arranged on a side of the insulating layer away from the second main surface, and the emitter region is in contact with the emitter metal through the contact hole.

[0026] The above technical solution has the following advantages and beneficial effects: the emitter region and the active gate are electrically isolated by the insulating layer, and the emitter metal leads out the emitter region, thereby facilitating its connection with the external circuit.

[0027] Optionally, the virtual gate is arranged in a first gate trench, and the first gate trench extends from the first main surface to the second main surface to the drift region. The virtual gate includes a first gate dielectric layer located on the inner surface of the first gate trench and a first polysilicon gate located on a side of the first gate dielectric layer away from the inner surface of the first gate trench and filling the first gate trench; the first polysilicon gate is electrically connected to the emitter metal.

[0028] The above technical solution has the following advantages and beneficial effects: the first polysilicon gate is electrically connected to the emitter metal, that is, the virtual gate is short-circuited with the emitter region. By short-circuiting the virtual gate with the emitter region, the virtual gate can be made to have the same properties as the emitter region and be negatively charged. Some holes can be attracted to transfer to the virtual gate, thereby reducing the number of holes flowing under the emitter region, that is, reducing the number of holes flowing in the channel, reducing the risk of latch-up effect under high current conditions, and also reducing the feedback capacitance of the IGBT, thereby reducing switching losses.

[0029] Optionally, the active gate is arranged in a second gate trench, and the second gate trench extends from the first main surface to the second main surface to the drift region, and the active gate includes a second gate dielectric layer located on the inner surface of the second gate trench and a second polysilicon gate located on a side of the second gate dielectric layer away from the inner surface of the second gate trench and filling the second gate trench.

[0030] The above technical solution has the following advantages and beneficial effects: the active gate plays a control role in the IGBT and can form a gate structure of a conductive channel. When the gate voltage is applied to the active gate, a conductive channel can be formed around the active gate, so that electrons and holes can move in the channel, thereby controlling the on and off of the IGBT.

[0031] Optionally, it also includes:

[0032] A field stop region, located at a side of the drift region away from the first main surface;

[0033] a collector region, located on a side of the field stop region away from the first main surface; and

[0034] A collector metal is disposed on the second main surface and covers at least a portion of the collector region.

[0035] The above technical solution has the following advantages and beneficial effects: the main function of the field stop region is to terminate the electric field when the IGBT is in the off state, preventing the electric field from penetrating into the collector region, thereby improving the voltage resistance of the device.

[0036] The semiconductor device according to the embodiment of the present invention includes the above-mentioned IGBT structure.

[0037] The above technical solution has the following advantages and beneficial effects: Since the semiconductor device according to the present invention includes the above-mentioned IGBT structure, it also has the advantages and beneficial effects of the above-mentioned IGBT structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] By describing the embodiments of the present application in more detail in conjunction with the accompanying drawings, the above and other purposes, features and advantages of the present application will become more apparent. The accompanying drawings are used to provide a further understanding of the embodiments of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the present application and do not constitute a limitation of the present application. In the accompanying drawings, the same reference numerals generally represent the same components or steps.

[0039] Figure 1 A schematic top view of an IGBT structure in the related art is shown.

[0040] Figure 2 shows the IGBT structure along Figure 1 Cross-sectional view along the A-A1 direction.

[0041] Figure 3 shows the IGBT structure along Figure 1 Cross-sectional view along the B-B1 direction.

[0042] Figure 4 A schematic top view of the IGBT structure in an embodiment of the present application is shown.

[0043] Figure 5 The IGBT structure in the embodiment of the present application is shown. Figure 4 Cross-sectional view along the A-A1 direction.

[0044] Figure 6 The IGBT structure in the embodiment of the present application is shown. Figure 4 Cross-sectional view along the B-B1 direction.

[0045] Figure 7 The IGBT structure in the embodiment of the present application is shown. Figure 4 Cross-sectional view along the C-C1 direction.

[0046] Figure 8 The IGBT structure in the embodiment of the present application is shown. Figure 4 Cross-sectional view along the D-D1 direction.

[0047] Reference numerals:

[0048] 100. substrate; 101. first main surface; 102. second main surface; 110. drift region; 120. collector region; 130. active gate; 140. virtual gate; 150. body region; 151. first body region; 152. second body region; 161. first doped region; 162. second doped region; 163. third doped region; 170. emitter region; 171. first emitter region; 172. second emitter region; 180. insulating layer; 200. emitter metal; 300. collector metal; 400. field stop region. DETAILED DESCRIPTION

[0049] In the following description, a large number of specific details are provided to provide a more thorough understanding of the present application. However, it is apparent to those skilled in the art that the present application can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present application, some technical features well known in the art are not described.

[0050] It should be understood that the present application can be implemented in different forms and should not be construed as being limited to the embodiments presented herein. On the contrary, providing these embodiments will make the disclosure thorough and complete and fully convey the scope of the present application to those skilled in the art. In the accompanying drawings, the sizes and relative sizes of layers and regions may be exaggerated for clarity. The same reference numerals throughout represent the same elements.

[0051] It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present application, the first element, component, region, layer or part discussed below can be represented as a second element, component, region, layer or part.

[0052] Spatially relative terms such as "under", "beneath", "below", "under", "above", "above", etc., may be used herein for convenience of description to describe the relationship of one element or feature to other elements or features shown in the figures. It should be understood that the spatially relative terms are intended to encompass different orientations of the device in use and operation in addition to the orientation shown in the figures.

[0053] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present application. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0054] Embodiments of the invention are described herein with reference to cross-sectional views as schematic diagrams of ideal embodiments (and intermediate structures) of the present application. Thus, variations in the shapes shown due to, for example, manufacturing techniques and / or tolerances can be expected. Therefore, embodiments of the present application should not be limited to the specific shapes shown herein, but include shape deviations due to, for example, manufacturing. Therefore, what is shown in the figures is schematic in nature, and their shapes are not intended to display the actual shape of the device and are not intended to limit the scope of the present application.

[0055] First, it should be noted that, in this article, N and P represent the conductivity type of the semiconductor. In the following, the first conductivity type is set to N type and the second conductivity type is set to P type for description.

[0056] like Figure 1-Figure 3 As shown, the narrow mesa IGBT structure in the related art includes: a virtual gate 10, an active gate 11, a body region 12, an emitter region 13, a drift region 14, and a collector region 15, wherein the virtual gate 10 and the active gate 11 extend into the drift region 14, wherein the virtual gate 10 and the active gate 11 are arranged at intervals, a body region 12 of the second conductivity type is provided between the virtual gate 10 and the active gate 11, a body region 12 is also provided between the active gates 11, the drift region 14 is located between the body region 12 and the collector region 15, an emitter region 13 of the first conductivity type is also provided between the active gates 11, and the emitter region 13 is located on the side of the body region 12 away from the drift region 14.

[0057] like Figure 3 As shown, adjacent emitting regions 13 are arranged at intervals, and at least a portion of the body region 12 is disposed between the emitting regions 13 .

[0058] When the IGBT structure in the related art is turned on, due to the narrow table, the second conductivity type body region 12 is completely inverted into the first conductivity type electron channel, and the back carriers (such as holes) are injected into the electron channel, and then the conductivity modulation occurs in the channel, resulting in a CIBL effect, which leads to an increase in the device transconductance, a decrease in the threshold voltage, and extremely poor short-circuit tolerance.

[0059] In order to improve the short-circuit capability, the channel density can be reduced (increasing the spacing between the emitter regions 13). However, when the IGBT is turned on, the electrons from the emitter region 13 pass through the body region 12 below it, drift longitudinally to the drift region 14 and accumulate. There is no direct accumulation of drift electrons in the drift region 14 below the body region 12 between the two emitter regions 13, but only the lateral diffusion of electrons below the emitter region 13. Therefore, the depletion region in this area disappears relatively slowly. It is easy to produce the problem of collector-emitter voltage tailing during the turn-on process, increase the turn-on loss, and greatly limit the application of narrow mesa structure IGBT.

[0060] like Figures 4 to 8 As shown, in order to solve the above-mentioned problems, an embodiment of the present application provides an IGBT structure, including: a substrate 100, a drift region 110 of a first conductive type, a collector region 120 of a second conductive type, an active gate 130, a body region 150 of a second conductive type, a first doped region 161 of a second conductive type, an emitter region 170 of a first conductive type, and a second doped region 162 of a second conductive type.

[0061] The substrate 100 has a first main surface 101 and a second main surface 102 located on the opposite side of the first main surface 101. The first main surface 101 and the second main surface 102 are arranged along a first direction ( Figure 5 The interval setting in the up and down directions.

[0062] Exemplarily, the substrate 100 may be any suitable semiconductor substrate, such as a silicon substrate, and may also be at least one of the following materials: Si, Ge, SiGe, SiC, SiGeC, InAs, GaAs, InP or other III / V compound semiconductors, including multilayer structures composed of these semiconductor materials, or silicon on insulator (SOI), stacked silicon on insulator (SSOI), stacked silicon germanium on insulator (S-SiGeOI), silicon germanium on insulator (SiGeOI) and germanium on insulator (GeOI).

[0063] The drift region 110 is disposed between the first main surface 101 and the second main surface 102. The drift region 110 determines the saturation voltage drop and voltage level of the IGBT and is the main region that affects the switching speed of the IGBT. The conductivity type of the drift region 110 is the first conductivity type.

[0064] The collector region 120 of the second conductivity type is arranged on the side of the drift region 110 facing the second main surface 102, and the side of the collector region 120 away from the drift region 110 constitutes at least a part of the second main surface 102. The active gate 130 extends from the first main surface 101 to the second main surface 102 into the drift region 110. The active gate 130 plays a control role in the IGBT and is a gate structure capable of forming a conductive channel. When a gate voltage is applied to the active gate 130, a conductive channel can be formed around the active gate 130, so that electrons and holes can move in the channel, thereby controlling the on and off of the IGBT.

[0065] Please refer to Figure 5 and Figure 6 The second conductive type body region 150 is disposed in the substrate 100 outside the active gate 130 and is located on the side of the drift region 110 facing the first main surface 101. The body region 150 includes a second conductive type body region 150 extending along the second direction ( Figure 6 The first body region 151 and the second body region 152 are spaced apart from each other (in the left-right direction).

[0066] The emitter region 170 of the first conductive type is located on the side of the body region 150 facing the first main surface 101 and between two adjacent active gates 130. The emitter region 170 includes a first emitter region 171 and a second emitter region 172. The first emitter region 171 and the second emitter region 172 are spaced apart in the second direction. The first emitter region 171 and the second emitter region 172 cover at least part of the first body region 151 and the second body region 152, respectively.

[0067] The first doping region 161 of the second conductivity type and the body region 150 are respectively arranged on both sides of the active gate 130 and located on the side of the drift region 110 facing the first main surface 101. In some embodiments, the first doping region 161 is arranged between adjacent active gates 130 and dummy gates 140. Exemplarily, the doping concentration of the first doping region 161 is greater than the doping concentration of the body region 150. By making the doping concentration of the first doping region 161 greater than the doping concentration of the body region 150, then in the third direction, the holes injected from the back can be dispersed to the first doping region 161 with a low potential (for example, the P+ region), thereby reducing the holes flowing through the body region, which can effectively limit the conductivity modulation of the narrow mesas between the gates, thereby limiting the CIBL effect.

[0068] The virtual gate 140 extends from the first main surface 101 to the second main surface 102 into the drift region 110. The virtual gate 140 and the active gate 130 are connected along the third direction ( Figure 5The first doped region 161 is arranged at intervals (in the left and right directions in the figure), and the first doped region 161 is located outside the virtual gate 140, that is, the first doped region 161 is located between the adjacent virtual gates 140 and the active gate 130. The virtual gate 140 is a gate structure that exists in the IGBT structure but does not directly participate in the conduction. It is usually unable to form a conductive channel. By setting the virtual gate 140 and connecting it to the emitter, the feedback capacitance of the IGBT (that is, the gate-collector capacitance) can be reduced, thereby reducing the switching loss. Exemplarily, the virtual gate 140 can also be called a virtual cell narrow groove gate (dummy gate).

[0069] In some embodiments, the second doping region 162 of the second conductivity type is disposed between the first body region 151 and the second body region 152 and is located on the side of the drift region 110 facing the first main surface 101 , and the doping concentration of the second doping region 162 is greater than the doping concentration of the body region 150 .

[0070] In some embodiments, a first doped region 161 is formed on both sides of the active gate 130, a first emitter region 171 and a second emitter region 172 cover the first body region 151 and the second body region 152 respectively, a second doped region 162 is provided between the first body region 151 and the second body region 152, and the doping concentrations of the first doped region 161 and the second doped region 162 are greater than those of the first body region 151 and the second body region 152, so that the injected carriers (such as holes) can be dispersed to the first doped region 161 and the second doped region 162 with low potential, thereby reducing the holes flowing through the first body region 151 and the second body region 152, which can effectively limit the conductivity modulation of the narrow mesas between the active gates 130 and prevent the occurrence of the CIBL effect.

[0071] On the one hand, when the IGBT is in the on state, the body region 150 is inverted to generate an electron channel, and electrons are emitted from the emitter region 170 through the channel to the drift region 110 to form an electron current, and the back carriers (such as holes) are injected from the collector region 120 to the drift region 110, and reach the emitter region 170 through the body region 150 to form a hole current. In this embodiment, the doping concentration of the first doping region 161 between the active gate 130 and the dummy gate 140 is higher than the doping concentration of the body region 150 between the active gates 130. In the third direction, the holes injected from the back can be dispersed to the first doping region 161 with a low potential, thereby reducing the holes flowing through the body region 150.

[0072] On the other hand, the doping concentration of the second doping region 162 between the first emitter region 171 and the second emitter region 172 is greater than the doping concentration of the body region 150 below the emitter region 170. In the second direction, the holes injected from the back side can be dispersed to the second doping region 162 with a low potential, thereby reducing the holes flowing through the body region 150. Therefore, the IGBT structure in this embodiment can effectively limit the conductance modulation of the narrow mesas between the active gates 130 and prevent the CIBL effect.

[0073] Furthermore, in this embodiment, the second direction is perpendicular to the first direction, and the third direction is perpendicular to the first direction and the second direction. The third direction and the second direction may also be directions parallel to the first main surface and / or the second main surface of the substrate. Figure 4 As shown, the first direction is also the Z direction, the second direction is also the Y direction, and the third direction is also the X direction.

[0074] Please continue to refer to Figure 5 Furthermore, the IGBT structure also includes: an insulating layer 180 , an emitter metal 200 and a collector metal 300 .

[0075] The insulating layer 180 is disposed on the first main surface 101, and a contact hole is disposed on the portion of the insulating layer 180 corresponding to the emitter region 170. The emitter region 170 is exposed at the bottom of the contact hole. The emitter metal 200 is disposed on the side of the insulating layer 180 away from the first main surface 101, and the emitter region 170 contacts the emitter metal 200 through the contact hole to form a conductive connection, so as to lead out the emitter region 170, thereby facilitating its connection with an external circuit. Optionally, the material of the insulating layer 180 may include silicon oxide, silicon nitride or any other suitable insulating material. By providing the insulating layer 180, the emitter metal and the active gate can be electrically isolated.

[0076] In some embodiments, the collector metal 300 is disposed on the second main surface 102 and contacts the collector region 120, that is, covers at least a portion of the collector region 120 to form a conductive connection. The collector metal 300 is used to electrically lead out the collector region 120, thereby facilitating its connection to an external circuit.

[0077] Furthermore, the IGBT structure further includes a field stop region of the first conductivity type, which is located on the side of the drift region 110 away from the first main surface 101. The field stop region 400 is arranged between the collector region 120 and the drift region 110. The doping concentration of the field stop region 400 is higher than the doping concentration of the drift region 110. Optionally, the field stop region 400 has the same conductivity type as the drift region 110. The main function of the field stop region 400 is to terminate the electric field in the off state of the IGBT to prevent the electric field from penetrating into the collector region 120, thereby improving the withstand voltage capability of the device. When a high voltage is applied, the field stop region 400 can withstand a part of the electric field, so that the electric field gradually weakens before reaching the collector region 120, limiting the breakdown of the collector region 120. The field stop region 400 can also reduce the duration and amplitude of the tail current by adjusting the carrier distribution and extraction speed. The reduction of the tail current helps to reduce the turn-off loss.

[0078] Furthermore, a first gate trench extending from the first main surface 101 to the second main surface 102 to the drift region 110 is formed in the substrate, and a virtual gate 140 is arranged in the first gate trench. The virtual gate 140 includes a first gate dielectric layer located on the inner surface of the first gate trench and a first polysilicon gate located on the side of the first gate dielectric layer away from the inner surface of the first gate trench and filling the first gate trench. The first polysilicon gate is in contact with the emitter metal 200 (i.e., electrically connected). The electrical connection with the virtual gate and the emitter region is achieved through the emitter metal 200, which can reduce the feedback capacitance of the IGBT, thereby reducing the switching loss.

[0079] In some embodiments, a second gate trench is also formed in the substrate, extending from the first main surface 101 to the second main surface 102 to the drift region 110, and the active gate 130 includes a second gate dielectric layer located on the inner surface of the second gate trench and a second polysilicon gate located on a side of the second gate dielectric layer away from the inner surface of the second gate trench and filling the second gate trench.

[0080] The first polysilicon gate is in contact with the emitter metal 200, that is, the virtual gate 140 is short-circuited with the emitter region. By short-circuiting the virtual gate 140 with the emitter region, the virtual gate 140 can be made to have the same properties as the emitter region, and be negatively charged. Some holes can be attracted to transfer to the virtual gate 140, thereby reducing the number of holes flowing under the emitter region 170, that is, reducing the number of holes flowing in the channel, reducing the risk of latch-up effect under high current conditions, and also reducing the feedback capacitance of the IGBT, thereby reducing switching losses.

[0081] In some embodiments, the first polysilicon gate in the virtual gate 140 can be a floating gate, that is, the first polysilicon gate is a gate that is not directly electrically connected to an external circuit. It is surrounded by an insulating layer (that is, a gate oxide layer and an insulating layer 180), is in a "floating" state, and is not directly connected to a fixed potential point such as a power supply or ground.

[0082] It is worth mentioning that the arrangement of the active gate 130 and the dummy gate 140 can be reasonably set as needed. For example, a dummy gate 140 can be respectively arranged outside two active gates 130 .

[0083] like Figure 7-Figure 8 As shown, further, the IGBT structure in this embodiment further includes a third doping region 163 disposed between the first body region 151 and the second body region 152, the doping concentration of the third doping region 163 is less than the doping concentration of the first body region 151 and the second body region 152, wherein the third doping region 163 and the second doping region 162 are disposed in contact along the third direction. Optionally, the number of the third doping region 163 may be two, and the third doping region 163 is located in the third direction of the second doping region 162 ( Figure 7Optionally, there may be a first doping region 161 and a second doping region 162.

[0084] Further, the width (width along the third direction) of the first doping region 161 between the active gate 130 and the dummy gate 140 is in the range of 0.1um-0.6um, for example, 0.1um, 0.2um, 0.3um, 0.4um, 0.5um or 0.6um. In the third direction, the width of the third doping region 163 is less than the width of the second doping region 162. For example, the width of the third doping region 163 is in the range of 0.1um-0.3um, for example, 0.1um, 0.2um or 0.3um. The width of the second doping region 162 between the third doping regions 163 is 0.2um-0.4um, for example, 0.2um, 0.3um, 0.4um, etc. The above width ranges of the doping regions are only examples and can be reasonably set according to actual needs, and are not specifically limited here.

[0085] In some embodiments, during the IGBT turn-on process, as the voltage of the active gate 130 rises, an electron channel is first generated due to the low doping concentration of the third doping region 163. Electrons flow from the first emitter region 171 and the second emitter region 172 first horizontally (in the second direction) through the channel of the third doping region 163, and then flow vertically (in the first direction) to the drift region 110, accumulating under the third doping region 163, thereby accelerating the disappearance of the depletion region and solving the problem of the voltage drop tailing between the collector region 120 and the emitter region during the turn-on process.

[0086] In some embodiments, the number of the third doping regions 163 may be at least two, the number of the second doping regions 162 may be at least two, and the second doping regions 162 and the third doping regions 163 may be alternately arranged along the third direction. Optionally, when the number of the second doping regions 162 is at least two, the widths of the second doping regions 162 may be the same or different, and when the number of the third doping regions 163 is at least two, the widths of the third doping regions 163 may be the same or different.

[0087] In some embodiments, the third doping region 163 and the second doping region 162 are arranged at intervals along the third direction, and there is a preset distance between the third doping region 163 and the second doping region 162 , or the two may be in contact connection.

[0088] In some embodiments, in the third direction, the emission region may cover the entire body region or a portion of the body region. When covering a portion of the body region, there may be a gap between the emission region and the second doping region and the third doping region, and the gap is a portion of the body region.

[0089] In the IGBT structure in the embodiment of the present application, the doping concentration of the first doping region 161 between the active gate 130 and the virtual gate 140 is higher than the doping concentration of the body region between the active gates 130. In the on state, the holes injected from the back side can be dispersed to the first doping region 161 with a low potential, thereby reducing the holes flowing through the body region.

[0090] The doping concentration of the second doping region 162 between the first emitter region 171 and the second emitter region 172 is greater than the doping concentration of the body region below the emitter region, and holes can be dispersed to the second doping region 162 with a low potential, further reducing the holes flowing through the body region. This effectively limits the conductance modulation of the narrow table between the active gates 130 and prevents the CIBL effect from occurring. In addition, because the doping concentration of the third doping region 163 is low, an electron channel will be generated first. After the electrons flow from the emitter region through the channel of the third doping region 163, they flow vertically to the drift region 110 and accumulate below the third doping region 163, accelerating the disappearance of the depletion region and solving the problem of voltage drop tailing between the collector region 120 and the emitter region during the turn-on process.

[0091] The present application also provides a semiconductor device, which includes the IGBT structure described above, wherein the semiconductor device may be a power semiconductor device.

[0092] Although example embodiments have been described herein with reference to the accompanying drawings, it should be understood that the above example embodiments are merely exemplary and are not intended to limit the scope of the present application to this. Those of ordinary skill in the art may make various changes and modifications therein without departing from the scope and spirit of the present application. All these changes and modifications are intended to be included within the scope of the present application as required by the appended claims.

[0093] In the description provided herein, a large number of specific details are described. However, it is understood that the embodiments of the present application can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.

[0094] Similarly, it should be understood that in order to streamline the present application and help understand one or more of the various inventive aspects, in the description of the exemplary embodiments of the present application, the various features of the present application are sometimes grouped together into a single embodiment, figure, or description thereof. However, the method of the present application should not be interpreted as reflecting the following intention: the claimed application requires more features than the features clearly stated in each claim. More specifically, as reflected in the corresponding claims, the inventive point is that the corresponding technical problem can be solved with features less than all the features of a single disclosed embodiment. Therefore, the claims following the specific embodiment are hereby explicitly incorporated into the specific embodiment, wherein each claim itself serves as a separate embodiment of the present application.

[0095] It will be understood by those skilled in the art that, except for mutually exclusive features, all features disclosed in this specification (including the accompanying claims, abstracts and drawings) and all processes or units of any method or device disclosed in this specification may be combined in any combination. Unless otherwise expressly stated, each feature disclosed in this specification (including the accompanying claims, abstracts and drawings) may be replaced by an alternative feature that provides the same, equivalent or similar purpose.

[0096] In addition, those skilled in the art will appreciate that, although some embodiments herein include certain features included in other embodiments but not other features, the combination of features of different embodiments is meant to be within the scope of the present application and form different embodiments. For example, in the claims, any one of the claimed embodiments may be used in any combination.

[0097] The above is only a specific implementation method or description of a specific implementation method of the present application, and the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. The protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. An IGBT structure, characterized in that: include: A substrate, the substrate having a first main surface and a second main surface located on the opposite side of the first main surface, the first main surface and the second main surface are arranged at intervals along a first direction; a drift region of a first conductivity type, the drift region being disposed between the first main surface and the second main surface; A collector region of a second conductivity type, the collector region being arranged on a side of the drift region facing the second main surface; an active gate extending from the first main surface to the second main surface into the drift region; a body region of a second conductivity type, disposed in the substrate outside the active gate and located on a side of the drift region facing the first main surface, the body region comprising a first body region and a second body region spaced apart along the second direction, wherein the second direction is perpendicular to the first direction; a first doped region of a second conductivity type, wherein the first doped region and the body region are respectively disposed on two sides of the active gate and located on a side of the drift region facing the first main surface; an emitter region of a first conductivity type, the emitter region being located on a side of the body region facing the first main surface and between two adjacent active gates, the emitter region comprising a first emitter region and a second emitter region, the first emitter region and the second emitter region being spaced apart in the second direction, and the first emitter region and the second emitter region respectively covering at least a portion of the first body region and the second body region; a dummy gate, wherein the dummy gate extends from the first main surface to the second main surface into the drift region, the dummy gate and the active gate are arranged at intervals along a third direction, the first doped region is located outside the dummy gate, and the third direction is perpendicular to the first direction and the second direction; A second doping region of a second conductivity type is disposed between the first body region and the second body region and is located on a side of the drift region facing the first main surface, and a doping concentration of the second doping region is greater than a doping concentration of the body region.

2. The IGBT structure according to claim 1, characterized in that: The doping concentration of the first doping region is greater than the doping concentration of the body region.

3. The IGBT structure according to claim 1, characterized in that: It also includes a third doped region disposed between the first body region and the second body region, wherein the doping concentration of the third doped region is lower than the doping concentration of the body region, wherein the third doped region and the second doped region are disposed in contact along the third direction.

4. The IGBT structure according to claim 3, characterized in that: The number of the third doping regions is at least two, and along the third direction, the third doping regions are located on both sides of the second doping region.

5. The IGBT structure according to claim 3, characterized in that: The number of the third doping regions is at least two, the number of the second doping regions is at least two, and along the third direction, the second doping regions and the third doping regions are alternately arranged.

6. The IGBT structure according to claim 1, characterized in that: The IGBT structure further includes: an insulating layer, the insulating layer being disposed on the first main surface, and a contact hole being disposed in a portion of the insulating layer corresponding to the emitter region; An emitter metal is provided on a side of the insulating layer away from the second main surface, and the emitter region is in contact with the emitter metal through the contact hole.

7. The IGBT structure according to claim 6, characterized in that: The dummy gate is arranged in a first gate trench, the first gate trench extends from the first main surface to the second main surface to the drift region, and the dummy gate includes a first gate dielectric layer located on an inner surface of the first gate trench and a first polysilicon gate located on a side of the first gate dielectric layer away from the inner surface of the first gate trench and filling the first gate trench; The first polysilicon gate is electrically connected to the emitter metal.

8. The IGBT structure according to claim 6, characterized in that: The active gate is arranged in a second gate trench, and the second gate trench extends from the first main surface to the second main surface to the drift region. The active gate includes a second gate dielectric layer located on the inner surface of the second gate trench and a second polysilicon gate located on a side of the second gate dielectric layer away from the inner surface of the second gate trench and filling the second gate trench.

9. The IGBT structure according to any one of claims 1 to 7, characterized in that: Also includes: A field stop region, located at a side of the drift region away from the first main surface; A collector region, located on a side of the field stop region away from the first main surface; as well as A collector metal is disposed on the second main surface and covers at least a portion of the collector region.

10. A semiconductor device, characterized in that: The semiconductor device comprises the IGBT structure according to any one of claims 1 to 9.

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