LED epitaxial structures and bonding methods, LED components and their fabrication methods

Abstract

The application relates to an LED epitaxial structure and a bonding method thereof, an LED assembly and a manufacturing method thereof. The bonding method of the LED epitaxial structure comprises the following steps: providing a conductive substrate; wherein the conductive substrate is provided with a first insulating layer and a first bonding layer, the first insulating layer is arranged in a grid shape, and the first bonding layer is filled in the grid; providing an epitaxial structure; wherein the epitaxial structure comprises a substrate, an epitaxial layer, a second insulating layer and a second bonding layer which are sequentially arranged, the second insulating layer is arranged in a grid shape, and the second bonding layer is filled in the grid; aligning and bonding the conductive substrate and the epitaxial structure; wherein the projections of the first insulating layer and the second insulating layer on the conductive substrate after the bonding are coincident, and the projections of the first bonding layer and the second bonding layer on the conductive substrate are coincident; and removing the substrate. By adopting the bonding method, metal back-etching caused by etching of the metal bonding layer can be avoided.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to an LED epitaxial structure and its bonding method, an LED component and its fabrication method. Background Technology

[0002] In the fabrication of vertical chip substrates, the display backplane and epitaxial structure are typically bonded together first using metal bonding, followed by etching of the epitaxial structure. This process usually involves etching the bonded epitaxial structure to form multiple separate epitaxial layers, and then using ion beam dry etching (IBE) to segment the metal layers to obtain multiple P-electrodes. However, this bonding metal etching process is highly complex and requires demanding equipment. Sputtered metal debris can also accumulate along the epitaxial layers, forming a metal film adhering to the sides of the epitaxial layers. This accumulated metal film cannot be effectively removed using a resist stripping process.

[0003] Due to the aforementioned defects, when coating the display backplane later, it is difficult to coat the accumulated metal film with a protective layer, or the coated protective layer is prone to breakage at this location, or the sputtered metal forms a current channel with the top P-type layer of the epitaxial layer, ultimately causing the current to not pass through the quantum well layer, resulting in the chip failing to light up or having low brightness, short circuits, and other abnormalities. Summary of the Invention

[0004] In view of the shortcomings of the prior art, the purpose of this application is to provide an LED epitaxial structure and its bonding method, an LED component and its manufacturing method, which aims to solve the technical problem of metal re-adhesion caused by the above-mentioned metal etching.

[0005] A method for bonding LED epitaxial structures, comprising:

[0006] A conductive substrate is provided; wherein, the conductive substrate is provided with a first insulating layer and a first bonding layer, the first insulating layer is arranged in a grid pattern, and the first bonding layer fills the grid;

[0007] An epitaxial structure is provided; wherein the epitaxial structure includes a substrate, an epitaxial layer, a second insulating layer and a second bonding layer stacked sequentially, the second insulating layer being arranged in a grid pattern and the second bonding layer filling the grid;

[0008] The conductive substrate and the epitaxial structure are aligned and bonded; wherein, after bonding, the projections of the first insulating layer and the second insulating layer on the conductive substrate coincide, and the projections of the first bonding layer and the second bonding layer on the conductive substrate coincide; and

[0009] Remove the substrate.

[0010] The above-mentioned LED epitaxial structure bonding method involves pre-patterning the insulating layer on the conductive substrate and the epitaxial structure, then depositing bonding metal within the pattern of the insulating layer, and aligning and bonding the insulating layer and the metal layer on the conductive substrate and the epitaxial structure. This avoids the traditional etching process for bonding metal, effectively preventing problems such as incomplete metal etching, metal spatter, and metal particle residue, thereby significantly improving the overall performance and yield of the device.

[0011] Optionally, it also includes:

[0012] Based on the arrangement of the second insulating layer, the epitaxial layer is patterned through a mask corresponding to the second insulating layer to expose the second insulating layer.

[0013] Optionally, the method for manufacturing the conductive substrate includes:

[0014] Provide a conductive substrate;

[0015] An insulating adhesive layer is coated on the surface of the conductive substrate;

[0016] The insulating adhesive layer is patterned to form a first insulating layer arranged in a grid pattern;

[0017] The first bonding layer is deposited within the grid defined by the first insulating layer.

[0018] Optionally, the method for fabricating the epitaxial structure includes:

[0019] Provide the epitaxial layer comprising the substrate;

[0020] An insulating adhesive layer is coated on the side of the epitaxial layer opposite to the substrate;

[0021] The insulating adhesive layer is patterned to form a second insulating layer with a grid-like arrangement;

[0022] The second bonding layer is deposited within the grid defined by the second insulating layer.

[0023] Optionally, the first insulating layer and the second insulating layer comprise any one of silicon dioxide, benzocyclobutene, and polyimide, and the first insulating layer and the second insulating layer are made of the same material.

[0024] Optionally, the first bonding layer and the second bonding layer include any one of gold, tin, and copper, and the first bonding layer and the second bonding layer are made of the same material.

[0025] Based on the same inventive concept, this application also provides an LED epitaxial structure, which is obtained by the aforementioned LED epitaxial structure bonding method.

[0026] Since the aforementioned LED epitaxial structure is obtained through the aforementioned LED epitaxial structure bonding method, a metal film layer will not accumulate on the side of the epitaxial layer, thus ensuring the stability of the LED epitaxial structure.

[0027] Based on the same inventive concept, this application also provides a method for manufacturing an LED component, comprising:

[0028] Provides an LED epitaxial structure obtained using the aforementioned LED epitaxial structure bonding method; and

[0029] Based on the arrangement of the second insulating layer, the epitaxial layer is patterned through a mask corresponding to the second insulating layer to expose the second insulating layer;

[0030] Metal electrodes are fabricated on the surface of the patterned epitaxial layer.

[0031] The above-mentioned LED component manufacturing method is based on the aforementioned LED epitaxial structure bonding method. The aforementioned bonding method avoids the traditional etching process of bonding metal, effectively avoiding problems such as incomplete metal etching, metal spatter, and metal particle residue, thereby significantly improving the overall performance and yield when manufacturing the LED component.

[0032] Optionally, before the step of fabricating a metal electrode on the patterned epitaxial layer surface, the method further includes:

[0033] A protective layer is deposited on the surface of the patterned epitaxial layer;

[0034] The protective layer is patterned so that the side of the epitaxial layer facing away from the conductive substrate is exposed.

[0035] Based on the same inventive concept, this application also provides an LED component, which is manufactured using the aforementioned LED component manufacturing method. Attached Figure Description

[0036] Figure 1 This is a flowchart illustrating the LED epitaxial structure bonding method in one embodiment;

[0037] Figure 2 This is a flowchart illustrating an LED component manufacturing method in one embodiment;

[0038] Figures 3-5 For the corresponding Figure 1 A schematic diagram of the bonding method for LED epitaxial structures;

[0039] Figures 6-8 This is a schematic diagram of the LED epitaxial structure bonding method in another embodiment;

[0040] Figure 9 for Figure 1 A flowchart illustrating the sub-steps of step S100;

[0041] Figure 10 To and Figure 9 Corresponding structural diagram;

[0042] Figure 11 for Figure 1 A flowchart illustrating the sub-steps of step S200;

[0043] Figure 12 To and Figure 11 Corresponding structural diagram;

[0044] Figures 13-15 For the corresponding Figure 2 A schematic diagram of the structure of the LED component manufacturing method.

[0045] Explanation of reference numerals in the attached figures:

[0046] 1-Conductive substrate; 11-First insulating layer; 110-Insulating adhesive layer; 12-First bonding layer; 21-Substrate; 22-Epiaxial layer; 23-Second insulating layer; 230-Insulating adhesive layer; 24-Second bonding layer; S0-Photoresist; E1-First epitaxial layer; E2-Second epitaxial layer; E3-Third epitaxial layer; 32-Protective layer; H-Hole; M-Metal electrode. Detailed Implementation

[0047] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings. Preferred embodiments of this application are shown in the drawings. However, this application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the disclosure of this application.

[0048] The following descriptions of the embodiments are based on the accompanying illustrations and are used to illustrate specific embodiments in which this application can be implemented. The component designations used herein, such as "first," "second," etc., are merely for distinguishing the described objects and have no sequential or technical meaning. Unless otherwise specified, the terms "connection" and "linkage" used in this application include both direct and indirect connections (linkages). Directional terms used in this application, such as "up," "down," "front," "rear," "left," "right," "inner," "outer," "side," etc., are merely for reference to the accompanying illustrations. Therefore, the use of directional terms is for better and clearer explanation and understanding of this application, and does not indicate or imply that the referred device or element must have a specific orientation, or be constructed and operated in a specific orientation; therefore, they should not be construed as limitations on this application.

[0049] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joint" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal communication between two elements. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances. It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising," "may include," "include," or "may include" used in this application indicate the presence of the corresponding disclosed function, operation, element, etc., and do not limit one or more other functions, operations, elements, etc. Moreover, the terms "comprising" or "include" indicate the presence of the corresponding features, number, steps, operations, elements, components, or combinations thereof disclosed in the specification, but do not exclude the presence or addition of one or more other features, number, steps, operations, elements, components, or combinations thereof, and are intended to cover non-exclusive inclusion.

[0050] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application.

[0051] As described in the background section of this application, in the current process of fabricating vertical chip substrates, the display backplane and epitaxial structure are typically bonded together by metal bonding before etching the epitaxial structure. In this process, the bonded epitaxial structure is usually etched first to form multiple separate epitaxial layers, and ion beam dry etching (IBE) is used to segment the metal layers to obtain multiple P electrodes. However, this bonding metal etching process is difficult, and the etching equipment requires stringent conditions. Sputtered metal debris may also accumulate along the epitaxial layers, forming a metal film adhering to the sides of the epitaxial layers. This accumulated metal film cannot be effectively removed using a resist stripping process.

[0052] Due to the aforementioned defects, when coating the display backplane later, it is difficult to coat the accumulated metal film with a protective layer, or the coated protective layer is prone to breakage at this location, or the sputtered metal forms a current channel with the top P-type layer of the epitaxial layer, ultimately causing the current to not pass through the quantum well layer, resulting in the chip failing to light up or having low brightness, short circuits, and other abnormalities.

[0053] Therefore, this application aims to provide a solution that can solve the above-mentioned technical problems, the details of which will be described in subsequent embodiments.

[0054] See also Figure 1 At the same time, auxiliary reference Figures 3-5 This application provides a bonding method for LED epitaxial structures, which may include steps S100-S400.

[0055] Step S100: A conductive substrate is provided; wherein, the conductive substrate is provided with a first insulating layer and a first bonding layer, the first insulating layer is arranged in a grid pattern, and the first bonding layer fills the grid;

[0056] Step S200: Provide an epitaxial structure; wherein the epitaxial structure includes a substrate, an epitaxial layer, a second insulating layer, and a second bonding layer stacked sequentially, the second insulating layer being arranged in a grid pattern, and the second bonding layer filling the grid;

[0057] Step S300: Align and bond the conductive substrate to the epitaxial structure; wherein, after bonding, the projections of the first insulating layer and the second insulating layer on the conductive substrate coincide, and the projections of the first bonding layer and the second bonding layer on the conductive substrate coincide; and

[0058] Step S400: Remove the substrate.

[0059] The above-mentioned LED epitaxial structure bonding method involves pre-patterning the insulating layer on the conductive substrate and the epitaxial structure, then depositing bonding metal within the pattern of the insulating layer, and aligning and bonding the insulating layer and the metal layer on the conductive substrate and the epitaxial structure. This avoids the traditional etching process for bonding metal, effectively preventing problems such as incomplete metal etching, metal spatter, and metal particle residue, thereby significantly improving the overall performance and yield of the device.

[0060] Specifically, please refer to Figure 9 , Figure 10 A method for fabricating a conductive substrate comprising a first insulating layer 11 and a first bonding layer 12 may include steps S110-S140.

[0061] Step S110: Provide a conductive substrate;

[0062] Step S120: Coat the surface of the conductive substrate with an insulating adhesive layer;

[0063] Step S130: The insulating adhesive layer is patterned to form a first insulating layer with a grid-like arrangement;

[0064] Step S140: Deposit the first bonding layer within the grid defined by the first insulating layer.

[0065] In this embodiment, a first insulating layer 11 and a first bonding layer 12 are disposed on the conductive substrate 1. The first insulating layer 11 is arranged in a grid pattern, and the first bonding layer 12 fills the grid. The first insulating layer 11 can be any one of silicon dioxide, benzocyclobutene, and polyimide, and the first bonding layer 12 is a metal, specifically any one of gold, tin, and copper. The first bonding layer 12 can also be an alloy. The first bonding layer 12 can be formed in the grid formed by the first insulating layer 11 by vapor deposition.

[0066] Specifically, the conductive substrate 1 can be a CMOS substrate, a PCB substrate, or a glass substrate. It should be noted that regardless of whether it is a CMOS substrate, a PCB substrate, or a glass substrate, a driving circuit is provided on it to realize the driving function of the LED chip. To increase the heat dissipation and conductivity of the conductive substrate 1, the substrate material of the conductive substrate 1 can be, but is not limited to, any one of silicon (Si), germanium (Ge), and copper (Cu). Since silicon, germanium, and copper have high thermal conductivity, by using at least one of silicon, germanium, and copper as the substrate material of the conductive substrate 1, the heat dissipation efficiency and effect of the conductive substrate 1 can be improved, thereby improving the working performance and service life of subsequent devices.

[0067] Similar to the fabrication method of conductive substrates, please refer to the following for further information. Figure 11 , Figure 12 The method for fabricating an epitaxial structure may include the following steps: S210-S240.

[0068] Step S210: Provide the epitaxial layer comprising the substrate;

[0069] Step S220: Coat an insulating adhesive layer on the side of the epitaxial layer opposite to the substrate;

[0070] Step S230: The insulating adhesive layer is patterned to form a second insulating layer with a grid-like arrangement;

[0071] Step S240: Deposit the second bonding layer within the grid defined by the second insulating layer.

[0072] The substrate 21 may include any one of a sapphire substrate, a silicon substrate, or a gallium arsenide substrate. The epitaxial layer 22 may be a blue-green light epitaxial layer (corresponding to a gallium nitride-based semiconductor material) or a red light epitaxial layer (corresponding to a gallium arsenide-based semiconductor material). Specifically, the epitaxial layer 22 may include an active layer (not shown), an N-type semiconductor layer (not shown), and a P-type semiconductor layer (not shown). The N-type semiconductor layer or the P-type semiconductor layer may be a III-V group compound semiconductor material such as GaN, AlGaN, InGaN, AlInP, GaInP, or AlGaInP. The active layer may be a multiple quantum well (MQW) structure. Specifically, the quantum well or quantum layer can be InGaN, AlGaN, InN, InAlN, AlInGaN, etc., while the quantum barrier alternately stacked with the quantum well layer can be GaN, AlN, AlGaN, AlInGaN, InAlN, etc.; the multiple quantum well structure can include one, two, three, four, five, six, six, seven, or eight quantum wells (or at least one quantum hole); the wavelength emitted by the active layer can be the wavelength of the blue light band, the wavelength of the green light band, or the wavelength of the red light band, and the embodiments of this application do not specifically limit it.

[0073] The second insulating layer 23 can be any one of silicon dioxide, benzocyclobutene, and polyimide, and the second bonding layer 24 is a metal, specifically any one of gold, tin, and copper. The second bonding layer 24 can also be an alloy. The second bonding layer 24 can be formed in the mesh formed by the second insulating layer 23 by vapor deposition. It should be understood that, to ensure the bonding strength during bonding, the first insulating layer 11 and the second insulating layer 23 of this application use the same material, and the first bonding layer 12 and the second bonding layer 24 use the same material. That is, when the first insulating layer 11 is silicon dioxide, the second insulating layer 23 also uses silicon dioxide; when the first bonding layer 12 is gold, the second bonding layer 24 also uses gold.

[0074] Once the conductive substrate 1 and the epitaxial structure are aligned, the first insulating layer 11 and the second insulating layer 23, as well as the first bonding layer 12 and the second bonding layer 24, can be bonded by applying a certain pressure and temperature through van der Waals forces, molecular forces, and even atomic forces.

[0075] In one embodiment, the LED epitaxial structure bonding method of this application may further include the step of: based on the arrangement of the second insulating layer, patterning the epitaxial layer through a mask corresponding to the second insulating layer to expose the second insulating layer.

[0076] For specific details, please refer to the following: Figures 6-8First, a photoresist S0 can be spin-coated onto the epitaxial layer 22, and then patterned using a photomask (not shown). This photomask is based on the arrangement of the second insulating layer 23; that is, the transparent areas of the photomask correspond to the grid-like portions of the second insulating layer 23, and the opaque areas correspond to the cutout portions of the second insulating layer 23. In this way, the pattern of the photomask can be transferred to the photoresist S0, so that the gaps in the patterned photoresist S0 precisely correspond to the grid-like portions of the second insulating layer 23. Subsequently, using the photoresist S0 as a photomask, an etching process is performed on the epitaxial layer 22 until it is etched into multiple independent first epitaxial layers E1, second epitaxial layers E2, and third epitaxial layers E3. This not only separates the epitaxial layer 22 but also avoids etching the original bonding layer. When performing etching on the epitaxial layer 22, dry etching and / or wet etching can be used. When combining dry etching and wet etching, dry etching can be used at the beginning, and then wet etching can be used when the epitaxial layer is almost finished. This can ensure clean etching and avoid over-etching the underlying insulating layer.

[0077] Based on the same inventive concept, this application also provides an LED epitaxial structure, which is obtained by the aforementioned LED epitaxial structure bonding method.

[0078] Specifically, the LED epitaxial structure can be a corresponding Figure 5 The extensional structure in the middle can also be a corresponding Figure 8 The extensional structure in.

[0079] Since the aforementioned LED epitaxial structure is obtained through the aforementioned LED epitaxial structure bonding method, a metal film layer will not accumulate on the side of the epitaxial layer, thus ensuring the stability of the LED epitaxial structure.

[0080] Based on the same inventive concept, please refer to the appendix. Figure 2 and attached Figures 13-15 This application also provides a method for manufacturing an LED component, which may include steps S10-S60. Steps S10-S40 may refer to the aforementioned LED epitaxial structure bonding method.

[0081] Provides an LED epitaxial structure obtained by the aforementioned LED epitaxial structure bonding method;

[0082] Step S50: Based on the arrangement of the second insulating layer, the epitaxial layer is patterned through a mask corresponding to the second insulating layer to expose the second insulating layer.

[0083] Step S60: Fabricate a metal electrode on the surface of the patterned epitaxial layer.

[0084] The above-mentioned LED component manufacturing method is based on the aforementioned LED epitaxial structure bonding method. The aforementioned bonding method avoids the traditional etching process of bonding metal, effectively avoiding problems such as incomplete metal etching, metal spatter, and metal particle residue, thereby significantly improving the overall performance and yield when manufacturing the LED component.

[0085] For specific details, please refer to the following: Figures 6-8 First, a photoresist S0 can be spin-coated onto the epitaxial layer 22, and then patterned using a photomask (not shown). This photomask is based on the arrangement of the second insulating layer 23; that is, the transparent areas of the photomask correspond to the grid-like portions of the second insulating layer 23, and the opaque areas correspond to the cutout portions of the second insulating layer 23. In this way, the pattern of the photomask can be transferred to the photoresist S0, so that the gaps in the patterned photoresist S0 precisely correspond to the grid-like portions of the second insulating layer 23. Subsequently, using the photoresist S0 as a photomask, an etching process is performed on the epitaxial layer 22 until it is etched into multiple independent first epitaxial layers E1, second epitaxial layers E2, and third epitaxial layers E3. This not only separates the epitaxial layer 22 but also avoids etching the original bonding layer. When performing etching on the epitaxial layer 22, dry etching and / or wet etching can be used. When combining dry etching and wet etching, dry etching can be used at the beginning, and then wet etching can be used when the epitaxial layer is almost finished. This can ensure clean etching and avoid over-etching the underlying insulating layer.

[0086] Specifically, the epitaxial layer 22 can be a blue-green light epitaxial layer (corresponding to a gallium nitride-based semiconductor material), or it can be a red light epitaxial layer (corresponding to a gallium arsenide-based semiconductor material). The protective layer 32 can be any one of silicon dioxide, aluminum oxide, or polyimide. Exemplarily, in this specific embodiment, the epitaxial layer 22 may include an active layer (not shown), an N-type semiconductor layer (not shown), and a P-type semiconductor layer (not shown). The N-type or P-type semiconductor layer can be a III-V group compound semiconductor material such as GaN, AlGaN, InGaN, AlInP, GaInP, or AlGaInP. The active layer can be a multiple quantum well (MQW) structure. Specifically, the quantum well or quantum layer can be InGaN, AlGaN, InN, InAlN, AlInGaN, etc., while the quantum barrier alternately stacked with the quantum well layer can be GaN, AlN, AlGaN, AlInGaN, InAlN, etc.; the multiple quantum well structure can include one, two, three, four, five, six, six, seven, or eight quantum wells (or at least one quantum hole); the wavelength emitted by the active layer can be the wavelength of the blue light band, the wavelength of the green light band, or the wavelength of the red light band, and the embodiments of this application do not specifically limit it.

[0087] In one embodiment, it may be helpful to refer to Figure 13 , Figure 14 Before the step of fabricating a metal electrode on the patterned epitaxial layer surface, step S60 may further include the following steps:

[0088] A protective layer is deposited on the surface of the patterned epitaxial layer;

[0089] The protective layer is patterned so that the side of the epitaxial layer facing away from the conductive substrate is exposed.

[0090] After patterning the epitaxial structure 22 to form multiple first epitaxial layers E1, second epitaxial layers E2, and third epitaxial layers E3, a protective layer 32 can be deposited on the first epitaxial layers E1, second epitaxial layers E2, and third epitaxial layers E3. This protective layer 32 can be any one of silicon dioxide, aluminum oxide, or polyimide. The protective layer 32 protects the first epitaxial layers E1, second epitaxial layers E2, and third epitaxial layers E3 from environmental influences (temperature, humidity, etc.), improving their weather resistance. After the protective layer 32 is deposited, it can be patterned to expose the side of the first epitaxial layers E1, second epitaxial layers E2, and third epitaxial layers E3 facing away from the conductive substrate 1, forming a hole H. Subsequently, metal can be filled into the hole H to obtain a metal electrode M. The metal electrode M can be an alloy or a pure metal, for example, it can be formed from one or more of Cr, Pt, Ti, Ni, Au, Sn, Ag, Cu, Cu, and Al. Considering the need to form an ohmic contact with the semiconductor layer, an ohmic contact layer (not shown) can also be provided between the metal electrode M and the first epitaxial layer E1, the second epitaxial layer E2, and the third epitaxial layer E3. This ohmic contact layer can be, for example, indium tin oxide.

[0091] Since both the first bonding layer 12 and the second bonding layer 24 are metals during the previous LED epitaxial structure bonding process, bonding them not only replaces the substrate of the original epitaxial structure but also bonds the epitaxial structure to the conductive substrate, thus achieving electrical connection between the conductive substrate and the epitaxial layer. Simultaneously, the first bonding layer 12 and the second bonding layer 24, as bonding metals, can function as electrodes, forming the conductive portion of the LED assembly together with the finally fabricated metal electrode M. Current can be introduced through these two metal electrodes. The vertically structured LED assembly exhibits excellent anti-static and heat dissipation capabilities. Furthermore, directly bonding the epitaxial structure to the conductive substrate avoids the problems associated with traditional mass transfer methods.

[0092] Based on the same inventive concept, this application also provides an LED component, which is manufactured using the aforementioned LED component manufacturing method.

[0093] The aforementioned LED component is obtained based on the aforementioned LED component manufacturing method, which avoids the traditional etching process of bonding metal, effectively avoiding problems such as incomplete metal etching, metal spatter, and metal particle residue, thereby significantly improving the overall performance and yield when manufacturing the LED component.

[0094] Specifically, the LED components obtained in this application can be chips of different sizes, such as LED, mini-LED, and Micro-LED. Furthermore, mini-LEDs can be used to make outdoor display screens; Micro-LEDs can be used as light sources in the fields of VR (Virtual Reality), AR (Augmented Reality), and MR (Mixed Reality).

[0095] It should be understood that the application of the present invention is not limited to the examples above. Those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.

Claims

1. A method of LED epitaxial structure bonding, characterized in that, The method comprises the following steps: providing a conductive substrate, wherein the conductive substrate is provided with a first insulating layer and a first bonding layer, the first insulating layer is arranged in a grid shape, and the first bonding layer is filled in the grid; providing an epitaxial structure, wherein the epitaxial structure comprises a substrate, an epitaxial layer, a second insulating layer and a second bonding layer which are sequentially stacked, the second insulating layer is arranged in a grid shape, and the second bonding layer is filled in the grid; aligning and bonding the conductive substrate and the epitaxial structure, wherein the projections of the first insulating layer and the second insulating layer on the conductive substrate after the bonding are completely overlapped, and the projections of the first bonding layer and the second bonding layer on the conductive substrate are completely overlapped; and removing the substrate. The method for manufacturing the conductive substrate comprises the following steps: providing a conductive substrate; coating an insulating glue layer on the surface of the conductive substrate; performing a patterning treatment on the insulating glue layer to form the first insulating layer arranged in a grid shape; evaporating the first bonding layer in the grid defined by the first insulating layer; The method for manufacturing the epitaxial structure comprises the following steps: providing the epitaxial layer containing the substrate; coating an insulating glue layer on the side of the epitaxial layer away from the substrate; performing a patterning treatment on the insulating glue layer to form the second insulating layer arranged in a grid shape; evaporating the second bonding layer in the grid defined by the second insulating layer.

2. The LED epitaxial structure bonding method of claim 1, wherein, Further comprising: performing a patterning treatment on the epitaxial layer through a mask corresponding to the second insulating layer to expose the second insulating layer, with the arrangement form of the second insulating layer as a reference.

3. The LED epitaxial structure bonding method according to any one of claims 1-2, wherein, The first insulating layer and the second insulating layer comprise any one of silicon dioxide, benzocyclobutene and polyimide, and the materials of the first insulating layer and the second insulating layer are the same.

4. The LED epitaxial structure bonding method according to any one of claims 1-2, wherein, The first bonding layer and the second bonding layer comprise any one of gold, tin and copper, and the materials of the first bonding layer and the second bonding layer are the same.

5. An LED epitaxial structure, characterized in that, The LED epitaxial structure is obtained by the LED epitaxial structure bonding method according to any one of claims 1-4.

6. A method of fabricating an LED assembly, comprising: The method comprises the following steps: providing an LED epitaxial structure obtained by the LED epitaxial structure bonding method according to claim 1; performing a patterning treatment on the epitaxial layer through a mask corresponding to the second insulating layer to expose the second insulating layer, with the arrangement form of the second insulating layer as a reference; manufacturing a metal electrode on the surface of the epitaxial layer after the patterning treatment.

7. The method of claim 6, wherein the step of forming the LED assembly further comprises the step of: Before the step of manufacturing a metal electrode on the surface of the epitaxial layer after the patterning treatment, the method further comprises the following steps: ​ depositing a protective layer on the surface of the epitaxial layer after the patterning treatment; performing a patterning treatment on the protective layer to expose a part of the surface of the epitaxial layer away from the conductive substrate.

8. An LED assembly, comprising: The LED component is manufactured by the LED component manufacturing method according to any one of claims 6-7.

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