Display panel, manufacturing method thereof and display device

Abstract

The invention discloses a display panel, a manufacturing method thereof and a display device. The display panel of one embodiment includes: a first electrode layer formed on a source drain metal layer, the first electrode layer including an anode formed in a pixel region and a connection electrode formed in the pixel region on one side of the pixel region; the pixel defining layer is formed on the first electrode layer, and the orthographic projection of the pixel defining layer on the substrate surrounds the pixel area; the segmentation layer is formed on the pixel defining layer, and the orthographic projection of the segmentation layer on the substrate surrounds the orthographic projection of the pixel defining layer on the substrate; the second electrode layer is formed on the segmentation layer, one end, close to the pixel area, of the connection electrode is in contact with the second electrode layer, the other end opposite to the one end is not in contact with the second electrode layer, and the connection electrode is electrically connected with the source-drain metal layer through a via hole penetrating through the source-drain metal layer. According to the embodiment of the invention, the patterned second electrode layer is electrically connected with the source-drain metal layer by using the segmentation layer and the connection electrode.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a manufacturing method thereof, and a display device. Background Art

[0002] OLED display technology has achieved great success in smartphones and has gradually penetrated into larger display devices such as tablets, laptops, etc. Based on the conventional display panel structure and manufacturing method, the second electrode of the light-emitting element (the top electrode of the top emission, the cathode) is usually prepared by maskless evaporation or sputtering process, so that the source (or drain) of the transistor in the pixel driving circuit can only be electrically connected to the first electrode (the bottom electrode of the top emission, the anode) that can be patterned and independently divided.

[0003] In this structure, since the first electrode is connected to one pole of the transistor, the electrode potential of the transistor drifts due to the degradation of the light-emitting element, which in turn causes the gate-source voltage of the driving transistor in the pixel circuit to change, thereby increasing the range of the driving current, thereby affecting the image quality and reliability of the display panel. Summary of the invention

[0004] In order to solve at least one of the above problems, the present application provides a display panel in a first aspect, including:

[0005] A substrate, comprising a plurality of pixel regions arranged at intervals;

[0006] A source-drain metal layer is formed on a substrate;

[0007] A first electrode layer is formed on the source-drain metal layer, the first electrode layer comprising an anode formed in the pixel region and a connection electrode of the pixel region formed on one side of the pixel region;

[0008] A pixel defining layer is formed on the first electrode layer, wherein an orthographic projection of the pixel defining layer on the base substrate surrounds a pixel area;

[0009] A segmentation layer is formed on the pixel definition layer, wherein the orthographic projection of the segmentation layer on the base substrate does not overlap with the orthographic projection of the pixel definition layer on the base substrate, and the orthographic projection of the segmentation layer on the base substrate surrounds the orthographic projection of the pixel definition layer on the base substrate; and

[0010] a second electrode layer formed on the segmentation layer,

[0011] The orthographic projection of the surface of the segmentation layer close to the base substrate on the base substrate falls within the orthographic projection of the surface of the segmentation layer far from the base substrate on the base substrate, one side of the connecting electrode close to its pixel region is in contact with the second electrode layer, and the other side opposite to the one side is not in contact with the second electrode layer,

[0012] The connection electrode is electrically connected to the source-drain metal layer via a via hole penetrating the source-drain metal layer.

[0013] Optionally, the display panel further includes: a driving circuit layer disposed between the base substrate and the first electrode layer,

[0014] The driving circuit layer includes a thin film transistor and an auxiliary electrode. The source and drain of the thin film transistor and the auxiliary electrode are arranged in the source and drain metal layer.

[0015] The anode is electrically connected to the auxiliary electrode via a via hole penetrating the source-drain metal layer, and the connection electrode is electrically connected to one of the source electrode and the drain electrode via a via hole penetrating the source-drain metal layer.

[0016] Optionally, the display panel further includes: a driving circuit layer disposed between the base substrate and the first electrode layer,

[0017] The driving circuit layer includes a thin film transistor and an auxiliary electrode. The driving circuit layer includes: a gate layer, a first insulating layer, a source-drain metal layer, a second insulating layer, and a wiring layer stacked in sequence on a substrate.

[0018] The source and drain of the thin film transistor are arranged in the source-drain metal layer, the auxiliary electrode is arranged in the wiring layer, and the wiring layer also includes a conductive part.

[0019] The connection electrode is electrically connected to the conductive portion via a via hole penetrating the wiring layer, and is electrically connected to one of the source and the drain via the conductive portion through a via hole provided in the second insulating layer. The anode is electrically connected to the auxiliary electrode via a via hole penetrating the wiring layer.

[0020] Optionally, a side surface of the connecting electrode in contact with the second electrode layer extends beyond a side wall of the partition layer, and the other side surface of the connecting electrode is covered by the partition layer.

[0021] Optionally, the driving circuit layer further includes: an active layer formed between the base substrate and the source-drain metal layer, wherein the active layer is an oxide semiconductor layer, and / or the thin film transistor is an N-type transistor.

[0022] Optionally, the thickness of the separation layer is greater than or equal to 1.5 μm and less than or equal to 2.5 μm.

[0023] Optionally, the material of the separation layer is a negative photoresist material.

[0024] Optionally, the orthographic projection of the segmentation layer on the base substrate is in a grid shape.

[0025] Optionally, the orthographic projection of the auxiliary electrode on the base substrate is in a grid shape.

[0026] Optionally, the display panel further includes: a light shielding layer disposed between the base substrate and the driving circuit layer,

[0027] The driving circuit layer includes: an active layer, a third insulating layer, a gate layer and a source-drain metal layer stacked in sequence on a base substrate, and the light shielding layer includes a first signal line.

[0028] The other of the source and the drain is electrically connected to the first signal line via a via hole penetrating the light shielding layer.

[0029] A second aspect of the present disclosure provides a display device, comprising the display panel described above.

[0030] A third aspect of the present disclosure provides a method for manufacturing the display panel described above, comprising:

[0031] providing a substrate base plate;

[0032] forming a source-drain metal layer on the substrate;

[0033] Forming a first electrode layer on the source-drain metal layer, the first electrode layer comprising an anode formed in the pixel region and a connection electrode of the pixel region formed on one side of the pixel region;

[0034] Forming a pixel definition layer on the base substrate, wherein the orthographic projection of the pixel definition layer on the base substrate surrounds the pixel area;

[0035] forming a segmentation layer on the pixel definition layer; and

[0036] A second electrode layer is formed on the segmentation layer by using a sputtering or evaporation process to form a display panel.

[0037] Optionally, when the second electrode layer is formed on the segmentation layer by an evaporation process, the method further comprises:

[0038] forming a light-emitting layer by evaporation on the segmentation layer; and

[0039] A second electrode layer is formed on the light-emitting layer by an evaporation process.

[0040] The evaporation angle of the light-emitting layer is greater than the evaporation angle of the second electrode layer.

[0041] Optionally, forming a segmentation layer on the pixel defining layer further comprises:

[0042] coating a segmentation material layer on the pixel definition layer, wherein the material of the segmentation material layer is a negative photoresist material; and

[0043] The partition material layer is patterned by exposure and development processes to form a partition layer.

[0044] The beneficial effects of this application are as follows:

[0045] In response to the current existing problems, the present application develops a display panel and a method for manufacturing the same, as well as a display device. By providing a connecting electrode arranged in the first electrode layer in cooperation with a segmentation layer arranged on the pixel defining layer, the first electrode is patterned and the patterned first electrode can be independently electrically connected to the source and drain metal layer, thereby avoiding the influence of the degradation of the light-emitting element on the driving current, improving the image quality and reliability of the display panel, and at the same time, the film layer structure is simple, the process cost is low, and it has broad application prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0047] Figure 1 A schematic top view of a display panel according to an embodiment of the present disclosure is shown;

[0048] Figure 2 Shown along Figure 1 A schematic cross-sectional view of the display panel taken along line AA' in FIG.

[0049] Figure 3 Shown along Figure 1 A schematic cross-sectional view of a portion of the film layer of the display panel taken along line BB';

[0050] Figure 4 Shown along Figure 1 A schematic cross-sectional view of a portion of the film layer of the display panel taken along line CC';

[0051] Figure 5 A schematic cross-sectional view showing a display panel according to another embodiment of the present disclosure;

[0052] Figures 6 to 11 A schematic process flow chart of a method for manufacturing a display panel according to the present disclosure is shown. DETAILED DESCRIPTION

[0053] In order to more clearly illustrate the present application, the present application is further described below in conjunction with preferred embodiments and drawings. Similar components in the drawings are represented by the same reference numerals. It should be understood by those skilled in the art that the content described below is illustrative rather than restrictive, and should not be used to limit the scope of protection of the present application.

[0054] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, similar words such as "one", "one" or "the" do not indicate quantitative restrictions, but indicate that there is at least one. "Include" or "comprising" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects.

[0055] In the present application, the term "co-layer arrangement" used refers to two layers, parts, components, elements or parts that can be formed by the same preparation process (such as patterning process, etc.), and the two layers, parts, components, elements or parts are generally formed of the same material. For example, two or more functional layers are co-layered, which means that these co-layered functional layers can be formed using the same material layer and the same preparation process, thereby simplifying the preparation process of the display substrate.

[0056] In addition, the present disclosure describes exemplary embodiments with reference to cross-sectional views and / or plan views that are idealized exemplary drawings. In the drawings, the thickness of the layers and the area of ​​the regions are exaggerated for clarity. Therefore, variations in the shapes relative to the drawings due to, for example, manufacturing techniques and / or tolerances are conceivable. Therefore, the exemplary embodiments should not be interpreted as being limited to the shapes of the regions shown herein, but include shape deviations due to, for example, manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shapes of the regions of the device, and are not intended to limit the scope of the exemplary embodiments.

[0057] In view of at least one of the above problems, an embodiment of the present disclosure provides a display panel, including:

[0058] A substrate, comprising a plurality of pixel regions arranged at intervals;

[0059] A source-drain metal layer is formed on a substrate;

[0060] A first electrode layer is formed on the source-drain metal layer, the first electrode layer comprising an anode formed in the pixel region and a connection electrode of the pixel region formed on one side of the pixel region;

[0061] A pixel defining layer is formed on the first electrode layer, wherein the orthographic projection of the pixel defining layer on the base substrate surrounds the orthographic projection of the anode on the base substrate;

[0062] A segmentation layer is formed on the pixel definition layer, the segmentation layer does not overlap with the pixel definition layer, and an orthographic projection of the segmentation layer on the base substrate surrounds an orthographic projection of the pixel definition layer on the base substrate; and

[0063] a second electrode layer formed on the segmentation layer,

[0064] The orthographic projection of the surface of the segmentation layer close to the base substrate on the base substrate falls within the orthographic projection of the surface of the segmentation layer far from the base substrate on the base substrate, one side of the connecting electrode close to its pixel region is in contact with the second electrode layer, and the other side opposite to the one side is not in contact with the second electrode layer,

[0065] The connection electrode is electrically connected to the source-drain metal layer via a via hole penetrating the source-drain metal layer.

[0066] In this embodiment, by providing a connecting electrode arranged in the first electrode layer in cooperation with a segmentation layer arranged on the pixel defining layer, the patterning of the first electrode is achieved and the patterned first electrode can be independently electrically connected to the source and drain metal layer, thereby avoiding the influence of degradation of the light-emitting element on the driving current, improving the image quality and reliability of the display panel, and at the same time, the film layer structure is simple and the process cost is low.

[0067] In order to illustrate the structure and function of the present application, the following is a detailed description with reference to specific examples. Figure 1 A schematic top view showing a specific example, Figure 2 Shown along Figure 1 A schematic cross-sectional view taken along line AA' in FIG.

[0068] It should be noted that in the embodiment of the present disclosure, because the second electrode layer at the top is formed by a maskless method (Open Mask) without patterning using a mask plate, it is substantially covered with a large area when viewed from above. Figure 1 The second electrode layer is not shown.

[0069] Reference Figure 1 and Figure 2 As shown, the display panel includes a base substrate 10, which includes a plurality of pixel regions arranged at intervals. The display panel includes a pixel defining layer 32 arranged on the base substrate 10, and the orthographic projection of the pixel defining layer 32 on the base substrate 10 surrounds the pixel region, that is, the pixel defining layer 32 is used to define the pixel region.

[0070] Further references Figure 2 As shown, the display panel includes a source-drain metal layer, a first electrode layer, a pixel defining layer 32 , and a second electrode layer 35 which are sequentially arranged on a base substrate 10 .

[0071] The source-drain metal layer includes source and drain electrodes 251 and 252, and the first electrode layer includes an anode 311 formed in the pixel region. The second electrode layer 35 may be a cathode.

[0072] In particular, refer to Figure 1 and Figure 2 As shown, the first electrode layer also includes a connecting electrode 312, and the display panel also includes a segmentation layer 33 disposed between the pixel defining layer 32 and the second electrode layer 35. The segmentation layer 33 does not overlap with the pixel defining layer 32, or the orthographic projection of the segmentation layer 33 on the substrate substrate 10 does not overlap with the orthographic projection of the pixel defining layer 32 on the substrate substrate 10, that is, the orthographic projection of the segmentation layer 33 on the substrate substrate 10 and the orthographic projection of the pixel defining layer 32 on the substrate substrate 10 are arranged at intervals, and the orthographic projection of the segmentation layer 33 on the substrate substrate 10 surrounds the orthographic projection of the pixel defining layer 32 on the substrate substrate 10. Through this arrangement, the orthographic projection of the segmentation layer 33 on the substrate substrate 10 forms a closed pattern that surrounds the pixel area at intervals. In addition, the orthographic projection of the surface of the segmentation layer 33 close to the substrate substrate 10 on the substrate substrate 10 falls within the orthographic projection of the surface of the segmentation layer 33 away from the substrate substrate 10 on the substrate substrate 10, that is, the segmentation layer 33 is formed into a "eaves"-like structure with side walls recessed inward. At the same time, each pixel area is provided with a corresponding connecting electrode 312, and the connecting electrode 312 is in contact with the second electrode layer 35 on one side close to its pixel area and the other side opposite to the one side is not in contact with the second electrode layer 35, and the connecting electrode 312 is electrically connected to the source and drain metal layer via a via hole that penetrates the source and drain metal layer.

[0073] Reference Figure 1 and Figure 2 In the example shown, the pattern periphery of the pixel defining layer 32 for defining the pixel area is alternately surrounded by a circle of segmentation layers 33. Optionally, the segmentation layers 33 are in a grid shape, and the cross-sectional shape of the segmentation layers 33 is a trapezoid, and the cross-sectional width away from the base substrate 100 is greater than the cross-sectional width close to the base substrate 100.

[0074] Through this arrangement, the segmentation layer 33 uses the "eaves" structure with recessed sidewalls and the space between it and the pixel definition layer 32 to separate the second electrode layer 35 disposed thereon. Figure 1 and Figure 3 and Figure 4 It can be seen that because the orthographic projection of the splitting layer 33 on the base substrate 10 is a closed pattern surrounding the orthographic projection of the pixel defining layer 32 on the base substrate 10, in the manufacturing process, when the second electrode layer 35 is laid using the Open Mask method, the splitting layer 33 can be used to cut the cathode into independent units corresponding to the pixel areas one by one.

[0075] Optionally, in order to achieve a good cutting effect, the thickness of the separation layer 33 is greater than or equal to 1.5 μm and less than or equal to 2.5 μm.

[0076] It should be noted that the material of the segmentation layer 33 may be a negative photoresist material. In this case, Figures 2 to 4 As shown, the segmentation layer 33 can utilize the characteristics of negative photoresist materials and directly form a trapezoidal structure with a larger upper part and a smaller lower part by using a single material film layer through only a simple exposure and development. The structure and process are simple.

[0077] Of course, those skilled in the art should understand that the present disclosure is not intended to be limited to this. Without considering the complexity of the structure and the manufacturing cost, the material of the split layer 33 is not limited to this, and its cross-sectional shape may not be strictly limited to a trapezoid. For example, the sidewall is curved, the cross-sectional width varies unevenly, and other structures that can meet the requirement of "the orthographic projection of the surface of the split layer close to the substrate on the substrate falls within the orthographic projection of the surface of the split layer far from the substrate on the substrate" are all protected by the present disclosure; in addition, the split layer structure formed by etching selectivity based on other film layers such as barrier layers by means of other manufacturing methods such as wet etching also falls within the scope of protection of the present disclosure.

[0078] Furthermore, a connection electrode 312 is provided in the first electrode layer below the segmentation layer 33, and each connection electrode 312 is electrically connected to only one cathode in a pixel region. In the embodiment of the present disclosure, the pixel region corresponding to the cathode electrically connected to the connection electrode 312 is referred to as the pixel region of the connection electrode 312. Figure 2 As shown, the connecting electrode 312 is electrically connected to the second electrode layer 35 on one side near its pixel area, and the other side opposite to the side is not electrically connected to the second electrode layer 35. At the same time, the connecting electrode 312 is electrically connected to the source and drain metal layer through a via hole that penetrates the source and drain metal layer.

[0079] Through this arrangement, the cathode divided into independent units by the segmentation layer 33 can independently receive electrical signals from the source-drain metal layer using the connecting electrode 312 in the first electrode layer, thereby eliminating the need to set up a pixel circuit with a common cathode for the light-emitting elements, thereby avoiding the influence of the degradation of the light-emitting elements on the driving current in the pixel circuit, and achieving an improvement in the image quality and reliability of the display panel.

[0080] It should be noted that although Figure 1 and Figure 2The orthographic projection of the connecting electrode 312 on the substrate 10 is shown to be circular, but the present application is not limited thereto. In the embodiments of the present disclosure, the function of the connecting electrode 312 is only to form an electrical connection between the cathode and the source and drain metal layer, so as long as this function can be achieved, it is acceptable. In other words, the present disclosure does not limit the shape of the connecting electrode 312, and the area of ​​the connecting electrode 312 should at least be larger than the minimum value of the manufacturing process for opening the via.

[0081] In addition, although Figure 1 The position of the connecting electrode 312 is shown to be on the right side of each anode 311 in the top view and in the middle of the segmentation layer 33, but the present disclosure is not intended to be limited thereto, and its position is limited by the layout position of the specific structure in the source-drain metal layer to be connected. For example, when the cathode needs to be electrically connected to the drain of a transistor in the pixel driving circuit through the connecting electrode 312, the position of the connecting electrode 312 depends on the layout position of the transistor in the actual panel and the specific position of its drain. In addition, although Figure 1 and Figure 2 It is shown that the cathode of one pixel area is electrically connected to one connecting electrode 312 , but the present disclosure is not limited thereto. If necessary, multiple connecting electrodes 312 may be provided, which will not be described in detail herein.

[0082] Continue to refer to Figure 2 As shown, a light-emitting layer 34 is also included between the pixel defining layer 32 and the second electrode layer 35. In the embodiment of the present disclosure, the light-emitting layer 34 represents a general term for multiple film layers other than the electrode layer used for light-emitting elements to emit light. The light-emitting layer 34 may include: a hole injection layer (HIL), a hole transport layer (HTL), a light-emitting material layer, an electron transport layer (ETL) and an electron injection layer (EIL) stacked in sequence on the anode 311. Of course, the film layer combination is not limited, and other film layers except the light-emitting material layer may include at least one of the combinations. The light-emitting material layer may be a material layer in which photoelectric conversion is performed by the recombination of electrons and holes, which may be an organic material and / or an inorganic material that emits a certain color of light.

[0083] The pixel defining layer 32 defines the pixel area by defining the distribution area of ​​the light emitting material layer. Generally, at least one of the other film layers in the light emitting layer 34 except the light emitting material layer is prepared by an Open Mask thermal evaporation process. Figure 2 As shown, the light emitting layer 34 is also divided into a plurality of independent units by using the dividing layers 33 which surround the pixel defining layer 32 at intervals.

[0084] From the perspective of manufacturing process, since the second electrode layer 35 is formed after the light-emitting layer 34, and the light-emitting layer 34 includes a film layer prepared by Open Mask, and the light-emitting layer 34 is formed by the evaporation process, the coverage of the light-emitting layer 34 is naturally divided by the segmentation layer 33, and the evaporation angle of the evaporation process is small, and the cutting position of the light-emitting layer 34 is the "eaves" boundary position of the segmentation layer 33 (see the vertical dotted line). When the second electrode layer 35 formed later is naturally divided by the segmentation layer 33, in order to ensure that one side (or one end) of the connecting electrode 312 is electrically connected to the second electrode layer 35, the second electrode layer 35 is prepared by a sputtering process with a larger angle or by an evaporation process with an adjusted evaporation angle. When the second electrode layer 35 is prepared by the evaporation process, the evaporation angle of the second electrode layer 35 is greater than the evaporation angle of the light-emitting layer 34.

[0085] Through the above arrangement, it can be ensured that the coverage of the end of the second electrode layer 35 divided by the dividing layer 33 is larger than the coverage of the end of the light-emitting layer 34 divided by the dividing layer 33 , so that the second electrode layer 35 can be electrically connected to the connecting electrode 312 .

[0086] Optionally, when the second electrode layer 35 is prepared by a sputtering process, the material of the second electrode layer 35 may be a transparent or translucent metal oxide, such as indium tin oxide (ITO), zinc oxide (ZnO), etc.; when the second electrode layer 35 is formed by an evaporation process, the material of the second electrode layer 35 may be a metal, and a metal film is formed by the evaporation process.

[0087] Alternatively, considering that the second electrode layer 35 may enter under the “eaves” during preparation, the side of the connecting electrode 312 in contact with the second electrode layer 35 extends beyond the side wall of the partition layer 33, and the other side of the connecting electrode 312 is covered by the partition layer 33.

[0088] Through this arrangement, it is possible to ensure that the side (or one end) of the connecting electrode 312 that does not need to be electrically connected to the second electrode layer 35 is isolated from the second electrode layer 35 by the partition layer 33, thereby preventing the electrically isolated cathode unit from being short-circuited by mistake. In addition, the side (or one end) that needs to be electrically connected to the second electrode layer 35 is extended beyond the side wall of the partition layer 33, thereby ensuring the effectiveness of the electrical connection.

[0089] Of course, based on the manufacturing process of setting up the second electrode layer 35, even if the end of the connecting electrode 312 that needs to be electrically connected extends beyond the coverage of the "eaves", it can ensure that the second electrode layer 35 is electrically connected to it. However, when the orthographic projection of the connecting electrode 312 on the base substrate 10 falls within the orthographic projection of the splitting layer 33 on the base substrate 10, it can help to improve the aperture ratio of the light-emitting area.

[0090] Alternatively, refer to Figure 5 As shown in FIG. 1 , when the second electrode layer 35 is formed on the light-emitting layer 34 by the evaporation process, because the evaporation process angle of the evaporation process is small, under the shielding of the “eaves” shaped segmentation layer 33, the second electrode layer 35 usually does not enter the “eaves” boundary range. Figure 5 Shown by the dashed line.

[0091] In this case, preferably, in order to ensure that the cathode can form a good electrical connection with the connecting electrode 312, the orthographic projection of the side of the connecting electrode 312 in contact with the second electrode layer 35 on the base substrate 10 extends beyond the orthographic projection of the segmentation layer 33 on the base substrate 10; on the other hand, the orthographic projection of the other side of the connecting electrode 312 on the base substrate 10 falls within the orthographic projection of the segmentation layer 33 on the base substrate 10. Sufficient electrical isolation is required to ensure that the connecting electrode 312 is not mistakenly connected to other cathodes.

[0092] Of course, in order to ensure that the connection electrode 312 does not have an erroneous connection with other cathodes, the other side of the connection electrode 312 may also be covered by the partition layer 33 .

[0093] Optionally, when the second electrode layer 35 is formed by an evaporation process, the material of the second electrode layer 35 may be a metal, and a metal thin film is formed by the evaporation process.

[0094] Further optionally, referring to Figure 2 As shown, the display panel further includes a driving circuit layer disposed between the base substrate 10 and the first electrode layer. The driving circuit layer includes a thin film transistor T and an auxiliary electrode 253.

[0095] Specifically, refer to Figure 2 As shown, the driving circuit layer may include: an active layer 21 , a dielectric layer 22 (ie, a third insulating layer), a gate layer, a first insulating layer 24 , and a source-drain metal layer stacked on the base substrate 10 .

[0096] Optionally, the active layer 21 is an oxide semiconductor layer, and in this case the display panel is a low temperature polycrystalline silicon oxide (LPTO) technology display panel, or a low temperature polycrystalline silicon oxide and low temperature polycrystalline silicon combination (LPTO+LPTS) display panel.

[0097] The gate layer includes a gate 231 and an electrode plate 232 of a capacitor. The source-drain metal layer includes a source electrode and a drain electrode 251 and 252, and also includes another electrode plate 255 of a capacitor. In a display panel including a pixel driving circuit of an N-type transistor, when the transistor electrically connected to the cathode of the light-emitting element is an N-type transistor, the second electrode layer 35 is electrically connected to the drain electrode 251 via the connecting electrode 312.

[0098] It should be noted that the connection electrode 312 is electrically connected to the drain electrode 251 through the conductive structure in the via hole penetrating the source and drain metal layer. Figure 1 , Figure 2 The conductive structure is shown as a different filling pattern, but it is only intended to distinguish it from the connecting electrode 312. From a process perspective, when forming the first electrode layer, the material of the first electrode layer can form a conductive structure by filling the via hole. Therefore, the material of the conductive structure can be the same as that of the first electrode layer, which will not be described in detail herein.

[0099] Further, the material of the gate layer can be a multilayer metal structure, and the film layer combination can be selected from one of molybdenum / aluminum / molybdenum (Mo / Al / Mo), molybdenum / copper (Mo / Cu), molybdenum-niobium alloy / copper (MoNb / Cu), molybdenum-niobium alloy / copper / molybdenum-titanium alloy (MoNb / Cu / MoTi) or a stack thereof. The first insulating layer 24 can be a gate insulating layer, and the material of the first insulating layer 24 can be other inorganic insulating materials such as silicon oxide, silicon nitride or silicon oxynitride, and the first insulating layer 24 can be a single layer or a multilayer structure. The film layer combination of the source-drain metal layer can be selected from one of Mo / Al / Mo, Mo / Cu, MoNb / Cu, MoNb / Cu / MoTi or a stack thereof, and the source-drain metal layer can be a multilayer structure or a single layer metal structure. The active layer 231, the gate 231, the source 252 and the drain 251 together constitute a thin film transistor T.

[0100] Of course, it should be noted that although Figure 2 The thin film transistor T is shown as a top-gate structure, but this is not intended to be limiting. If the film layer structure conditions of the display panel allow, the thin film transistor T may also be a bottom-gate structure, which is not elaborated here.

[0101] In this example, the anode 311 is electrically connected to the auxiliary electrode 253 via a via penetrating the source-drain metal layer, and the connection electrode 312 is electrically connected to the drain electrode 251 via a via penetrating the source-drain metal layer. The via is provided in the second insulating layer 26 between the source-drain metal layer and the first electrode layer. The second insulating layer 26 may be an organic insulating layer or an inorganic insulating layer. When it is an insulating layer, it may be a planarization layer. Of course, the electrode electrically connected to the connection electrode 312 may also be a source electrode, which will not be described in detail here.

[0102] In the embodiment of the present disclosure, the auxiliary electrode 253 may be in a grid shape, and the anodes 311 of all the light-emitting elements are electrically connected together through the auxiliary electrode 253, and a common driving potential is provided. For example, Figure 1It is shown that the auxiliary electrodes 253 are electrically connected together via the connecting lines 254, and the cathode of the light-emitting element is divided into independent units by the segmentation structure, and is electrically connected to one electrode (for example, the drain) of the thin film transistor T via the connecting electrode 312, thereby realizing the inverted connection of the light-emitting element, so that the degradation of the light-emitting element will not affect the gate-source voltage of the driving transistor in the pixel driving circuit, thereby not affecting the driving current of the pixel driving circuit, thereby achieving the effect of improving the image quality and reliability of the display panel.

[0103] Further references Figure 2 As shown, an electrode (eg, source electrode) 252 of the thin film transistor T that is not electrically connected to the connection electrode 312 can receive a driving signal via other film layers except the driving circuit layer.

[0104] Optionally, the display panel further includes: a light shielding layer disposed between the base substrate 10 and the driving circuit layer, the light shielding layer includes a first signal line 41, and the other of the source and the drain 252 is electrically connected to the first signal line 41 via a via hole penetrating the light shielding layer. Figure 2 As shown, the light shielding layer can also be used to set the substrate of the capacitor, for example, another electrode plate 42 opposite to the electrode plate 232 can be set in the light shielding layer, which is not repeated here. Of course, an insulating layer 50 is also included between the light shielding layer and the driving circuit layer, which is not repeated here.

[0105] In some other optional embodiments, refer to Figure 5 As shown in the figure, the connection electrode 312 is electrically connected to the thin film transistor T by using other conductive film layers as the intermediate film layers.

[0106] Specific reference Figure 5 As shown, the driving circuit layer includes: a gate layer, a first insulating layer 24, a source-drain metal layer, a second insulating layer 26, and a wiring layer stacked in sequence on the base substrate 10. The source-drain metal layer includes a source electrode 251 and a drain electrode 252, and also includes an electrode plate 255 of a capacitor, and the wiring layer includes an auxiliary electrode 272 and a conductive portion 271. Another insulating layer 28 is also included on the wiring layer, and the insulating layer 28 can be a planarization layer.

[0107] The connecting electrode 312 is electrically connected to the conductive portion 271 via a via penetrating the wiring layer, and is electrically connected to one of the source and the drain via the conductive portion 271 through a via provided in the second insulating layer 26. The anode 311 is electrically connected to the auxiliary electrode 272 via a via penetrating the wiring layer.

[0108] Through this configuration, the intermediate film layer between the source-drain metal layer and the first electrode layer, namely the wiring layer, is utilized to increase the wiring space and reduce the chance of signal lines crossing in space, thereby improving parasitic capacitance and enhancing display effects.

[0109] Corresponding to the display panel, an embodiment of the present disclosure further provides a method for manufacturing the display panel described above, comprising:

[0110] Step S1, providing a substrate;

[0111] Step S2, forming a source-drain metal layer on the substrate;

[0112] Step S3, forming a first electrode layer on the source-drain metal layer, the first electrode layer comprising an anode formed in the pixel region and a connection electrode of the pixel region formed on one side of the pixel region;

[0113] Step S4, forming a pixel defining layer on the base substrate, wherein the orthographic projection of the pixel defining layer on the base substrate surrounds the pixel area;

[0114] Step S5, forming a segmentation layer on the pixel definition layer; and

[0115] Step S6: forming a second electrode layer on the segmentation layer by using a sputtering or evaporation process to form a display panel.

[0116] Through this arrangement, by forming a connecting electrode only in the first electrode layer and forming a segmentation layer on the pixel defining layer, the patterning of the first electrode is achieved and the patterned first electrode can be independently electrically connected to the source and drain metal layers, thereby avoiding the influence of degradation of the light-emitting element on the driving current, improving the picture quality and reliability of the display panel, and having simple process steps, low production cost, and broad application prospects.

[0117] Combine the following Figures 6 to 11 ,by Figure 2 As an example, the specific manufacturing method of the display panel shown in FIG. Figure 2 The process of display panel is shown.

[0118] Reference Figure 6 As shown, in step S1, a substrate 10 is provided. The substrate 10 can be a rigid substrate such as glass or quartz, or a flexible substrate. The material of the flexible substrate includes polyimide (PI), PEN, PET, etc. The flexible substrate can be a single-layer structure or a multi-layer structure.

[0119] In addition, a driving circuit layer is formed on the base substrate 10. Before forming the driving circuit layer, a buffer layer may be formed on the base substrate 10, and a light shielding layer and an insulating layer 50 covering the light shielding layer may be formed on the buffer layer. The material of the buffer layer may be SiNx, SiOx, or a composite layer thereof. The light shielding layer is an opaque metal layer, and the insulating layer 50 is SiNx, SiOx, or a composite layer thereof.

[0120] The driving circuit layer includes an active layer 21 , a dielectric layer 22 (ie, a third insulating layer), a gate layer, a first insulating layer 24 , and a source-drain metal layer.

[0121] The gate layer includes a gate 231 and an electrode plate 232 of a capacitor. The source-drain metal layer includes a source and a drain 251 and 252. In a display panel including a pixel driving circuit of an N-type transistor, when the transistor electrically connected to the cathode of the light-emitting element is an N-type transistor, the second electrode layer 35 is electrically connected to the drain 251 via the connecting electrode 312. The material of the gate layer can be a multilayer metal structure, and the film layer combination can be selected from one of molybdenum / aluminum / molybdenum (Mo / Al / Mo), molybdenum / copper (Mo / Cu), molybdenum-niobium alloy / copper (MoNb / Cu), molybdenum-niobium alloy / copper / molybdenum-titanium alloy (MoNb / Cu / MoTi) or a stack thereof. The first insulating layer 24 can be a gate insulating layer, and the material of the first insulating layer 24 can be other inorganic insulating materials such as silicon oxide, silicon nitride or silicon oxynitride, and the first insulating layer 24 can be a single layer or a multilayer structure. The film layer combination of the source and drain metal layer can be selected from one of Mo / Al / Mo, Mo / Cu, MoNb / Cu, MoNb / Cu / MoTi, etc. or a stack thereof, and the source and drain metal layer can be a multi-layer structure or a single-layer metal structure. The active layer 231, the gate 231, the source 252 and the drain 251 together constitute a thin film transistor T.

[0122] After forming the source and drain metal layers in step S2, refer to Figure 7 As shown, a second insulating layer 26 is deposited on the source-drain metal layer, and a plurality of vias are formed in the second insulating layer 26. The second insulating layer 26 may be a planarization layer, but the present disclosure is not intended to be limiting.

[0123] In step S3 , a first electrode layer is formed on the source-drain metal layer, and the first electrode layer includes an anode 311 formed in the pixel region and a connection electrode 312 of the pixel region formed on one side of the pixel region.

[0124] The manufacturing process of the first electrode layer can be an evaporation or sputtering process. This step can be performed through a single patterning process, so that the formation of the connecting electrode 312 does not increase the process steps compared to the prior art.

[0125] In step S4, refer to Figure 8 As shown, a pixel defining layer 32 is formed on the base substrate 10 , and the orthographic projection of the pixel defining layer on the base substrate 10 surrounds the pixel area.

[0126] In S5 , a segmentation layer 33 is formed on the pixel defining layer 32 .

[0127] Specifically, refer to Fig. 9As shown, a partition material layer 33 - 1 is coated on the pixel defining layer 32 . The partition material layer 33 - 1 is made of a negative photoresist material. The thickness of the partition material layer 33 - 1 may be greater than or equal to 1.5 μm and less than or equal to 2.5 μm.

[0128] Next, refer to Fig.10 As shown, the partition material layer 33 - 1 is patterned by exposure and development processes to form a partition layer 33 .

[0129] With this configuration, the characteristics of the negative photoresist can be utilized, and the segmentation layer 33 which surrounds the pixel definition layer 32 at intervals can be formed only by exposure and development of dry etching.

[0130] In step S6 , a second electrode layer is formed on the segmentation layer by using an evaporation process to form a display panel.

[0131] Specifically, refer to Fig.11 As shown, a light emitting layer 34 is formed by vapor deposition on the segmentation layer 33, and then Figure 2 As shown, the second electrode layer 35 is formed on the light-emitting layer by using an evaporation process, wherein the evaporation angle of the light-emitting layer 34 is greater than the evaporation angle of the second electrode layer 35 .

[0132] By adjusting the relationship between the evaporation angles of the second electrode layer and the light-emitting layer, it is possible to ensure that when the second electrode layer 35 is formed by the evaporation process with a larger process angle, the coverage area of ​​the second electrode layer 35 is greater than the coverage area of ​​the light-emitting layer 34, thereby ensuring that the second electrode layer 35 can pass over the cross section of the light-emitting layer 34 to form a good electrical connection with the connecting electrode 312 (refer to Fig.11 and Figure 2 The area within the dotted ellipse).

[0133] It should be noted that for the step of forming the second electrode layer by the sputtering process, since the sputtering angle is small and the connecting electrode will extend beyond the boundary of the "eaves", a good electrical connection can be formed without considering the adjustment of the angle, which is not elaborated in this article.

[0134] Based on the same inventive concept, an embodiment of the present application further provides a display device, including the display panel described in the above embodiment. Since the display panel included in the display device provided in the embodiment of the present application corresponds to the display panel provided in the above embodiment, the previous implementation is also applicable to the display device provided in this embodiment, and will not be described in detail in this embodiment.

[0135] In this embodiment, the display device can be any product or component with display function, such as a vehicle-mounted display device, a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame or a navigator. When the above display panel is used in a display device, the display quality and reliability can be significantly improved.

[0136] In response to the current existing problems, the present application develops a display panel and a method for manufacturing the same, as well as a display device. By providing a connecting electrode arranged in the first electrode layer in cooperation with a segmentation layer arranged on the pixel defining layer, the first electrode is patterned and the patterned first electrode can be independently electrically connected to the source and drain metal layer, thereby avoiding the influence of the degradation of the light-emitting element on the driving current, improving the image quality and reliability of the display panel, and at the same time, the film layer structure is simple, the process cost is low, and it has broad application prospects.

[0137] Obviously, the above embodiments of the present application are merely examples for clearly illustrating the present application, and are not limitations on the implementation methods of the present application. For ordinary technicians in the relevant field, other different forms of changes or modifications can be made based on the above description. It is impossible to list all the implementation methods here. All obvious changes or modifications derived from the technical solution of the present application are still within the scope of protection of the present application.

Claims

1. A display panel, characterized in that: include: A substrate, comprising a plurality of pixel regions arranged at intervals; A source-drain metal layer is formed on the substrate; A first electrode layer formed on the source-drain metal layer, the first electrode layer comprising an anode formed in the pixel region and a connection electrode of the pixel region formed on one side of the pixel region; A pixel defining layer is formed on the first electrode layer, wherein an orthographic projection of the pixel defining layer on the base substrate surrounds the pixel region; A segmentation layer is formed on the pixel definition layer, wherein the orthographic projection of the segmentation layer on the base substrate does not overlap with the orthographic projection of the pixel definition layer on the base substrate, and the orthographic projection of the segmentation layer on the base substrate surrounds the orthographic projection of the pixel definition layer on the base substrate; as well as a second electrode layer formed on the segmentation layer, The orthographic projection of the surface of the segmentation layer close to the base substrate on the base substrate falls within the orthographic projection of the surface of the segmentation layer far from the base substrate on the base substrate, one side of the connection electrode close to its pixel area is in contact with the second electrode layer, and the other side opposite to the one side is not in contact with the second electrode layer, The connection electrode is electrically connected to the source-drain metal layer via a via hole penetrating the source-drain metal layer.

2. The display panel according to claim 1, characterized in that: Also includes: A driving circuit layer is provided between the base substrate and the first electrode layer, The driving circuit layer includes a thin film transistor and an auxiliary electrode, the source and drain of the thin film transistor and the auxiliary electrode are arranged in the source and drain metal layer, The anode is electrically connected to the auxiliary electrode via a via hole penetrating the source-drain metal layer, and the connection electrode is electrically connected to one of the source electrode and the drain electrode via a via hole penetrating the source-drain metal layer.

3. The display panel according to claim 1, characterized in that: Also includes: A driving circuit layer is provided between the base substrate and the first electrode layer, The driving circuit layer includes a thin film transistor and an auxiliary electrode, and the driving circuit layer includes: a gate layer, a first insulating layer, the source and drain metal layer, a second insulating layer, and a wiring layer stacked in sequence on the base substrate. The source and drain of the thin film transistor are arranged in the source-drain metal layer, the auxiliary electrode is arranged in the wiring layer, and the wiring layer further includes a conductive part. The connecting electrode is electrically connected to the conductive portion via a via hole penetrating the wiring layer, and is electrically connected to one of the source and the drain via the conductive portion through a via hole arranged in the second insulating layer. The anode is electrically connected to the auxiliary electrode via a via hole penetrating the wiring layer.

4. The display panel according to claim 1, characterized in that: A side surface of the connecting electrode in contact with the second electrode layer extends beyond a side wall of the partition layer, and the other side surface of the connecting electrode is covered by the partition layer.

5. The display panel according to claim 2 or 3, characterized in that: The driving circuit layer further includes: an active layer formed between the base substrate and the source-drain metal layer, wherein the active layer is an oxide semiconductor layer, and / or, The thin film transistor is an N-type transistor.

6. The display panel according to claim 1, characterized in that: The thickness of the separation layer is greater than or equal to 1.5 μm and less than or equal to 2.5 μm.

7. The display panel according to claim 1, characterized in that: The material of the segmentation layer is a negative photoresist material.

8. The display panel according to claim 1, characterized in that: The orthographic projection of the segmentation layer on the base substrate is in a grid shape.

9. The display panel according to claim 2 or 3, characterized in that: The orthographic projection of the auxiliary electrode on the base substrate is in a grid shape.

10. The display panel according to claim 2 or 3, characterized in that: Also includes: A light shielding layer is provided between the base substrate and the driving circuit layer, The driving circuit layer includes: an active layer, a third insulating layer, a gate layer and the source-drain metal layer stacked in sequence on the base substrate, the light shielding layer includes a first signal line, The other of the source and the drain is electrically connected to the first signal line via a via hole penetrating through the light shielding layer.

11. A display device, characterized in that: A display panel comprising any one of claims 1-10.

12. A method for manufacturing a display panel according to any one of claims 1 to 10, characterized in that: include: Providing the substrate; forming the source-drain metal layer on the base substrate; forming the first electrode layer on the source-drain metal layer, wherein the first electrode layer includes an anode formed in the pixel region and a connection electrode of the pixel region formed on one side of the pixel region; forming the pixel definition layer on the base substrate, wherein the orthographic projection of the pixel definition layer on the base substrate surrounds the pixel region; forming the segmentation layer on the pixel defining layer; as well as The second electrode layer is formed on the segmentation layer by using a sputtering or evaporation process to form the display panel.

13. The manufacturing method according to claim 12, characterized in that: When the second electrode layer is formed on the segmentation layer by an evaporation process, the method further comprises: forming a light-emitting layer by evaporation on the segmentation layer; and forming the second electrode layer on the light-emitting layer by using an evaporation process, Wherein, the evaporation angle of the light-emitting layer is greater than the evaporation angle of the second electrode layer.

14. The manufacturing method according to claim 12, characterized in that: The forming of the segmentation layer on the pixel defining layer further comprises: coating a segmentation material layer on the pixel definition layer, wherein the segmentation material layer is made of a negative photoresist material; and The partition material layer is patterned by exposure and development processes to form the partition layer.

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