Method of depositing molybdenum metal film on dielectric surface of substrate by cyclic deposition process and associated semiconductor device structure

Abstract

Methods of depositing a molybdenum metal film on a dielectric surface of a substrate by a cyclic deposition process and associated semiconductor device structures are disclosed. The method may include placing a substrate including a dielectric surface into a reaction chamber; directly depositing a nucleation film on the dielectric surface; then depositing a molybdenum metal film directly on the nucleating film, wherein depositing the molybdenum metal film comprises: contacting the substrate with a first gas phase reactant comprising a molybdenum halide precursor; the substrate is then contacted with a second gas phase reactant comprising a reducing agent precursor. Semiconductor device structures including a molybdenum metal film disposed on a surface of a dielectric material with an intermediate nucleation film are also disclosed.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to the following applications: U.S. non-provisional patent application No. 15 / 691,241, entitled “Layer Forming Method,” filed on August 30, 2017; U.S. provisional patent application No. 62 / 607,070, entitled “Layer Forming Method,” filed on December 18, 2017; and U.S. provisional patent application No. 62 / 619,579, entitled “Deposition Method,” filed on January 19, 2018. Technical Field

[0003] The present disclosure generally relates to methods for depositing a molybdenum metal film on a dielectric surface of a substrate, and more particularly to methods for directly depositing a nucleation film on a dielectric surface and then directly depositing a molybdenum metal film on the nucleation film. The present disclosure also generally relates to semiconductor device structures including a molybdenum metal film disposed directly on a nucleation film disposed directly on a surface of a dielectric material. Background Art

[0004] Semiconductor device manufacturing processes in advanced technology nodes generally require state-of-the-art deposition methods for forming metal films such as tungsten metal films and copper metal films.

[0005] A common requirement for depositing metal films is that the deposition process must be extremely conformal. For example, conformal deposition is often required to uniformly deposit metal films on three-dimensional structures that include high aspect ratio features. Another common requirement for depositing metal films is that the deposition process be able to deposit ultra-thin films that are continuous over large substrate areas. In the specific case where the metal film is conductive, it may be necessary to optimize the deposition process to produce a low resistivity film.

[0006] Low resistivity metal films commonly used in current state-of-the-art semiconductor device applications may include tungsten (W) metal films and / or copper (Cu) metal films. However, tungsten metal films and copper metal films often require a thick barrier layer to be provided between the metal film and the dielectric material. Such a thick barrier layer can be used to prevent metal substances from diffusing into the underlying dielectric material, thereby improving device reliability and device yield. However, such a thick barrier layer often exhibits a high resistivity, thereby increasing the overall resistivity of the semiconductor device structure.

[0007] Cyclic deposition processes, such as atomic layer deposition (ALD) and cyclic chemical vapor deposition (CCVD), sequentially introduce one or more precursors (reactants) into a reaction chamber where they react with the substrate surface one at a time in a sequential manner. Cyclic deposition processes have been shown to produce metal films with extremely good conformality using atomic-level thickness control.

[0008] It is therefore desirable to develop methods and associated device structures for depositing and utilizing low resistivity metal films deposited on dielectric materials via conformal cyclic deposition processes. Summary of the invention

[0009] This summary is provided to introduce a series of concepts in a simplified form. These concepts are further described in detail below in the detailed description of the example embodiments of the present disclosure. This summary is not intended to identify the key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.

[0010] In some embodiments, methods for depositing a molybdenum metal film on a dielectric surface of a substrate by a cyclic deposition process are provided. These methods may include: placing a substrate including a dielectric surface into a reaction chamber; depositing a nucleation film directly on the dielectric surface; and then depositing a molybdenum metal film directly on the nucleation layer, wherein depositing the molybdenum metal film includes: contacting the substrate with a first gas phase reactant including a molybdenum halide precursor; and then contacting the substrate with a second gas phase reactant including a reducing agent precursor.

[0011] In some embodiments, semiconductor device structures are provided. These semiconductor device structures may include: a substrate including a dielectric surface; a nucleation film disposed directly on the dielectric surface; and a molybdenum metal film disposed directly on the nucleation film.

[0012] For the purpose of summarizing the present invention and the advantages achieved over the prior art, certain objects and advantages of the present invention are described above. Of course, it should be understood that not all such objects or advantages may be achieved according to any particular embodiment of the present invention. Thus, for example, one skilled in the art will recognize that the present invention may be implemented or carried out in a manner that achieves or optimizes one advantage or group of advantages as taught or suggested herein, but does not necessarily achieve other objects or advantages as may be taught or suggested herein.

[0013] All of these embodiments are intended to be within the scope of the invention disclosed herein. These and other embodiments will become apparent to those skilled in the art from the following detailed description of certain embodiments with reference to the accompanying drawings, the invention not being limited to any particular embodiment disclosed. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Although this specification ends with claims that specifically point out and distinctly claim what are considered to be various embodiments of the present invention, the advantages of various embodiments of the present disclosure may be more readily ascertained from the description of certain examples of various embodiments of the present disclosure when read in conjunction with the accompanying drawings, in which:

[0015] Figure 1 A non-limiting exemplary process flow according to various embodiments of the present disclosure is presented, thereby demonstrating a method for depositing a nucleation film directly on a dielectric surface and subsequently depositing a molybdenum metal film directly on the nucleation film;

[0016] Figure 2 A non-limiting exemplary process flow according to various embodiments of the present disclosure is presented, thereby demonstrating a cyclic deposition process for directly depositing a nucleation film on a dielectric surface;

[0017] Figure 3 A non-limiting exemplary process flow according to various embodiments of the present disclosure is presented, thereby demonstrating a cyclic deposition process for depositing a molybdenum metal film directly on a nucleation film;

[0018] Figure 4A , Figure 4B and Figure 4C A schematic cross-sectional view of a semiconductor device structure formed during a process of directly depositing a nucleation film on a dielectric surface having vertical gap features and then directly depositing a molybdenum metal film on the nucleation film according to various embodiments of the present disclosure is shown; and

[0019] Figure 5A , Figure 5B and Figure 5C A schematic cross-sectional view of a semiconductor device structure formed during a process of directly depositing a nucleation film on a dielectric surface having horizontal gap features and then directly depositing a molybdenum metal film on the nucleation film according to various embodiments of the present disclosure is shown; and

[0020] Figure 6 The rms surface roughness (R) of a molybdenum metal film deposited directly on a dielectric surface and a molybdenum metal film deposited on a dielectric surface using an intermediate nucleation film according to various embodiments of the present disclosure is shown. a ). DETAILED DESCRIPTION

[0021] Although certain embodiments and examples are disclosed below, it will be appreciated by those skilled in the art that the invention extends beyond the specifically disclosed embodiments and / or uses of the invention and obvious modifications and equivalents thereof. Therefore, it is intended that the scope of the invention disclosed should not be limited by the specific disclosed embodiments described below.

[0022] The illustrations presented herein are not meant to be actual views of any particular material, structure, or device but are merely idealized illustrations used to describe various embodiments of the present disclosure.

[0023] As used herein, the term "substrate" may refer to any underlying material or materials that may be used or upon which a device, circuit, or film may be formed.

[0024] As used herein, the term "cyclic deposition" may refer to sequentially introducing one or more precursors (reactants) into a reaction chamber to deposit a film on a substrate, and includes deposition techniques such as atomic layer deposition and cyclic chemical vapor deposition.

[0025] As used herein, the term "cyclic chemical vapor deposition" may refer to any process in which a substrate is sequentially exposed to one or more volatile precursors that react and / or decompose on the substrate to produce the desired deposition.

[0026] As used herein, the term "atomic layer deposition" (ALD) may refer to a vapor deposition process in which a deposition cycle (preferably a plurality of consecutive deposition cycles) is performed in a reaction chamber. Typically, during each cycle, a precursor is chemically adsorbed to a deposition surface (e.g., a substrate surface or a previously deposited underlying surface, such as material from a previous ALD cycle) to form a monolayer or sub-monolayer that is not susceptible to reaction with additional precursors (i.e., a self-limiting reaction). Thereafter, if desired, a reactant (e.g., another precursor or a reactive gas) may be subsequently introduced into the process chamber for converting the chemically adsorbed precursor to the desired material on the deposition surface. Typically, this reactant is capable of further reacting with the precursor. In addition, a flushing step may also be utilized during each cycle to remove excess precursor from the process chamber after converting the chemically adsorbed precursor and / or to remove excess reactant and / or reaction byproducts from the process chamber. In addition, the term "atomic layer deposition" as used herein is also intended to include those processes designated by related terms such as "chemical vapor atomic layer deposition", "atomic layer epitaxy" (ALE), molecular beam epitaxy (MBE), gas source MBE or organometallic MBE and chemical beam epitaxy when performed using alternating pulses of one or more precursor compositions, reactant gases, and purge (e.g., inert carrier) gases.

[0027] As used herein, the terms "membrane" and "film" may refer to any continuous or discontinuous structure and material formed using the methods disclosed herein. For example, "membrane" and "film" may include 2D materials, nanolaminated materials, nanorods, nanotubes or nanoparticles, or even partial or complete molecular layers, or partial or complete atomic layers or atomic clusters and / or molecular clusters. "Membrane" and "film" may include materials or layers that have small holes but are still at least partially continuous.

[0028] As used herein, the term "compound material" may refer to a material including two or more different elements chemically combined.

[0029] As used herein, the term "binary compound material" may refer to a material consisting essentially of two different elements. Although the term "binary compound material" may refer to a material consisting essentially of two different elements, it should be noted that the binary compound material may also contain trace amounts of impurity elements.

[0030] As used herein, the term "silicon binary compound material" may refer to a material consisting essentially of silicon atoms and additional different elements. Although the term "silicon binary compound material" may refer to a material consisting essentially of silicon atoms and additional different elements, it should be noted that the silicon binary compound material may also contain trace amounts of impurity elements.

[0031] As used herein, the term "molybdenum binary compound material" may refer to a material consisting essentially of molybdenum atoms and additional different elements. Although the term "molybdenum binary compound material" may refer to a material consisting essentially of molybdenum atoms and additional different elements, it should be noted that the molybdenum binary compound material may also contain trace amounts of impurity elements.

[0032] As used herein, the term "molybdenum halide precursor" may refer to a reactant including at least a molybdenum component and a halide component, wherein the halide component may include one or more of a chlorine component, an iodine component, or a bromine component.

[0033] As used herein, the term "molybdenum chalcogenide halide" may refer to a reactant comprising at least a molybdenum component, a halide component, and a chalcogenide component, wherein the chalcogenide is an element of Group IV of the periodic table, including oxygen (O), sulfur (S), selenium (Se), and tellurium (Te).

[0034] As used herein, the term "molybdenum oxyhalide" may refer to a reactant including at least a molybdenum component, an oxygen component, and a halide component.

[0035] As used herein, the term "reductant precursor" may refer to a reactant that donates electrons to another species in a redox chemical reaction.

[0036] As used herein, the term "crystalline film" may refer to a film that shows at least a short-range ordered crystalline structure, or even a long-range ordered crystalline structure, and includes not only a polycrystalline film but also a single crystal film.

[0037] As used herein, the term "gap feature" may refer to an opening or cavity disposed between two surfaces of an uneven surface. The term "gap feature" may refer to an opening or cavity disposed between relatively inclined sidewalls of two protrusions extending vertically from a substrate surface or between relatively inclined sidewalls of a depression extending vertically into a substrate surface, and such gap features may be referred to as "vertical gap features". The term "gap feature" may also refer to an opening or cavity disposed between two opposing substantially horizontal surfaces, the two horizontal surfaces defining a horizontal opening or cavity; such gap features may be referred to as "horizontal gap features".

[0038] As used herein, the term "seam" may refer to a line or one or more voids formed due to edges formed in adjacent gap-fill metals, and a "seam" may be confirmed using a scanning transmission electron microscope (STEM) or a transmission electron microscope (TEM), wherein a "seam" is said to exist if the observation results reveal the presence of a clear vertical line or one or more vertical voids in a vertical gap-fill metal, or a clear horizontal line or one or more horizontal voids in a horizontal gap-fill metal.

[0039] Although a number of example materials are given throughout the various embodiments of the present disclosure, it should be noted that the chemical formula given for each of these example materials should not be construed as limiting, and the non-limiting example materials given should not be limited by the example stoichiometries given.

[0040] The present disclosure includes a method for depositing a molybdenum metal film on the surface of a dielectric material using an intermediate nucleation film, the intermediate nucleation film being directly disposed on the surface of the dielectric material. The molybdenum metal film can be utilized in many applications, such as low-resistivity gap fill, a liner layer for 3D-NAND, DRAM word line features, or as an interconnect material in CMOS logic applications. Since the molybdenum metal film can be deposited on the dielectric surface using an intermediate nucleation film (i.e., without using a high-resistivity liner layer), it can allow interconnects in logic applications (i.e., CMOS structures) and word lines / bit lines in memory applications (such as 3D-NAND structures and DRAM structures) to have lower effective resistivity.

[0041] Therefore, various embodiments of the present disclosure may include methods for depositing a molybdenum metal film on a dielectric surface of a substrate using an intermediate nucleation film. These methods may include: placing a substrate including a dielectric surface into a reaction chamber; depositing a nucleation film directly on the dielectric surface; and then depositing a molybdenum metal film directly on the nucleation film, wherein depositing the molybdenum metal film includes: contacting the substrate with a first gas phase reactant including a molybdenum halide precursor; and then contacting the substrate with a second gas phase reactant including a reducing agent precursor.

[0042] Reference Figure 1 An exemplary process 100 for depositing a molybdenum metal film on a dielectric surface with an intermediate nucleation film is shown. The exemplary process 100 may include two deposition processes, namely: a first deposition process for directly depositing a nucleation film on the surface of a dielectric material, and a second deposition process for directly depositing a molybdenum metal film on the nucleation film.

[0043] In more detail and refer to Figure 1 , the exemplary process 100 may begin with process block 110, which includes placing a substrate including a dielectric surface into a reaction chamber.

[0044] In some embodiments of the present disclosure, the substrate may include a patterned substrate including high aspect ratio features, such as groove structures, horizontal gaps, and / or fin structures. For example, the substrate may include one or more substantially vertical gap features and / or one or more substantially horizontal gap features. The term "gap feature" may refer to an opening or cavity disposed between relatively inclined sidewalls of two protrusions extending vertically from the substrate surface or between relatively inclined sidewalls of a depression extending vertically into the substrate surface, such a gap feature may be referred to as a "vertical gap feature". The term "gap feature" may also refer to an opening or cavity disposed between two relatively substantially horizontal surfaces, which define a horizontal opening or cavity; such a gap feature may be referred to as a "horizontal gap feature". It should be noted that the various embodiments of the present disclosure are not limited to filling vertical gap features and / or horizontal gap features, and gap features disposed in and / or on the substrate and having other geometric shapes may be filled with molybdenum metal by the process disclosed herein.

[0045] In some embodiments of the present disclosure, the substrate may include one or more Figure 4A 4 shows a semiconductor device structure 400 including a substrate 402 including a dielectric material having a high aspect ratio vertical gap feature 404 disposed therein. In some embodiments, one or more vertical gap features may have an aspect ratio (height:width) that is greater than 2:1, or greater than 5:1, or greater than 10:1, or greater than 25:1, or greater than 50:1, or even greater than 100:1, where "greater than" as used in this example refers to a greater distance in the height of the gap feature.

[0046] In some embodiments of the present disclosure, the substrate may include one or more Figure 5AThe figure shows a semiconductor device structure 500 including a substrate 502 including a dielectric material having a high aspect ratio horizontal gap feature 504 disposed therein. In some embodiments, one or more horizontal gap features can have an aspect ratio (height:width) that can be greater than 1:2, or greater than 1:5, or greater than 1:10, or greater than 1:25, or greater than 1:50, or even greater than 1:100, where "greater than" as used in this example refers to a greater distance in the width of the gap feature.

[0047] The substrate may include one or more materials and material surfaces, including but not limited to semiconductor materials, dielectric materials, and metallic materials.

[0048] In some embodiments, the substrate may include a semiconductor material such as, but not limited to, silicon (Si), germanium (Ge), germanium tin (GeSn), silicon germanium (SiGe), silicon germanium tin (SiGeSn), silicon carbide (SiC), or a Group III-V semiconductor material.

[0049] In some embodiments, the substrate may include a metallic material such as, but not limited to, pure metals, metal nitrides, metal carbides, metal borides, and mixtures thereof.

[0050] In some embodiments, the substrate may include a dielectric material such as, but not limited to, a silicon-containing dielectric material and a metal oxide dielectric material. In some embodiments, the substrate may include one or more dielectric surfaces including a silicon-containing dielectric material such as, but not limited to, silicon dioxide (SiO 2 ), silicon low value oxide, silicon nitride (Si 3 N 4 ), silicon oxynitride (SiON), silicon oxycarbide (SiOC), silicon oxycarbonitride (SiOCN), silicon carbonitride (SiCN). In some embodiments, the substrate may include one or more dielectric surfaces including a metal oxide such as, but not limited to, aluminum oxide (Al 2 O 3 ), hafnium oxide (HfO 2 ), Tantalum Oxide (Ta 2 O 5 )、ZrO 2 ), titanium oxide (TiO 2 ), Hafnium Silicate (HfSiO x ) and lanthanum oxide (La 2 O 3 ).

[0051] In some embodiments of the present disclosure, the substrate may include an engineered substrate in which a surface semiconductor layer is disposed on a bulk support with an intervening buried oxide (BOX) disposed therebetween.

[0052] Patterned substrates may include substrates that may include semiconductor device structures formed into or on the surface of the substrate, for example, patterned substrates may include fabricated and / or partially fabricated semiconductor device structures, such as transistors and / or memory elements. In some embodiments, the substrate may include a single crystal surface and / or one or more secondary surfaces, which may include non-single crystal surfaces, such as polycrystalline surfaces and / or amorphous surfaces. The single crystal surface may include, for example, one or more of silicon (Si), silicon germanium (SiGe), germanium tin (GeSn) or germanium (Ge). A polycrystalline surface or an amorphous surface may include a dielectric material, such as an oxide, an oxynitride, an oxycarbon, an oxycarbon nitride, a nitride, or a mixture thereof.

[0053] The substrate can be set into one or more reaction chambers, which are configured to deposit a nucleation film directly on the surface of the dielectric material and to deposit a molybdenum metal film directly on the nucleation film. In some embodiments, the nucleation film can be directly deposited on the dielectric surface by one or more of a chemical vapor deposition (CVD) process, an immersion process, a plasma enhanced chemical vapor deposition (PECVD) process, or a physical vapor deposition (PVD) process. In multiple specific embodiments of the present disclosure, both the nucleation film and the molybdenum film can be deposited using a cyclic deposition process, because inherent conformality can be achieved using a cyclic deposition process, and the cyclic deposition process is capable of forming a conformal film including one or more high aspect ratio features (including but not limited to vertical gap features and / or horizontal gap features) on an uneven substrate.

[0054] Therefore, a reactor or reaction chamber capable of being used to deposit a molybdenum metal film on a dielectric surface with an intermediate nucleation film can be configured to perform a cyclic deposition process, such as an atomic layer deposition process or a cyclic chemical vapor deposition process. Therefore, a reactor or reaction chamber suitable for performing multiple embodiments of the present disclosure may include an ALD reactor configured to provide a precursor and a CVD reactor. According to some embodiments, a showerhead reactor can be used. According to some embodiments, a cross-flow reactor, a batch reactor, a small batch reactor, or a spatial ALD reactor can be used.

[0055] In some embodiments of the present disclosure, a batch reactor may be used. In some embodiments, a vertical batch reactor may be used. In other embodiments, the batch reactor includes a small batch reactor configured to accommodate 10 or less wafers, 8 or less wafers, 6 or less wafers, 4 or less wafers, or 2 or less wafers. In some embodiments using a batch reactor, the wafer-to-wafer non-uniformity is less than 3% (1 sigma), less than 2%, less than 1%, or even less than 0.5%.

[0056] The exemplary process of depositing a molybdenum metal film fill using an intermediate nucleation film as described herein can optionally be performed in one or more reactors or one or more reaction chambers connected to a combination equipment tool. In a combination equipment tool, because each reaction chamber is dedicated to one type of process, the temperature of the reaction chamber in each module can be kept constant, which increases throughput compared to a reactor in which the substrate is heated to a high process temperature before each run. In addition, in a combination equipment tool, it is possible to shorten the time to pressurize the reaction chamber to the desired process pressure level with a pump between any two substrates. In some embodiments of the present disclosure, the exemplary process disclosed herein can be performed in a combination equipment tool including multiple reaction chambers, wherein each individual reaction chamber can be used to expose the substrate to a separate precursor gas, and the substrate can be transferred between different reaction chambers for exposure to multiple precursor gases, and the transfer of the substrate is performed in a controlled ambient environment to prevent substrate oxidation / contamination. For example, depositing a nucleation film may be performed by a cyclic deposition process in a first reaction chamber associated with a cluster tool, while depositing a molybdenum film may be performed by a cyclic deposition process in a second reaction chamber associated with the same cluster tool, with transfers between the first reaction chamber and the second reaction chamber occurring in a controlled environment to prevent contamination or degradation of the substrate and associated film. In some embodiments of the present disclosure, the processes of the present disclosure may be performed in a cluster tool comprising a plurality of reaction chambers, wherein each individual reaction chamber may be configured to heat the substrate to a different temperature.

[0057] In some embodiments, the exemplary process of depositing a nucleation film directly on a dielectric surface and depositing a molybdenum metal film directly on the nucleation film can be performed in a single independent reactor, which can be equipped with a load lock. In this case, it is not necessary to cool down the reaction chamber between each run.

[0058] Once the substrate is placed in a suitable reaction chamber (e.g., a reaction chamber configured for a cyclic deposition process), Figure 1 The exemplary process 100 may then proceed with process block 120, which includes depositing a nucleation film directly on a dielectric surface. Figure 2Process block 120 and the sub-processes that make up that process block are described in greater detail, and the figure illustrates an exemplary non-limiting cyclic deposition process for depositing a nucleation film directly on a dielectric surface.

[0059] In more detail, the deposition process for directly depositing the nucleation film on the dielectric surface can be continued with the aid of subprocess 210, which includes heating the substrate to a desired deposition temperature. For example, the substrate can be heated to a substrate temperature below about 800° C., or below about 700° C., or below about 600° C., or below about 500° C., or below about 400° C., or below about 300° C., or even below about 200° C. In some embodiments of the present disclosure, the substrate temperature during the cyclic deposition process of process block 120 can be between 250° C. and 800° C., or between 300° C. and 600° C., or between 550° C. and 600° C.

[0060] In some embodiments, the deposition temperature for depositing the nucleation film can depend on the composition of the material being deposited. For example, in some embodiments of the present disclosure, the nucleation film can include a compound material, that is, a material comprising at least two different elements. In some embodiments, the compound material can include a binary compound material, that is, a material consisting essentially of two different elements and trace impurity elements. In some embodiments, the compound can include a ternary compound material, that is, a material consisting essentially of three different elements and trace impurity elements.

[0061] In some embodiments, the binary compound material may include a silicon binary compound material, wherein the silicon compound material consists essentially of silicon atoms and different elements and trace impurity elements. For example, in some embodiments, the silicon binary compound material may include silicon nitride (e.g., Si 3 N 4 ), silicon carbide (e.g., SiC), or silicon oxide (e.g., SiO 2 In such example embodiments, the temperature of the substrate during deposition of the nucleation layer comprising the silicon binary compound material may be below about 500° C., or below about 400° C., or below about 300° C., or below about 250° C., or even below about 200° C.

[0062] In some embodiments, the binary compound material may include a molybdenum binary compound material, wherein the molybdenum compound material is substantially composed of molybdenum atoms and different elements and trace impurity elements. For example, in some embodiments, the molybdenum binary compound material may include at least one of molybdenum nitride, molybdenum carbide, molybdenum oxide, or molybdenum silicide. In such example embodiments, the temperature of the substrate during the deposition of the nucleation film containing the molybdenum binary compound material may be less than about 700°C, or less than about 600°C, or less than about 500°C, or less than about 400°C, or even less than about 300°C. In some embodiments, the deposition of the nucleation film containing the molybdenum binary compound material may be performed at a substrate temperature between 300°C and 600°C, or between 400°C and 500°C.

[0063] In some embodiments of the present disclosure, the nucleation film may include a ternary compound, such as a silicon ternary compound (e.g., SiCN, SiON) or a molybdenum ternary compound (e.g., MoON, MoSiO). In such embodiments, the temperature of the substrate during deposition of the ternary compound may be below about 700°C, or below about 600°C, or below about 500°C, or below about 400°C, or even below about 300°C.

[0064] In addition, in order to achieve the desired deposition temperature (i.e., the desired substrate temperature), the exemplary atomic layer deposition process for directly depositing the nucleation film on the dielectric surface (i.e., process box 120) can also adjust the pressure in the reaction chamber during deposition so as to obtain the ideal characteristics of the nucleation film directly located on the dielectric surface. For example, in some embodiments of the present disclosure, the exemplary cyclic deposition process can be performed in a reaction chamber adjusted to a reaction chamber pressure of less than 300 Torr, or less than 200 Torr, or less than 100 Torr, or less than 50 Torr, or less than 25 Torr, or less than 15 Torr, or even less than 1 Torr. In some embodiments, the pressure in the reaction chamber during the deposition of the nucleation film can be adjusted at a pressure between 1 Torr and 300 Torr, or between 1 Torr and 50 Torr, or between 1 Torr and 15 Torr, or even equal to or greater than 30 Torr.

[0065] Once the substrate has been heated to the desired temperature and the pressure within the reaction chamber has been adjusted to the desired level, the exemplary process for directly depositing a nucleation film on a dielectric surface may proceed with a cyclic deposition phase 205, which may include atomic layer deposition (ALD) or cyclic chemical vapor deposition (CCVD).

[0066] A non-limiting example embodiment of a cyclic deposition process may include atomic layer deposition (ALD), wherein ALD is typically based on a self-limiting reaction, whereby approximately one atomic (or molecular) monolayer of material is deposited in each deposition cycle using sequential and alternating pulses of reactants. Deposition conditions and precursors are typically selected so as to provide a self-saturating reaction, such that an absorber layer of one reactant leaves a surface termination state that does not react with a gas phase reactant of the same reactant. The substrate is subsequently contacted with a different reactant, which reacts with the previous termination to effect continued deposition. Thus, each cycle of alternating pulses typically leaves no more than about one monolayer of the desired material. However, as mentioned above, the skilled person will recognize that in one or more ALD cycles, for example, where some gas phase reactions occur regardless of the alternating nature of the process, more than one monolayer of material may be deposited.

[0067] In an ALD type process for forming a nucleation film directly on a dielectric surface, a deposition cycle may include exposing a substrate to a first gaseous reactant, removing any unreacted first reactant and reaction byproducts from the reaction chamber, and then exposing the substrate to a second gaseous reactant followed by a second removal step. In some embodiments of the present disclosure, the first gaseous reactant may include at least one of a first silicon precursor or a molybdenum precursor, and the second gaseous reactant may include at least one of a nitrogen precursor, a carbon precursor, an oxygen precursor, or a second silicon precursor.

[0068] The argon (Ar) or nitrogen (N 2 ) and other inert gases to separate the precursors, to prevent the gas phase reaction between the reactants and to achieve self-saturated surface reaction. But in some embodiments, the substrate can be moved to contact the first gas phase reactant and the second gas phase reactant separately. Since the reaction is self-saturated, it is not necessary to carry out strict temperature control on the substrate, nor is it necessary to carry out accurate dosage control on the precursor. However, the substrate temperature is preferably such that the incidental gas species neither condenses into a monolayer nor decomposes on the surface. Before the substrate is contacted with the next reaction chemical, the remaining chemicals and reaction byproducts (if present) are removed from the substrate surface, for example, by flushing the reaction space or by moving the substrate. Undesirable gaseous molecules can be effectively discharged from the reaction space by means of an inert flushing gas. A vacuum pump can be used to assist flushing.

[0069] According to some non-limiting embodiments of the present disclosure, the ALD process can be used to directly deposit a nucleation film on the surface of a dielectric material. In some embodiments of the present disclosure, each ALD cycle can include two different deposition steps or stages. In the first stage of the deposition cycle, the substrate surface on which it is desired to be deposited can be contacted with a first gas-phase reactant chemically adsorbed onto the substrate surface, the first gas-phase reactant comprising at least one of a first silicon precursor or a molybdenum precursor, thereby forming no more than about one monolayer of the reactant substance on the substrate surface. In the second stage of deposition, the substrate surface on which it is desired to be deposited can be contacted with a second gas-phase reactant comprising at least one of a nitrogen precursor, a carbon precursor, an oxygen precursor, or a second silicon precursor.

[0070] After heating the substrate to the desired deposition temperature and adjusting the pressure within the reaction chamber, the exemplary atomic layer deposition process 120 can proceed to the cyclic deposition phase 205 with the aid of process box 220, which includes contacting the substrate with a first gas-phase reactant, specifically, in some embodiments contacting the substrate with a first gas-phase reactant including at least one of a first silicon precursor or a molybdenum halide precursor.

[0071] In some embodiments, the nucleation film may include a silicon binary compound, and in such embodiments, the first gas phase reactant may include a first silicon precursor. In some embodiments, the first silicon precursor may include at least one of the following: N,N,N',N-tetraethylsilanediamine (C 8 H 22 N 2 Si), BTBAS (bis(tert-butylamino)silane), BDEAS (bis(diethylamino)silane), TDMAS (tris(dimethylamino)silane), hexa(ethylamino)disilane (Si 2 (NHC 2 H 5 ) 6 ), silicon tetraiodide (SiI 4 ), silicon tetrachloride (SiCl 4 ), hexachlorodisilane (HCDS), or pentachlorodisilane (PCDS). In some embodiments, the first silicon precursor may include a silane, such as silane (SiH 4 ), disilane (Si 2 H 6 ), trisilane (Si 3 H 8 ), tetrasilane (Si 4 H 10 ), or with the general empirical formula Si x H (2x+2) of higher silanes.

[0072] In some embodiments, the nucleation film may include a molybdenum binary compound, and in such embodiments, the first gas phase reactant may include a molybdenum halide precursor. In some embodiments, the molybdenum halide precursor may include a molybdenum chloride precursor, a molybdenum iodide precursor, or a molybdenum bromide precursor. For example, as a non-limiting example, the first gas phase reactant may include a molybdenum chloride, such as molybdenum pentachloride (MoCl 5 ).

[0073] In some embodiments, the molybdenum halide precursor may include a molybdenum chalcogenide, and in various specific embodiments, the molybdenum halide precursor may include a molybdenum chalcogenide halide. For example, the molybdenum chalcogenide halide precursor may include a molybdenum oxyhalide selected from the group consisting of molybdenum oxychloride, molybdenum oxyiodide, or molybdenum oxybromide. In various specific embodiments of the present disclosure, the molybdenum precursor may include molybdenum oxychloride, including but not limited to molybdenum (IV) dichloride (MoO 2 Cl 2 ).

[0074] In some embodiments of the present disclosure, contacting the substrate with a first gas-phase reactant comprising at least a first silicon precursor or a molybdenum precursor may include contacting the first gas-phase reactant with the substrate for a period of time between about 0.1 seconds and about 60 seconds, between about 0.1 seconds and about 10 seconds, or between about 0.5 seconds and about 5.0 seconds. In addition, during contact of the substrate with the first gas-phase reactant, the flow rate of the precursor may be less than 1000 sccm, or less than 500 sccm, or less than 100 sccm, or less than 10 sccm, or even less than 1 sccm. In addition, during contact of the substrate with the first gas-phase reactant, the flow rate of the precursor may be in the range of from about 1 sccm to 2000 sccm, from about 5 sccm to 1000 sccm, or from about 10 sccm to about 500 sccm.

[0075] An exemplary atomic layer deposition process for directly depositing a nucleation film on a dielectric surface is as follows: Figure 2 1. The process block 120 of , which can be continued by purging the reaction chamber. For example, excess first gas-phase reactants and reaction byproducts (if any) can be removed from the substrate surface, for example by pumping with an inert gas. In some embodiments of the present disclosure, the purging process may include a purge cycle, wherein the time period for purging the substrate surface is less than about 5.0 seconds, or less than about 3.0 seconds, or even less than about 2.0 seconds. Excess first gas-phase reactants (such as excess first silicon precursors or molybdenum precursors) and any possible reaction byproducts can be removed by means of a vacuum generated by a pumping system in fluid communication with the reaction chamber.

[0076] After purging the reaction chamber with the purge cycle, the exemplary atomic layer deposition process box 120 can proceed to the second stage of the cyclic deposition stage 205 with the aid of process box 230, which process box includes contacting the substrate with a second gas-phase reactant, specifically, contacting the substrate with a second gas-phase reactant including at least one of the following: a nitrogen precursor, a carbon precursor, an oxygen precursor, or a second silicon precursor.

[0077] In some embodiments of the present disclosure, the nucleation film may include a silicon binary compound material, and in many specific embodiments, includes silicon nitride (e.g., Si 3 N 4 ). In such embodiments, the first gas-phase reactant may include a first silicon precursor and the second gas-phase reactant may include a nitrogen precursor.

[0078] In some embodiments of the present disclosure, the nucleation film may include a silicon binary compound material, and in many specific embodiments, includes silicon oxide (e.g., SiO 2 ). In such embodiments, the first gas-phase reactant may include a first silicon precursor and the second gas-phase reactant may include an oxygen precursor.

[0079] In some embodiments of the present disclosure, the nucleation film may include a silicon binary compound material, and in a number of specific embodiments, includes silicon carbide (eg, SiC). In such embodiments, the first gas phase reactant may include a first silicon precursor, and the second gas phase reactant may include a carbon precursor.

[0080] In some embodiments of the present disclosure, the nucleation film may include a molybdenum binary compound material, and in several specific embodiments, molybdenum nitride. In such embodiments, the first gas phase reactant may include a molybdenum precursor, and the second gas phase reactant may include a nitrogen precursor.

[0081] In some embodiments of the present disclosure, the nucleation film may include a molybdenum binary compound material, and in several specific embodiments, molybdenum oxide. In such embodiments, the first gas phase reactant may include a molybdenum precursor, and the second gas phase reactant may include an oxygen precursor.

[0082] In some embodiments of the present disclosure, the nucleation film may include a molybdenum binary compound material, and in several specific embodiments, molybdenum silicide. In such embodiments, the first gas phase reactant may include a molybdenum precursor, and the second gas phase reactant may include a second silicon precursor.

[0083] In some embodiments of the present disclosure, the nucleation film may include a molybdenum binary compound material, and in several specific embodiments, molybdenum carbide. In such embodiments, the first gas phase reactant may include a molybdenum precursor, and the second gas phase reactant may include a carbon precursor.

[0084] In various embodiments where the nucleation film comprises a nitride (such as silicon nitride or molybdenum nitride), the second gas phase reactant may include a nitrogen precursor. In such embodiments of the present disclosure, the nitrogen precursor may include at least one of the following: ammonia (NH 3 ), hydrazine (N 2 H 4 ), triazine (N 3 H 5 ), tert-butylhydrazine (C 4 H 9 N 2 H 3 ), methylhydrazine (CH 3 NHNH 2 ), dimethylhydrazine ((CH 3 ) 2 N 2 H 2 ) or nitrogen plasma, wherein the nitrogen plasma includes atomic nitrogen, nitrogen radicals and excited nitrogen species.

[0085] In various embodiments where the nucleation film comprises an oxide such as silicon oxide or molybdenum oxide, the second gas phase reactant may include an oxygen precursor. In such embodiments of the present disclosure, the oxygen precursor includes at least one of: water (H 2 O), hydrogen peroxide (H 2 O 2 ), ozone (O 3 ) or nitrogen oxides, such as nitric oxide (NO), nitrous oxide (N 2 O) or nitrogen dioxide (NO 2 ). In some embodiments of the present disclosure, the oxygen precursor may include an organic alcohol, such as isopropanol. In some embodiments, the oxygen precursor may include an oxygen plasma, wherein the oxygen plasma includes atomic oxygen, oxygen radicals, and excited oxygen species.

[0086] In various embodiments where the nucleation film comprises a carbide, such as silicon carbide or molybdenum carbide, the second gas phase reactant may include a carbon precursor. In such embodiments of the present disclosure, the carbon precursor may include a hydrocarbon, such as a linear or branched alkane.

[0087] In various embodiments where the nucleation film comprises a silicide (such as molybdenum silicide), the second gas phase reactant may include a second silicon precursor. In such embodiments of the present disclosure, the second silicon precursor comprises at least one of: N,N,N',N-tetraethylsilanediamine (C 8 H 22 N 2Si), BTBAS (bis(tert-butylamino)silane), BDEAS (bis(diethylamino)silane), TDMAS (tris(dimethylamino)silane), hexa(ethylamino)disilane (Si 2 (NHC 2 H 5 ) 6 ), silicon tetraiodide (SiI 4 ), silicon tetrachloride (SiCl 4 ), hexachlorodisilane (HCDS), or pentachlorodisilane (PCDS). In some embodiments, the second silicon precursor may include a silane, such as silane (SiH 4 ), disilane (Si 2 H 6 ), trisilane (Si 3 H 8 ), tetrasilane (Si 4 H 10 ), or with the general empirical formula Si x H (2x+2) of higher silanes.

[0088] In some embodiments of the present disclosure, contacting the substrate with the second gas-phase reactant may include contacting the substrate with the precursor for a period of between about 0.01 seconds and about 120 seconds, between about 0.05 seconds and about 60 seconds, or between about 0.1 seconds and about 10 seconds. In addition, during the period when the substrate is in contact with the second gas-phase reactant, the flow rate of the second gas-phase reactant may be less than 10,000 sccm, or less than 5,000×sccm, or even less than 1,000×sccm.

[0089] After contacting the substrate with a second gas-phase reactant including at least one of a nitrogen precursor, a carbon precursor, an oxygen precursor, or a second silicon precursor, an exemplary process block 120 for directly depositing a nucleation film on a dielectric surface can be continued by purging the reaction chamber. For example, excess second gas-phase reactants and reaction byproducts (if any) can be removed from the substrate surface, such as by pumping while flowing an inert gas. In some embodiments of the present disclosure, the purging process can include purging the substrate surface for a period of time between about 0.1 seconds and about 10 seconds, or between about 0.5 seconds and about 3 seconds, or even between about 1 second and 2 seconds.

[0090] After the second gas phase reactant and any reaction byproducts are completely purged from the reaction chamber, the exemplary atomic layer deposition cyclic deposition phase 205 of process block 120 can proceed to decision gate 240, wherein decision gate 240 depends on the thickness of the deposited nucleation film. For example, if the thickness of the nucleation film deposited is insufficient for the desired device application, the cyclic deposition phase 205 can be repeated by returning to process block 220 and continuing with further deposition cycles, wherein a unit deposition cycle can include: contacting the substrate with at least a first silicon precursor or a molybdenum halide precursor (process block 220), purging the reaction chamber, contacting the substrate with at least one of a nitrogen precursor, a carbon precursor, an oxygen precursor, or a second silicon precursor (process block 230), and then purging the reaction chamber again. The unit deposition cycle of the cyclic deposition phase 205 can be repeated one or more times until a nucleation film of a desired thickness is deposited on the substrate, particularly directly on a dielectric surface. Once the nucleation film has been deposited to a desired thickness, exemplary atomic layer deposition process block 120 may be exited via process block 250, and the substrate having the nucleation film deposited on the dielectric surface may be subjected to Figure 1 Further processing of the exemplary process 100 is described below.

[0091] It should be understood that in some embodiments of the present disclosure, the order in which the substrate is contacted with the first gas-phase reactant (e.g., a first silicon precursor or a molybdenum precursor) and the second gas-phase reactant (e.g., a nitrogen precursor, a carbon precursor, an oxygen precursor, or a second silicon precursor) can be such that the substrate is first contacted with the second gas-phase reactant and then with the first gas-phase reactant. In addition, in some embodiments, the cyclic deposition phase 205 of the exemplary process box 120 can include contacting the substrate with the first gas-phase reactant one or more times before contacting the substrate with the second gas-phase reactant one or more times. In addition, in some embodiments, the cyclic deposition phase 205 of the exemplary process box 120 can include contacting the substrate with the second gas-phase reactant one or more times before contacting the substrate with the first gas-phase reactant one or more times.

[0092] In some embodiments, the cyclic deposition process can be a hybrid ALD / CVD or cyclic CVD process. For example, in some embodiments, the growth rate of the ALD process may be lower than that of the CVD process. One method to increase the growth rate may be to operate at a higher substrate temperature than that typically employed in the ALD process, thereby causing part of the chemical vapor deposition process, but still utilizing the sequential introduction of precursors, such a process may be referred to as cyclic CVD. In some embodiments, the cyclic CVD process may include introducing two or more precursors into the reaction chamber, wherein the two or more precursors may be present in the reaction chamber simultaneously within a period of time, thereby causing both the ALD portion of the deposition and the CVD portion of the deposition. For example, the cyclic CVD process may include a continuous flow of one precursor into the reaction chamber, and a second precursor periodically pulsed into the reaction chamber.

[0093] In some embodiments of the present disclosure, the nucleation film can be directly deposited on the dielectric surface at a growth rate from about 0.05 angstroms / cycle to about 5 angstroms / cycle, from about 0.1 angstroms / cycle to about 5 angstroms / cycle, or even from about 0.5 angstroms / cycle to about 1.5 angstroms / cycle.

[0094] In some embodiments of the present disclosure, the nucleation film is deposited as a continuous film, see for example a semiconductor device structure 405, which includes a continuous nucleation film 406 disposed directly on a dielectric substrate 402 having a vertical gap feature 404, such as Figure 4B or see, for example, a semiconductor device structure 505, the structure comprising a continuous nucleation film 506 disposed directly on a dielectric substrate 502 having a horizontal gap feature, such as Figure 5B In some embodiments, the continuous nucleation film 406 / 506 can be deposited to a thickness of less than 20 angstroms, or less than 10 angstroms, or less than 5 angstroms, or even less than 3 angstroms.

[0095] In some embodiments of the present disclosure, the nucleation film is deposited as a discontinuous film, see for example insert 408 of semiconductor device structure 405, which includes an example of a discontinuous nucleation film 406 disposed directly on a dielectric substrate 402 having a vertical gap feature 404, such as Figure 4B or see, for example, an insert 508 of a semiconductor device structure 505, the structure comprising an example of a discontinuous nucleation film 506 'disposed directly on a dielectric substrate 502 having a horizontal gap feature, such as Figure 5B In some embodiments, the discontinuous nucleation film 406' / 506' can be deposited to a thickness of less than 20 angstroms, or less than 10 angstroms, or less than 5 angstroms, or even less than 3 angstroms.

[0096] In some embodiments, the step coverage of the nucleation film on one or more dielectric gap features can be equal to or greater than about 50%, or greater than about 80%, or greater than about 90%, or greater than about 95%, or greater than about 98%, or about 99% or greater.

[0097] It should also be noted that the nucleation film of the present disclosure does not constitute a barrier layer or barrier material commonly used in semiconductor device applications to prevent diffusion of metal species into the underlying dielectric material, which barrier layer is disposed between the metal contact and the dielectric material. The nucleation film of the present disclosure is used to improve the material quality of the subsequently deposited molybdenum metal film and does not constitute a thick film, high resistivity barrier layer or barrier material utilized in ordinary semiconductor device manufacturing processes.

[0098] When the core film is directly deposited on the dielectric surface, ( Figure 1 The exemplary process 100 of the present invention can continue with process block 130, which includes depositing a molybdenum metal film directly on the nucleation film, and in some specific embodiments, depositing the molybdenum metal film directly on the nucleation film by a cyclic deposition process. Figure 3 Process block 130 and the associated sub-process blocks that make up that process block are described in greater detail, and the figure illustrates an exemplary cyclic deposition process for depositing a molybdenum metal film.

[0099] In more detail, the exemplary cyclic deposition process may include an atomic layer deposition process or a cyclic chemical vapor deposition process. As a non-limiting example, process block 130 may include an atomic layer deposition process and may be started by means of a sub-process block 310, which includes heating the substrate to a desired deposition temperature. For example, the substrate may be heated to a substrate temperature of less than about 800°C, or less than about 700°C, or less than about 600°C, or less than about 5500°C, or less than about 500°C, or less than about 400°C, or less than about 300°C, or even less than about 200°C. In some embodiments of the present disclosure, the substrate temperature during the exemplary atomic layer deposition process block 130 may be between 200°C and 800°C, or between 300°C and 700°C, or between 400°C and 600°C, or between 500°C and 550°C.

[0100] In addition, in order to achieve the desired deposition temperature (i.e., the desired substrate temperature), the exemplary atomic layer deposition process 130 can also adjust the pressure in the reaction chamber during deposition to obtain the desired characteristics of the deposited molybdenum metal film. For example, in some embodiments of the present disclosure, the exemplary atomic layer deposition process 130 can be performed in a reaction chamber adjusted to a reaction chamber pressure of less than 300 Torr, or less than 200 Torr, or less than 100 Torr, or less than 50 Torr, or less than 25 Torr, or even less than 10 Torr. In some embodiments, the pressure in the reaction chamber during deposition can be adjusted at a pressure between 10 Torr and 300 Torr, or between 30 Torr and 80 Torr, or even equal to or greater than 30 Torr.

[0101] After heating the substrate to the desired deposition temperature and adjusting the pressure within the reaction chamber, the exemplary atomic layer deposition process 130 can proceed to the cyclic deposition phase 305 with the aid of process box 320, which includes contacting the substrate with a first gas-phase reactant, specifically, in some embodiments contacting the substrate with a first gas-phase reactant including a molybdenum halide precursor (i.e., a molybdenum precursor).

[0102] In some embodiments of the present disclosure, the molybdenum halide precursor may include a molybdenum chloride precursor, a molybdenum iodide precursor, or a molybdenum bromide precursor. For example, as a non-limiting example, the first gas phase reactant may include molybdenum chloride, such as molybdenum pentachloride (MoCl 5 ).

[0103] In some embodiments, the molybdenum halide precursor may include a molybdenum chalcogenide, and in various specific embodiments, the molybdenum halide precursor may include a molybdenum chalcogenide halide. For example, the molybdenum chalcogenide halide precursor may include a molybdenum oxyhalide selected from the group consisting of molybdenum oxychloride, molybdenum oxyiodide, or molybdenum oxybromide. In various specific embodiments of the present disclosure, the molybdenum precursor may include molybdenum oxychloride, including but not limited to molybdenum (IV) dichloride (MoO 2 Cl 2 ).

[0104] In some embodiments of the present disclosure, contacting the substrate with a first gas-phase reactant comprising a molybdenum halide precursor may include contacting the molybdenum halide precursor with the substrate for a period of time between about 0.1 seconds and about 60 seconds, between about 0.1 seconds and about 10 seconds, or between about 0.5 seconds and about 5.0 seconds. In addition, during the period of contact between the substrate and the molybdenum halide precursor, the flow rate of the molybdenum halide precursor may be less than 1000 sccm, or less than 500 sccm, or less than 100 sccm, or less than 10 sccm, or even less than 1 sccm. In addition, during the period of contact between the substrate and the molybdenum halide precursor, the flow rate of the molybdenum precursor may be in the range of from about 1 sccm to 2000 sccm, from about 5 sccm to 1000 sccm, or from about 10 sccm to about 500 sccm.

[0105] An exemplary atomic layer deposition process 130 for depositing a molybdenum metal film directly on a nucleation film is shown in FIG. Figure 3 The process block 130 of , which can be continued by purging the reaction chamber. For example, excess first gas-phase reactants and reaction byproducts (if any) can be removed from the substrate surface, for example by pumping with an inert gas. In some embodiments of the present disclosure, the purge process may include a purge cycle, wherein the time period for purging the substrate surface is less than about 5.0 seconds, or less than about 3.0 seconds, or even less than about 2.0 seconds. Excess first gas-phase reactants (such as excess molybdenum precursors) and any possible reaction byproducts can be removed by means of a vacuum generated by a pumping system in fluid communication with the reaction chamber.

[0106] After purging the reaction chamber with the purge cycle, the exemplary atomic layer deposition process box 130 can proceed to the second stage of the cyclic deposition phase 305 with the aid of process box 330, which process box includes contacting the substrate with a second gas-phase reactant, specifically, contacting the substrate with a second gas-phase reactant comprising a reducing agent precursor ("reducing precursor").

[0107] In some embodiments of the present disclosure, the reducing agent precursor may include at least one of the following: forming gas (H 2 +N 2 ), ammonia (NH 3 ), hydrazine (N 2 H 4 ), alkyl hydrazines (e.g., tert-butyl hydrazine (C 4 H 12 N 2 )), molecular hydrogen (H 2 ), hydrogen atoms (H), hydrogen plasma, hydrogen radicals, excited hydrogen species, alcohols, aldehydes, carboxylic acids, boranes, or amines. In other embodiments, the reducing agent precursor may include at least one of the following: silane (SiH 4 ), disilane (Si2 H 6 ), trisilane (Si 3 H 8 ), germane (GeH 4 ), Digermane (Ge 2 H 6 ), borane (BH 3 ) or diborane (B 2 H 6 In various embodiments of the present disclosure, the reducing agent precursor may include molecular hydrogen (H 2 ).

[0108] In some embodiments of the present disclosure, contacting the substrate with the reducing agent precursor can include contacting the substrate with the reducing agent precursor for a period of time between about 0.01 second and about 180 seconds, between about 0.05 second and about 60 seconds, or between about 0.1 second and about 10.0 seconds. In addition, during the period when the substrate contacts the reducing agent precursor substrate, the flow rate of the reducing agent precursor can be less than 30slm, or less than 15slm, or less than 10slm, or less than 5slm, or less than 1slm, or even less than 0.1slm. In addition, during the period when the substrate contacts the reducing agent precursor, the flow rate of the reducing agent precursor can be in the range of from about 0.1slm to 30slm, from about 5slm to 15slm, or equal to or greater than 10slm.

[0109] After contacting the substrate with the reducing agent precursor, the exemplary process block 130 for directly depositing the molybdenum metal film on the nucleation film can be continued by purging the reaction chamber. For example, excess reducing agent precursor and reaction byproducts (if any) can be removed from the substrate surface, such as by pumping while flowing an inert gas. In some embodiments of the present disclosure, the purging process can include purging the substrate surface for a period of time between about 0.1 seconds and about 10 seconds, or between about 0.5 seconds and about 3 seconds, or even between about 1 second and 2 seconds.

[0110] After the second gas phase reactant, i.e., the reducing agent precursor (and any reaction byproducts), is completely purged from the reaction chamber, the cyclic deposition phase 305 of the exemplary atomic layer deposition process block 130 can proceed to a decision gate 340, wherein the decision gate 340 depends on the thickness of the deposited molybdenum metal film. For example, if the thickness of the deposited molybdenum metal film is insufficient for the desired device application, the cyclic deposition phase 305 can be repeated by returning to the process block 320 and proceeding to a further deposition cycle, wherein a unit deposition cycle can include: contacting the substrate with a molybdenum halide precursor (process block 320), purging the reaction chamber, contacting the substrate with a reducing agent precursor (process block 330), and then purging the reaction chamber again. The unit deposition cycle of the cyclic deposition phase 305 can be repeated one or more times until a molybdenum metal film of the desired thickness is deposited on the substrate, in particular, directly on the nucleation film. Once the molybdenum metal film has been deposited to a desired thickness, the exemplary atomic layer deposition process block 130 may be exited via process block 350, and the substrate with the molybdenum metal film deposited on the dielectric surface may be further processed to form a device structure. Figure 1 The exemplary process 100 may proceed to process block 140 where the process exits and the substrate having the molybdenum metal film disposed thereon may undergo further semiconductor processing to complete the semiconductor device structure.

[0111] It should be understood that in some embodiments of the present disclosure, the order in which the substrate is contacted with the first gas-phase reactant (e.g., a molybdenum precursor) and the second gas-phase reactant (e.g., a reducing precursor) can be such that the substrate is first contacted with the second gas-phase reactant and then with the first gas-phase reactant. In addition, in some embodiments, the cyclic deposition phase 305 of the exemplary process box 130 can include contacting the substrate with the first gas-phase reactant one or more times before contacting the substrate with the second gas-phase reactant one or more times. In addition, in some embodiments, the cyclic deposition phase 305 of the exemplary process box 130 can include contacting the substrate with the second gas-phase reactant one or more times before contacting the substrate with the first gas-phase reactant one or more times.

[0112] In some embodiments, the cyclic deposition process used to deposit the molybdenum metal film directly on the nucleation film can be a hybrid ALD / CVD or cyclic CVD process as previously described herein.

[0113] The platinum metal film deposited by the method disclosed herein can be a continuous film. In some embodiments, the continuous thickness of the platinum metal film can be less than about 100 angstroms, or less than about 60 angstroms, or less than about 50 angstroms, or less than about 40 angstroms, or less than about 30 angstroms, or less than about 20 angstroms, or less than about 10 angstroms, or even less than about 5 angstroms. The continuity mentioned herein can be physical continuity or electrical continuity. In some embodiments of the present disclosure, the thickness of the material film can be different from the thickness of the film electrical continuity, and vice versa.

[0114] In some embodiments of the present disclosure, the platinum metal film formed according to multiple embodiments of the present disclosure may have a thickness from about 20 angstroms to about 250 angstroms, or about 50 angstroms to about 200 angstroms, or even about 100 angstroms to about 150 angstroms. In some embodiments, the platinum metal film deposited according to some embodiments described herein may have a thickness greater than about 20 angstroms, or greater than about 30 angstroms, or greater than about 40 angstroms, or greater than about 50 angstroms, or greater than about 60 angstroms, or greater than about 100 angstroms, or greater than about 250 angstroms, or greater than about 500 angstroms, or greater. In some embodiments, the platinum metal film deposited according to some embodiments described herein may have a thickness less than about 250 angstroms, or less than about 100 angstroms, or less than about 50 angstroms, or less than about 25 angstroms, or even less than about 10 angstroms. In some embodiments, the platinum metal film disposed on the dielectric surface using an intermediate nucleation film may have a thickness between about 100 angstroms and 250 angstroms.

[0115] In some embodiments of the present disclosure, a molybdenum metal film may be deposited on a dielectric surface using an intermediate nucleation film such that the molybdenum metal film may include a crystalline film. In some embodiments, the molybdenum metal film may include a polycrystalline film, wherein a plurality of grains constituting the polycrystalline molybdenum metal film may have a grain size greater than 100 angstroms, or greater than 200 angstroms, or even greater than 250 angstroms. In some embodiments, the crystalline structure of the crystalline molybdenum metal film may include a body-centered cubic structure.

[0116] In some embodiments of the present disclosure, a molybdenum metal film may be deposited on a dielectric surface having one or more high aspect ratio features, including vertical high aspect ratio features and / or horizontal high aspect ratio features.

[0117] For example, Figure 4CA semiconductor device structure 410 is shown, which includes a dielectric material 402 having a vertical high aspect ratio feature 404, wherein the aspect ratio (height:width) can be greater than 2:1, or greater than 5:1, or greater than 10:1, or greater than 25:1, or greater than 50:1, or even greater than 100:1, wherein in this specific example, "greater than" refers to the larger height of the gap feature. The deposition method disclosed herein can be used to deposit a molybdenum metal film on the surface of the vertical high aspect ratio gap feature 404, as shown by molybdenum metal film 412. In some embodiments, the step coverage of the molybdenum metal film on the vertical high aspect ratio dielectric gap feature can be equal to or greater than about 50%, or greater than about 80%, or greater than about 90%, or greater than about 95%, or greater than about 98%, or about 99% or greater.

[0118] As a non-limiting example, semiconductor device structure 410 may represent a partially fabricated CMOS logic device, wherein dielectric material 402 may include an interlayer dielectric, and molybdenum metal film 412 may include a metal gap fill for providing electrical connection to one or more transistor structures (not shown). Figure 4A As shown, the molybdenum metal film 406 is in direct contact with the nucleation film 404, which in turn is directly disposed on the dielectric material 402 (ie, without an intermediate barrier material), thereby reducing the overall effective resistivity of the semiconductor device structure 410.

[0119] In some embodiments, the molybdenum metal film 412 may include gap fill metallization, and the molybdenum metal film 412 may fill gap features (i.e., vertical high aspect ratio gap features 404) without forming a seam, wherein a seam may refer to a line or one or more voids formed due to an edge formed in adjacent gap fill metals, and the seam may be confirmed using a scanning transmission electron microscope (STEM) or a transmission electron microscope (TEM), wherein a seam is said to exist if the observation reveals the presence of a clear vertical line or one or more vertical voids in the gap fill material.

[0120] As a further non-limiting example, Figure 5CA semiconductor device structure 510 is shown, the structure including a dielectric material 502 having one or more horizontal high aspect ratio gap features 504, wherein the aspect ratio (height:width) may be greater than 1:2, or greater than 1:5, or greater than 1:10, or greater than 1:25, or greater than 1:50, or even greater than 1:100, wherein in this example, the term "greater than" refers to the larger width of the one or more gap features. The deposition method disclosed herein may be used to deposit a molybdenum metal film 512 on the surface of the horizontal high aspect ratio gap feature 504 with an intermediate nucleation film 506. In some embodiments, the step coverage of the molybdenum metal film disposed on the horizontal high aspect ratio dielectric gap feature may be equal to or greater than about 50%, or greater than about 80%, or greater than about 90%, or greater than about 95%, or greater than about 98%, or about 99% or greater.

[0121] As a non-limiting example embodiment, the semiconductor device structure 510 may represent a portion of a partially fabricated memory device, wherein the dielectric material 502 may include aluminum oxide (Al 2 O 3 ), and the molybdenum metal film 512 can constitute at least a portion of the metal gate structure.

[0122] As with the vertical gap filling process, ( Figure 5C The ) Mo metal film 512 can be used as gap fill metallization for horizontal high aspect ratio features without forming seams, as described previously.

[0123] In some embodiments of the present disclosure, a molybdenum metal film deposited directly on a nucleation film disposed directly on a dielectric surface may include a low-resistivity molybdenum metal film. In some embodiments, a molybdenum metal film deposited on a dielectric surface using an intermediate nucleation film may have a lower resistivity than a molybdenum film deposited directly on a dielectric surface (i.e., without using any intermediate nucleation film). For example, in some embodiments, the molybdenum metal film of the present disclosure may have a resistivity of less than 3000 μΩ-cm, or less than 1000 μΩ-cm, or less than 500 μΩ-cm, or less than 200 μΩ-cm, or less than 100 μΩ-cm, or less than 50 μΩ-cm, or less than 25 μΩ-cm, or less than 15 μΩ-cm, or even less than 10 μΩ-cm. As a non-limiting example, a molybdenum metal film can be deposited on the surface of a dielectric material using an intermediate nucleation film, deposited to a molybdenum metal film thickness of approximately less than 60 angstroms, and the molybdenum metal film can exhibit a resistivity of less than 40 μΩ-cm, or less than 35 μΩ-cm, or even less than 30 μΩ-cm.

[0124] In addition to improving the resistivity of the molybdenum metal film, depositing the intermediate nucleation film can also improve the surface roughness of the deposited molybdenum metal film. For example, Figure 6 The rms surface roughness (R a ) (in angstroms). The molybdenum metal film represented by label 600 is deposited directly on the aluminum oxide (Al 2 O 3 ) dielectric surface and has a corresponding rms surface roughness (R a The molybdenum metal film indicated by label 602 is directly disposed on the aluminum oxide (Al 2 O 3 ) dielectric surface and has a corresponding rms surface roughness (R a It should be noted that the rms surface roughness (R a ) can be measured using atomic force microscopy (e.g., on a surface area of ​​1 micron x 1 micron).

[0125] Therefore, the use of the intermediate nucleation film greatly improves the surface roughness of the molybdenum metal film. For example, in some embodiments, the rms surface roughness of the molybdenum metal film deposited on the dielectric surface using the intermediate nucleation film can have an rms surface roughness (R ) of less than 5 angstroms, or less than 4 angstroms, or less than 3 angstroms, or even less than 2 angstroms. a In some embodiments, the rms surface roughness (R a ) can be expressed as a percentage of the roughness in the total film thickness. For example, in some embodiments, the rms surface roughness (R a ) can be less than 10%, or 5%, or 3%, or even 1% of the total thickness of the molybdenum metal film.

[0126] In some embodiments of the present disclosure, the method of depositing a molybdenum metal film on a dielectric surface using an intermediate nucleation film may also include depositing a molybdenum metal film having a low atomic percentage (atomic %) of impurities. For example, the molybdenum metal film of the present disclosure may have an impurity concentration of less than 5 atomic %, or less than 2 atomic %, or even less than 1 atomic %. In some embodiments, the impurities disposed within the molybdenum metal film may include at least oxygen and chlorine.

[0127] Various embodiments of the present disclosure may also provide semiconductor device structures including a molybdenum metal film. In some embodiments, these semiconductor device structures may include: a substrate including a dielectric surface; a nucleation film disposed directly on the dielectric surface; and a molybdenum metal film disposed directly on the nucleation film. As a non-limiting example, ( Figure 4C ) semiconductor device structure 410 and ( Figure 5CThe semiconductor device structure 510 includes a dielectric substrate 402 / 502, which includes a dielectric surface. The nucleation film 406 / 506 is directly disposed on the dielectric substrate 402, and the molybdenum metal film 412 / 512 is directly disposed on the nucleation film 406 / 506. Therefore, in some embodiments, the nucleation film 406 / 506 is directly disposed between the molybdenum metal film 412 / 512 and the dielectric material 402 / 502.

[0128] In some embodiments, the nucleation film 406 / 506 may include a continuous film, while in alternative embodiments, the nucleation film 406' / 506' may include a discontinuous film. In some embodiments, the continuous nucleation film 406 / 506 may have a thickness of less than 20 angstroms, or less than 10 angstroms, or less than 5 angstroms, or even less than 3 angstroms. In some embodiments, the discontinuous nucleation film 406' / 506' may have a thickness of less than 20 angstroms, or less than 10 angstroms, or less than 5 angstroms, or even less than 3 angstroms.

[0129] In some embodiments, the nucleation film 406 / 506 may include a compound material, and in a number of specific embodiments, the nucleation film 406 / 506 may include a binary compound material, such as a silicon binary compound material or a molybdenum binary compound material. In some embodiments, the nucleation film 406 / 506 may include a ternary compound material, such as a silicon ternary material or a molybdenum ternary material.

[0130] As a non-limiting example, the silicon binary compound material may include at least one of silicon nitride, silicon carbide, or silicon oxide. As a further non-limiting example, the molybdenum binary compound material may include at least one of molybdenum nitride, molybdenum carbide, molybdenum oxide, or molybdenum silicide.

[0131] In some embodiments, the molybdenum metal film 412 / 512 can be crystalline and have an impurity concentration of less than 5 atomic %, or less than 2 atomic %, or even less than 1 atomic %. In addition, the molybdenum metal film 412 / 512 can have a resistivity of less than 40 μΩ-cm at a thickness of less than 60 angstroms.

[0132] In some embodiments, the molybdenum metal film 412 / 512 may have an rms surface roughness (R ) of less than 5 angstroms, or less than 4 angstroms, or less than 3 angstroms, or even less than 2 angstroms. a In some embodiments, the rms surface roughness (R a) can be expressed as a percentage of the roughness in the total film thickness. For example, in some embodiments, the rms surface roughness (Ra) can be less than 10%, or 5%, or 3%, or even 1% of the total thickness of the molybdenum metal film. The low surface roughness of the molybdenum metal film 412 / 512 can enable the molybdenum metal film to fill one or more gap features disposed in and / or on the substrate without forming a seam, such as the vertical gap feature 404 and / or the horizontal gap feature 504, as shown by the molybdenum metal films 412 and 512.

[0133] The exemplary embodiments of the present disclosure described above do not limit the scope of the present invention, because these embodiments are merely examples of embodiments of the present invention, and the present invention is defined by the appended claims and their legal equivalents. Any equivalent embodiments are intended to be within the scope of the present invention. In fact, in addition to the contents of the alternative applicable combinations of the described elements shown and described herein, various modifications of the present disclosure will become apparent from the description to those skilled in the art. Such modifications and embodiments are also intended to fall within the scope of the appended claims.

Claims

1. A method for depositing a molybdenum metal film on a dielectric surface of a substrate by a cyclic deposition process, the method comprising: placing a substrate including a dielectric surface into a reaction chamber; Directly depositing a nucleation film comprising a molybdenum compound on the dielectric surface, wherein depositing the nucleation film comprises performing at least one unit cycle of a cyclic deposition process, wherein the unit cycle comprises: contacting the substrate with a first gas-phase reactant, the first gas-phase reactant comprising a molybdenum precursor; and contacting the substrate with a second gas-phase reactant, the second gas-phase reactant comprising at least one of a nitrogen precursor, an oxygen precursor, or a carbon precursor; and Directly depositing a molybdenum metal film on the nucleation film, wherein depositing the molybdenum metal film comprises: contacting the substrate with a first gas phase reactant comprising a molybdenum halide precursor; and The substrate is contacted with a second gas phase reactant comprising a reducing agent precursor. 2 . The method according to claim 1 , wherein the molybdenum compound material comprises at least one of molybdenum nitride, molybdenum carbide or molybdenum oxide.

3. The method of claim 1, wherein the molybdenum halide precursor comprises a molybdenum chalcogenide halide.

4. The method of claim 3, wherein the molybdenum chalcogenide halide comprises a molybdenum oxyhalide selected from the group consisting of molybdenum oxychloride, molybdenum oxyiodine, or molybdenum oxybromide.

5. The method of claim 4, wherein the molybdenum oxychloride comprises molybdenum (IV) dichloride (MoO2Cl2).

6. The method of claim 1, wherein the reducing agent precursor comprises at least one of: forming gas (H2 and N2), ammonia (NH3), hydrazine (N2H4), alkyl hydrazine, alcohol, aldehyde, carboxylic acid, boranes, and amines.

7. The method of claim 1, wherein the reducing agent precursor comprises at least one of the following: silane (SiH4), disilane (Si2H6), trisilane (Si3H8), germane (GeH4), digermane (Ge2H6), borane (BH3) and diborane (B2H6).

8. The method of claim 1, wherein the reducing agent precursor comprises an excited hydrogen species.

9. A semiconductor device structure formed according to the method of claim 1, the semiconductor device structure comprising: a substrate including a dielectric surface; a nucleation film disposed directly on the dielectric surface; as well as A molybdenum metal film is disposed directly on the nucleation film.

10. The semiconductor device structure according to claim 9, wherein the molybdenum metal film has an rms surface roughness (R 20 ) less than 5% of the total thickness of the molybdenum metal film. a ).

11. A method for depositing a molybdenum metal film on a dielectric surface of a substrate by a cyclic deposition process, the method comprising: placing a substrate including a dielectric surface into a reaction chamber; Directly depositing a nucleation film comprising a silicon compound on the dielectric surface, wherein depositing the nucleation film comprises performing at least one unit cycle of a cyclic deposition process, wherein the unit cycle comprises: contacting the substrate with a first gas-phase reactant, the first gas-phase reactant comprising a silicon precursor; and contacting the substrate with a second gas-phase reactant, the second gas-phase reactant comprising at least one of a nitrogen precursor, an oxygen precursor, or a carbon precursor; and Directly depositing a molybdenum metal film on the nucleation film, wherein depositing the molybdenum metal film comprises: contacting the substrate with a first gas phase reactant comprising a molybdenum halide precursor; and The substrate is contacted with a second gas phase reactant comprising a reducing agent precursor. 12 . The method of claim 11 , wherein the silicon compound material comprises at least one of silicon nitride, silicon carbide, or silicon oxide.

13. The method of claim 11, wherein the molybdenum halide precursor comprises a molybdenum oxyhalide selected from the group consisting of molybdenum oxychloride, molybdenum oxyiodine, or molybdenum oxybromide.

14. A semiconductor device structure formed according to the method of claim 11, the semiconductor device structure comprising: a substrate including a dielectric surface; a nucleation film disposed directly on the dielectric surface; as well as A molybdenum metal film is disposed directly on the nucleation film.

15. The semiconductor device structure according to claim 14, wherein the molybdenum metal film has an rms surface roughness (R 20 ) less than 5% of the total thickness of the molybdenum metal film. a ).

16. A method for depositing a molybdenum metal film on a dielectric surface of a substrate by a cyclic deposition process, the method comprising: placing a substrate including a dielectric surface into a reaction chamber; Directly depositing a nucleation film comprising a silicon compound on the dielectric surface, wherein depositing the nucleation film comprises repeatedly performing unit deposition cycles of a cyclic deposition process to form a nucleation film having a thickness of less than 10 angstroms, wherein at least one unit cycle comprises: contacting the substrate with a first gas-phase reactant, the first gas-phase reactant comprising a silicon precursor; and contacting the substrate with a second gas-phase reactant, the second gas-phase reactant comprising at least one of a nitrogen precursor, an oxygen precursor, or a carbon precursor, wherein the nitrogen precursor comprises at least one of ammonia, hydrazine, triazane, tert-butylhydrazine, methylhydrazine, dimethylhydrazine, or nitrogen plasma, wherein the oxygen precursor comprises at least one of water, hydrogen peroxide, ozone, or a nitrogen oxide, wherein the nitrogen oxide comprises at least one of nitric oxide, nitrous oxide, or nitrogen dioxide, wherein the carbon precursor comprises a hydrocarbon; and Directly depositing a molybdenum metal film on the nucleation film, wherein depositing the molybdenum metal film comprises: contacting the substrate with a first gas phase reactant comprising a molybdenum halide precursor; and The substrate is contacted with a second gas phase reactant comprising a reducing agent precursor. 17 . The method of claim 16 , wherein the silicon compound material comprises at least one of silicon nitride, silicon carbide, or silicon oxide.

18. The method of claim 16, wherein the molybdenum halide precursor comprises a molybdenum oxyhalide selected from the group consisting of molybdenum oxychloride, molybdenum oxyiodine, or molybdenum oxybromide.

19. A semiconductor device structure formed according to the method of claim 16, the semiconductor device structure comprising: a substrate including a dielectric surface; a nucleation film disposed directly on the dielectric surface; as well as A molybdenum metal film is disposed directly on the nucleation film.

20. The semiconductor device structure according to claim 19, wherein the molybdenum metal film has an rms surface roughness (R 20 ) less than 5% of the total thickness of the molybdenum metal film. a ).

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