Semiconductor device geometric method and system

Through machine learning prediction models, predicting the geometric shape and edge placement errors of multi-dimensional output substrates during lithography, the problem that existing lithography technology is difficult to reproduce the design layout in the manufacturing of extremely small functional components is achieved, and higher lithography Accuracy and device performance.

CN119472189APending Publication Date: 2025-02-18ASML NETHERLANDS BV
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Patent Information

Application Number
CN202411894052.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2020-06-23
Filing Date
2020-07-31
Publication Date
2025-02-18

AI Technical Summary

Technical Problem

When existing lithography technology manufactures very small functional components, it is difficult to accurately reproduce the design layout, resulting in edge placement errors and pattern failures, affecting device performance.

Method used

Using machine learning prediction models, based on pattern geometric shape information and process information, multi-dimensional output substrate geometry is predicted, and edge placement error (EPE) indicators associated with pattern features are determined.

Benefits of technology

It improves the accuracy and manufacturability of the lithography process, reduces edge placement errors and pattern failure efficiency, and improves the performance and yield of semiconductor devices.

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Abstract

Systems and methods for predicting substrate geometry associated with a patterning process are described. Receiving input information including geometry information and / or process information of the pattern; and predicting a geometry of the multi-dimensional output substrate using the machine learning prediction model. The multi-dimensional output information includes a pattern probability image. Based on the pattern probability image, a random edge placement error band and / or a random failure rate may be predicted. The input information includes a simulated spatial image, a simulated resist image, a target substrate size, and / or data associated with semiconductor device fabrication from a scanner. For example, different spatial images may correspond to different heights of a resist layer associated with the patterning process.
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Description

[0001] This application is a divisional application with application number 202080061323.5, application date July 31, 2020, and invention name “Geometric methods and systems for semiconductor devices”. Technical Field

[0002] The description herein relates generally to lithography in semiconductor manufacturing methods and systems. Background Art

[0003] Lithographic projection apparatus can be used, for example, in the manufacture of integrated circuits (ICs). A pattern forming device (e.g., a mask) can include or provide a pattern corresponding to a single layer of an IC (a "design layout"), and this pattern can be transferred to a target portion (e.g., a die including one or more) on a substrate (e.g., a silicon wafer) coated with a layer of radiation-sensitive material ("resist") by a method such as irradiating the target portion (e.g., a silicon wafer) through a pattern on the pattern forming device. Typically, a single substrate includes a plurality of adjacent target portions to which a pattern is transferred continuously in one target portion by the lithographic projection apparatus. In one type of lithographic projection apparatus, the pattern on the entire pattern forming device is transferred to one target portion in one operation. Such an apparatus is typically referred to as a stepper. In an alternative apparatus (typically referred to as a step-and-scan apparatus), the projection beam is scanned over the pattern forming device in a given reference direction (the "scanning" direction) while synchronously moving the substrate in a direction parallel or antiparallel to the reference direction. Different portions of the pattern on the pattern forming device are gradually transferred to one target portion. Since typically the lithographic projection apparatus will have a reduction ratio M (eg 4), the rate F at which the substrate is moved will be 1 / M times the rate at which the projection beam scans the patterning device.More information on lithographic apparatus can be found, for example, in US 6,046,792, which is incorporated herein by reference.

[0004] Before the pattern is transferred from the pattern forming device to the substrate, the substrate may undergo various processes, such as primer coating, resist coating, and soft baking. After exposure, the substrate may undergo other processes ("post-exposure processes"), such as post-exposure baking (PEB), development, hard baking, and measurement / inspection of the transferred pattern. This series of processes is used as the basis for manufacturing a single layer of a device (e.g., an IC). The substrate may then undergo various processes, such as etching, ion implantation (doping), metallization, oxidation, chemical mechanical polishing, etc., all of which are intended to ultimately complete a single layer of the device. If the device requires multiple layers, the entire process or a variation thereof is repeated for each layer. Ultimately, the device will be set in each target portion on the substrate. These devices are then separated from each other by techniques such as slicing or cutting, so that individual devices can be mounted on a carrier, connected to pins, etc.

[0005] The manufacture of devices (such as semiconductor devices) typically involves the use of multiple manufacturing processes to process a substrate (e.g., a semiconductor wafer) to form various features and multiple layers of the device. These layers and features are typically manufactured and processed using, for example, deposition, photolithography, etching, chemical mechanical polishing, and ion implantation. Multiple devices can be manufactured on multiple dies on a substrate and then separated into separate devices. This device manufacturing process can be considered a patterning process. The patterning process involves a patterning step, such as optical and / or nanoimprint lithography using a patterning device in a lithographic apparatus to transfer the pattern on the patterning device to the substrate, and typically but optionally involves one or more related pattern processing steps, such as resist development by a developing apparatus, substrate baking using a baking tool, etching using a pattern using an etching apparatus, etc.

[0006] Photolithography is a central step in the manufacture of devices such as ICs, where patterns formed on a substrate define the functional elements of the device, such as microprocessors, memory chips, etc. Similar photolithography techniques are also used to form flat panel displays, microelectromechanical systems (MEMS), and other devices.

[0007] As semiconductor manufacturing processes continue to advance, the size of functional elements has continued to decrease. At the same time, the number of functional elements (such as transistors) per device has been steadily increasing, following a trend commonly referred to as "Moore's Law". In the current state of the art, multiple layers of a device are manufactured using a lithography projection apparatus that projects a design layout onto a substrate using illumination from a deep ultraviolet illumination source, thereby forming a single functional element having a size well below 100 nm (i.e., less than half the wavelength of the radiation from the illumination source (e.g., a 193 nm illumination source)).

[0008] This process in which features with dimensions smaller than the classical resolution limit of the lithographic projection apparatus are printed is generally referred to as low-k1 lithography, and is based on the resolution formula CD = k1 × λ / NA, where λ is the wavelength of the radiation employed (currently 248 nm or 193 nm in most cases), NA is the numerical aperture of the projection optics in the lithographic projection apparatus, CD is the "critical dimension" (usually the smallest feature size printed), and k1 is an empirical resolution factor. In general, the smaller k1 is, the more difficult it becomes to reproduce a pattern on a substrate that resembles the shape and dimensions planned by the designer to achieve specific electrical functionality and performance. To overcome these difficulties, complex fine-tuning steps are applied to the lithographic projection apparatus, the design layout, or the patterning device. These steps include, for example, but are not limited to: optimization of NA and optical coherence settings, customized illumination schemes, use of phase-shifted patterning devices, optical proximity correction (OPC, sometimes also called "optical and process correction") in the design layout, or other methods generally defined as "resolution enhancement techniques" (RET).

[0009] OPC and other RETs employ robust, i.e., reliable, electronic models that accurately describe the lithography process. Thus, a calibration procedure for these lithography models is required that provides an effective, robust, and accurate model across the entire process window. Currently, calibration is done using a number of one-dimensional and / or two-dimensional gauge patterns and utilizing wafer measurements. More specifically, the one-dimensional gauge patterns include line space patterns with varying pitches and critical dimensions (CDs), isolated lines, multiple lines, etc. The two-dimensional gauge patterns typically include line ends, contacts, and randomly selected SRAM (static random access memory) patterns. Summary of the invention

[0010] According to an embodiment, one or more non-transitory computer-readable media are provided, which store machine learning prediction models and instructions, which, when executed by one or more processors, cause the one or more processors to perform: receiving input information, the input information including geometric shape information and / or process information of a pattern; and using the machine learning prediction model to predict a multi-dimensional output substrate geometry based on the input information, the prediction including determining an edge placement error (EPE) indicator associated with one or more features of the pattern based on the input information and / or the output substrate geometry.

[0011] In an embodiment, the EPE index is symmetrical or asymmetrical with respect to the one or more features of the pattern.

[0012] In an embodiment, the asymmetric EPE indicator has a non-Gaussian distribution.

[0013] In an embodiment, asymmetrically distributed training data is used to train the machine learning prediction model, so that the weights and / or parameters of the trained machine learning prediction model contribute to the determination of the symmetric or asymmetric EPE indicator.

[0014] In an embodiment, the asymmetric distribution training data includes an asymmetric distribution EPE indicator determined according to a multi-dimensional probability image associated with asymmetric distribution critical dimension (CD) values.

[0015] In an embodiment, the multi-dimensional output substrate geometry is indicative of variability in shapes of features of the pattern.

[0016] In an embodiment, the multi-dimensional output substrate geometry indicates the probability of a given geometry occupying a given location on the substrate.

[0017] In an embodiment, the multi-dimensional output substrate geometry comprises a probabilistic representation of the pattern in multiple dimensions.

[0018] In an embodiment, the pattern probability representation comprises a pattern probability image comprising predicted probabilities of two-dimensional substrate geometry for the one or more features of the pattern.

[0019] In an embodiment, the pattern probability image comprises a plurality of stack images comprising predicted probabilities of two-dimensional substrate geometries of one or more through holes or vias.

[0020] In an embodiment, the instructions are further configured to cause the one or more processors to utilize the machine learning prediction model to predict one or both of (1) a symmetric or asymmetric random edge placement error band and (2) a random failure rate based on the multi-dimensional output substrate geometry.

[0021] In an embodiment, the instructions are further configured to cause the one or more processors to tune or adjust the machine learning prediction model so that the multi-dimensional output substrate geometry matches the measured random edge placement error band or the measured failure rate.

[0022] In an embodiment, the instructions are further configured to cause the one or more processors to adjust the machine learning prediction model so that the multi-dimensional output substrate geometry corresponds to or matches an average profile prediction made based on an optical proximity effect correction model or a lithography process manufacturability check model.

[0023] In an embodiment, the multi-dimensional output substrate geometry is associated with a pattern in a substrate in a semiconductor device, and the patterning process comprises a semiconductor device manufacturing process.

[0024] In an embodiment, the multi-dimensional output substrate geometry comprises a pattern probability image, and wherein the pattern probability image comprises a predicted two-dimensional geometry of one or more vias in the semiconductor device.

[0025] In an embodiment, the multi-dimensional output substrate geometry comprises a pattern probability image, wherein the instructions are further configured to cause the one or more processors to use the pattern probability image for lithography manufacturability checking and / or pattern fidelity metrology in a semiconductor device manufacturing process.

[0026] In an embodiment, the input information includes one or more of a simulated aerial image for a semiconductor device, a simulated resist image, a target substrate size, or data associated with semiconductor device manufacturing from a scanner.

[0027] In an embodiment, the input information comprises a plurality of aerial images, and individual aerial images of the plurality of aerial images correspond to different heights of the resist layer associated with a patterning process.

[0028] In an embodiment, the machine learning prediction model comprises a neural network.

[0029] In an embodiment, the process information includes one or more parameters of one or more manufacturing processes performed for the semiconductor device.

[0030] In an embodiment, the instructions are further configured to cause the one or more processors to train the machine learning prediction model using training information, wherein the training information includes one or more of aerial images, target pattern geometry, or patterning process parameters, and corresponding physical substrate measurement results and / or prediction results from different non-machine learning prediction models.

[0031] In an embodiment, corresponding physical substrate measurements and / or predictions from different non-machine learning prediction models include training pattern probability images.

[0032] In an embodiment, the instructions are further configured to cause the one or more processors to determine adjustments for semiconductor device manufacturing equipment based on the predicted multi-dimensional output substrate geometry.

[0033] In an embodiment, the instructions are further configured to cause the one or more processors to calibrate the machine learning prediction model based on one or both of a post-development inspection dimension and a post-etch inspection dimension associated with a semiconductor device manufacturing process.

[0034] According to another embodiment, a method for predicting a substrate geometry associated with a patterning process is provided, the method comprising: receiving input information, the input information comprising geometric information of a pattern and / or process information; and predicting a multi-dimensional output substrate geometry based on the input information using a machine learning prediction model. The prediction comprises determining an edge placement error (EPE) metric associated with one or more features of the pattern based on the input information and / or the output substrate geometry.

[0035] In an embodiment, the EPE index is symmetrical or asymmetrical with respect to the one or more features of the pattern.

[0036] In an embodiment, the asymmetric EPE indicator has a non-Gaussian distribution.

[0037] In an embodiment, asymmetrically distributed training data is used to train the machine learning prediction model, so that the weights and / or parameters of the trained machine learning prediction model contribute to the prediction of the symmetric or asymmetric EPE indicator.

[0038] In an embodiment, the asymmetric distribution training data includes an asymmetric distribution EPE indicator determined according to a multi-dimensional probability image associated with asymmetric distribution critical dimension (CD) values.

[0039] In an embodiment, the multi-dimensional output substrate geometry is indicative of variability in shapes of features of the pattern.

[0040] In an embodiment, the multi-dimensional output substrate geometry indicates the probability of a given geometry occupying a given location on the substrate.

[0041] In an embodiment, the multi-dimensional output substrate geometry comprises a probabilistic representation of the pattern in multiple dimensions.

[0042] In an embodiment, the pattern probability representation comprises a pattern probability image comprising predicted probabilities of two-dimensional substrate geometry for the one or more features of the pattern.

[0043] In an embodiment, the pattern probability image comprises a plurality of stack images comprising predicted probabilities of two-dimensional substrate geometries of one or more through-holes.

[0044] In an embodiment, the method further comprises using the machine learning prediction model to predict one or both of (1) a symmetric or asymmetric random edge placement error band and (2) a random failure rate based on the multi-dimensional output substrate geometry.

[0045] In an embodiment, the method further comprises adjusting the machine learning prediction model such that the multi-dimensional output substrate geometry matches a measured random edge placement error band or a measured failure rate.

[0046] In an embodiment, the method further comprises adjusting the machine learning prediction model such that the multi-dimensional output substrate geometry corresponds to or matches an average profile prediction made from an optical proximity effect correction model or a lithography process manufacturability check model.

[0047] In an embodiment, the multi-dimensional output substrate geometry is associated with a pattern in a substrate in a semiconductor device, and the patterning process comprises a semiconductor device manufacturing process.

[0048] In an embodiment, the multi-dimensional output substrate geometry comprises a pattern probability image, and wherein the pattern probability image comprises a predicted two-dimensional geometry of one or more vias in the semiconductor device.

[0049] In an embodiment, the multi-dimensional output substrate geometry comprises a pattern probability image, and wherein the method further comprises using the pattern probability image for lithography manufacturability checking and / or pattern fidelity metrology in a semiconductor device manufacturing process.

[0050] In an embodiment, the input information includes one or more of a simulated aerial image for a semiconductor device, a simulated resist image, a target substrate size, or data associated with semiconductor device manufacturing from a scanner.

[0051] In an embodiment, the input information comprises a plurality of aerial images, and individual aerial images of the plurality of aerial images correspond to different heights of the resist layer associated with the patterning process.

[0052] In an embodiment, the machine learning prediction model comprises a neural network.

[0053] In an embodiment, the process information includes one or more parameters of one or more manufacturing processes performed for the semiconductor device.

[0054] In an embodiment, the method further comprises training the machine learning prediction model using training information comprising one or more of aerial images, target pattern geometry, or patterning process parameters, and corresponding physical substrate measurement results and / or prediction results from different non-machine learning prediction models.

[0055] In an embodiment, corresponding physical substrate measurements and / or predictions from different non-machine learning prediction models include training pattern probability images.

[0056] In an embodiment, the method further comprises determining adjustments for semiconductor device manufacturing equipment based on the predicted multi-dimensional output substrate geometry.

[0057] In an embodiment, the method further comprises calibrating the machine learning prediction model based on one or both of a post-development inspection dimension and a post-etch inspection dimension associated with a semiconductor device manufacturing process.

[0058] According to an embodiment, a method is provided, comprising: receiving input information using one or more processors, the input information comprising geometric information and / or patterning process information of a pattern on a substrate; determining, using the one or more processors, an edge placement error (EPE) indicator associated with one or more features of the pattern based on the input information; and determining, using the one or more processors, one or more regions of the pattern on the substrate having one or more potential defects based on the EPE indicator.

[0059] In an embodiment, the EPE index is symmetrical or asymmetrical with respect to the one or more features of the pattern.

[0060] In an embodiment, the asymmetric EPE indicator has a non-Gaussian distribution.

[0061] In an embodiment, a machine learning prediction model is used to determine the EPE indicator, and asymmetrically distributed training data is used to train the machine learning prediction model, so that the weights and / or parameters of the trained machine learning prediction model contribute to the prediction of the EPE indicator, regardless of whether the EPE indicator is symmetrical or asymmetrical.

[0062] In an embodiment, the asymmetric distribution training data includes an asymmetric distribution EPE indicator determined according to a multi-dimensional probability image associated with asymmetric distribution critical dimension (CD) values.

[0063] In an embodiment, the one or more regions of the pattern on the substrate having the one or more potential defects include hot spots.

[0064] In an embodiment, the EPE indicator is related to a yield, and the yield is associated with the pattern on the substrate.

[0065] In an embodiment, the input information includes one or more parameters related to global overlay, global critical dimension, local overlay, local critical dimension, line edge roughness, local placement error, or local critical dimension uniformity; and / or values ​​indicating an interaction between two or more parameters.

[0066] In an embodiment, the input information is measured and / or simulated.

[0067] According to another embodiment, a manufacturing process is provided, the process comprising: receiving input information using one or more processors, the input information comprising geometric shape information and / or patterning process information of a pattern on a substrate; determining, using the one or more processors, an edge placement error (EPE) indicator associated with one or more features of the pattern based on the input information; and determining, using the one or more processors, one or more regions of the pattern on the substrate having one or more potential defects based on the EPE indicator.

[0068] In an embodiment, the EPE index is symmetrical or asymmetrical with respect to the one or more features of the pattern.

[0069] In an embodiment, the asymmetric EPE indicator has a non-Gaussian distribution.

[0070] In an embodiment, a machine learning prediction model is used to determine the EPE indicator, and asymmetrically distributed training data is used to train the machine learning prediction model, so that the weights and / or parameters of the trained machine learning prediction model contribute to the prediction of the EPE indicator, regardless of whether the EPE indicator is symmetrical or asymmetrical.

[0071] In an embodiment, the asymmetric distribution training data includes an asymmetric distribution EPE indicator determined according to a multi-dimensional probability image associated with asymmetric distribution critical dimension (CD) values.

[0072] In an embodiment, the one or more regions of the pattern on the substrate having the one or more potential defects include hot spots.

[0073] In an embodiment, the EPE indicator is related to a yield, and the yield is associated with the pattern on the substrate.

[0074] In an embodiment, the input information includes one or more parameters, wherein the one or more parameters include global overlay, global critical dimension, local critical dimension, feature edge roughness, local critical dimension uniformity, mask critical dimension, mask placement error, scanner to scanner critical dimension, scanner to scanner overlay mismatch, patterning tool critical dimension, patterning tool overlay mismatch, or local and global variations in feature asymmetry; and / or values ​​indicating interaction / crosstalk between two or more parameters.

[0075] In an embodiment, the EPE indicator comprises a combination of two or more of said parameters and / or values ​​indicating an interaction between two or more of said parameters.

[0076] In an embodiment, said EPE indicator is calculated and / or predicted mathematically based on one or more of said parameters and / or a value indicative of said interaction between two or more of said parameters.

[0077] In an embodiment, the input information is measured and / or simulated.

[0078] In an embodiment, the EPE indicator is determined based on a target EPE probability level, and the one or more processors are configured to enable the target EPE probability level to be entered or selected by a user via a user interface.

[0079] In an embodiment, receiving the input information, determining the EPE indicator, and determining the one or more regions of the pattern on the substrate having one or more potential defects are performed as part of evaluating, improving, predicting, or verifying the performance of a semiconductor device, wherein the evaluating, improving, predicting, or verifying the performance of a semiconductor device includes source mask optimization, optical proximity effect correction, lithography manufacturability checking, and / or design for a manufacturing process associated with the semiconductor device.

[0080] In an embodiment, determining one or more regions of the pattern on the substrate having one or more potential defects based on the EPE indicator comprises determining a probability that a given feature of the pattern occupies a given location on the substrate.

[0081] In an embodiment, determining one or more regions of the pattern on the substrate having one or more potential defects based on the EPE metric is based on a cost function that balances an acceptable defect probability with the resources required to inspect the number of the one or more regions, wherein the acceptable defect probability is related to the number of the one or more regions of the pattern on the substrate having the one or more potential defects that are targets for inspection.

[0082] In an embodiment, determining the one or more regions of the pattern on the substrate having the one or more potential defects based on the EPE indicator includes determining a pattern probability image of one or more features of the pattern.

[0083] In an embodiment, the pattern probability image comprises a predicted two-dimensional substrate geometry of one or more features.

[0084] In an embodiment, the input information includes one or more of, and / or is determined based on one or more of: a predicted aerial image for one or more semiconductor device layers, a target substrate size, or data from a scanner and / or patterning process associated with semiconductor device manufacturing.

[0085] In an embodiment, the process further includes determining adjustments to semiconductor device manufacturing equipment based on the one or more regions of the pattern on the substrate having the one or more potential defects.

[0086] In an embodiment, the adjustment includes one or more of a pattern change, a mask change, a dose change, a focus change, an exposure change, a pupil change, an etching and / or deposition process temperature change, and an etching and / or deposition process time change.

[0087] In an embodiment, the one or more processors include a computational lithography model, and wherein determining the EPE metric includes predicting the EPE metric using the input information as an input to the computational lithography model.

[0088] In an embodiment, said geometric information comprises one or more indications of a size and / or position of one or more features of said pattern.

[0089] According to an embodiment, a non-transitory computer-readable medium is provided, on which instructions are provided. When the instructions are executed by a computer, the process described in any one of the above-described embodiments is implemented.

[0090] According to an embodiment, a non-transitory computer-readable medium is provided, having instructions thereon, which, when executed by a computer, causes the computer to: receive input information, the input information comprising geometric shape information and / or patterning process information of a pattern on a substrate; determine an edge placement error (EPE) indicator associated with one or more features of the pattern based on the input information; and identify one or more regions of the pattern on the substrate having one or more potential defects based on the EPE indicator.

[0091] In an embodiment, the EPE index is symmetrical or asymmetrical with respect to the one or more features of the pattern.

[0092] In an embodiment, the asymmetric EPE indicator has a non-Gaussian distribution.

[0093] In an embodiment, the EPE indicator is determined using a machine learning prediction model, and wherein the machine learning prediction model is trained using asymmetrically distributed training data, so that the weights and / or parameters of the trained machine learning prediction model contribute to the prediction of the EPE indicator, regardless of whether the EPE indicator is symmetrical or asymmetrical.

[0094] In an embodiment, the asymmetric distribution training data includes an asymmetric distribution EPE indicator determined according to a multi-dimensional probability image associated with asymmetric distribution critical dimension (CD) values.

[0095] In an embodiment, the one or more regions of the pattern on the substrate having the one or more potential defects include hot spots.

[0096] In an embodiment, the EPE indicator is related to a yield, and the yield is associated with the pattern on the substrate.

[0097] In an embodiment, the input information includes one or more parameters, wherein the one or more parameters include global overlay, global critical dimension, local critical dimension, feature edge roughness, local critical dimension uniformity, mask critical dimension, mask placement error, scanner to scanner critical dimension, scanner to scanner overlay mismatch, patterning tool critical dimension, patterning tool overlay mismatch, or local and global variations in feature asymmetry; and / or values ​​indicating interaction / crosstalk between two or more parameters.

[0098] In an embodiment, the EPE indicator comprises a combination of two or more of the parameters and / or values ​​indicating an interaction between two or more of the parameters.

[0099] In an embodiment, the input information is measured and / or simulated.

[0100] In an embodiment, the EPE indicator is determined based on a target EPE probability level, wherein the target EPE probability level is entered or selected by a user via a user interface.

[0101] In an embodiment, receiving the input information, determining the EPE indicator, and determining the one or more regions of the pattern on the substrate having one or more potential defects are performed as part of source mask optimization, optical proximity effect correction, lithography manufacturability checking, and / or design of a manufacturing process associated with a semiconductor device.

[0102] In an embodiment, determining one or more regions of the pattern on the substrate having one or more potential defects based on the EPE indicator comprises determining a probability of a given feature occupying a given location on the substrate.

[0103] In an embodiment, determining one or more regions of the pattern on the substrate having one or more potential defects based on the EPE indicator is based on a cost function, which balances the number of one or more regions of the pattern on the substrate having one or more potential defects and the resources required to inspect the one or more regions.

[0104] In an embodiment, determining the one or more regions of the pattern on the substrate having the one or more potential defects based on the EPE indicator includes determining a pattern probability image of one or more features of the pattern.

[0105] According to one embodiment, one or more non-transitory computer-readable media are provided, the non-transitory computer-readable media storing a machine learning prediction model and instructions, which, when executed by one or more processors, cause the one or more processors to perform: receiving input information, the input information including geometry information and / or patterning process information for a semiconductor device manufacturing process; using the machine learning prediction model to predict an output semiconductor device geometry based on the input information, the output semiconductor device geometry including a multi-dimensional probability representation of a pattern, the prediction including determining an edge placement error (EPE) indicator associated with one or more features of the pattern based on the input information and / or the output semiconductor device geometry; receiving new input information determined based on an adjustment to the semiconductor device manufacturing process, the adjustment being determined based on the output semiconductor device geometry; and using the machine learning model to (i) predict an updated output semiconductor device geometry based on the new input information, and (ii) including determining an updated EPE indicator based on the new input information and / or the updated output semiconductor device geometry.

[0106] In an embodiment, the pattern probabilistic representation comprises a pattern probability image comprising predicted two-dimensional substrate geometry for one or more features of the pattern.

[0107] In an embodiment, the pattern probabilistic representation includes a predicted two-dimensional geometry of one or more vias in a semiconductor device.

[0108] In an embodiment, the instructions are further configured to cause the one or more processors to utilize the machine learning prediction model to predict one or both of (1) a symmetric or asymmetric random edge placement error band and (2) a random failure rate based on the pattern probability image.

[0109] In an embodiment, the input information includes one or both of a simulated aerial image and a simulated resist image. BRIEF DESCRIPTION OF THE DRAWINGS

[0110] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate one or more embodiments and, together with the description, explain these embodiments. Embodiments of the invention will now be described, by way of example only, with reference to the accompanying schematic drawings, in which corresponding reference numerals indicate corresponding parts, and in which:

[0111] Figure 1 A block diagram of various subsystems of a lithographic projection apparatus according to an embodiment is illustrated.

[0112] Figure 2 An exemplary flow chart for simulating lithography in a lithographic projection apparatus according to an embodiment is illustrated.

[0113] Figure 3 The figure illustrates the method according to an embodiment.

[0114] Figure 4 The diagram illustrates receiving input information, using a machine learning prediction model to predict a multi-dimensional output substrate geometry, and performing process monitoring operations according to an embodiment.

[0115] Figure 5 The figure shows a predicted pattern probability image according to an embodiment.

[0116] Figure 6 The figure illustrates a multi-dimensional output substrate geometry probabilistic prediction based on a non-linear scale, according to an embodiment.

[0117] Figure 7 The figure shows the pattern probability image predicted by the machine learning prediction model for various dose and focus conditions according to an embodiment.

[0118] Figure 8 The graph illustrates edge placement error (EPE) according to an embodiment.

[0119] Fig. 9 The figure shows another method according to the present invention according to an embodiment.

[0120] Fig.10 The diagram illustrates EPE contribution factors used to determine an EPE indicator according to an embodiment.

[0121] Fig.11 The figure shows a pattern probability image according to an embodiment.

[0122] Fig.12 The graph illustrates symmetric and asymmetric predicted edge placement errors (EPEs) according to an embodiment.

[0123] Fig.13is a block diagram of an example computer system according to an embodiment.

[0124] Fig.14 is a schematic diagram of a lithographic projection apparatus according to an embodiment.

[0125] Fig.15 is a schematic diagram of another lithography projection apparatus according to an embodiment.

[0126] Fig.16 is a detailed view of a lithographic projection apparatus according to an embodiment.

[0127] Fig.17 is a detailed view of a source collector module of a lithographic projection apparatus according to an embodiment.

[0128] Fig.18 Embodiments of electron beam inspection apparatus according to embodiments are schematically depicted.

[0129] Fig.19 Further embodiments of an inspection device according to an embodiment are schematically illustrated. DETAILED DESCRIPTION

[0130] With the introduction of extreme ultraviolet (EUV) lithography, random variability effects are becoming a major source of patterning errors, such as edge placement errors and catastrophic pattern failures or faults. It would be helpful to characterize in detail (such as in a statistical (e.g., probabilistic) sense) the resulting effects or impacts of random edge placement errors, local CD variations (e.g., local CD uniformity - LCDU), missing pattern features, bridged pattern features, and / or other features of the pattern. For the purposes of monitoring semiconductor manufacturing process characteristics, process window center determination or centering, process performance, and / or other purposes, efforts have been made to determine simple but suitable physical parameters as empirical "predictors" of LCDU and pattern failures.

[0131] These methods provide empirical "models" that allow the measured LCDU or failure rate to be extrapolated to a level relevant to the user's process requirements. However, these models are based on CD measurements (i.e., multiple individual measurements taken along a predefined cut line) that typically do not provide sufficient information about the two-dimensional pattern shape. Furthermore, these models have no predictive power for any specified varying process parameters, or for new or different pattern types and shapes that have not been used for model fitting or calibration.

[0132] Stochastic simulations using Monte-Carlo methods have been included in rigorous commercial lithography simulation packages and have proven valuable in process and patterning exploration. However, these simulators cannot handle large-scale or full-chip pattern layouts due to runtime limitations and / or other reasons.

[0133] Previous semi-empirical random edge placement (SEPE) models were not sufficiently accurate or precise. These models derived certain parameters (e.g., image log slope) from simulated aerial images, and these derived parameters were fitted to measured LCDU values ​​during calibration. However, in practice, there is no strict definition of an "aerial image" (or blurred aerial image, or latent image), or where or when the image slope is to be evaluated exactly and correctly.

[0134] On the other hand, typically, the aerial image includes sufficient information to be able to predict or otherwise determine the random effects. To address these and other shortcomings of previous models, the present disclosure provides a new method for predicting substrate geometry associated with a patterning process (and / or a system configured to predict substrate geometry associated with a patterning process). The method includes receiving input information, the input information including geometric information and / or process information of the pattern; and using a machine learning prediction model to predict a multi-dimensional output substrate geometry based on the input information. In some embodiments, the prediction includes determining an edge placement error (EPE) metric associated with one or more features of the pattern based on the input information and / or the output substrate geometry. In some embodiments, the machine learning-based prediction model is configured to take a simulated aerial image intensity distribution and / or other information as input, and predict a two-dimensional pattern probability image (PPI) and / or other information. In some embodiments, the simulated aerial image intensity distribution is generated according to the aerial image simulation model.

[0135] Typically, in conjunction with contour extraction and contour stacking techniques, a pattern probability image can be generated based on measurements of a large number of scanning electron microscope (SEM) images or large field SEM images of repeating pattern arrays in multiple physical substrates (e.g., semiconductor devices). Embodiments of the present disclosure can predict and / or otherwise determine a pattern probability image, which includes a two-dimensional distribution of pattern variability (e.g., SEPE bands), and pattern failure rates (e.g., in the form of a grayscale map aligned with a target layout pattern, such as can be described in a .GDS file), and / or other information.

[0136] In some embodiments, a machine learning (e.g., computational neural network) prediction model is trained using simulated aerial images and corresponding measured (as described above) pattern probability images, and / or other information as described below. The simulated aerial images can be generated using an aerial image simulation model based on known mask layouts, mask characteristics, scanner optics, resist film stack characteristics, simulated aerial image grayscale images aligned to the .GDS layout pattern, and / or other information.

[0137] Embodiments of the present disclosure may advantageously provide predictive capabilities for full-chip simulation-based applications (e.g., for lithography manufacturability checks (LMC), computational hot spot detection (CHD), pattern fidelity metrology (PFM), and / or other operations for critical pattern identification). Embodiments of the present disclosure may, for example, rely on the training method of the model to provide predictive capabilities for random variation bands and / or total pattern variability. Embodiments of the present disclosure may advantageously provide predictive capabilities for random pattern failure rates, including predictions at failure levels of "less than ppm" (parts per million), which cannot be modeled regularly (e.g., due to the large number of measurements required for typical correlations in previous models at such low failure rates). Embodiments of the present disclosure may advantageously be trained using simulated aerial images at different locations in the resist layer, and predictions may be made for the aerial images to capture resist profile effects and corresponding defect mechanisms that may be associated with high numerical aperture (NA) EUV lithography. These example advantages are not intended to be limiting.

[0138] Another aspect of the present invention provides for the use of edge placement error (EPE) indicators for hot spot (e.g., improperly designed and / or manufactured parts of a device) detection and / or verification. Based on various individual indicators for detecting hot spots, current process adjustments are made (e.g., as part of design for manufacturing or design for manufacturability (DFM), lithography manufacturability check (LMC), and / or other design verification processes). These indicators include critical dimension (CD) error, low contrast / high mask error enhancement factor (MEEF), process window (PW) band and / or other key performance indicators (KPIs). However, these and other individual KPIs are generally not well correlated with overall device yield (e.g., as the ultimate goal of process development and optimization). Specifically, for example, individual CD and overlay measurements, as well as optical proximity effect correction (OPC) or source mask optimization (SMO) manufacturability verification KPIs, have relatively little ability to predict potential hot spots in designed or manufactured devices. If a hot spot is missed or not detected, the device can continue to be processed and will only be discarded later in the manufacturing process.

[0139] Using these individual KPIs with relatively little ability to predict hot spots may result in lower layer and device yields (e.g., because potential manufacturing issues may not be identified in the absence of / few predicted hot spots), and / or require more extensive on-wafer defect / hot spot inspection and verification, followed by more process optimization cycles. Using these individual KPIs with relatively little ability to predict hot spots may also result in longer ramp-up times or ramp-up times and costs, including additional mask writing and lithography process optimization, and other disadvantages.

[0140] Embodiments of the present disclosure provide an overall EPE metric that advantageously and significantly indicates overall layer and device yields compared to previous KPIs and can be used to more effectively predict and / or detect hot spots. The EPE metric can be determined based on a combination of EPE contribution factors including global and local CD errors, expected local and global pattern displacements (overlay error + local placement error (LPE)), and / or other factors.

[0141] Embodiments of the present disclosure are described in detail with reference to the accompanying drawings, which are provided as illustrative examples of the present disclosure so that those skilled in the art can practice the present disclosure. It is noteworthy that the following figures and examples are not meant to limit the scope of the present invention to a single embodiment, but other embodiments can be implemented by exchanging some or all of the described or illustrated elements. In addition, in the case where certain elements of the present disclosure can be partially or completely implemented using known components, only those parts of these known components necessary for understanding the present disclosure will be described, and detailed descriptions of other parts of these known components will be omitted to avoid confusing the present disclosure. Unless otherwise provided herein, embodiments described as being implemented in software should not be limited thereto, but may include embodiments implemented in hardware, or a combination of software and hardware, or vice versa, as will be understood by those skilled in the art. In this specification, embodiments showing a single component should not be considered restrictive; on the contrary, unless otherwise expressly stated herein, the present disclosure is intended to cover other embodiments including multiple identical components, or vice versa. In addition, unless expressly provided, the applicant does not intend to give any term in the specification or claims an unusual or special meaning. Additionally, the present disclosure also encompasses present and future known equivalents to the known components mentioned herein, which are described by way of example.

[0142] Although specific reference may be made herein to the manufacture of ICs, it should be clearly understood that the description herein has many other possible applications. For example, the description herein may be used to manufacture integrated optical systems, guidance and detection patterns for magnetic domain memories, liquid crystal display panels, thin film magnetic heads, etc. Those skilled in the art will appreciate that in the context of such alternative applications, any use of the terms "reticle", "wafer" or "die" herein should be considered interchangeable with the more general terms "mask", "substrate" and "target portion", respectively.

[0143] In this document, the terms "radiation" and "beam" are used to cover all types of electromagnetic radiation, including ultraviolet radiation (e.g., having a wavelength of 365nm, 248nm, 193nm, 157nm or 126nm) and EUV (i.e., extreme ultraviolet radiation, e.g., having a wavelength in the range of about 5nm to 100nm).

[0144] The term "projection optics" as used herein should be interpreted broadly to cover various types of optical systems, including, for example, refractive optics, reflective optics, apertures, and reflective-refractive optics. The term "projection optics" may also include components that operate according to any of these design types for collectively or individually directing, shaping, or controlling a projection beam of radiation. The term "projection optics" may include any optical component in a lithographic projection apparatus, regardless of where the optical component is located on the optical path of the lithographic projection apparatus. Projection optics may include optical components for shaping, adjusting, and / or projecting radiation from the source before it passes through the (e.g., semiconductor) patterning device, and / or optical components for shaping, adjusting, and / or projecting the radiation after it passes through the patterning device. Projection optics typically do not include the source and the patterning device.

[0145] The (e.g., semiconductor) patterning device may include or may form one or more design layouts. The design layout may be generated using a CAD (i.e., computer-aided design) process. Such a process is often referred to as EDA (i.e., electronic design automation). Most CAD programs follow a set of predetermined design rules in order to generate a functional design layout / patterning device. These rules are set by processing and design constraints. For example, the design rules define the spatial tolerance between devices (such as gates, capacitors, etc.) or interconnects to ensure that the devices or lines do not interact with each other in an undesirable manner. The design rules may include and / or specify specific parameters, restrictions on parameters and / or parameter ranges, and / or other information. One or more of the design rule restrictions and / or parameters may be referred to as "critical dimensions" (CD). The critical dimension of a device may be defined as the minimum width of a line or hole, or the minimum space / gap between two lines or two holes, or other features. Thus, CD determines the overall size and density of the designed device. One of the goals in device manufacturing is to faithfully reproduce the original design intent (via the patterning device) on the substrate.

[0146] The term "mask" or "patterning device" as used herein may be broadly interpreted as referring to a general semiconductor patterning device that can be used to impart a patterned cross-section to an incident radiation beam, the patterned cross-section corresponding to the pattern to be produced in a target portion of the substrate; the term "light valve" may also be used in this context. In addition to classical masks (transmissive or reflective, binary, phase-shifting, hybrid, etc.), examples of other such patterning devices include programmable mirror arrays and / or programmable LCD arrays.

[0147] An example of a programmable mirror array may be a matrix-addressable surface having a viscoelastic control layer and a reflective surface. The basic principle on which such a device is based is that, for example, addressed areas of the reflective surface reflect incident radiation as diffracted radiation, while unaddressed areas reflect incident radiation as non-diffracted radiation. Using a suitable filter, the non-diffracted radiation can be filtered out of the reflected beam, leaving only the diffracted radiation; in this way, the beam is patterned according to the addressing pattern of the matrix-addressable surface. The required matrix addressing can be performed using suitable electronic devices. An example of a programmable LCD array is given in U.S. Patent No. 5,229,872, which is incorporated herein by reference.

[0148] As used herein, the term "patterning process" generally means a process that produces an etched substrate by applying a specified pattern of light as part of a photolithography process. However, a "patterning process" may also include plasma etching, as many of the features described herein may provide benefits for using plasma processing to form printed patterns.

[0149] As used herein, the term "target pattern" means an idealized pattern to be etched on a substrate.

[0150] As used herein, the term "printed pattern" means a physical pattern on a substrate etched based on a target pattern. The printed pattern may include, for example, grooves, channels, recesses, edges, or other two-dimensional and three-dimensional features resulting from a photolithography process.

[0151] As used herein, the terms "predictive model" and / or "process model" (which may be used interchangeably) mean a model that includes one or more models that simulate a patterning process. For example, the predictive and / or process models may include an optical model (e.g., which models the lens system / projection system used to deliver light during the lithography process, and may include modeling the final optical image of the light reaching the resist), a resist model (e.g., which models the physical effects of the resist, such as due to the chemical effects of light), and an OPC model (e.g., which may be used to manufacture a target pattern, and may include sub-resolution resist features (SRAFs), etc.), and / or other models.

[0152] As used herein, the term "calibrate" means to modify (eg, improve or adjust) and / or validate something, such as a process model.

[0153] Figure 1 A diagram of the various subsystems of an exemplary lithographic projection apparatus 10A is illustrated. The major components are: a radiation source 12A, which may be a deep ultraviolet excimer laser source or other type of source, including an extreme ultraviolet (EUV) source (as discussed above, the lithographic projection apparatus need not have a radiation source itself); illumination optics, which, for example, define partial coherence (expressed as standard deviation) and may include optics 14A, 16Aa, and 16Ab that shape the radiation from source 12A; a patterning device 18A; and transmission optics 16Ac that projects an image of the patterning device pattern onto substrate plane 22A. An adjustable filter or hole 20A at the pupil plane of the projection optics can constrain the range of beam angles impinging on the substrate plane 22A, where the maximum possible angle defines the numerical aperture NA = n sin(Θmax) of the projection optics, where n is the refractive index of the medium between the substrate and the final element of the projection optics, and Θmax is the maximum angle of the beam emitted from the projection optics that can still impinge on the substrate plane 22A.

[0154] In a lithographic projection apparatus, a source providing illumination (i.e., radiation) to a pattern forming device and projection optical devices directs and shapes the illumination onto a substrate via the pattern forming device. The projection optical device may include at least some of components 14A, 16Aa, 16Ab, and 16Ac. An aerial image (AI) is a distribution of radiation intensity at the substrate level. A resist model may be used to calculate a resist image based on the aerial image, and an example of this situation may be found in U.S. Patent Application Publication No. US 2009-0157630, the entire disclosure of which is hereby incorporated by reference. The resist model is related to the properties of the resist layer (e.g., the effects of chemical processes occurring during exposure, post-exposure baking (PEB), and development). The optical properties of the lithographic projection apparatus (e.g., the properties of the illumination, pattern forming device, and projection optical devices) specify the aerial image and may be defined in an optical model. Since the patterning device used in a lithographic projection apparatus can be varied, it is desirable to decouple the optical properties of the patterning device from the optical properties of the rest of the lithographic projection apparatus, including at least the source and the projection optics. Techniques and models for transforming a design layout into various lithographic images (e.g., aerial images, resist images, etc.), using which OPC is applied and performance (e.g., in terms of process windows) is evaluated, are described in U.S. Patent Application Publication Nos. US 2008-0301620, 2007-0050749, 2007-0031745, 2008-0309897, 2010-0162197, and 2010-0180251, the disclosure of each of which is hereby incorporated by reference in its entirety.

[0155] It may be desirable to use one or more tools to produce results that can be used, for example, to design, control, monitor, etc. the patterning process. One or more tools may be provided for computationally controlling, designing, etc. one or more aspects of the patterning process, such as pattern design for a pattern forming device (including, for example, adding sub-resolution assist features or optical proximity effect correction), illumination for a pattern forming device, and the like. Thus, in a system for computationally controlling, designing a manufacturing process involving patterning, manufacturing system components and / or processes may be described by various functional modules and / or models. In some embodiments, one or more electronic (e.g., mathematical, parametric, etc.) models describing one or more steps and / or devices of the patterning process may be provided. In some embodiments, a simulation of the patterning process may be performed using one or more electronic models to simulate how the patterning process forms a patterned substrate using a design pattern provided by a pattern forming device.

[0156] exist Figure 2 An exemplary flow chart of simulated lithography in a lithographic projection apparatus is shown in FIG. 1 . An illumination model 31 represents the optical properties of the illumination (including radiation intensity distribution and / or phase distribution). A projection optical model 32 represents the optical properties of the projection optical device (including changes in the radiation intensity distribution and / or phase distribution caused by the projection optical device). A design layout model 35 represents the optical properties of a design layout 33 (including changes in the radiation intensity distribution and / or phase distribution caused by a given design layout), which is a representation of the arrangement of features on or formed by a pattern forming device. The above-mentioned illumination model 31, projection optical device model 32 and design layout model 35 can be used to simulate an aerial image 36. A resist image 38 can be simulated from the aerial image 36 using a resist model 37. The simulation of lithography can, for example, predict the profile and / or CD in the resist image.

[0157] More specifically, the illumination model 31 may represent the optical properties of the illumination, including but not limited to numerical aperture (NA) standard deviation (σ) settings, and any specific illumination shapes (e.g., off-axis illumination, such as annular, quadrupole, dipole, etc.). The projection optics model 32 may represent the optical properties of the projection optics, including, for example, aberrations, distortions, refractive indices, physical sizes or dimensions, etc. The design layout model 35 may also represent one or more physical properties of a physical patterning device, such as described in, for example, U.S. Pat. No. 7,587,704, which is incorporated herein by reference in its entirety. The optical properties associated with the lithographic projection apparatus (e.g., properties of the illumination, the patterning device, and the projection optics) determine the aerial image. Since the patterning device used in the lithographic projection apparatus can be changed, it is desirable to separate the optical properties of the patterning device from the optical properties of the rest of the lithographic projection apparatus, which includes at least the illumination and the projection optics (hence the design layout model 35).

[0158] The resist model 37 can be used to calculate the resist image from the aerial image, an example of which can be found in U.S. Pat. No. 8,200,468, which is incorporated herein by reference in its entirety. The resist model typically involves the properties of the resist layer (e.g., the effects of chemical processes occurring during exposure, post-exposure baking, and / or development).

[0159] The goal of the simulation is to accurately predict, for example, edge placement, spatial image intensity slope, and / or CD, which can then be compared to the intended design. The intended design is typically defined as a pre-OPC design layout that can be provided in a standardized digital file format such as GDS, GDSII, OASIS, or other file formats.

[0160] One or more portions, referred to as "segments" or "clips," may be identified from the design layout. In an embodiment, a set of segments is extracted that represent complex patterns in the design layout (typically about 50 to 1000 segments, although any number of segments may be used). As will be appreciated by those skilled in the art, these patterns or segments represent small portions of the design (e.g., circuits, cells, etc.), and in particular, segments represent small portions that require special attention and / or verification. Alternatively, a segment may be a portion of a design layout or may be similar to or have similar behavior to a portion of a design layout, where critical features are identified through experience (including segments provided by a customer), through trial and error, or by running full-chip simulations. A segment often contains one or more test patterns or measurement patterns. An initial larger set of segments may be provided a priori by a customer based on known critical feature areas in the design layout, which requires specific image optimization. Alternatively, in another embodiment, the initial larger set of segments may be extracted from the entire design layout using an automated (such as machine vision) or manual algorithm that identifies critical feature areas.

[0161] For example, simulation and modeling can be used to configure one or more features of the pattern forming device pattern (e.g., perform optical proximity effect correction), one or more features of the illumination (e.g., change one or more characteristics of the spatial / angular intensity distribution of the illumination, such as changing the shape), and / or one or more characteristics of the projection optical device (e.g., numerical aperture, etc.). Such configurations can be generally referred to as mask optimization, source optimization, and projection optimization, respectively. Such optimizations can be performed separately or combined into different combinations. One such example is source-mask optimization (SMO), which involves configuring one or more features of the patterning device pattern together with one or more features of the illumination. Optimization techniques can focus on one or more fragments. The optimization can use the machine learning model described herein to predict the values ​​of various parameters (including images, etc.).

[0162] In some embodiments, the optimization process of the system can be expressed as a cost function. The optimization process may include a process of finding a set of parameters (design variables, process variables, etc.) of the system that minimizes the cost function. The cost function may have any suitable form that depends on the target of the optimization. For example, the cost function may be the weighted root mean square (RMS) of the deviation of a specific characteristic (evaluation point) of the system relative to the expected value (e.g., ideal value) of these characteristics. The cost function may also be the maximum value (i.e., the worst deviation) of these deviations. The term "evaluation point" should be broadly interpreted as including any characteristic of the system or manufacturing method. The design and / or process variables of the system may be limited to a limited range and / or may be interdependent due to the practicality of the implementation of the system and / or method. In the case of a lithographic projection device, these constraints are generally related to the physical properties and characteristics of the hardware (such as an adjustable range) and / or the manufacturability design rules of the pattern forming device. For example, the evaluation point may include a physical point on the resist image on the substrate, and non-physical characteristics such as dose and focal length.

[0163] In a lithographic projection apparatus, as an example, the cost function can be expressed as

[0164]

[0165] in are N design variables or their values, and Can be a design variable Functions such as The difference between the actual value and the expected value of a characteristic for a set of values ​​of a design variable. In some embodiments, is with The characteristic may be, for example, the position of the edge of the pattern measured at a given point on the edge. Can have different weights For example, if a particular edge has a narrow range of allowed positions, then a value for Weight Can be given a higher value. It can also be a function of the interlayer characteristics, which in turn are the design variables Of course, is not limited to the form in the above equation and It may be in any other suitable form.

[0166] The cost function may represent any one or more suitable characteristics of the lithographic projection apparatus, the lithographic process, or the substrate, such as focal length, CD, image shift, image deformation, image rotation, random variation, throughput, local CD variation, process window, inter-layer characteristics, or a combination thereof. In one embodiment, the cost function may include a function representing one or more characteristics of the resist image. For example, It can be simply the distance between a point in the resist image and the expected position of that point (i.e., the edge placement error ). The parameters (eg, design variables) may include any adjustable parameters, such as adjustable parameters of the source, the patterning device, the projection optics, dose, focal length, and the like.

[0167] The parameters (eg, design variables) may have constraints, which may be expressed as , where Z is a set of possible values ​​for the design variables. A possible constraint on the design variables may be imposed by the desired throughput of the lithographic projection apparatus. In the absence of such a constraint imposed by the desired throughput, optimization may result in a set of values ​​for the design variables that are impractical. Constraints should not be interpreted as necessities. For example, the throughput may be affected by the pupil fill ratio. For some illumination designs, a low pupil fill ratio may discard radiation, resulting in a lower throughput. The throughput may also be affected by the chemical reaction of the resist. Slower resists (e.g., resists that require a higher amount of radiation to be properly exposed) result in a lower throughput.

[0168] In some embodiments, the illumination model 31, the projection optics model 32, the design layout model 35, the resist model 37, and / or other models associated with and / or included in the integrated circuit manufacturing process may be empirical models for performing the operations of the methods described herein. The empirical models may predict outputs based on correlations between various inputs (e.g., one or more characteristics of a mask or wafer image, one or more characteristics of a design layout, one or more characteristics of the patterning device, one or more characteristics of the illumination used in the lithography process, such as wavelength, etc.).

[0169] For example, the empirical model can be a machine learning model and / or any other parameterized model. In some embodiments, the machine learning model (for example) can be and / or include a mathematical equation, an algorithm, a drawing, a chart, a network (e.g., a neural network), and / or other tools and machine learning model components. For example, the machine learning model can be and / or include one or more neural networks, the one or more neural networks having an input layer, an output layer, and one or more intermediate layers or hidden layers. In some embodiments, the one or more neural networks can be and / or include a deep neural network (e.g., a neural network having one or more intermediate layers or hidden layers between the input layer and the output layer).

[0170] As an example, the one or more neural networks may be based on a large number of neural units (or artificial neurons). The one or more neural networks may loosely, i.e., not strictly, simulate the way a biological brain works (e.g., by providing a large cluster of biological neurons connected by axons). Each neural unit of the neural network may be connected to many other neural units of the neural network. These connections may strengthen or inhibit their influence on the activation state of the connected neural units. In some embodiments, each individual neural unit may have a summation function that combines the values ​​of all its inputs. In some embodiments, each connection (or neural unit itself) may have a threshold function so that the signal must exceed the threshold before it can be allowed to propagate to other neural units. These neural network systems may be self-learning and trained, rather than explicitly programmed, and they may perform significantly better in certain areas of problem solving than traditional computer programs. In some embodiments, the one or more neural networks may include multiple layers (e.g., where the signal path traverses from the front layer to the back layer). In some embodiments, backpropagation techniques may be used by the neural network, where forward stimulation is used to reset the weights on the "front" neural unit. In some embodiments, stimulation and inhibition for the one or more neural networks may flow more freely, and the connections interact in a more chaotic and complex manner. In some embodiments, the intermediate layers of the one or more neural networks include one or more convolutional layers, one or more recurrent layers, and / or other layers.

[0171] The one or more neural networks may be trained (i.e., their parameters determined) using a set of training information. The training information may include a set of training samples. Each sample may be a pair, including an input object (usually a vector, which may be referred to as a feature vector) and a desired output value (also referred to as a management signal). A training algorithm analyzes the training information and adjusts the behavior of the neural network by adjusting the parameters of the neural network (e.g., the weights of one or more layers) based on the training information. For example, given a form of A set of N training samples such that is the eigenvector of the ith example and yes management signal, a training algorithm seeks a neural network ,in is the input space and is the output space. A feature vector is an n-dimensional vector that represents the numerical features of some object (e.g., a simulated space image, a chip design, a fragment, etc.). The vector space associated with these vectors is often called the feature space. After training, the neural network can be used to make predictions using new samples.

[0172] An exemplary method according to an embodiment of the present disclosure includes: receiving input information including geometric information and / or process information of a pattern; and using a machine learning prediction model to predict a multi-dimensional output substrate geometry based on the input information. The prediction includes determining an edge placement error (EPE) indicator associated with one or more features of the pattern based on the input information, and predicting the multi-dimensional output substrate geometry based on the EPE indicator. The current machine learning prediction model is calibrated (e.g., trained) using training information. The training information may include simulated aerial images associated with a pattern (e.g., a target design, a calibration pattern, and / or other patterns), and corresponding measured (as described above) pattern probability images, and / or other information. The training information may also include mask layout, mask characteristics, scanner optics, resist film stack characteristics, simulated aerial image grayscale images aligned to .GDS layout patterns, and / or other information. For example, calibration (training) may include obtaining a simulated aerial image associated with a pattern (e.g., to be printed on a wafer or a portion thereof). Based on the image, a contour (e.g., shape, size, etc.) corresponding to a feature of the pattern may be extracted. The features may be used by the machine learning prediction model to predict a corresponding pattern probability image. Model parameters may be adjusted (or learned) so that the predicted pattern probability image more accurately matches the measured pattern probability image (e.g., included in the training information). The calibrated (e.g., trained) model may be used to make new predictions (e.g., predict new pattern probability images) based on different (predicted) spatial images and / or other information used as input to the model.

[0173] In some embodiments, exemplary systems and methods provide a machine learning based prediction model that takes as input a simulated aerial image intensity distribution and / or other information from a created aerial image simulation model and predicts a two-dimensional pattern probability image (PPI) and / or other information. Embodiments of the present disclosure may predict and / or otherwise determine a pattern probability image that includes a two-dimensional distribution of pattern variability (e.g., of a SEPE band), as well as a pattern failure rate, and / or other information.

[0174] Figure 3 An exemplary method 300 according to an embodiment of the present disclosure is illustrated. In some embodiments, method 300 includes training 302 the machine learning prediction model, receiving 304 input information, predicting 306 a multi-dimensional output substrate geometry, and performing 308 LMC, PFM and / or other process monitoring operations. In some embodiments, the multi-dimensional output substrate geometry indicates a feature in a substrate in a semiconductor device, and the patterning process includes a semiconductor device manufacturing process. In some embodiments, method 300 includes adjusting 310 manufacturing process parameters and / or manufacturing equipment based on predictions according to the model, adjusting or tuning 312 the machine learning prediction model, and / or other operations. The operations of method 300 presented below are intended to be illustrative. In some embodiments, method 300 may be implemented with one or more additional operations not described, and / or without one or more of the operations discussed. For example, operations 308, 310, 312 and / or other operations may be optional. In addition, the operations of method 300 may be performed in a manner that is consistent with the present disclosure. Figure 3 The order illustrated in and described below is not intended to be limiting. For example, method 300 may or may not include operations 308, 310, and / or 312.

[0175] By way of non-limiting overview example, Figure 4 An exemplary process flow is illustrated, including receiving 304 input information, predicting 306 a multi-dimensional output substrate geometry using a machine learning prediction model 400, and performing 308 LMC 402 and / or PFM 404. In some embodiments, the predicted multi-dimensional output substrate geometry includes one or more pattern probability images, and / or other indications of the probability that a given geometry of a given feature occupies a given location on a substrate. In some embodiments, the pattern probability image includes a plurality of stacked images including predicted probabilities of a two-dimensional substrate geometry of, for example, one or more through-holes.

[0176] In some embodiments, Figure 4As shown in , the machine learning prediction model 400 includes a (deep) neural network 406 and / or other components. The neural network 406 includes an input layer 408, an output layer 410, and multiple hidden layers 412 (this neural network design is not intended to be limiting). The neural network 406 can act as a geometric probability model, or a defect probability model, because the multi-dimensional output substrate geometry predicted by the neural network 406 may include a pattern probability image 416 and / or other information. The pattern probability image 416 can be used to predict and / or otherwise determine random edge placement error bands, the presence of defects, defect rates, and / or other information as described below. Figure 4 In the example shown, the input information includes a simulated aerial image 414. However, the input information may include other information such as mask data, scanner data, simulated resist images, and other information as described herein. Details related to operations 304, 306, and 308 are further described below.

[0177] Back to Figure 3 , at one operation, the machine learning prediction model is trained 302 (and may also be calibrated). The training information for training the model may include pairs or a set of input objects and corresponding measured or expected output values. The training information may include one or more aerial images, target patterns, or pattern processing parameters, and corresponding physical substrate measurements and / or predictions according to different non-machine learning prediction models. The corresponding physical substrate measurements and / or predictions from different non-machine learning prediction models include training (e.g., previously determined) pattern probability images and / or other information. For example, in the present machine learning prediction model, the training information includes simulated aerial images associated with patterns (e.g., target designs, calibration patterns, and / or other patterns) and corresponding measured (as described above) pattern probability images, and / or other information. The training information may also include mask layouts, mask properties, scanner optical parameters, resist film stack properties, simulated aerial image grayscale images aligned to .GDS layout patterns, and / or other information. As a non-limiting example, training may include obtaining pairs of simulated aerial images and corresponding measured pattern probability images. These pairs can be provided as training information to the machine learning prediction model. The machine learning prediction model can use the provided paired training information to perform self-learning (e.g., when the model is Figure 4 The neural network shown in Figure 4 The trained machine learning prediction model can be used to make new predictions (e.g., predict new pattern probability images) based on different input information (such as different (predicted) spatial images and / or other information as described above).

[0178] In operation, input information (e.g., new information or different information related to the training information) is received 304 by the machine learning prediction model (e.g., new information or different information related to the training information). The input information includes geometric information, process information, and / or other information. The process information includes one or more parameters of one or more manufacturing processes performed to manufacture semiconductor devices, and / or other information. The one or more parameters may be associated with different processing operations, features of patterns formed on a substrate, adding or removing materials from a substrate or layer, i.e., additive or subtractive, and / or other operations performed to manufacture semiconductor devices, and / or other information. The geometric information includes the size, design, spatial orientation, and / or other geometric features, and / or other information of one or more features of one or more patterns associated with a semiconductor device. The input information is received by the machine learning prediction model as input for generating predictions. For example, the input information may include one or more simulated aerial images, simulated resist images, target feature sizes, data associated with semiconductor device manufacturing from a scanner, mask layouts, mask characteristics, scanner optical parameters, resist film stack characteristics, and / or other information of the semiconductor device.

[0179] In some embodiments, as described above, the input information includes simulated aerial images. Aerial images can be used as input information because aerial images include pattern-specific sensitivities associated with LCDU, defects in multiple individual pattern features, and other information. Pattern-specific sensitivities can refer to different patterns, or different pattern features, which may have different probabilities of becoming defects or cause greater variability in CD (LCDU) due to the shape of the pattern or pattern feature, adjacent patterns, etc. In some embodiments, the input information includes multiple aerial images, wherein multiple individual aerial images in the multiple aerial images correspond to different heights of the resist layer. These images can facilitate predictions of resist profiles, resist profile effects, and / or other information.

[0180] In operation 306, the multidimensional output substrate geometry is predicted by the machine learning prediction model. The multidimensional output substrate geometry is predicted based on the input information, and / or other information. The multidimensional output substrate geometry indicates the predicted multidimensional variability in the shape of the features of the pattern in the substrate. The predicted multidimensional output substrate geometry indicates the probability that a given geometry of a given feature occupies a given position on the substrate. In some embodiments, the predicted multidimensional output substrate geometry includes one or more pattern probability images, and / or other indications of the probability that a given geometry of a given feature occupies a given position on the substrate.

[0181] For example, Figure 5 A predicted pattern probability image 500 is illustrated. The pattern probability image 500 includes predicted two-dimensional substrate geometry for one or more features of a pattern. Figure 5 In the example shown in , the feature is a plurality of through holes 502 (with three separate through holes labeled A, B, and C), but this example is not intended to be limiting. Other examples of features may include through holes having other shapes (e.g., rectangular or square), arrays or random layouts of features, line spaces, columns, and / or other features. In some embodiments, the pattern probability image 500 illustrates one or more cells of a pattern having one or more pattern features (e.g., through holes 502, arrays or random layouts of features, line spaces, columns, and / or other features). In this example, through holes 502 (which would extend downward through the page) are shown at different coordinates 506, 508 locations in a given portion (e.g., the one or more cells) of the patterned substrate 510. The pattern probability image 500 represents a plurality (e.g., thousands) of predictions for the same one or more cells (the cells are stacked on top of each other) from different locations around the pattern, the cells are stacked on top of each other, and corresponding features of the one or more features of the pattern are aligned (e.g., multiple individual vias 502 in this example). The pattern probability image 500 is associated with a probability indicator 504. In this example, the probability indicator 504 is represented as a shaded gradient bar, where darker shades indicate higher probabilities (although this example is not intended to be limiting). The shades in the gradient bar correspond to the shades in a single via 502, such that the darker shaded area of ​​the via 502 indicates a prediction that the via 502, or a portion of the via 502, has a higher probability of appearing at that location in the manufactured semiconductor device relative to other locations on the substrate 510.

[0182] This is further illustrated in view 520 of a portion of substrate 510 including via 502A. Via 502A in view 520 is generally elliptical with relatively dark shading 516 at or near a middle portion 522 of the ellipse. The dark shading 516 of via 502 extends outward from the middle portion 522 of the ellipse and then becomes progressively lighter or brighter across a band 524 at the outer edge of the ellipse. The dark shading 516 in the middle portion 522 indicates a prediction that there is a high probability that via 502A, or a portion of via 502A, will exist at that location in a manufactured semiconductor device. The progressively lighter shading in band 524 indicates a prediction that there is a decreasing probability that via 502A, or a portion of via 502A, will exist at that location in a manufactured semiconductor device. At locations 518 outside of the oval, the white gradient indicates a prediction that there is zero or nearly zero probability that the via 502, or a portion of the via 502, will exist at that location in the fabricated semiconductor device.

[0183] In this manner, pattern probability image 500 indicates multi-dimensional variability in the shape of features (e.g., via 502) of the pattern in substrate 510. For example, in addition to providing predicted coordinate locations in substrate 510 for via 502A (as well as other vias and / or other features), gradient shading (corresponding to different predicted probabilities) across band 524 at the edge of via 502A provides an indication of how the location of the edge of via 502A may vary across the pattern, and / or vary "down" or "up" through the substrate. This predicted probability gradient can be used to determine random edge placement error bands, and / or other information for via 502, and / or other features. The predicted coordinate locations of via 502 (for example) can be used to determine whether electrical contact between layers will perform as expected, or whether defects will instead be present.

[0184] According to embodiments of the present disclosure, the exemplary multi-dimensional output substrate geometry predicted by the machine learning prediction model can advantageously provide prediction capabilities even for very low random pattern failure rates. These very low random pattern failure rates may be associated with uncommon or infrequent (but still important) types of pattern failures. These uncommon or infrequent types of pattern failures may occur so infrequently that there may be few or no measurements or other data recorded for such defects in a typical manufacturing process. This means that there are no such measurements or other data available (or not enough available data) to calibrate the previous model, and thus the previous model cannot accurately predict these uncommon or infrequent failure types.

[0185] Because the exemplary model is a machine learning prediction model, it can better predict the failure rates of these uncommon or infrequent types of patterns. The machine learning prediction model learns which features of the input information are associated with failures, and whether failures are common or uncommon, even if measurements or other data describing a specific failure type are not available. For example, uncommon or infrequent types of pattern defects may be hidden in the tail of the multi-dimensional output substrate geometry (probability) prediction distribution. The tail of the multi-dimensional output substrate geometry (probability) prediction distribution may correspond to feature edges, and / or other locations, for example. In some embodiments, the machine learning prediction model is configured to predict the possible locations of features and / or feature edges in a pattern based on a nonlinear scale.

[0186] Figure 6 The diagram illustrates prediction based on non-linear scaling. Figure 6 A portion of a pattern probability image 604 in a substrate 606 is illustrated with predicted coordinates 600 , 602 locations of vias in the pattern probability image 604 (this example is not intended to be limiting). Figure 6 A probability indicator 608 is illustrated. In this example, the probability indicator 608 includes a shaded gradient bar, where darker shades represent higher probabilities (again, this example is not intended to be limiting). The shades in the gradient bar correspond to the shades in the via in the pattern probability image 604, such that the darker shaded areas in the pattern probability image 604 indicate a prediction that the via, or a portion of the via, will have a higher probability of being present at that location in the manufactured semiconductor device relative to other locations on the substrate 606 (except for region "b" in this example, as described below).

[0187] Figure 6Also illustrated is a region "a" located at or near the outer edge of the pattern probability image 604, and a region "b" located at or near the center of the pattern probability image 604. Regions a and b are also shown in the graphical representation 610. The graphical representation 610 illustrates a location 612 in a portion of the predicted pattern probability image 604 and a vertical axis 614, which shows the number of standard deviations from the median distribution value (0=the median, and 1 and -1, 2 and -2 show the number of standard deviations from the mean). Line 616 indicates a normal distribution, line 618 indicates the median predicted feature edge location, and lines 620 and 622 illustrate the extreme values ​​of the predicted feature edge location. As shown in the representation 610, regions a and b are located at the extreme ends of the probability prediction for multiple locations in the pattern probability image 604. In some embodiments, the machine learning prediction model is configured to predict possible locations of edges in or near regions a and b, and / or other regions of the pattern probability image 604 as described above. In some embodiments, the machine learning prediction model can determine the normal / typical / nominal / previously predicted position (e.g., line 618) where the predicted edge of a particular feature is relatively far from the edge of the feature, and further extrapolate the results to predict even lower probability feature positions than what can be measured by the SEM tool. In some embodiments, the machine learning prediction model is trained using logarithmic scale data to facilitate prediction of the lower probability feature positions. For example, a training pattern probability image can be converted to a logarithmic scale (e.g., 10^N to N) and input into the model. Thus, the corresponding output from the model can also be on a logarithmic scale. In order to determine the failure rate, the prediction based on the model can be post-processed to return it to a linear scale (e.g., N 10^N).

[0188] Back to Figure 3In some embodiments, operation 306 includes using the machine learning prediction model to predict and / or otherwise determine an edge placement error (EPE) indicator, and / or other information. In some embodiments, the EPE indicator can be an overall indication of edge placement error, which is more predictive of overall layer and device yields than other key performance indicators (see the detailed discussion of the EPE indicator below). The EPE indicator can be a single parameter and / or include a single parameter, such as the value of the edge placement error, a random edge placement error band (SEPE), and / or other single parameters. The EPE indicator can also be and / or include a combination of these parameters and / or other indications. The EPE indicator can also be derived from a 2D pattern probability image in any direction to characterize possible failure modes in the corresponding direction. The EPE indicator will be discussed in more detail below. In some embodiments, operation 306 includes determining the EPE indicator associated with one or more features of the pattern based on the input information, the multi-dimensional output substrate geometry, and / or other information. In some embodiments, operation 306 includes predicting and / or otherwise determining random failure rates, and / or other information.

[0189] As a non-limiting example, the predicted probabilities for multiple locations of each feature of a pattern in a substrate in a pattern probability image (e.g., represented by gradient shading of the feature) can be used to determine whether a feature (e.g., a through hole) or a portion of a feature will exist at a given location of a manufactured semiconductor device. The probability that a feature will exist at a given location can be compared with the target design of the pattern, and / or compared with other information. Based on these comparisons, multiple individual defects (e.g., a feature, or a portion of a feature is likely to exist where it should not exist, or not exist where it should exist), defect rates (e.g., the number of defects per total number of features), and / or other information can be predicted and / or otherwise determined. For example, a defect can be detected in response to a predicted location of a feature that breaks through a threshold location standard of a predicted location. In addition, the gradient of the probability at the edge of a feature (e.g., shading corresponding to different predicted probabilities) provides an indication of how the location of the edge of the feature can vary across the pattern. This predicted probability gradient can be used to determine a random edge placement error band, and / or other information of a feature of a pattern.

[0190] As another non-limiting example, Figure 7 Illustrated is a defect probability map 700 predicted by an exemplary machine learning prediction model for various dose 702 and focus 704 conditions, according to an embodiment of the present disclosure. Figure 7 The predicted likelihood of defects associated with via 701 is illustrated (other pattern features are contemplated as examples, in lieu of and / or in addition to vias). Figure 7Illustrated is a predicted pattern probability image 706. The pattern probability image 706 may be predicted based on a simulated spatial image and / or other information as described above. Figure 7 The predictions (probabilities) of the two-dimensional shapes 720 of the through-hole 701 for each dose and focus combination are also illustrated (e.g., a pattern probability image of the through-hole 701 for each dose-focus combination). The probability of a defect is indicated by the shading in the probability bar 708, with lighter shading indicating a higher probability of a defect. To aid interpretation, Figure 7 The boxes in have also been labeled as LP (relatively low probability), HP (relatively high probability), or HHP (highest probability).

[0191] Probability bar 708 also includes representative predictions (probabilities) for a likely defective via 722 and a likely non-defective via 724 for the two-dimensional geometry of the example via. Figure 7 It illustrates how different dose-focus combinations have different pattern probability images (e.g., for through-hole 701) that represent different SEPEs and failure rates. By training the model with portions of these pattern probability images under different dose-focus conditions, pattern probability images under other dose-focus conditions can be predicted.

[0192] At operation 308, LMC, PFM and / or other process monitoring operations are performed. Operation 308 includes using one or more predicted pattern probability images for LMC, PFM and / or other process monitoring operations in semiconductor device manufacturing processes. LMC and / or PFM may include checking predicted patterns and / or predicted pattern sizes for manufacturability and / or for other reasons. Checking predicted patterns and / or pattern sizes for manufacturability may include determining whether photolithography and / or other manufacturing process operations are likely to produce the target design. This may include identifying key patterns, multiple parts of patterns, sizes, and / or other characteristics of the design. In some embodiments, the output from the calibrated machine learning model may be fed into the LMC for SEPE simulation.

[0193] In some embodiments, method 300 includes adjusting 310 semiconductor device manufacturing process parameters and / or semiconductor device manufacturing equipment. Adjusting the semiconductor device manufacturing process parameters may be the same as adjusting the semiconductor device manufacturing process, and / or includes adjusting the semiconductor device manufacturing process. Adjustments may be made based on predictions made according to the model and / or other information. For example, manufacturing process parameters may be determined based on predictions made according to the prediction model, based on data from LMC, PFM, and / or other process monitoring operations, and / or other information. Manufacturing process parameter adjustments (e.g., the amount by which a given parameter should be changed) may be determined, and the manufacturing process parameters may be adjusted from a previous parameter set point to a new parameter set point. Adjustments to the semiconductor device manufacturing equipment may be determined based on adjusted manufacturing process parameters, predictions made according to the prediction model, data from the process monitoring operations (e.g., LMC, PFM, etc.), and / or other information.

[0194] In some embodiments, the determined and / or adjusted semiconductor device manufacturing process parameters include one or more of mask design, pupil shape, dose, focal length, etching parameters, deposition parameters, chemical mechanical polishing parameters, and / or other semiconductor device manufacturing process parameters. In some embodiments, the method includes determining adjustments for semiconductor device manufacturing processes and / or equipment based on the determined semiconductor device manufacturing parameters. As an example, if the process parameter is (e.g., new) pupil shape, dose, or focal length, the manufacturing equipment can be adjusted from an old or previous pupil shape, dose, or focal length to the determined (e.g., new) pupil shape, dose, or focal length. Similarly, if the manufacturing process parameter is a new or adjusted mask design, the semiconductor manufacturing equipment can be adjusted based on this new design (e.g., intensity, alignment, or even pupil shape, dose, or focal length can be adjusted based on a new mask shape, size, etc.). In some embodiments, as another example, the method can include adjusting the mask design from a first mask design to a second mask design based on a prediction made according to the prediction model.

[0195] In some embodiments, method 300 includes adjusting 312 the machine learning prediction model, and / or other operations. In some embodiments, for example, operation 312 includes adjusting the machine learning prediction model so that the multi-dimensional output substrate geometry matches an EPE metric such as a measured random edge placement error band or a measured failure rate. In some embodiments, as another example, operation 312 includes adjusting the machine learning prediction model so that the multi-dimensional output substrate geometry corresponds to, or matches, an average profile prediction made based on an optical proximity effect correction model or a lithography manufacturability inspection model. In some embodiments, the machine learning prediction model can be adjusted and / or otherwise calibrated based on a post-development inspection dimension, a post-etch inspection dimension, and / or other information associated with another semiconductor device manufacturing process.

[0196] In some embodiments, adjusting or tuning includes adjusting one or more model parameters so that the predicted multi-dimensional output substrate geometry better matches or better corresponds to the measured random edge placement error bands, measured failure rates, average profile predictions from an optical proximity correction model or a lithography manufacturability inspection model, post-development inspection dimensions, post-etch inspection dimensions, and / or other information. In some embodiments, adjusting or tuning includes training or retraining the machine learning prediction model using additional training information, the additional training information including new and / or additional measured random edge placement error bands or measured failure rate information, additional and / or new average profile prediction information from an optical proximity correction model or a lithography manufacturability inspection model, new and / or additional post-development inspection dimensions, new and / or additional post-etch inspection dimensions, and / or other information.

[0197] Figure 8 Illustrated is edge placement error (EPE) 800. EPE 800 may refer to the relative displacement of an edge (of certain features in a pattern) from a target location. Figure 8 A pattern 802 is shown having individual features 804 and a pitch 806. Figure 88, a portion 808 of pattern 802 is enlarged for easier viewing. Portion 808 illustrates EPE 800, which includes the EPE of line 810 and the EPE of cut or tangent line 812 (along with the expected overlap 814). As described herein, the EPE 800 may include or be caused by: global errors (e.g., CD, overlap); local errors (e.g., local critical dimension uniformity (LCDU); local placement error (LPE), which may, for example, include random variations in the feature center of gravity around the designed location; line edge roughness (LER), which may, for example, include high-frequency random variations in the edge of a one-dimensional feature; contact (or cut or tangent) edge roughness (CER), which may include high-frequency random variations in the edge of a two-dimensional feature (such as a contact or cut), etc.); systematic errors (e.g., from OPC, proximity deviation average (PBA), which may describe the mismatch between scanners (e.g., through-pitch proximity curve) due to small differences in pupils, aberrations, etc.); and / or other factors. As described herein, the EPE metric is an overall EPE metric that is more predictive of overall layer and device yield than conventionally used KPIs, and can be used to better and more effectively predict and / or detect hot spots. The EPE index is determined based on a combination of major EPE contributing factors (including the factors listed above, and / or other factors).

[0198] Fig. 9 An exemplary method 900 according to an embodiment of the present disclosure is illustrated. In some embodiments, the method 900 includes a manufacturing process. The method 900 provides an overall EPE indicator that is more predictive of overall layer and device yields than the KPI used in the prior art, and can be used to better and more effectively predict and / or detect hot spots. In some embodiments, the method 900 includes receiving 902 input information (the input information includes geometric information and / or patterning process information of a pattern on a substrate), determining 904 an EPE indicator associated with one or more features of the pattern based on the input information, determining 906 one or more areas of the pattern of the substrate having one or more potential defects based on the EPE indicator, determining 908 adjustments to semiconductor device manufacturing equipment based on the one or more areas of the pattern on the substrate having one or more potential defects, and / or other operations.

[0199] The operations of method 900 described herein are intended to be illustrative. In some embodiments, method 900 may be implemented with one or more additional operations not described, and / or without one or more of the operations discussed. For example, operation 908 and / or other operations may be optional. Fig. 9 The order of operations of method 900 illustrated in and described below is not intended to be limiting. Method 900 may be performed by one or more processors and / or other components that form at least a portion of and / or are included in a computing system, lithographic apparatus, and / or other device. For example, the computing system and / or the lithographic apparatus may be similar to and / or the same as the computing system and / or the lithographic apparatus described herein.

[0200] At operation 902, input information is received, and the input information includes geometry information and / or patterning process information for the pattern on the substrate. In some embodiments, the input information is the result of measurement and / or simulation (for example, using an electronic model as described herein). In some embodiments, the geometry information includes one or more indications of the size and / or position of one or more features of the pattern. For example, the geometry information can describe the target and / or actual size layout of one or more features in the pattern, the alignment of one or more features in the pattern, the size of one or more features, the shape of one or more features, and / or other information. The patterning process information can include indications of which manufacturing processes have been executed or will be executed, set points and / or other parameters of the manufacturing process, and / or other information. In some embodiments, the input information includes one or more of the following, and / or is determined based on one or more of the following: predicted spatial image, target substrate size, data from a scanner and / or patterning process associated with semiconductor device manufacturing, and / or other information of one or more layers of semiconductor devices. In some embodiments, the input information includes one or more parameters, wherein the one or more parameters include global overlay, global critical dimension, local critical dimension, feature edge roughness (e.g., 1D (line) and 2D (contact edge roughness) features), local critical dimension uniformity, mask critical dimension, mask placement error, scanner to scanner critical dimension, scanner to scanner overlay mismatch, patterning tool critical dimension, patterning tool overlay mismatch, local and global variations in feature asymmetry (e.g., contact ellipticity variations, including directional (angle) and long / short ellipse variations), values ​​indicating interaction / crosstalk between two or more parameters, and / or other information.

[0201] At operation 904, an EPE indicator associated with one or more features of the pattern is determined. In operation 904, the EPE indicator is determined based on the input information and / or other information. The EPE indicator is related to the yield of the pattern on the substrate. For example, the EPE indicator can be better related to the yield than the previous multiple individual KPIs. In some embodiments, the EPE indicator includes a combination of two or more parameters in the input information and / or values ​​indicating the interaction between two or more parameters in the input information. For example, the EPE indicator can be a combination of global error parameters (such as global CDU and overlap), local error parameters (such as LCDU, local placement error (LPE), line edge roughness (LER), and / or CER), system error parameters in OPC and / or PBA, and / or other parameters.

[0202] An EPE is typically constructed based on multiple individual previous measurements of its components, but here the EPE indicator is determined based on measured and / or predicted EPE contribution factors. For example, the EPE metric may be determined based on: output from a FEM lithography model configured to predict global CD / edge and aberration-driven pattern shift errors using known scanner settings and their variations according to a calibrated resist model (e.g., changes in focus and leveling, dynamics, aberrations, laser bandwidth, pupil, etc.); the effects of LCDU and other random related CD and pattern shifts LER, LPE, etc., which may be predicted using simulated scanner contrast and a calibrated resist model at a given probability level, for example (where 𝐿𝐶𝐷𝑈 ∝ 1∕𝑁𝐼𝐿𝑆); expected global overlay error (with a given probability level), which may be obtained, for example, based on scanner specifications (measured and / or calculated overlay (OVL) fingerprints may be used for existing scanners at a customer site); and / or other information.

[0203] For example, Fig.10 The EPE contribution factors used to determine the EPE indicator 1048 are illustrated. Some or all of the contribution factors and / or the interactions between two or more of the contribution factors may be used to determine the EPE indicator. For example, these EPE contribution factors may be included in the input information described above. Fig.10, the EPE contribution factors may include OPC CD (error) 1050, overlap (error) 1052, global CD 1054, and local CD (error) 1056. OPC CD (error) may be associated with a resist model 1058, an etch model 1060, the structure of the model itself, and / or associated runtime 1062, and / or other factors. Overlap (error) 1052 may be associated with a process mask 1064, a measurement 1066, a scanner application 1068, the scanner itself 1070, and / or other factors. Global CD 1054 may be associated with a scanner 1070, tracking and / or etching operations 1072, and / or other factors. Local CD (error) 1056 may be associated with a mask 1074, a resist and / or resist process control parameters 1076, an SMO 1078, scanner optics and / or dynamics 1080, and / or other factors. Two or more of these EPE contribution factors, and / or the interaction between two or more of these EPE contribution factors, are combined together to determine the EPE metric (e.g., per-edge shift at a selected probability level). For example, the EPE metric may be a combination of global CD and OVL and local CD and OVL contributions using an actual OPC (or SMO, etc.) post-pattern and its actual OPC (error). This example is not intended to be limiting.

[0204] In some embodiments, based on the parameters of the input information (e.g., Fig.10 The EPE indicator can be mathematically calculated and / or predicted (e.g., using the prediction model described herein) based on one or more parameters in the global error parameter, local error parameter, system error parameter, etc. shown in the figure and / or the value of the interaction between two or more parameters in the parameters indicating the input information. For example, the EPE indicator can be mathematically calculated based on the following equation:

[0205] EPE max *

[0206] It should be noted that this is a simplified example formula for the contact-to-wire case (where the sigma symbol represents the standard deviation of the corresponding EPE contribution factor, EPE max Indicates the constructed EPE value, HR OPCdenotes half range of OPC error, PBA denotes neighbor bias average error, LWR denotes local CD effect, OVL denotes overlap error, and CDU denotes global CD variation). This equation does not cover all possible EPE metric contributors and use cases. As such, it is use case specific, simplified, and should be viewed as one example of many possible equations within the scope of the present disclosure. For example, extreme value statistics may be used, additional process and / or device inputs (such as feature redundancy, accepted failure rates, etc.) may be used to perform non-simplified mathematical calculations.

[0207] In some embodiments, one or more electronic models described herein include a computational lithography model (e.g., a computational neural network and / or some other computational lithography model). In some embodiments, determining the EPE indicator includes predicting the EPE indicator using the input information and / or other input information as input to the computational lithography model. In some embodiments, the EPE indicator is determined based on a target EPE probability level and / or other information (e.g., by the computational lithography model). The target EPE probability level may be entered or selected by a user via a user interface (e.g., which is part of a computing device), or automatically generated by executing a computer-implemented program. The target probability level may be defined or selected based on the number of allowed defects per die (e.g., determined by a user), per sub-die area (e.g., memory pad), and / or per feature number (e.g., one per 10^6). This level may be driven by designed feature redundancy (e.g., a design method that allows certain features to fail without rendering the entire chip inoperative), by layer yield specifications, and / or by other devices, processes, and / or yield-related reasons.

[0208] Back to Fig. 9 At operation 906, one or more regions of the pattern on the substrate having one or more potential defects are determined. The one or more regions are determined based on the EPE indicator and / or other information. The one or more regions of the pattern on the substrate having one or more potential defects include hot spots.

[0209] In some embodiments, determining one or more regions of the pattern on the substrate having one or more potential defects based on the EPE indicator includes determining the probability that a given feature of the pattern occupies a given location on the substrate. For example, based on per-edge shift estimates (e.g., as described above), a feature profile at a given error probability level and / or probability map can be constructed based on predicted data (including expected OVL errors).

[0210] In some embodiments, determining one or more regions of the pattern on the substrate having one or more potential defects based on the EPE indicator is based on a cost function that balances an acceptable probability of defects with the resources required to inspect the number of the one or more regions. In some embodiments, the acceptable probability of defects is related to the number of the one or more regions of the pattern on the substrate having the one or more potential defects that are targets for inspection. In some embodiments, determining the one or more regions of the pattern on the substrate having the one or more potential defects based on the EPE indicator includes: determining a pattern probability image of one or more features of the pattern. The pattern probability image includes a predicted two-dimensional substrate geometry of one or more features (e.g., as described herein). The pattern probability image may include, for example, an EPE band determined based on a corresponding EPE indicator, and / or other information. The EPE band may indicate the likelihood that an edge of a feature of a pattern is within a specific range of multiple locations on a substrate.

[0211] For example, Fig.11 A pattern probability image 1100 is illustrated. The image 1100 can be predicted and / or otherwise determined as described above. Figure 1100 illustrates features 1110 of a pattern 1112 on a substrate 1114. The image 1100 includes individual superimposed 1101 EPE tapes 1102 (another example of an EPE indicator). The EPE tapes 1102 can be checked for instances of feature bridging, necking, etc. given a probability threshold. The probability threshold can be determined based on (e.g., a customer's) maximum allowable defect rate, and / or other information. Fig.11 In the region with overlapping EPE (see Fig.11 The "!" in the image can be marked as a hot spot, inspected, and fixed.

[0212] In some embodiments, an EPE indicator (e.g., predicted and / or otherwise determined as described herein) can be symmetrical or asymmetrical for one or more features of a pattern. In some embodiments, a symmetrical EPE indicator can indicate an EPE indicator that is substantially the same and / or uniformly distributed on all sides, throughout, and / or throughout the one or more features of a pattern relative to a median predicted EPE indicator (e.g., a predicted location of the edge of a pattern feature, a predicted EPE bandwidth, a random edge placement error band, and / or other median predicted EPE indicators). In some embodiments, a symmetrical EPE indicator includes a uniform distribution range of possible EPE indicators on either side of the median predicted EPE indicator. For example, when the predicted EPE indicator is symmetrical, the probability that the edge of a feature is located inside or outside the predicted location (e.g., an EPE indicator) can change equally as the distance from the predicted location increases in opposite directions. In some embodiments, a symmetrical EPE indicator can have a Gaussian distribution. This means that a median EPE metric (e.g., median EPE) can be predicted, and the probability that the EPE metric (or EPE) is actually greater than or less than the median has a Gaussian distribution. Continuing with the example above, when the predicted EPE metric is symmetric, then the probability that the edge of the feature is 1nm, 2nm, 3nm, etc. inside or outside the predicted location in either direction may be the same.

[0213] In some embodiments, an asymmetric EPE indicator can indicate that the one or more features of the pattern are substantially different and / or substantially unevenly distributed EPE indicators on different sides, around, and / or throughout the EPE indicator of the median prediction (e.g., the predicted position of the edge of the pattern feature, the predicted EPE bandwidth, the random edge placement error band, and / or other median predicted EPE indicators) relative to the median predicted EPE indicator. In some embodiments, the asymmetric EPE indicator includes an uneven distribution range of possible EPE indicators on either side of the median predicted EPE indicator. For example, when the predicted EPE indicator is asymmetric, the probability that the edge of the feature is located inside or outside the predicted position (e.g., the EPE indicator) may not change equally as the distance from the predicted position increases in the opposite direction. In some embodiments, the asymmetric EPE indicator can have a non-Gaussian distribution. This means that the median EPE indicator (e.g., median EPE) can be predicted, and the probability that the EPE indicator (or the EPE) is actually greater than or less than the median does not have a Gaussian distribution. Continuing with the above example, when the predicted EPE index is asymmetric, the probability of the edge of the feature being 1nm, 2nm, 3nm inside or outside the predicted location in either direction is not the same. This asymmetry may not be limited to just X or Y of the pattern, but also includes any other angle.

[0214] It should be noted that in some embodiments, the machine learning prediction model is trained using asymmetrically distributed training data so that the weights and / or parameters of the trained machine learning prediction model contribute to determining a symmetrical or asymmetrical EPE index. In some embodiments, the asymmetrically distributed CD value and / or other information can be used to determine the asymmetrical EPE index. In some embodiments, the asymmetrically distributed training data includes an asymmetrically distributed EPE index determined according to a multidimensional probability image associated with the asymmetrically distributed CD value and / or other information. The asymmetrically distributed CD value indicates that the contour size based on which the CD value is measured is asymmetrically distributed. The edge placement of the pattern is determined according to the contour. Therefore, the asymmetrically distributed EPE is related to the asymmetrically distributed CD value. For example, as described above, such an image can be provided to the model as input training data. Once trained, the machine learning model configured to predict and / or otherwise determine the asymmetrical EPE index can be used for lithography manufacturability inspection, verification of optical proximity effect correction results, EPE measurement products, products predicted based on CD distribution, and / or any other application in which the printed size of the feature of the pattern is predicted.

[0215] As a non-limiting example, Fig.12 Symmetric 1200 and asymmetric 1202 predicted or measured EPEs (e.g., examples of EPE indicators) are illustrated. In some embodiments, symmetric EPE 1200 may be predicted using a machine learning model, or directly measured using SEM measurements, or otherwise determined based on one or more pattern probability images created from a Gaussian CD 1203 distribution 1204 and / or other information. In some embodiments, asymmetric EPE 1202 may be predicted using a machine learning model, or directly measured using SEM measurements, or otherwise determined based on a pattern probability image created from a non-Gaussian CD 1203 distribution 1206 and / or other information. Fig.12The probability profiles of the 5% inner 1210 and 95% outer 1212 predictions or measurements of the EPE relative to the median 1214 are illustrated. For the symmetric EPE 1200, both the profiles 1210 and 1212 are positioned to deviate from the median 1214 by 1nm. For the asymmetric EPE 1202, both the profiles 1210 and 1212 are positioned to deviate from the median 1214 by different distances. For example, the profile 1210 is positioned to deviate from the median 1214 by 1.6nm, while the profile 1212 is positioned to deviate from the median 1214 by 1.2nm. This indicates how, in some embodiments, the symmetric EPE index includes a uniform distribution range of possible EPE indicators on either side of the median predicted EPE index. In this example, when the predicted EPE index is symmetric, the probability that the edge of the feature is located inside or outside the predicted part (e.g., median 1214) may change equally with increasing distance from the predicted part in opposite directions. This also indicates how, in some embodiments, a symmetric EPE metric includes an unevenly distributed range of possible EPE metrics on either side of the median predicted EPE metric. For example, when the predicted EPE metric is asymmetric, the probability that the edge of the feature is inside or outside the predicted location (e.g., median 1214) may not change equally with increasing distance from the predicted location in opposite directions. Symmetrical or asymmetric EPEs can be derived from a predicted or measured 2D pattern probability image. For measurement use cases, the symmetric or asymmetric EPE is reported directly from the 2D pattern probability image. When the machine learning model is applied, the symmetric or asymmetric EPE is reported based on the predicted 2D pattern probability image. The 2D pattern probability image includes symmetric or asymmetric EPEs in a wide range of probabilities and along any directional cut lines around the pattern.

[0216] Back to Fig. 9, at operation 908, based on one or more regions of the pattern on the substrate having one or more potential defects, an adjustment for semiconductor device manufacturing equipment is determined. In some embodiments, operation 908 may include actually performing the adjustment. The adjustment may be determined based on one or more regions of the pattern on the substrate having one or more potential defects, and / or other information. For example, in some embodiments, receiving the input information (operation 902), determining the EPE index (operation 904), and determining one or more regions of the pattern on the substrate having one or more potential defects (operation 906) are performed as part of an evaluation, improvement, prediction, or verification of semiconductor device performance. The evaluation, improvement, prediction, or verification of semiconductor device performance may include source mask optimization, optical proximity effect correction, lithography manufacturability inspection, and design for a manufacturing process associated with a semiconductor device. The adjustment may be determined as a method for enhancing the manufactured device. For example, the adjustment may include one or more of a pattern change, a mask change, a dose change, a focus change, an exposure change, a pupil change, an etching and / or deposition process temperature change, an etching and / or deposition process time change, and / or other adjustments. For example, any and / or all of these adjustments may be made to enhance the device being manufactured.

[0217] Fig.13 Schematic diagram of an example computer system CS that can be used for one or more operations described herein. The computer system CS includes a bus BS or other communication mechanism for communicating information, and a processor PRO (or multiple processors) connected to the bus BS for processing information. The computer system CS also includes a main memory MM, such as a random access memory (RAM) or other dynamic storage device, connected to the bus BS for storing information and instructions to be executed by the processor PRO. The main memory MM can also be used to store temporary variables or other intermediate information during the execution of instructions by the processor PRO. The computer system CS also includes a read-only memory (ROM) ROM or other static storage device connected to the bus BS for storing static information and instructions for the processor PRO. A storage device SD such as a magnetic disk or optical disk is provided, and the storage device is connected to the bus BS for storing information and instructions.

[0218] The computer system CS can be connected to a display DS for displaying information to a computer user via a bus BS, such as a cathode ray tube (CRT) or a flat panel display or a touch panel display. An input device ID including alphanumeric keys and other keys is connected to the bus BS for communicating information and command selections to the processor PRO. Another type of user input device is a cursor controller CC (such as a mouse, a trackball or cursor direction keys) for communicating direction information and command selections to the processor PRO and for controlling cursor movement on the display DS. This input device typically has two degrees of freedom on two axes (a first axis (e.g., x) and a second axis (e.g., y)), which allows the device to specify a position in a plane. A touch panel (screen) display can also be used as an input device.

[0219] In some embodiments, the part of one or more methods described herein can be executed by computer system CS in response to processor PRO executing one or more sequences of one or more instructions contained in main memory MM. Such instructions can be read into main memory MM from another computer readable medium (such as storage device SD). The execution of the sequence of instructions included in main memory MM makes processor PRO perform process steps (operations) described herein. One or more processors in a multi-processing arrangement can also be used to execute the sequence of instructions contained in main memory MM. In some embodiments, hard-wired circuits can be used to replace software instructions or be combined with software instructions. Therefore, the description herein is not limited to any specific combination of hardware circuits and software.

[0220] The term "computer-readable medium" used herein refers to any medium that participates in providing instructions to the processor PRO for execution. Such a medium can take many forms, including but not limited to non-volatile media, volatile media and transmission media. Non-volatile media include, for example, optical disks or disks, such as storage devices SD. Volatile media include dynamic memory, such as main memory MM. Transmission media include coaxial cables, copper wires and optical fibers, including wires containing bus BS. Transmission media can also take the form of sound waves or light waves, such as sound waves or light waves generated during radio frequency (RF) and infrared (IR) data communication. Common forms of computer-readable media include, for example, floppy disks, flexible disks, hard disks, tapes, any other magnetic media, CD-ROMs, DVDs, any other optical media, punch cards, paper tapes, any other physical media with hole patterns, RAM, PROM and EPROM, FLASH-EPROM, any other memory chips or thyristors. Instructions can be recorded on non-temporary computer-readable media. The instructions can implement any of the operations described herein when executed by a computer. For example, a temporary computer-readable medium can include a carrier or other propagating electromagnetic signals.

[0221] Various forms of computer-readable media may involve one or more sequences of one or more instructions being transmitted to the processor PRO for execution. For example, the instruction may initially be carried on a disk of a remote computer. The remote computer may load the instruction into its dynamic memory and send the instruction via a telephone line using a modem. The modem local to the computer system CS may receive data on the telephone line and convert the data into an infrared signal using an infrared transmitter. An infrared detector connected to the bus BS may receive the data carried in the infrared signal and place the data on the bus BS. The bus BS transmits the data to the main memory MM, from which the processor PRO retrieves and executes the instruction. The instruction received by the main memory MM may optionally be stored on a storage device SD before or after being executed by the processor PRO.

[0222] The computer system CS may also include a communication interface CI connected to the bus BS. The communication interface CI provides a bidirectional data communication connected to a network link NDL, which is connected to a local area network LAN. For example, the communication interface CI may be an integrated services digital network (ISDN) card or a modem for providing a data communication connection with a corresponding type of telephone line. As another example, the communication interface CI may be a local area network (LAN) card for providing a data communication connection with a compatible LAN. A wireless link may also be implemented. In any such implementation, the communication interface CI sends and receives electrical signals, electromagnetic signals, or optical signals carrying digital data streams representing various types of information.

[0223] The network link NDL typically provides data communication to other data devices through one or more networks. For example, the network link NDL can provide a connection to the host computer HC through a local area network LAN. This can include data communication services provided through the global packet data communication network now commonly referred to as the "Internet" INT. The local area network LAN (Internet) can use electrical signals, electromagnetic signals or optical signals that carry digital data streams. The signals through the various networks and the signals on the network data link NDL and through the communication interface CI (which carries digital data to and from the computer system CS) are exemplary forms of carrier waves that transport information.

[0224] The computer system CS can send messages and receive data, including program code, through the network, network data link NDL and communication interface CI. In the Internet example, the host computer HC can transmit the requested code for the application program through the Internet INT, network data link NDL, local area network LAN, and communication interface CI. For example, one such downloaded application can provide all parts of the method described herein. The received code can be executed by the processor PRO when received, and / or stored in the storage device SD or other non-volatile storage for later execution. In this way, the computer system CS can obtain the application code in the form of a carrier wave.

[0225] Fig.14 is a schematic diagram of a lithographic projection apparatus according to an embodiment. The lithographic projection apparatus may include an illumination system IL, a first stage MT, a second stage WT, and a projection system PS. The illumination system IL may adjust a radiation beam B. In this example, the illumination system also includes a radiation source SO. The first stage (e.g., patterning device stage) MT may have a patterning device holder for holding a patterning device MA (e.g., a mask stage) and may be connected to a first positioner for accurately positioning the patterning device relative to the item PS. The second stage (substrate stage) WT may have a substrate holder for holding a substrate W (e.g., a silicon wafer coated with a resist) and may be connected to a second positioner for accurately positioning the substrate relative to the item PS. The projection system (e.g., which includes a "lens") PS (e.g., a refractive, reflective, or reflective-refractive optical system) may image the irradiated portion of the patterning device MA onto a target portion C (e.g., including one or more dies) of the substrate W. For example, the patterning device alignment marks M1, M2 and the substrate alignment marks P1, P2 may be used to align the patterning device MA and the substrate W.

[0226] As depicted, the apparatus may be of the transmissive type (e.g., employing a transmissive patterning device). However, typically, it may be of the reflective type (e.g., employing a reflective patterning device). The apparatus may employ a different kind of patterning device than a classical mask; examples include a programmable mirror array or an LCD matrix.

[0227] A source SO (e.g. a mercury lamp or an excimer laser, laser produced plasma (LPP) EUV source) generates a radiation beam. This beam is fed into an illumination system (illuminator) IL, for example directly or after having traversed an adjustment device such as a beam expander or a beam delivery system BD (including directional mirrors, a beam expander, etc.). The illuminator IL may include an adjustment device AD ​​for setting the outer radial extent and / or the inner radial extent (commonly referred to as σ-outer and σ-inner, respectively) of the intensity distribution in the beam. In addition, the illuminator IL will typically include various other components, such as an integrator IN and a condenser CO. In this way, the beam B impinging on the pattern forming device MA has a desired uniformity and intensity distribution in its cross section.

[0228] In some embodiments, the source SO may be within the housing of the lithographic projection apparatus (this is often the case when the source SO is, for example, a mercury lamp), but it may also be remote from the lithographic projection apparatus. For example, the radiation beam it generates may be directed into the apparatus (for example, with the aid of suitable directional mirrors). This latter case may be the case, for example, when the source SO is an excimer laser (for example, based on KrF, ArF or F2 laser action).

[0229] The beam B may then intercept the patterning device MA which is held on the patterning device table MT. Having traversed the patterning device MA, the beam B may pass through a lens PL which focuses the beam B onto a target portion C of the substrate W. With the aid of the second positioning device (and the interferometry device IF), the substrate table WT may be accurately moved, for example, in order to position a different target portion C in the path of the beam PB. Similarly, the first positioning device may be used to accurately position the patterning device MA relative to the path of the beam B, for example after mechanical retrieval of the patterning device MA from a patterning device library or during scanning. Typically, movement of the stage MT, WT may be realized with the aid of a long-stroke module (coarse positioning) and a short-stroke module (fine positioning). However, in the case of a stepper (as opposed to a step-and-scan tool), the patterning device table MT may be connected to a short-stroke actuator, or may be fixed.

[0230] The depicted tool can be used in two different modes, namely a step mode and a scan mode. In the step mode, the patterning device table MT is kept substantially stationary and the entire patterning device image is projected onto a target portion C in one operation (i.e. a single "flash"). The substrate table WT can be shifted in the x and / or y direction so that different target portions C can be irradiated by the beam B. In the scan mode, essentially the same situation applies, except that a given target portion C is not exposed in a single "flash". Alternatively, the patterning device table MT can be moved at a rate v in a given direction (e.g. the "scanning direction", or the "y" direction) so that the projection beam B is scanned over the patterning device image. At the same time, the substrate table WT is moved simultaneously in the same or opposite direction at a rate V=Mv, where M is the magnification of the lens (typically M=1 / 4 or 1 / 5). In this way, a relatively large target portion C can be exposed without having to compromise resolution.

[0231] Fig.15 is a schematic diagram of another lithographic projection apparatus (LPA) that may be used for, and / or facilitate one or more operations described herein. The LPA may include a source collector module SO, an illumination system (illuminator) IL configured to condition a radiation beam B (e.g., EUV radiation), a support structure MT, a substrate table WT, and a projection system PS. The support structure (e.g., patterning device table) MT may be configured to support a patterning device (e.g., a mask or reticle) MA and is connected to a first positioner PM configured to accurately position the patterning device. The substrate table (e.g., a wafer stage) WT may be configured to hold a substrate (e.g., a wafer coated with resist) W and is connected to a second positioner PW configured to accurately position the substrate. The projection system (e.g., a reflective projection system) PS may be configured to project a pattern imparted to the radiation beam B by the patterning device MA onto a target portion C (e.g., comprising one or more dies) of the substrate W.

[0232] As shown in this embodiment, the LPA can be of the reflective type (e.g., using a reflective patterning device). It should be noted that since most materials are absorptive in the EUV wavelength range, the patterning device can have a multilayer reflector including multiple stacks of, for example, molybdenum and silicon. In one example, the multilayer reflector has 40 layer pairs of molybdenum and silicon, where each layer is a quarter wavelength thick. Even smaller wavelengths can be produced using x-ray lithography. Since most materials are absorptive at EUV and x-ray wavelengths, a thin sheet of patterned absorbing material on the patterning device topography (e.g., a TaN absorber on top of a multilayer reflector) defines where features will be printed (positive resist) or not (negative resist).

[0233] The illuminator IL may receive a beam of extreme ultraviolet radiation from a source collector module SO. Methods for generating EUV radiation include, but are not necessarily limited to, converting a material into a plasma state having at least one element having one or more emission lines in the EUV range (e.g., xenon, lithium, or tin). In one such method, commonly referred to as laser produced plasma ("LPP"), the plasma may be generated by irradiating a fuel, such as a droplet, stream, or cluster of a material having a line emitting element, with a laser beam. The source collector module SO may be a laser ( Fig.14 The resulting plasma emits output radiation, such as EUV radiation, which is collected using a radiation collector disposed within a source collector module. The laser and source collector module may be separate entities, for example when a CO2 laser is used to provide the laser beam for fuel excitation. In this example, the laser is not considered to form part of the lithographic apparatus, and the radiation beam B may be delivered from the laser to the source collector module by means of a beam delivery system including, for example, suitable directional mirrors and / or a beam expander. In other examples, the source may be an integral part of the source collector module, for example when the source is a discharge produced plasma EUV generator (commonly referred to as a DPP source).

[0234] The illuminator IL may include an adjuster for adjusting the angular intensity distribution of the radiation beam. Typically, at least the outer radial extent and / or the inner radial extent (commonly referred to as σ-outer and σ-inner, respectively) of the intensity distribution in a pupil plane of the illuminator may be adjusted. Furthermore, the illuminator IL may include various other components, such as a faceted field mirror arrangement and a faceted pupil mirror arrangement. The illuminator may be used to adjust the radiation beam to have a desired uniformity and intensity distribution in its cross-section.

[0235] The radiation beam B may be incident on a patterning device (e.g. a mask) MA held on a support structure (e.g. a patterning device table) MT and patterned by the patterning device. Having been reflected by the patterning device (e.g. a mask) MA, the radiation beam B passes through a projection system PS which focuses the radiation beam onto a target portion C of the substrate W. With the aid of a second positioner PW and a position sensor PS2 (e.g. an interferometer device, a linear encoder or a capacitive sensor), the substrate table WT may be accurately moved (e.g. to position a different target portion C in the path of the radiation beam B). Similarly, the first positioner PM and a further position sensor PS1 may be used to accurately position the patterning device (e.g. a mask) MA relative to the path of the radiation beam B. The patterning device (e.g. a mask) MA and the substrate W may be aligned using patterning device alignment marks M1, M2 and substrate alignment marks P1, P2.

[0236] The depicted apparatus LPA can be used in at least one of the following modes: a stepping mode, a scanning mode and a stationary mode. In the stepping mode, the entire pattern imparted to the radiation beam is projected onto a target portion C at once (e.g. a single static exposure) while the support structure (e.g. a patterning device table) MT and the substrate table WT are held substantially stationary. The substrate table WT is then moved in the X and / or Y direction so that different target portions C can be exposed. In the scanning mode, the pattern imparted to the radiation beam is projected onto a target portion C while the support structure (e.g. a patterning device table) MT and the substrate table WT are scanned synchronously (i.e. a single dynamic exposure). The speed and direction of the substrate table WT relative to the support structure (e.g. a patterning device table) MT may be determined by the (or less) magnification and image reversal properties of the projection system PS. In the stationary mode, the support structure (e.g. a patterning device table) MT for holding the programmable patterning device is held substantially stationary and the pattern imparted to the radiation beam is projected onto a target portion C while the substrate table WT is moved or scanned. In this mode, a pulsed radiation source is typically employed and the programmable patterning device is updated as required after each movement of the substrate table WT, or between successive radiation pulses during a scan. This mode of operation may be readily applied in maskless lithography using a programmable patterning device, such as a programmable mirror array of the type mentioned above.

[0237] Fig.16 yes Fig.15 A detailed view of the lithographic projection apparatus shown in FIG. Fig.16In the embodiment of the present invention, the LPA may include a source collector module SO, an illumination system IL, and a projection system PS. The source collector module SO is configured so that a vacuum environment can be maintained in an enclosure 220 of the source collector module SO. A plasma 210 emitting EUV radiation may be formed by a discharge-generated plasma source. EUV radiation may be generated by a gas or vapor, such as xenon, lithium vapor, or tin vapor, wherein a hot plasma 210 is generated to emit radiation in the EUV range of the electromagnetic spectrum. For example, the hot plasma 210 is generated by causing a discharge of an at least partially ionized plasma. In order to effectively generate radiation, it may be necessary to have, for example, a partial pressure of 10 Pa for Xe, Li, Sn vapor, or any other suitable gas or vapor. In some embodiments, an excited tin (Sn) plasma is provided to generate EUV radiation.

[0238] Radiation emitted by the hot plasma 210 is transferred from the source chamber 211 to the collector chamber 212 via an optional gas barrier or contaminant trap 230 (also referred to as a contaminant barrier or fin trap in some cases) positioned in or behind an opening in the source chamber 211. The contaminant trap 230 may include a channel structure. The contaminant trap 230 may also include a gas barrier, or a combination of a gas barrier and a channel structure. The contaminant trap 230 may be and / or include a barrier 230 (described below) that also includes a channel structure. The collector chamber 211 may include a radiation collector CO that may be a grazing incidence collector. The radiation collector CO has an upstream radiation collector side 251 and a downstream radiation collector side 252. Radiation traversing the collector CO may be reflected by the grating spectral filter 240 and then focused at a virtual source point IF along the optical axis indicated by the line "O". The virtual source point IF is usually referred to as an intermediate focus, and the source collector module is arranged such that the intermediate focus IF is located at or near the opening 221 in the enclosure structure 220. The virtual source point IF is an image of the radiation emitting plasma 210.

[0239] Subsequently, the radiation traverses an illumination system IL which may include a faceted field mirror arrangement 22 and a faceted pupil mirror arrangement 24 which are arranged to provide a radiation beam 21 having a desired angular distribution at the pattern forming device MA and a radiation intensity having a desired uniformity at the pattern forming device MA. After reflection of the radiation beam 21 at the pattern forming device MA held by the support structure MT, a patterned beam 26 is formed and the patterned beam 26 is imaged by the projection system PS via reflective elements 28, 30 onto a substrate W held by a substrate table WT. There may typically be more elements than shown in the illumination optics unit IL and the projection system PS. For example, a grating spectral filter 240 may optionally be present, depending on the type of lithographic apparatus. Furthermore, there may be more mirrors than shown in the figure, for example there may be in the projection system PS a plurality of mirrors. Fig.16 1 to 6 additional reflective elements beyond the elements shown.

[0240] like Fig.16 The collector optics CO shown in FIG. 1 is depicted as a nested collector with grazing incidence reflectors 253, 254 and 255, merely as an example of a collector (or collector mirror). The grazing incidence reflectors 253, 254 and 255 are arranged axially symmetrically around the optical axis O, and this type of collector optics CO can be used in combination with a discharge produced plasma source, often referred to as a DPP source.

[0241] Fig.17 Detailed view of the source collector module SO of the lithographic projection apparatus LPA (shown in the previous figure). The source collector module SO may be part of the LPA radiation system. The laser LA may be arranged to deposit laser energy into a fuel such as xenon (Xe), tin (Sn) or lithium (Li), thereby producing a highly ionized plasma 210 with an electron temperature of tens of electron volts. High energy radiation produced during deexcitation and recombination or recombination of these ions is emitted from the plasma, collected by a near normal incidence collector optics CO, and focused onto an opening 221 in an enclosure 220.

[0242] The concepts disclosed herein can simulate or mathematically model any general imaging system for imaging sub-wavelength features, and can be used in particular with emerging imaging technologies that can produce shorter and shorter wavelengths. Emerging technologies include extreme ultraviolet (EUV), DUV lithography that can produce 193nm wavelengths by using ArF lasers and even 157nm wavelengths by using fluorine lasers. In addition, EUV lithography can produce wavelengths in the range of 5nm to 20nm by using synchrotrons or by using high energy electrons to hit materials (solid or plasma) to produce photons in this range.

[0243] Fig.18 An embodiment of an electron beam inspection device 1320 (e.g., which may be used for and / or associated with one or more operations described herein) is schematically depicted. In some embodiments, the inspection device may be an electron beam inspection device (e.g., the same as or similar to a scanning electron microscope (SEM)) that obtains an image of a structure exposed or transferred on the substrate (e.g., a certain structure or all structures of a device such as an integrated circuit). A primary electron beam 1324 emitted from an electron source 1322 is converged by a condenser lens 1326 and then passes through a beam deflector 1328, an E×B deflector 1330, and an objective lens 1332 to illuminate a substrate 1310 on a substrate stage ST at a focal point.

[0244] When the substrate 1310 is irradiated with the electron beam 1324, secondary electrons or secondary electrons are generated from the substrate 1310. The secondary electrons are deflected by the E×B deflector 1330 and detected by the secondary electron detector 1334. A two-dimensional electron beam image can be obtained by detecting the electrons generated from the sample, synchronously, for example, two-dimensionally scanning the electron beam by the beam deflector 1328 or repeatedly scanning the electron beam 1324 in the X or Y direction by the beam deflector 1328, and continuously moving the substrate 1310 in the other direction of the X or Y direction by the substrate stage 1312. Thus, in an embodiment, the electron beam inspection device has a field of view for the electron beam defined by an angular range, and the electron beam can be provided by the electron beam inspection device into the angular range (for example, the angular range that the deflector 1328 can provide for the electron beam 1324 to pass through). Thus, the spatial extent of the field of view is the spatial extent to which the angular range of the electron beam can impinge on a surface (wherein the surface may be stationary or may be moving relative to the field).

[0245] like Fig.18As shown in FIG. 1 , the signal detected by the secondary electron detector 1334 may be converted into a digital signal by an analog / digital (A / D) converter 1336, and the digital signal may be sent to an image processing system 1350. In an embodiment, the image processing system 1350 may have a memory 1356 for storing all or part of the digital image for processing by a processing unit 1358. The processing unit 1358 (e.g., specially designed hardware, or a combination of hardware and software, or a computer-readable medium including software) is configured to convert or process the digital image into a data set representing the digital image. In an embodiment, the processing unit 1358 is configured or programmed to cause the operations described herein (e.g., SEM detection) to be performed. In addition, the image processing system 1350 may have a storage medium 1352 configured to store the digital image and the corresponding data set in a reference database. A display device 1354 may be connected to the image processing system 1350 so that an operator can perform necessary operations of the equipment with the aid of a graphical user interface.

[0246] Fig.19 Another embodiment of the inspection device is schematically illustrated. The system is used to inspect a sample 90 (such as a substrate) on a sample platform 89, and includes a charged particle beam generator 81, a condenser lens module 82, a probe forming objective lens module 83, a charged particle beam deflection module 84, a secondary charged particle detector module 85, an image forming module 86, and / or other components. The charged particle beam generator 81 generates a primary charged particle beam 91. The condenser lens module 82 focuses the generated primary charged particle beam 91. The probe forming objective lens module 83 focuses the concentrated primary charged particle beam into a charged particle beam probe 92. The charged particle beam deflection module 84 causes the formed charged particle beam probe 92 to scan across the surface of the area of ​​interest on the sample 90 fastened to the sample platform 89. In some embodiments, the charged particle beam generator 81 , the condenser lens module 82 and the probe forming objective lens module 83 or their equivalent designs, alternatives or any combination thereof together form a charged particle beam probe generator that generates a scanning charged particle beam probe 92 .

[0247] The secondary charged particle detector module 85 detects secondary charged particles 93 (also together with other reflected or scattered charged particles from the sample surface) emitted from the sample surface once bombarded by the charged particle beam probe 92 to produce a secondary charged particle detection signal 94. The image forming module 86 (e.g., a computing device) is connected to the secondary charged particle detector module 85 to receive the secondary charged particle detection signal 94 from the secondary charged particle detector module 85 and thereby form at least one scanning image. In an embodiment, the secondary charged particle detector module 85 and the image forming module 86 or their equivalent designs, alternatives, or any combination thereof together form an image forming device that forms a scanning image from the detected secondary charged particles emitted from the sample 90 bombarded by the charged particle beam probe 92.

[0248] In embodiments, the monitoring module 87 is coupled to the image forming module 86 of the image forming device to use the scanned image of the sample 90 received from the image forming module 86 to monitor, control, etc. the patterning process and / or derive parameters for patterning process design, control, monitoring, etc. In some embodiments, the monitoring module 87 is configured or programmed to cause the operations described herein to be performed. In some embodiments, the monitoring module 87 includes a computing device. In some embodiments, the monitoring module 87 includes a computer program configured to provide the functionality described herein. In some embodiments, Fig.14 In the system of , the detection spot size of the electron beam is significantly larger than, for example, CD, so that the detection spot is large enough so that the inspection speed can be very fast. However, due to the larger detection spot, the resolution may be lower.

[0249] For example, from e.g. Fig.13 and / or Fig.14 The SEM images of the system can be processed to extract the size, shape, contour, and / or other information describing the edge of objects in the image representing semiconductor device structures. The shape, contour, and / or other information can be quantified at user-defined cut lines and / or at other locations via indicators such as CD. In some embodiments, images of device structures are compared and quantified via indicators such as edge-to-edge distance (CD) measured on the extracted contours or simple pixel differences between images. Alternatively, the indicators can include EP meters and / or other parameters.

[0250] The following aspects may also be used to further describe the embodiments of the present disclosure:

[0251] 1. One or more non-transitory computer-readable media storing a machine learning prediction model and instructions that, when executed by one or more processors, cause the one or more processors to perform:

[0252] receiving input information, the input information including geometry information and / or patterning process information for a semiconductor device manufacturing process;

[0253] predicting an output semiconductor device geometry based on the input information using the machine learning prediction model, the output semiconductor device geometry comprising a probabilistic representation of a pattern in multiple dimensions, the predicting comprising determining an edge placement error (EPE) metric associated with one or more features of the pattern based on the input information and / or the output semiconductor device geometry;

[0254] receiving new input information determined based on adjustments to the semiconductor device manufacturing process, the adjustments determined based on the output semiconductor device geometry; and

[0255] Using the machine learning model (i) predicts an updated output semiconductor device geometry based on new input information, and (ii) includes determining an updated EPE metric based on the new input information and / or the updated output semiconductor device geometry.

[0256] 2. The non-transitory computer-readable medium of clause 1, wherein the pattern probabilistic representation comprises a pattern probability image comprising predicted two-dimensional substrate geometry for one or more features of the pattern.

[0257] 3. The non-transitory computer-readable medium of any one of clauses 1 to 2, wherein the pattern probabilistic representation comprises a predicted two-dimensional geometry of one or more vias in a semiconductor device.

[0258] 4. A non-transitory computer-readable medium according to any one of aspects 1 to 3, wherein the instructions are further configured to cause the one or more processors to utilize the machine learning prediction model to predict one or both of (1) a symmetric or asymmetric random edge placement error band and (2) a random failure rate based on a pattern probability image.

[0259] 5. The non-transitory computer-readable medium of any one of aspects 1 to 4, wherein the input information comprises one or both of a simulated aerial image and a simulated resist image.

[0260] 6. One or more non-transitory computer-readable media storing a machine learning prediction model and instructions that, when executed by one or more processors, cause the one or more processors to perform:

[0261] receiving input information, the input information comprising geometric shape information and / or process information of the pattern; and

[0262] A multi-dimensional output substrate geometry is predicted based on the input information using the machine learning prediction model, the prediction comprising determining an edge placement error (EPE) metric associated with one or more features of the pattern based on the input information and / or the output substrate geometry.

[0263] 7. The non-transitory computer-readable medium of aspect 6, wherein the EPE indicator is symmetric or asymmetric with respect to the one or more features of the pattern.

[0264] 8. The non-transitory computer-readable medium of aspect 7, wherein the asymmetric EPE indicator has a non-Gaussian distribution.

[0265] 9. A non-transitory computer-readable medium according to any one of Aspects 7 to 8, wherein the machine learning prediction model is trained using asymmetrically distributed training data, so that the weights and / or parameters of the trained machine learning prediction model contribute to the determination of the symmetric or asymmetric EPE indicator.

[0266] 10. The non-transitory computer-readable medium of clause 9, wherein the asymmetric distributed training data comprises an asymmetric distributed EPE indicator determined from a multi-dimensional probability image associated with asymmetric distributed critical dimension (CD) values.

[0267] 11. The non-transitory computer-readable medium of any one of clauses 6 to 10, wherein the multi-dimensional output substrate geometry is indicative of variability in shapes of features of the pattern.

[0268] 12. The non-transitory computer-readable medium of any one of clauses 6 to 11, wherein the multi-dimensional output substrate geometry represents a probability of a given geometric shape occupying a given location on the substrate.

[0269] 13. The non-transitory computer-readable medium of any one of clauses 6 to 12, wherein the multi-dimensional output substrate geometry comprises a probabilistic representation of the pattern in multiple dimensions.

[0270] 14. The non-transitory computer-readable medium of clause 13, wherein the pattern probability representation comprises a pattern probability image comprising predicted probabilities of two-dimensional substrate geometry for the one or more features of the pattern.

[0271] 15. The non-transitory computer-readable medium of clause 14, wherein the pattern probability image comprises a plurality of stacked images comprising predicted probabilities of two-dimensional substrate geometries of one or more through-holes.

[0272] 16. A non-transitory computer-readable medium according to any one of aspects 6 to 15, wherein the instructions are further configured to cause the one or more processors to utilize the machine learning prediction model to predict one or both of (1) a symmetric or asymmetric random edge placement error band and (2) a random failure rate based on the multi-dimensional output substrate geometry.

[0273] 17. A non-transitory computer-readable medium according to any one of aspects 6 to 16, wherein the instructions are further configured to cause the one or more processors to adjust the machine learning prediction model so that the multi-dimensional output substrate geometry matches the measured random edge placement error band or the measured failure rate.

[0274] 18. A non-transitory computer-readable medium according to any one of aspects 6 to 17, wherein the instructions are further configured to cause the one or more processors to adjust the machine learning prediction model so that the multi-dimensional output substrate geometry corresponds to or matches an average profile prediction made based on an optical proximity correction model or a lithography process manufacturability inspection model.

[0275] 19. The non-transitory computer readable medium of any one of clauses 6 to 18, wherein the multi-dimensional output substrate geometry is associated with a pattern in a substrate in a semiconductor device, and the patterning process comprises a semiconductor device manufacturing process.

[0276] 20. The non-transitory computer-readable medium of any one of clauses 6 to 19, wherein the multi-dimensional output substrate geometry comprises a pattern probability image, and wherein the pattern probability image comprises a predicted two-dimensional geometry of one or more vias in a semiconductor device.

[0277] 21. A non-transitory computer-readable medium according to any one of aspects 6 to 20, wherein the multi-dimensional output substrate geometry includes a pattern probability image, and wherein the instructions are further configured to cause the one or more processors to use the pattern probability image for lithography manufacturability inspection and / or pattern fidelity measurement in a semiconductor device manufacturing process.

[0278] 22. A non-transitory computer-readable medium according to any one of aspects 6 to 21, wherein the input information includes one or more of a simulated aerial image for a semiconductor device, a simulated resist image, a target substrate size, or data associated with semiconductor device manufacturing from a scanner.

[0279] 23. The non-transitory computer readable medium of any one of aspects 6 to 22, wherein the input information comprises a plurality of aerial images, and individual aerial images of the plurality of aerial images correspond to different heights of the resist layer associated with a patterning process.

[0280] 24. The non-transitory computer-readable medium of any one of aspects 6 to 23, wherein the machine learning prediction model comprises a neural network.

[0281] 25. The non-transitory computer-readable medium of any one of clauses 6 to 24, wherein the process information comprises one or more parameters of one or more manufacturing processes performed for a semiconductor device.

[0282] 26. A non-transitory computer-readable medium according to any one of aspects 6 to 25, wherein the instructions are further configured to cause the one or more processors to train the machine learning prediction model using training information, the training information comprising one or more of aerial images, target pattern geometry, or patterning process parameters, and corresponding physical substrate measurement results and / or prediction results from different non-machine learning prediction models.

[0283] 27. The non-transitory computer-readable medium of clause 26, wherein the corresponding physical substrate measurements and / or predictions from different non-machine learning prediction models comprise training pattern probability images.

[0284] 28. The non-transitory computer readable medium of any one of clauses 6 to 27, wherein the instructions are further configured to cause the one or more processors to determine adjustments for semiconductor device manufacturing equipment based on the predicted multi-dimensional output substrate geometry.

[0285] 29. A non-transitory computer-readable medium according to any one of aspects 6 to 28, wherein the instructions are further configured to cause one or more processors to calibrate the machine learning prediction model based on one or both of post-development inspection dimensions and post-etch inspection dimensions associated with a semiconductor device manufacturing process.

[0286] 30. A method for predicting substrate geometry associated with a patterning process, the method comprising:

[0287] receiving input information, the input information comprising geometric shape information and / or process information of the pattern; and

[0288] A multi-dimensional output substrate geometry is predicted based on the input information using a machine learning prediction model, the prediction comprising determining an edge placement error (EPE) metric associated with one or more features of the pattern based on the input information and / or the output substrate geometry.

[0289] 31. A method according to aspect 30, wherein the EPE indicator is symmetrical or asymmetrical with respect to the one or more features of the pattern.

[0290] 32. A method according to aspect 31, wherein the asymmetric EPE indicator has a non-Gaussian distribution.

[0291] 33. A method according to any one of Aspects 31 to 32, wherein the machine learning prediction model is trained using asymmetrically distributed training data, so that the weights and / or parameters of the trained machine learning prediction model contribute to the prediction of the symmetric or asymmetric EPE indicator.

[0292] 34. The method of clause 33, wherein the asymmetric distributed training data comprises an asymmetric distributed EPE indicator determined from a multi-dimensional probability image associated with asymmetric distributed critical dimension (CD) values.

[0293] 35. A method according to any one of aspects 30 to 34, wherein the multi-dimensional output substrate geometry is indicative of variability in shapes of features of the pattern.

[0294] 36. A method according to any one of clauses 30 to 35, wherein the multi-dimensional output substrate geometry represents the probability of a given geometry occupying a given location on the substrate.

[0295] 37. A method according to any one of aspects 30 to 36, wherein the multi-dimensional output substrate geometry comprises a probabilistic representation of the pattern in multiple dimensions.

[0296] 38. A method according to clause 37, wherein the pattern probability representation comprises a pattern probability image comprising predicted probabilities of two-dimensional substrate geometry for the one or more features of the pattern.

[0297] 39. The method of clause 38, wherein the pattern probability image comprises a plurality of stack images comprising predicted probabilities of two-dimensional substrate geometries of one or more through-holes.

[0298] 40. The method of any one of clauses 30 to 39, further comprising using the machine learning prediction model to predict one or both of (1) a symmetric or asymmetric random edge placement error band and (2) a random failure rate based on the multi-dimensional output substrate geometry.

[0299] 41. The method of any one of aspects 30 to 40, further comprising adjusting the machine learning prediction model so that the multi-dimensional output substrate geometry matches a measured random edge placement error band or a measured failure rate.

[0300] 42. The method of any one of Aspects 30 to 41, further comprising adjusting the machine learning prediction model so that the multi-dimensional output substrate geometry corresponds to or matches an average profile prediction made based on an optical proximity correction model or a lithography process manufacturability check model.

[0301] 43. The method of any one of clauses 30 to 42, wherein the multi-dimensional output substrate geometry is associated with a pattern in a substrate in a semiconductor device, and the patterning process comprises a semiconductor device manufacturing process.

[0302] 44. The method of any one of clauses 30 to 43, wherein the multi-dimensional output substrate geometry comprises a pattern probability image, and wherein the pattern probability image comprises a predicted two-dimensional geometry of one or more vias in a semiconductor device.

[0303] 45. A method according to any one of aspects 30 to 44, wherein the multi-dimensional output substrate geometry comprises a pattern probability image, and wherein the method further comprises using the pattern probability image for lithography manufacturability checking and / or pattern fidelity metrology measurement during semiconductor device manufacturing.

[0304] 46. ​​A method according to any one of aspects 30 to 45, wherein the input information includes one or more of a simulated aerial image for a semiconductor device, a simulated resist image, a target substrate size, or data associated with semiconductor device manufacturing from a scanner.

[0305] 47. A method according to any one of clauses 30 to 46, wherein the input information comprises a plurality of aerial images, and individual aerial images of the plurality of aerial images correspond to different heights of the resist layer associated with the patterning process.

[0306] 48. A method according to aspects 30 to 47, wherein the machine learning prediction model includes a neural network.

[0307] 49. The method of any one of clauses 30 to 48, wherein the process information comprises one or more parameters of one or more manufacturing processes performed for the semiconductor device.

[0308] 50. The method according to any one of Aspects 30 to 49 further includes training the machine learning prediction model using training information, wherein the training information includes one or more of spatial images, target pattern geometry, or patterning process parameters, and corresponding physical substrate measurement results and / or prediction results from different non-machine learning prediction models.

[0309] 51. A method according to clause 50, wherein the corresponding physical substrate measurement results and / or prediction results from different non-machine learning prediction models include training pattern probability images.

[0310] 52. The method of any of clauses 30 to 51, further comprising determining adjustments to semiconductor device fabrication equipment based on the predicted multi-dimensional output substrate geometry.

[0311] 53. The method of any one of clauses 30 to 52, further comprising calibrating the machine learning prediction model based on one or both of a post-development inspection dimension and a post-etch inspection dimension associated with a semiconductor device manufacturing process.

[0312] 54. A method comprising:

[0313] receiving input information, using one or more processors, the input information including geometric information of a pattern on a substrate and / or patterning process information;

[0314] determining, with the one or more processors, an edge placement error (EPE) metric associated with one or more features of the pattern based on the input information; and

[0315] One or more regions of the pattern on the substrate having one or more potential defects are determined based on the EPE indicator using the one or more processors.

[0316] 55. A method according to aspect 54, wherein the EPE indicator is symmetrical or asymmetrical with respect to the one or more features of the pattern.

[0317] 56. A method according to aspect 55, wherein the asymmetric EPE indicator has a non-Gaussian distribution.

[0318] 57. A method according to any one of Aspects 54 to 56, wherein the EPE indicator is determined using a machine learning prediction model, and the machine learning prediction model is trained using asymmetrically distributed training data, so that the weights and / or parameters of the trained machine learning prediction model contribute to the prediction of the EPE indicator, regardless of whether the EPE indicator is symmetric or asymmetric.

[0319] 58. The method of clause 57, wherein the asymmetric distributed training data comprises an asymmetric distributed EPE indicator determined from a multi-dimensional probability image associated with asymmetric distributed critical dimension (CD) values.

[0320] 59. A method according to any one of aspects 54 to 58, wherein the one or more areas of the pattern on the substrate having the one or more potential defects include hot spots.

[0321] 60. A method according to any one of aspects 54 to 59, wherein the EPE indicator is related to yield, and the yield is associated with the pattern on the substrate.

[0322] 61. A method according to aspects 54 to 60, wherein the input information includes one or more parameters related to global overlay, global critical dimension, local overlay, local critical dimension, line edge roughness, local placement error, or local critical dimension uniformity; and / or values ​​indicating an interaction between two or more parameters.

[0323] 62. A method according to any one of aspects 54 to 61, wherein the input information is measured and / or simulated.

[0324] 63. A manufacturing process, the process comprising:

[0325] receiving input information, using one or more processors, the input information including geometric information of a pattern on a substrate and / or patterning process information;

[0326] determining, with the one or more processors, an edge placement error (EPE) metric associated with one or more features of the pattern based on the input information; and

[0327] One or more regions of the pattern on the substrate having one or more potential defects are determined based on the EPE indicator using the one or more processors.

[0328] 64. A process according to aspect 63, wherein the EPE indicator is symmetrical or asymmetrical with respect to the one or more features of the pattern.

[0329] 65. A manufacturing process according to aspect 64, wherein the asymmetric EPE indicator has a non-Gaussian distribution.

[0330] 66. A manufacturing process according to any one of Aspects 63 to 65, wherein the EPE indicator is determined using a machine learning prediction model, and the machine learning prediction model is trained using asymmetrically distributed training data, so that the weights and / or parameters of the trained machine learning prediction model contribute to the prediction of the EPE indicator, regardless of whether the EPE indicator is symmetrical or asymmetrical.

[0331] 67. The manufacturing process of aspect 66, wherein the asymmetrically distributed training data comprises an asymmetrically distributed EPE indicator determined from a multi-dimensional probability image associated with asymmetrically distributed critical dimension (CD) values.

[0332] 68. A manufacturing process according to any one of aspects 63 to 67, wherein the one or more areas of the pattern on the substrate having the one or more potential defects include hot spots.

[0333] 69. A manufacturing process according to any one of aspects 63 to 68, wherein the EPE indicator is related to yield, and the yield is associated with the pattern on the substrate.

[0334] 70. A manufacturing process according to any one of Aspects 63 to 69, wherein the input information includes one or more parameters, the one or more parameters including global overlay, global critical dimension, local critical dimension, feature edge roughness, local critical dimension uniformity, mask critical dimension, mask placement error, scanner to scanner critical dimension, scanner to scanner overlay mismatch, patterning tool critical dimension, patterning tool overlay mismatch, or local and global variations in feature asymmetry; and / or values ​​indicating interaction / crosstalk between two or more parameters.

[0335] 71. A manufacturing process according to aspect 70, wherein the EPE indicator includes a combination of two or more of the parameters and / or values ​​indicating interactions between two or more of the parameters.

[0336] 72. A manufacturing process according to aspect 71, wherein the EPE indicator is mathematically calculated and / or predicted based on one or more of the parameters and / or values ​​indicative of the interaction between two or more of the parameters.

[0337] 73. A manufacturing process according to any one of aspects 63 to 72, wherein the input information is measured and / or simulated.

[0338] 74. A manufacturing process according to any one of Aspects 63 to 73, wherein the EPE indicator is determined based on a target EPE probability level, and the one or more processors are configured so that the target EPE probability level is entered or selected by a user via a user interface.

[0339] 75. A manufacturing process according to any one of aspects 63 to 74, wherein receiving the input information, determining the EPE indicator, and determining the one or more regions of the pattern on the substrate having one or more potential defects are part of evaluating, improving, predicting, or verifying semiconductor device performance, and

[0340] The evaluation, improvement, prediction, or verification of semiconductor device performance includes source mask optimization, optical proximity effect correction, photolithography manufacturability inspection, and / or design of a manufacturing process associated with the semiconductor device.

[0341] 76. A manufacturing process according to any one of Aspects 63 to 75, wherein determining one or more areas of the pattern on the substrate having one or more potential defects based on the EPE indicator includes determining the probability that a given feature of the pattern occupies a given location on the substrate.

[0342] 77. A manufacturing process according to any one of Aspects 63 to 76, wherein determining one or more regions of the pattern on the substrate having one or more potential defects based on the EPE metric is based on a cost function that balances an acceptable defect probability with the resources required to inspect the number of the one or more regions, wherein the acceptable defect probability is related to the number of the one or more regions of the pattern on the substrate having the one or more potential defects that are targets for inspection.

[0343] 78. A manufacturing process according to any one of Aspects 63 to 77, wherein determining the one or more regions of the pattern on the substrate having the one or more potential defects based on the EPE indicator includes determining a pattern probability image of one or more features of the pattern.

[0344] 79. The manufacturing process of clause 78, wherein the pattern probability image comprises a predicted two-dimensional substrate geometry of one or more features.

[0345] 80. A manufacturing process according to any one of Aspects 63 to 79, wherein the input information includes one or more of the following, and / or is determined based on one or more of the following: a predicted aerial image for one or more semiconductor device layers, a target substrate size, or data from a scanner and / or patterning process associated with semiconductor device manufacturing.

[0346] 81. The manufacturing process of any one of clauses 63 to 80, further comprising determining adjustments to semiconductor device manufacturing equipment based on the one or more regions of the pattern on the substrate having the one or more potential defects.

[0347] 82. The manufacturing process according to aspect 81, wherein the adjustment comprises one or more of a change in pattern, a change in mask, a change in dose, a change in focus, a change in exposure, a change in pupil, a change in etching and / or deposition process temperature, a change in etching and / or deposition process time.

[0348] 83. A manufacturing process according to any one of aspects 63 to 82, wherein the one or more processors include a computational lithography model, and wherein determining the EPE indicator includes using the input information as an input to the computational lithography model to predict the EPE indicator.

[0349] 84. A manufacturing process according to aspects 63 to 83, wherein the geometric shape information includes one or more indications of the size and / or position of one or more features of the pattern.

[0350] 85. A non-transitory computer-readable medium having instructions thereon that, when executed by a computer, implement the manufacturing process of any one of aspects 63 to 84.

[0351] 86. A non-transitory computer readable medium having instructions thereon that, when executed by a computer, cause the computer to:

[0352] receiving input information, wherein the input information includes geometric shape information of a pattern on a substrate and / or patterning process information;

[0353] determining an edge placement error (EPE) metric associated with one or more features of the pattern based on the input information; and

[0354] Based on the EPE indicator, one or more regions of the pattern on the substrate having one or more potential defects are identified.

[0355] 87. The non-transitory computer-readable medium of aspect 86, wherein the EPE indicator is symmetric or asymmetric with respect to the one or more features of the pattern.

[0356] 88. The non-transitory computer-readable medium of aspect 87, wherein the asymmetric EPE indicator has a non-Gaussian distribution.

[0357] 89. A non-transitory computer-readable medium according to any one of aspects 86 to 88, wherein the EPE indicator is determined using a machine learning prediction model, and wherein the machine learning prediction model is trained using asymmetrically distributed training data so that the weights and / or parameters of the trained machine learning prediction model contribute to the prediction of the EPE indicator, regardless of whether the EPE indicator is symmetric or asymmetric.

[0358] 90. The non-transitory computer-readable medium of clause 89, wherein the asymmetric distributed training data comprises an asymmetric distributed EPE indicator determined from a multi-dimensional probability image associated with asymmetric distributed critical dimension (CD) values.

[0359] 91. The non-transitory computer-readable medium of any one of aspects 86 to 90, wherein the one or more regions of the pattern on the substrate having the one or more potential defects comprise hot spots.

[0360] 92. The non-transitory computer-readable medium of any one of aspects 86 to 91, wherein the EPE indicator is related to a yield associated with the pattern on the substrate.

[0361] 93. A non-transitory computer-readable medium according to any one of Aspects 86 to 92, wherein the input information includes one or more parameters, the one or more parameters including global overlay, global critical dimension, local critical dimension, feature edge roughness, local critical dimension uniformity, mask critical dimension, mask placement error, scanner to scanner critical dimension, scanner to scanner overlay mismatch, patterning tool critical dimension, patterning tool overlay mismatch, or local and global variations in feature asymmetry; and / or values ​​indicating interaction / crosstalk between two or more parameters.

[0362] 94. The non-transitory computer-readable medium of aspect 93, wherein the EPE indicator comprises a combination of two or more of the parameters and / or values ​​indicative of an interaction between two or more of the parameters.

[0363] 95. The non-transitory computer-readable medium of any one of aspects 86 to 94, wherein the input information is measured and / or simulated.

[0364] 96. A non-transitory computer-readable medium according to any one of aspects 86 to 95, wherein the EPE indicator is determined based on a target EPE probability level, wherein the target EPE probability level is entered or selected by a user via a user interface.

[0365] 97. A non-transitory computer-readable medium according to any one of Aspects 86 to 96, wherein the input information is received, the EPE indicator is determined, and the one or more regions of the pattern on the substrate having one or more potential defects are determined as part of source mask optimization, optical proximity effect correction, lithography manufacturability checking, and / or design for a manufacturing process associated with a semiconductor device.

[0366] 98. A non-transitory computer-readable medium according to any one of Aspects 86 to 97, wherein determining one or more areas of the pattern on the substrate having one or more potential defects based on the EPE indicator includes determining the probability of a given feature occupying a given location on the substrate.

[0367] 99. A non-transitory computer-readable medium according to any one of Aspects 86 to 98, wherein determining one or more regions of the pattern on the substrate having one or more potential defects based on the EPE indicator is based on a cost function that balances the number of one or more regions of the pattern on the substrate having one or more potential defects and the resources required to inspect the one or more regions.

[0368] 100. A non-transitory computer-readable medium according to any one of Aspects 86 to 99, wherein determining the one or more regions of the pattern on the substrate having the one or more potential defects based on the EPE indicator includes determining a pattern probability image of one or more features of the pattern.

[0369] Although the concepts disclosed herein can be used to manufacture wafers on substrates such as silicon wafers, it should be understood that the disclosed concepts can be used in any type of manufacturing system (e.g., a system for manufacturing on substrates other than silicon wafers). In addition, combinations and sub-combinations of the disclosed elements can include discrete embodiments. For example, discrete embodiments of a machine learning prediction model can predict one or both of a random edge placement error band and a random failure rate based on a multi-dimensional output substrate geometry.

[0370] The description herein is intended to be illustrative rather than limiting. Accordingly, those skilled in the art will appreciate that modifications may be made to the described invention without departing from the scope of the claims set forth below.

Claims

1. A computer-readable medium having instructions thereon which, when executed by a computer, cause the computer to: receiving input information, using one or more processors, the input information including geometric information of a pattern on a substrate and / or patterning process information; determining, with the one or more processors, an edge placement error (EPE) indicator associated with one or more features of the pattern based on the input information; as well as One or more regions of the pattern on the substrate having one or more potential defects are determined based on the EPE indicator using the one or more processors. 2 . The computer-readable medium of claim 1 , wherein the EPE indicator is symmetrical or asymmetrical with respect to the one or more features of the pattern.

3. The computer-readable medium according to claim 1 or 2, wherein: The EPE indicator is determined using a machine learning prediction model, and asymmetrically distributed training data is used to train the machine learning prediction model, so that the weights and / or parameters of the trained machine learning prediction model contribute to the prediction of the EPE indicator, regardless of whether the EPE indicator is symmetrical or asymmetrical. 4 . The computer-readable medium of claim 3 , wherein the asymmetric distributed training data comprises an asymmetric distributed EPE indicator determined from a multi-dimensional probability image associated with asymmetric distributed critical dimension (CD) values.

5. The computer-readable medium according to claim 1 or 2, wherein: The EPE index is related to yield, which is associated with the pattern on the substrate.

6. A computer-readable medium according to claim 1 or 2, wherein the input information includes one or more parameters, the one or more parameters including global overlay, global critical dimension, local critical dimension, feature edge roughness, local critical dimension uniformity, mask critical dimension, mask placement error, scanner to scanner critical dimension, scanner to scanner overlay mismatch, patterning tool critical dimension, patterning tool overlay mismatch, or local and global variations in feature asymmetry; and / or values ​​indicating interaction / crosstalk between two or more parameters.

7. The computer-readable medium of claim 6, wherein the EPE indicator comprises a combination of two or more of the parameters and / or values ​​indicating an interaction between two or more of the parameters.

8. The computer readable medium of claim 1 or 2, wherein the input information is measured and / or simulated.

9. A computer-readable medium according to claim 1 or 2, wherein the EPE indicator is determined based on a target EPE probability level, and the one or more processors are configured so that the target EPE probability level is entered or selected by a user via a user interface.

10. The computer-readable medium according to claim 1 or 2, wherein: receiving the input information, determining the EPE indicator, and determining the one or more regions of the pattern on the substrate having one or more potential defects as part of evaluating, improving, predicting, or verifying semiconductor device performance, and The evaluation, improvement, prediction, or verification of semiconductor device performance includes source mask optimization, optical proximity effect correction, photolithography manufacturability inspection, and / or design of a manufacturing process associated with the semiconductor device.

11. The computer-readable medium of claim 1 or 2, wherein determining one or more areas of the pattern on the substrate having one or more potential defects based on the EPE indicator comprises determining a probability that a given feature of the pattern occupies a given location on the substrate.

12. The computer-readable medium of claim 1 or 2, wherein determining one or more regions of the pattern on the substrate having one or more potential defects based on the EPE indicator is based on a cost function that balances an acceptable probability of defects with resources required to inspect the number of the one or more regions, wherein The acceptable defect probability is related to a number of the one or more regions of the pattern on the substrate having the one or more potential defects that are targeted for inspection.

13. The computer-readable medium of claim 1 or 2, wherein determining the one or more regions of the pattern on the substrate having the one or more potential defects based on the EPE indicator comprises determining a pattern probability image of one or more features of the pattern, Wherein the pattern probability image includes a predicted two-dimensional substrate geometry of one or more features.

14. A computer-readable medium according to claim 1 or 2, wherein the input information includes one or more of the following, and / or is determined based on one or more of the following: a predicted aerial image for one or more semiconductor device layers, a target substrate size, or data from a scanner and / or patterning process associated with semiconductor device manufacturing.

15. The computer-readable medium of claim 1 or 2, wherein the one or more processors include a computational lithography model, and wherein determining the EPE metric includes predicting the EPE metric using the input information as an input to the computational lithography model, in, The geometric information includes one or more indications of a size and / or position of one or more features of the pattern.

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