Voltage division circuit structure

Abstract

The invention discloses a voltage division circuit structure, which belongs to the field of integrated circuits and comprises a first voltage division unit, a second voltage division unit, a transconductance amplifier and an NMOS (N-channel Metal Oxide Semiconductor) tube, the first end of the NMOS tube is connected with input voltage, the second end and the third end are jointly connected with output voltage, and the fourth end is connected with the third end of the transconductance amplifier; the first voltage-dividing unit and the second voltage-dividing unit are connected in series, the first end of the first voltage-dividing unit is connected with output voltage, and the second end is connected with the first end of the second voltage-dividing unit; the second end of the second voltage dividing unit is grounded; the first end of the transconductance amplifier is connected with reference voltage, and the second end of the transconductance amplifier is connected between the second end of the first voltage dividing unit and the first end of the second voltage dividing unit; the first voltage-dividing unit and the second voltage-dividing unit contain the same type of elements. According to the invention, a voltage division method that the diode and the resistor are connected in series or the PMOS tube connected with the diode and the resistor are connected in series is adopted to replace a traditional large-resistor voltage division method, so that the requirement of low power consumption can be met, and the resistor area under the condition of low current is greatly saved.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuits, and in particular to a voltage divider circuit structure. Background Art

[0002] In the design of LDO (Low Dropout Regulator), a voltage divider circuit is often required to divide the output voltage, and the divided voltage is then fed back to the non-inverting or inverting input of the amplifier.

[0003] In extremely low power LDO applications, for example, when the current used for the voltage divider is 100nA and the output voltage is 1.8V, a resistor with a resistance greater than 1.8V / 100nA=18Mohm is required; when the current used for the voltage divider is 10nA and the output is 1.8V, a resistor with a resistance greater than 1.8V / 10nA=180Mohm is required. In this case, the area of ​​this resistor is too large, which will increase the circuit area and design cost.

[0004] Therefore, there is an urgent need for a voltage divider circuit that can take into account both the low power consumption of LDO and the small resistance area. Summary of the invention

[0005] The object of the present invention is to provide a voltage divider circuit structure to solve the problems in the background technology.

[0006] In order to solve the above technical problems, the present invention provides a voltage-dividing circuit structure, including a first voltage-dividing unit, a second voltage-dividing unit, a transconductance amplifier and an NMOS tube; The first terminal of the NMOS tube is connected to the input voltage, the second terminal and the third terminal of the NMOS tube are commonly connected to the output voltage, and the fourth terminal of the NMOS tube is connected to the third terminal of the transconductance amplifier; The first voltage dividing unit and the second voltage dividing unit are connected in series, a first end of the first voltage dividing unit is connected to the output voltage, and a second end is connected to a first end of the second voltage dividing unit; a second end of the second voltage dividing unit is grounded; The first terminal of the transconductance amplifier is connected to a reference voltage, and the second terminal is connected between the second terminal of the first voltage dividing unit and the first terminal of the second voltage dividing unit; The first voltage dividing unit and the second voltage dividing unit include the same type of components.

[0007] In one implementation, the first voltage dividing unit includes a first resistor and a first diode, and the first resistor and the first diode are connected in series; A first end of the first resistor is connected to the output voltage, a second end of the first resistor is connected to the anode of the first diode, and a cathode of the first diode is connected to the first end of the second voltage dividing unit and the second end of the transconductance amplifier at the same time; or, The anode of the diode is connected to the output voltage, the cathode of the diode is connected to the first end of the first resistor, and the second end of the first resistor is connected to the first end of the second voltage divider unit and the second end of the transconductance amplifier at the same time.

[0008] In one implementation, the second voltage dividing unit includes a second resistor and a second diode, and the second resistor and the second diode are connected in series; The first end of the second resistor is connected to the second end of the first voltage divider unit and the second end of the transconductance amplifier at the same time, the second end of the second resistor is connected to the anode of the second diode, and the cathode of the second diode is grounded; or, The anode of the diode is connected to the second end of the first voltage divider unit and the second end of the transconductance amplifier at the same time, the cathode of the diode is connected to the first end of the second resistor, and the second end of the second resistor is grounded.

[0009] In one embodiment, the first voltage dividing unit includes a first resistor and a first PMOS transistor, the first resistor and the first PMOS transistor are connected in series, and the first PMOS transistor is connected in a diode manner; The first end of the first resistor is connected to the output voltage, the second end of the first resistor is connected to the source end of the first PMOS tube, the gate end and the drain end of the first PMOS tube are short-circuited, and are connected to the first end of the second voltage dividing unit and the second end of the transconductance amplifier at the same time; or, The source terminal of the first PMOS tube is connected to the output voltage, the gate terminal and the drain terminal of the first PMOS tube are short-circuited and connected to the first end of the first resistor, and the second end of the first resistor is simultaneously connected to the first end of the second voltage divider unit and the second end of the transconductance amplifier.

[0010] In one implementation, the second voltage dividing unit includes a second resistor and a second PMOS tube, the second resistor and the second PMOS tube are connected in series, and the second PMOS tube is connected in a diode manner; The first end of the second resistor is connected to the second end of the first voltage divider unit and the second end of the transconductance amplifier at the same time, the second end of the second resistor is connected to the source end of the second PMOS tube, the gate end and the drain end of the second PMOS tube are short-circuited and grounded; or, The source end of the second PMOS tube is connected to the second end of the first voltage divider unit and the second end of the transconductance amplifier at the same time, the gate end and the drain end of the second PMOS tube are short-circuited and connected to the first end of the second resistor, and the second end of the second resistor is grounded.

[0011] In one implementation, the first voltage divider unit includes a first diode, an anode of the first diode is connected to the output voltage, and a cathode of the first diode is simultaneously connected to a first end of the second voltage divider unit and a second end of the transconductance amplifier.

[0012] In one implementation, the second voltage dividing unit includes a second diode, an anode of the second diode is connected to the second end of the first voltage dividing unit and the second end of the transconductance amplifier at the same time, and a cathode of the second diode is grounded.

[0013] In one implementation, the ratio of the reference voltage connected to the first terminal of the transconductance amplifier to the output voltage commonly connected to the second and third terminals of the NMOS tube is N:M, where M and N are both positive integers and N<M.

[0014] The present invention provides a voltage-dividing circuit structure, which replaces the traditional large resistor voltage-dividing method by connecting a diode and a resistor in series, or a diode-connected PMOS tube and a resistor in series, so as to meet the low power consumption requirement and greatly save the resistor area under low current conditions. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a schematic diagram of a voltage divider circuit structure provided by the present invention.

[0016] Figure 2 This is a first schematic diagram of a voltage divider circuit structure provided in Embodiment 1 of the present invention.

[0017] Figure 3 This is a second schematic diagram of a voltage divider circuit structure provided in the first embodiment of the present invention.

[0018] Figure 4 This is a first schematic diagram of a voltage divider circuit structure provided in the second embodiment of the present invention.

[0019] Figure 5 This is a second schematic diagram of a voltage divider circuit structure provided in the second embodiment of the present invention. DETAILED DESCRIPTION

[0020] The following is a further detailed description of a voltage divider circuit structure proposed by the present invention in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer according to the following description. It should be noted that the accompanying drawings are all in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0021] The present invention provides a voltage dividing circuit structure, which divides the output voltage by connecting two voltage dividing units in series. Figure 1As shown, the voltage divider circuit structure of the present invention includes a transconductance amplifier OTA, an NMOS tube N1, a voltage divider unit 1 and a voltage divider unit 2; the drain terminal of the NMOS tube N1 is connected to the input voltage VDDIN, the source terminal and the substrate of the NMOS tube N1 are commonly connected to the output voltage VDDOUT, and the gate terminal of the NMOS tube N1 is connected to the output terminal of the transconductance amplifier OTA; the voltage divider unit 1 and the voltage divider unit 2 are connected in series, the first terminal of the voltage divider unit 1 is connected to the output voltage VDDOUT, and the second terminal is connected to the first terminal of the voltage divider unit 2; the second terminal of the voltage divider unit 2 is grounded; the positive input terminal of the transconductance amplifier OTA is connected to the reference voltage VREF, and the negative input terminal is connected between the second terminal of the voltage divider unit 1 and the first terminal of the voltage divider unit 2.

[0022] The voltage divider unit may be formed by a resistor and a diode connected in series, or a resistor and a PMOS tube connected in a diode connection in series, or only a diode. In the voltage divider unit, the order of the resistor and the diode, and the order of the resistor and the PMOS tube are not limited; however, in the same voltage divider circuit, each voltage divider unit contains the same components, including only a resistor and a diode, or only a resistor and a PMOS tube, or only a diode.

[0023] Embodiment 1 The voltage dividing unit provided in the first embodiment of the present invention includes a resistor and a diode.

[0024] like Figure 2 As shown, the voltage divider circuit structure includes a transconductance amplifier OTA, an NMOS tube N1, a voltage divider unit 1 and a voltage divider unit 2; the drain terminal of the NMOS tube N1 is connected to the input voltage VDDIN, the source terminal and the substrate of the NMOS tube N1 are commonly connected to the output voltage VDDOUT, and the gate terminal of the NMOS tube N1 is connected to the output terminal of the transconductance amplifier OTA; the voltage divider unit 1 and the voltage divider unit 2 are connected in series, the first terminal of the voltage divider unit 1 is connected to the output voltage VDDOUT, the second terminal is connected to the first terminal of the voltage divider unit 2, and the second terminal of the voltage divider unit 2 is grounded; the positive input terminal of the transconductance amplifier OTA is connected to the reference voltage VREF, and the negative input terminal is connected between the voltage divider unit 1 and the voltage divider unit 2.

[0025] Specifically, the resistor R1 and the diode D1 constitute a voltage divider unit 1, and the resistor R2 and the diode D2 constitute a voltage divider unit 2. The first end of the resistor R1 is connected to the output voltage VDDOUT, the second end is connected to the anode of the diode D1, the cathode of the diode D1 is connected to the first end of the resistor R2, the second end of the resistor R2 is connected to the anode of the diode D2, and the cathode of the diode D2 is grounded; the negative input end of the transconductance amplifier OTA is connected between the cathode of the diode D1 and the first end of the resistor R2.

[0026] In each voltage divider unit, the positions of the resistor and the diode can be interchanged; that is, in the first embodiment, the positions of the resistor R1 and the diode D1 can be interchanged, and the positions of the resistor R2 and the diode D2 can also be interchanged. For example, the positions of the resistors and the diodes in the voltage divider unit 1 and the voltage divider unit 2 are interchanged. Figure 3 As shown, the anode of the diode D1 is connected to the output voltage VDDOUT, the cathode is connected to the first end of the resistor R1, the second end of the resistor R1 is connected to the anode of the diode D2, and the cathode of the diode D2 is grounded; the negative input end of the transconductance amplifier OTA is connected between the second end of the resistor R1 and the anode of the diode D2.

[0027] In the specific implementation process, the resistors and diodes in the two voltage-dividing units can be interchanged at the same time, or only the resistors and diodes in any one voltage-dividing unit are interchanged, and the resistors and diodes in the other voltage-dividing unit remain unchanged. The resistors and diodes in each voltage-dividing unit are the same; that is, in the first embodiment, the resistor R1 is the same as the resistor R2, and the diode D1 is the same as the diode D2.

[0028] If necessary, the resistors can be removed and only the diodes can be kept in series, with each diode acting as a voltage divider unit; the benefit of this is that the resistor area can be greatly saved under low current conditions.

[0029] Regardless of whether the voltage divider unit is composed of diodes and resistors or only includes diodes, VREF and VDDOUT must satisfy a certain relationship: VREF=1 / 2*VDDOUT, VREF=1 / 3*VDDOUT, VREF=2 / 3*VDDOUT, and so on.

[0030] Embodiment 2 like Figure 4 As shown, the voltage dividing unit provided in the second embodiment of the present invention includes a resistor and a PMOS tube; and the PMOS tube adopts a diode connection method, and the number of the voltage dividing units is 2.

[0031] Please continue reading Figure 4 , the voltage divider circuit structure is the same as that of the first embodiment, and includes a transconductance amplifier OTA, an NMOS tube N1, a voltage divider unit 1 and a voltage divider unit 2; the drain terminal of the NMOS tube N1 is connected to the input voltage VDDIN, the source terminal and the substrate of the NMOS tube N1 are commonly connected to the output voltage VDDOUT, and the gate terminal of the NMOS tube N1 is connected to the output terminal of the transconductance amplifier OTA; the voltage divider unit 1 and the voltage divider unit 2 are connected in series, the first terminal of the voltage divider unit 1 is connected to the output voltage VDDOUT, the second terminal is connected to the first terminal of the voltage divider unit 2, and the second terminal of the voltage divider unit 2 is grounded; the positive input terminal of the transconductance amplifier OTA is connected to the reference voltage VREF, and the negative input terminal is connected between the voltage divider unit 1 and the voltage divider unit 2.

[0032] Specifically, the resistor R1 and the PMOS tube P1 form a voltage dividing unit 1, and the resistor R2 and the PMOS tube P2 form a voltage dividing unit 2. The first end of the resistor R1 is connected to the output voltage VDDOUT, the second end is connected to the source end of the PMOS tube P1, the drain end and the gate end of the PMOS tube P1 are commonly connected to the first end of the resistor R2, the second end of the resistor R2 is connected to the source end of the PMOS tube P2, and the drain end and the gate end of the PMOS tube P2 are commonly grounded; the negative input end of the transconductance amplifier OTA is connected between the drain end of the PMOS tube P1 and the first end of the resistor R2.

[0033] In each voltage divider unit, the positions of the resistor and the PMOS tube can be interchanged; that is, in the second embodiment, the positions of the resistor R1 and the PMOS tube P1 can be interchanged, and the positions of the resistor R2 and the PMOS tube P2 can also be interchanged. For example, the positions of the resistors and the PMOS tubes in the voltage divider unit 1 and the voltage divider unit 2 are interchanged. Figure 5 As shown, the source end of the PMOS tube P1 is connected to the output voltage VDDOUT, the drain end and the gate end are commonly connected to the first end of the resistor R1, the second end of the resistor R1 is connected to the source end of the PMOS tube P2, the drain end and the gate end of the PMOS tube P2 are commonly connected to the first end of the resistor R2, and the second end of the resistor R2 is grounded; the negative input end of the transconductance amplifier OTA is connected between the second end of the resistor R1 and the source end of the PMOS tube P2.

[0034] In the specific implementation process, the resistors and PMOS tubes in the two voltage-dividing units can be interchanged at the same time, or only the resistors and PMOS tubes in any one voltage-dividing unit are interchanged, and the resistors and PMOS tubes in the other voltage-dividing unit remain unchanged. The resistors in each voltage-dividing unit are the same, and the PMOS tubes are the same; that is, in the second embodiment, the resistor R1 is the same as the resistor R2, and the PMOS tube P1 is the same as the PMOS tube P2.

[0035] When the output voltage VDDOUT is relatively large, when it is greater than two diode voltage drops, a diode and a resistor in series can be used as a voltage divider unit, or a diode-connected PMOS tube can be used to replace a diode and a resistor in series as a voltage divider unit. When the output voltage VDDOUT is less than two diode voltage drops, only a diode-connected PMOS tube and a resistor in series can be used as a voltage divider unit.

[0036] If necessary, the resistor can be removed and only the diode-connected PMOS tubes are kept in series, with each PMOS tube acting as a voltage divider unit.

[0037] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A voltage divider circuit structure, characterized in that: It includes a first voltage dividing unit, a second voltage dividing unit, a transconductance amplifier and an NMOS tube; The first terminal of the NMOS tube is connected to the input voltage, the second terminal and the third terminal of the NMOS tube are commonly connected to the output voltage, and the fourth terminal of the NMOS tube is connected to the third terminal of the transconductance amplifier; The first voltage dividing unit and the second voltage dividing unit are connected in series, a first end of the first voltage dividing unit is connected to the output voltage, and a second end is connected to a first end of the second voltage dividing unit; a second end of the second voltage dividing unit is grounded; The first terminal of the transconductance amplifier is connected to a reference voltage, and the second terminal is connected between the second terminal of the first voltage dividing unit and the first terminal of the second voltage dividing unit; The first voltage dividing unit and the second voltage dividing unit include the same type of components.

2. The voltage divider circuit structure according to claim 1, characterized in that: The first voltage dividing unit includes a first resistor and a first diode, and the first resistor and the first diode are connected in series; A first end of the first resistor is connected to the output voltage, a second end of the first resistor is connected to the anode of the first diode, and a cathode of the first diode is connected to the first end of the second voltage dividing unit and the second end of the transconductance amplifier at the same time; or, The anode of the diode is connected to the output voltage, the cathode of the diode is connected to the first end of the first resistor, and the second end of the first resistor is connected to the first end of the second voltage divider unit and the second end of the transconductance amplifier at the same time.

3. The voltage divider circuit structure according to claim 2, characterized in that: The second voltage dividing unit includes a second resistor and a second diode, and the second resistor and the second diode are connected in series; The first end of the second resistor is connected to the second end of the first voltage divider unit and the second end of the transconductance amplifier at the same time, the second end of the second resistor is connected to the anode of the second diode, and the cathode of the second diode is grounded; or, The anode of the diode is connected to the second end of the first voltage divider unit and the second end of the transconductance amplifier at the same time, the cathode of the diode is connected to the first end of the second resistor, and the second end of the second resistor is grounded.

4. The voltage divider circuit structure according to claim 1, characterized in that: The first voltage dividing unit includes a first resistor and a first PMOS tube, the first resistor and the first PMOS tube are connected in series, and the first PMOS tube adopts a diode connection method; The first end of the first resistor is connected to the output voltage, the second end of the first resistor is connected to the source end of the first PMOS tube, the gate end and the drain end of the first PMOS tube are short-circuited, and are connected to the first end of the second voltage dividing unit and the second end of the transconductance amplifier at the same time; or, The source terminal of the first PMOS tube is connected to the output voltage, the gate terminal and the drain terminal of the first PMOS tube are short-circuited and connected to the first end of the first resistor, and the second end of the first resistor is simultaneously connected to the first end of the second voltage divider unit and the second end of the transconductance amplifier.

5. The voltage divider circuit structure according to claim 4, characterized in that: The second voltage dividing unit includes a second resistor and a second PMOS tube, the second resistor and the second PMOS tube are connected in series, and the second PMOS tube is connected in a diode manner; The first end of the second resistor is connected to the second end of the first voltage divider unit and the second end of the transconductance amplifier at the same time, the second end of the second resistor is connected to the source end of the second PMOS tube, the gate end and the drain end of the second PMOS tube are short-circuited and grounded; or, The source end of the second PMOS tube is connected to the second end of the first voltage divider unit and the second end of the transconductance amplifier at the same time, the gate end and the drain end of the second PMOS tube are short-circuited and connected to the first end of the second resistor, and the second end of the second resistor is grounded.

6. The voltage divider circuit structure according to claim 1, characterized in that: The first voltage dividing unit includes a first diode, an anode of the first diode is connected to the output voltage, and a cathode of the first diode is connected to a first end of the second voltage dividing unit and a second end of the transconductance amplifier at the same time.

7. The voltage divider circuit structure according to claim 6, characterized in that: The second voltage-dividing unit comprises a second diode, an anode of the second diode is connected to the second end of the first voltage-dividing unit and the second end of the transconductance amplifier at the same time, and a cathode of the second diode is grounded.

8. The voltage divider circuit structure according to claim 1, wherein: The ratio of the reference voltage connected to the first terminal of the transconductance amplifier to the output voltage commonly connected to the second and third terminals of the NMOS tube is N:M, wherein M and N are both positive integers and N<M.

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