Triangle counting implementation method and apparatus for graphics processors

Abstract

The application relates to the computer technical field, in particular to a triangle counting implementation method and device of a graphics processor, wherein the method comprises the following steps: obtaining graphics data of the graphics processor; identifying a neighbor list of all vertices in the graphics data, constructing a hash tree in a lock-free manner according to the neighbor list of all the vertices, and establishing an index array corresponding to the hash tree of all the vertices; when a target graph vertex is accessed, all neighbor graph nodes of the target graph vertex are traversed in parallel, and the neighbor list of all the neighbor graph nodes is mapped to a continuous memory area; and triangle counting is realized based on the index array and the continuous memory area. Thus, the problems of poor GPU computing capability, computing efficiency and memory access efficiency in triangle counting in the related art are solved.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a method and apparatus for implementing triangle counting in a graphics processor. Background Technology

[0002] A triangle is formed by three interconnected vertices in a graph. If we represent a graph as G = (V, E), where V and E are the set of vertices and edges respectively, and {s,v,t}∈V and {(s,v),(s,t),(v,t)}∈E, then triangle counting (TC) is one of the fundamental graph mining tasks widely used in social network analysis and pattern recognition applications. It is also considered a special case for calculating short-period or small clusters.

[0003] As the number of edges in real-world graphs continues to increase, important methods are constantly being researched to improve the efficiency of parallel algorithms for calculating both exact and approximate triangle counts. Most current state-of-the-art work focuses on handling large-scale graphs and leveraging shared memory platforms to enhance algorithm performance. Previous methods have categorized triangle counting algorithms into four types: set intersection, matrix multiplication, wedge sampling, and approximation methods.

[0004] GPUs (Graphics Processing Units) are widely used to perform triangle counting on large-scale graph data. However, the large number of branching operations involved in triangle counting leads to significant thread waiting during execution on the GPU, severely limiting its computational power and efficiency. Furthermore, GPUs only reach peak performance in data models with regular memory access, but triangle counting involves numerous irregular memory accesses, significantly impacting memory access efficiency. Summary of the Invention

[0005] This application provides a method and apparatus for implementing triangle counting in a graphics processor, in order to solve the problems of poor GPU computing power, computing efficiency and memory access efficiency in triangle counting in related technologies.

[0006] The first aspect of this application provides a method for implementing triangle counting in a graphics processor, comprising the following steps: acquiring graphics data from the graphics processor; identifying the neighbor list of all vertices in the graphics data, constructing a hash tree in a lock-free manner based on the neighbor list of all vertices, and establishing an index array for the hash tree corresponding to all vertices; when accessing a vertex of the target graph, traversing all neighbor graph nodes of the target graph vertex in parallel, and mapping the neighbor list of all neighbor graph nodes to a contiguous memory region; and implementing triangle counting based on the index array and the contiguous memory region.

[0007] Optionally, mapping the neighbor lists of all neighbor graph nodes to a contiguous memory region includes: constructing at least one set of vertex pairs based on the target graph vertices and all neighbor graph nodes, and mapping the neighbor lists of the target graph vertices and the corresponding neighbor graph nodes in each vertex pair to a contiguous memory region.

[0008] Optionally, triangle counting is implemented based on an index array and a contiguous memory region, including: determining the hash tree for each pair of vertices based on the index array; searching the neighbor list of each pair of vertices based on the hash tree to see if there are any common neighbors; if there are common neighbors, then taking the common neighbors and the target graph vertex and neighbor graph node corresponding to the vertex pair as a triple, and implementing triangle counting based on the triple.

[0009] Optionally, a hash tree is constructed in a lock-free manner based on the neighbor list of all vertices, including: obtaining the target number of paths for the nodes of the hash tree; calculating the hash value of the vertex and the hash values ​​of the neighbor graph nodes in the vertex's neighbor list, and inserting the vertex and the neighbor graph nodes into the storage buckets of the corresponding nodes of the hash tree; if there are multiple neighbor graph nodes with the same hash value among the neighbor graph nodes of a vertex, then the multiple neighbor graph nodes are sequentially placed into the next position of the node of the hash tree until the number of nodes stored in the current hash tree reaches the target number of paths; if the number of nodes stored in the current hash tree reaches the target number of paths, then the multiple neighbor graph nodes with the same hash value are placed into the new storage bucket of the node of the current hash tree.

[0010] Optionally, an index array of hash trees corresponding to all vertices is established, including: obtaining the sorting order of all vertices and the addresses of the target-level nodes of the hash trees corresponding to all vertices; constructing an index array based on the sorting order and the addresses of the target-level nodes of the hash trees corresponding to all vertices, wherein each element in the index array is a pointer to a node at the target level of the hash tree.

[0011] Optionally, the process of retrieving the neighbor list of each pair of vertices based on the hash tree to determine whether there are common neighbors includes: obtaining the neighbor list of the corresponding neighbor graph node in each pair of vertices; loading the neighbor list of the target graph vertex and the neighbor list of the corresponding neighbor graph node into an array; determining the length of the neighbor list of the target graph vertex and the neighbor list of the corresponding neighbor graph node; constructing a hash tree based on the shorter neighbor list and determining the longer neighbor list as the search space; enumerating each element in the search space and retrieving whether there are common elements based on the hash tree, where common elements are common neighbors.

[0012] A second aspect of this application provides a triangle counting implementation apparatus for a graphics processor, comprising: an acquisition module for acquiring graphics data from the graphics processor; a building module for identifying a neighbor list of all vertices in the graphics data, constructing a hash tree in a lock-free manner based on the neighbor list of all vertices, and building an index array of the hash tree corresponding to all vertices; a mapping module for traversing all neighbor nodes of the target graph vertex in parallel when accessing a target graph vertex, and mapping the neighbor list of all neighbor nodes to a contiguous memory region; and an implementation module for implementing triangle counting based on the index array and the contiguous memory region.

[0013] Optionally, the mapping module is further configured to: construct at least one set of vertex pairs based on the target graph vertices and all neighbor graph nodes, and map the neighbor lists of the target graph vertices and the corresponding neighbor graph nodes in each set of vertex pairs to a contiguous memory region.

[0014] Optionally, the implementation module is further configured to: determine the hash tree for each pair of vertices based on the index array; retrieve whether there are common neighbors in the neighbor list of each pair of vertices based on the hash tree; if there are common neighbors, use the common neighbors and the target graph vertex and neighbor graph node corresponding to the vertex pair as a triple, and implement triangle counting based on the triple.

[0015] Optionally, the building module is further configured to: obtain the target number of paths for the nodes of the hash tree; calculate the hash value of the vertex and the hash value of the neighbor graph nodes in the vertex's neighbor list, and insert the vertex and the neighbor graph nodes into the corresponding storage buckets of the nodes of the hash tree; if there are multiple neighbor graph nodes with the same hash value in the neighbor graph nodes of the vertex, then place the multiple neighbor graph nodes into the next position of the nodes of the hash tree in sequence until the number of nodes stored in the current hash tree reaches the target number of paths; if the number of nodes stored in the current hash tree reaches the target number of paths, then place the multiple neighbor graph nodes with the same hash value into the new storage bucket of the nodes of the current hash tree.

[0016] Optionally, the building module is further used to: obtain the arrangement order of all vertices and the addresses of the target-level nodes of the corresponding hash trees of all vertices; and construct an index array based on the arrangement order and the addresses of the target-level nodes of the corresponding hash trees of all vertices, wherein each element in the index array is a pointer to a node at the target level of the hash tree.

[0017] Optionally, the mapping module is further configured to: obtain the neighbor list of the corresponding neighbor graph node in each pair of vertices; load the neighbor list of the target graph vertex and the neighbor list of the corresponding neighbor graph node into an array; determine the length of the neighbor list of the target graph vertex and the neighbor list of the corresponding neighbor graph node; construct a hash tree based on the shorter neighbor list and determine the longer neighbor list as the search space; enumerate each element in the search space and search for the existence of the same element based on the hash tree, where the same element is the same neighbor.

[0018] A third aspect of this application provides a graphics processor, including: a memory, a processor, and a computer program stored in the memory and executable on the processor. The processor executes the program to perform the triangle counting implementation method of the graphics processor as described in the above embodiments.

[0019] A fourth aspect of this application provides a computer-readable storage medium having a computer program or instructions stored thereon, which are executed by a processor to perform a triangle counting implementation method for a graphics processor as described in the above embodiments.

[0020] A fifth aspect of this application provides a computer program product, including a computer program or instructions, which, when executed, implement the triangle counting method of a graphics processor as described in the above embodiments.

[0021] Therefore, this application has at least the following beneficial effects:

[0022] This application's embodiments can obtain graphics data from the graphics processor and identify the neighbor lists of all vertices. A hash tree is then constructed using these neighbor lists in a lock-free manner, avoiding performance bottlenecks caused by lock contention in multi-threaded or multi-GPU environments. This alleviates branching during execution, fully considering the size of the GPU's memory space and the characteristics of high parallelism. Furthermore, by establishing an index array for the hash tree corresponding to all vertices, the neighbor list of each vertex can be accessed quickly, improving the efficiency of subsequent operations. When accessing a target graph vertex, all neighbor vertices of the target vertex are traversed in parallel, and the neighbor list is mapped to a contiguous memory region, improving memory access efficiency and reducing memory access latency. Triangle counting is implemented based on the index array and contiguous memory regions, effectively improving the GPU's computational power, computational efficiency, and memory access efficiency when applied to triangle counting. Therefore, this solves the technical problems of poor GPU computational power, computational efficiency, and memory access efficiency in triangle counting in related technologies.

[0023] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0024] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the following description of the embodiments taken in conjunction with the accompanying drawings, wherein:

[0025] Figure 1 This is a flowchart of a triangle counting implementation method for a graphics processor according to an embodiment of this application;

[0026] Figure 2 This is a flowchart of a triangle counting method provided according to an embodiment of this application;

[0027] Figure 3 This is a schematic diagram illustrating the construction of a lock-free hash tree according to an embodiment of this application;

[0028] Figure 4 This is a schematic diagram of an index array provided according to an embodiment of this application;

[0029] Figure 5 This is an example diagram of a triangle counting implementation device for a graphics processor according to an embodiment of this application;

[0030] Figure 6 This is a schematic diagram of the structure of a graphics processor provided according to an embodiment of this application. Detailed Implementation

[0031] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this application, and should not be construed as limiting this application.

[0032] The following description, with reference to the accompanying drawings, describes a method and apparatus for implementing triangle counting in a graphics processor according to an embodiment of this application. To address the issues mentioned in the background technology center, where numerous branching operations during triangle counting lead to significant thread waiting on the GPU, severely limiting its computing power and efficiency, and where GPUs only achieve peak performance with regular memory access models but suffer from irregular memory access during triangle counting, thus severely impacting memory access efficiency, this application provides a triangle counting implementation method for a graphics processing unit (GPU). This method acquires graphics data from the GPU and identifies the neighbor lists of all vertices. A hash tree is then constructed using these neighbor lists in a lock-free manner, avoiding performance bottlenecks caused by lock contention in multi-threaded or multi-GPU environments. This alleviates branching during execution, fully considers the size and high parallelism of GPU memory space, and establishes an index array for the hash tree corresponding to all vertices, enabling rapid access to the neighbor list of each vertex, thereby improving the efficiency of subsequent operations. When accessing a target vertex, all neighbor vertices are traversed in parallel, and the neighbor list is mapped to a contiguous memory region, improving memory access efficiency and reducing memory access latency. Triangle counting is implemented based on the index array and contiguous memory regions. This solves the problems of poor GPU computing power, computing efficiency, and memory access efficiency in triangle counting in related technologies.

[0033] Specifically, Figure 1 This is a flowchart illustrating a method for implementing triangle counting in a graphics processor, as provided in an embodiment of this application.

[0034] like Figure 1 As shown, the triangle counting implementation method of this graphics processor includes the following steps:

[0035] In step S101, the graphics data of the graphics processor is acquired.

[0036] The graphic can be a polygon, and the graphic data can be the vertices of the graphic and a list of the neighbors of the vertices.

[0037] In step S102, the neighbor list of all vertices in the graph data is identified, and a hash tree is constructed in a lock-free manner based on the neighbor list of all vertices, and an index array of the hash tree corresponding to all vertices is established.

[0038] It is understood that the embodiments of this application can identify the neighbor list of all vertices in the graphics data, and then construct a hash tree in a lock-free manner based on the neighbor list of all vertices, and establish an index array of the hash tree corresponding to all vertices. Constructing the hash tree in a lock-free manner reduces hash collisions, thereby alleviating branch divergence in subsequent execution. The specific method for constructing the hash tree is as follows.

[0039] For example, if the vertices of a graph are A, B, C, D, and E, and the neighbor list of A is {B, C, D}, then a hash tree can be constructed based on [B, C, D].

[0040] In this embodiment, a hash tree is constructed in a lock-free manner based on the neighbor list of all vertices, including: obtaining the target number of paths for the nodes of the hash tree; calculating the hash value of the vertex and the hash values ​​of the neighbor graph nodes in the vertex's neighbor list, and inserting the vertex and the neighbor graph nodes into the storage buckets of the corresponding nodes of the hash tree; if there are multiple neighbor graph nodes with the same hash value among the neighbor graph nodes of a vertex, then the multiple neighbor graph nodes are sequentially placed into the next position of the node of the hash tree until the number of nodes stored in the current hash tree reaches the target number of paths; if the number of nodes stored in the current hash tree reaches the target number of paths, then the multiple neighbor graph nodes with the same hash value are placed into a new storage bucket of the node of the current hash tree.

[0041] The target number of paths is the number of buckets that each hash tree can store vertices in, denoted by H. The default hash tree is a 32-way trie (i.e., H = 32). The width of the hash tree can also be set according to the number of CTA threads in different CTA thread organization methods, without any specific limitation.

[0042] It is understood that the embodiments of this application can calculate the hash value of the vertex and the neighbor graph nodes in the vertex's neighbor list, insert the vertex and the neighbor graph nodes into the storage bucket of the corresponding hash tree node, and if there are multiple neighbor graph nodes with the same hash value in the neighbor graph nodes of the vertex, then the multiple neighbor graph nodes are sequentially placed into the next position of the hash tree node until the number of nodes stored in the current hash tree reaches the target number of paths, and if the number of nodes stored in the current hash tree reaches the target number of paths, then the multiple neighbor graph nodes with the same hash value are placed into the new storage bucket of the current hash tree node.

[0043] Specifically, this application employs an optimistic strategy to handle collisions that occur during hash trie construction without requiring lock operations. This strategy places the colliding item next to the original item in the next position of the same node, without requiring lock operations, until the hash trie is full, thus avoiding performance bottlenecks caused by lock contention in multi-threaded or multi-GPU environments.

[0044] In this embodiment of the application, establishing an index array of hash trees corresponding to all vertices includes: obtaining the arrangement order of all vertices and the addresses of the target-level nodes of the hash trees corresponding to all vertices; constructing an index array based on the arrangement order and the addresses of the target-level nodes of the hash trees corresponding to all vertices, wherein each element in the index array is a pointer to a node at the target level of the hash tree.

[0045] It is understood that, in the embodiments of this application, an index array can be constructed based on the arrangement order of all vertices and the addresses of the target-level nodes of the corresponding hash trees of all vertices. Each element in the index array is a pointer to a node at the target level of the hash tree, so that the neighbor list of each vertex can be quickly accessed based on the index array, thereby improving the efficiency of subsequent operations.

[0046] This application embodiment uses an index array to compactly organize the index of the hash tree, where each element in the array is a pointer to a node at a certain level of the hash tree.

[0047] In step S103, when accessing a vertex of the target graph, all neighboring graph nodes of the vertex of the target graph are traversed in parallel, and the neighbor lists of all neighboring graph nodes are mapped to a contiguous memory region.

[0048] The target graph vertex is the desired or required graph vertex, such as vertex A in the graph.

[0049] It is understood that, in the embodiments of this application, when accessing the target graph vertex, all neighboring graph nodes of the graph vertex can be traversed in parallel, and the neighbor lists of all neighboring graph nodes can be mapped to a contiguous memory region, thereby improving memory access efficiency and reducing memory access latency, so as to enable subsequent triangle counting.

[0050] In this embodiment, the parallel traversal of all neighboring graph nodes of the target graph vertex can employ CTA thread organization technology, which includes three strategies: Block Degree, Block Index, and Warp Index, to adapt to different graphs.

[0051] In Block Degree (a thread organization based on thread blocks with degree-based workload partitioning), a vertex v with degree d(v) is assigned... One block;

[0052] In Block Index (a block-based thread organization with index-based workload partitioning), a vertex v associated with the target index of the index array is allocated... One block;

[0053] In the Warp Index (a thread organization based on thread warps with index-based workload partitioning), a vertex v associated with the target index of the horizontal array is assigned... One warp.

[0054] In this embodiment of the application, before mapping the neighbor lists of all neighbor graph nodes to a contiguous memory region, the method further includes: constructing at least one set of vertex pairs based on the target graph vertices and all neighbor graph nodes, and mapping the neighbor lists of the target graph vertices and the corresponding neighbor graph nodes in each set of vertex pairs to a contiguous memory region.

[0055] It is understood that, in the embodiments of this application, vertex pairs can be constructed based on the target access graph vertex and the neighboring nodes of the target graph vertex, and the neighbor list of the target access graph vertex and the neighbor list of the corresponding neighbor graph node in each vertex pair can be mapped to a contiguous memory region.

[0056] For example, consider a graph containing vertices A, B, C, and D, where vertex A's neighboring nodes are [B, C, D]. Perform a parallel traversal of each neighboring node in vertex A's neighboring graph, mapping the neighbor list of each pair of vertices to a contiguous memory region.

[0057] For example, if the target graph has vertex A, the neighboring nodes of vertex A include B, C, and D, which is the neighbor list N of vertex A. A = [B, C, D], forming vertex pairs (A, B), (A, C), and (A, D). Then, traverse all neighboring graph nodes in parallel. For example, for neighboring graph node B, obtain the list N of B's ​​neighbors. B For a node C in the neighbor graph, obtain the list N of C's neighbors. C For a node D in the neighbor graph, obtain the list N of D's neighbors. D Each pair of vertices' neighbor list is mapped to a contiguous memory region. For example, for a vertex pair (A, B), the neighbor list N of vertex A is mapped to a contiguous memory region. A The neighbor list N of vertex B B Mapped to a contiguous memory region.

[0058] In step S104, triangle counting is implemented based on the index array and contiguous memory regions.

[0059] It is understood that the embodiments of this application can implement triangle counting based on an index array and a contiguous memory region, and the specific steps are as follows.

[0060] In this embodiment, triangle counting is implemented based on an index array and a contiguous memory region, including: determining the hash tree for each pair of vertices based on the index array; searching the neighbor list of each pair of vertices based on the hash tree to see if there are any common neighbors; if there are common neighbors, then taking the common neighbors and the target graph vertex and neighbor graph node corresponding to the vertex pair as a triple, and implementing triangle counting based on the triple.

[0061] It is understood that the embodiments of this application can determine the hash tree of each pair of vertices based on the index array, and search the neighbor list of each pair of vertices based on the hash tree to see if there are common neighbors. Then, the common neighbors and the target graph vertex and the neighbor graph node corresponding to the vertex pair are taken as triples, and triangle counting is realized based on the triples. That is, the search of the neighbor list of two vertices based on the hash tree is to see if there are common neighbors, and the common neighbors and the two vertices currently traversed are taken as triples and put into the answer set, thereby realizing triangle counting. Here, the triple is a triangle. Searching the neighbor list based on the hash tree to see if there are common neighbors improves the search efficiency.

[0062] In this embodiment of the application, the method of retrieving the neighbor list of each vertex pair based on a hash tree to determine whether there are common neighbors includes: obtaining the neighbor list of the corresponding neighbor graph node in each vertex pair; loading the neighbor list of the target graph vertex and the neighbor list of the corresponding neighbor graph node into an array; determining the length of the neighbor list of the target graph vertex and the neighbor list of the corresponding neighbor graph node; constructing a hash tree based on the shorter neighbor list and determining the longer neighbor list as the search space; enumerating each element in the search space and retrieving whether there are common elements based on the hash tree, wherein common elements are common neighbors.

[0063] It is understood that, in the embodiments of this application, the neighbor list of the target graph vertex and the neighbor list of the corresponding neighbor graph node can be loaded into an array, a hash tree can be constructed using the shorter neighbor list, and the longer neighbor list can be regarded as the search space. Each element in the search space is enumerated, and the existence of the same element is searched based on the hash tree.

[0064] For example, to obtain the list N of neighbors of vertex A. A The neighbor list N of vertex B A , will N A and N B The neighbor lists are loaded into a temporary array, which can be a one-dimensional array or a buffer, to store the neighbor lists. These two neighbor lists are mapped to contiguous memory regions to improve memory access efficiency. The shorter neighbor list is used to build the hash tree, while the longer neighbor list is considered the search space. For example, if N... A If it is shorter, use N. A Construct a hash tree and enumerate the longer list of neighbors N. BFor each element in the hash tree, check if there are any duplicate elements.

[0065] If N A = [B, C], N B = [A, C, E], using the shorter neighbor list N A = [B, C] to construct a hash tree.

[0066] Enumerate N B For each element b in the hash tree, if b = A, calculate the hash value and search for the existence of A in the hash tree; if b = C, calculate the hash value and search for the existence of C in the hash tree; if b = E, calculate the hash value and search for the existence of E in the hash tree.

[0067] For b = C, calculate the hash value and search for the existence of C in the hash tree. If C is found, it means that there is a common neighbor C, so A, B, and C form a triangle.

[0068] The triangle counting method of this application is illustrated below through a specific embodiment, the process of which is as follows: Figure 2 As shown, it includes the following steps:

[0069] Step S10: Construct a hash tree in a lock-free manner based on the neighbor list of all vertices in the graph, and organize the indices of the hash tree corresponding to all vertices into an index array.

[0070] Specifically, in this embodiment, all vertices are traversed, their neighbor lists are retrieved, and a hash tree is constructed in a lock-free manner. The hash tree is stored as a linked list, and each hash tree is a bucket that can store H vertices. To improve GPU memory throughput, the Skiff implementation in this embodiment uses a 32-way hash tree (i.e., H=32) to organize neighboring vertices.

[0071] Furthermore, the steps for constructing a hash tree also include:

[0072] An optimistic strategy is employed to handle collisions that occur during hash trie construction in a lock-free manner. For example... Figure 3 As shown, when a hash collision occurs, the colliding item is placed in the next position after the original item, without the need for lock operations (e.g., Figure 3 (As shown by the black curve in the diagram). If there are too many conflicts until the trie node is full, and under the protection of the CAS operation, the conflicting items are further placed into the next node (e.g., ...). Figure 3 (As shown by the gray curve in the diagram). Once the current bucket is full and more conflicts occur, a new bucket is allocated, and the two buckets are linked using a pointer from the last item in the current bucket to the first item in the new bucket. This strategy reduces most locking operations.

[0073] Furthermore, the indices of all vertices corresponding to the hash tree are organized into an index array, including:

[0074] Specifically, this application provides an example where H=4, as shown in the following embodiment. Figure 4 As shown. First, a level array is used as the index of the hash tree to ensure the algorithm can quickly locate active nodes. Each item in the array holds a pointer to a node at a certain level of the hash tree. The level array is a compact structure with limited space. By using the level array to index the hash tree, only the tree, rather than the entire hash tree, can be quickly loaded into memory, and there are no empty buckets in the hash tree (virtual buckets are used to represent buckets without elements), which reduces the pressure on the GPU memory allocator.

[0075] Step S20: When accessing a graph vertex, perform parallel traversal of all its neighboring graph nodes and map the neighbor list of each pair of points to a contiguous memory region.

[0076] It employs CTA thread organization technology, providing three strategies: Block Degree, Block Index, and WarpIndex, to adapt to different graphs.

[0077] In Block Degree (a block-based thread organization with degree-based workload partitioning), a vertex v with degree d(v) is assigned... One block.

[0078] In Block Index (a block-based thread organization with index-based workload partitioning), a vertex v associated with the target index of the index array is allocated... One block.

[0079] In the Warp Index (a warp-based thread organization with index-based workload partitioning), vertices v associated with the target index of the horizontal array are assigned... One warp.

[0080] Step S30: Based on the hash tree, retrieve whether there are common neighbors in the neighbor lists of two vertices, and add the common elements and the two vertices currently traversed as a triple to the answer set.

[0081] Specifically, the neighbor lists of the source and destination vertices of the active edge are loaded into an array. Then, a hash tree is constructed using the shorter neighbor list, while the longer neighbor list is treated as the search space. Each element in the search space is enumerated, and the existence of duplicate elements is checked based on the hash tree.

[0082] The part of the Skiff algorithm used to traverse the search space is shown below:

[0083] Input: Neighbor list B, hash tree bucket;

[0084] Output: Triangle triples.

[0085] Step 1: Calculate the hash value based on B in parallel according to the width of B and the hash function;

[0086] Step 2: Find the location of the hash value of the current element b in B in the temporary storage bucket;

[0087] Step 3: If the hash value of b is greater than the current thread's position i in the temporary storage bucket and is odd, then store b in the hash position corresponding to hash+H-1-i and return the triangle (u,v,b).

[0088] This application embodiment will explain the counting principle of triangles in conjunction with the above Skiff algorithm. Hash is the hash value of element b. By traversing elements with the same hash value, triangles can be found in O(1) time complexity.

[0089] In summary, the embodiments of this application fully consider the size and high parallelism of the memory space on the GPU, organize graph data through hash trees, eliminate branch divergence in triangle counting, and reduce hash collisions during hash tree construction by lock-free operation, thus alleviating branch divergence during execution. In addition, the compact storage format improves GPU cache utilization while reducing memory access frequency, effectively improving the problem of poor memory access efficiency caused by irregular memory access.

[0090] The triangle counting implementation method for a graphics processor proposed in this application can obtain graphics data from the graphics processor and identify the neighbor list of all vertices. A hash tree is then constructed in a lock-free manner based on the neighbor list of all vertices, thereby avoiding performance bottlenecks caused by lock contention in multi-threaded or multi-GPU environments, alleviating branch divergence during execution, and fully considering the size and high parallelism of the memory space on the GPU. Furthermore, by establishing an index array for the hash tree corresponding to all vertices, the neighbor list of each vertex can be quickly accessed, thereby improving the efficiency of subsequent operations. When accessing a vertex in the target graph, all neighbor vertices of the target vertex are traversed in parallel, and the neighbor list is mapped to a contiguous memory region, improving memory access efficiency and reducing memory access latency. Triangle counting is implemented based on the index array and contiguous memory regions, effectively improving the computational power, computational efficiency, and memory access efficiency of the GPU when applied to triangle counting.

[0091] Next, with reference to the accompanying drawings, a triangle counting implementation apparatus for a graphics processor according to an embodiment of this application is described.

[0092] Figure 5 This is a block diagram of a triangle counting implementation device for a graphics processor according to an embodiment of this application.

[0093] like Figure 5 As shown, the triangle counting implementation device 10 of the graphics processor includes: an acquisition module 100, an establishment module 200, a mapping module 300, and an implementation module 400.

[0094] The acquisition module 100 is used to acquire graphics data from the graphics processor; the building module 200 is used to identify the neighbor list of all vertices in the graphics data, construct a hash tree in a lock-free manner based on the neighbor list of all vertices, and build an index array of the hash tree corresponding to all vertices; the mapping module 300 is used to traverse all neighbor graph nodes of the target graph vertex in parallel when accessing the target graph vertex, and map the neighbor list of all neighbor graph nodes to a contiguous memory region; the implementation module 400 is used to implement triangle counting based on the index array and the contiguous memory region.

[0095] In this embodiment of the application, the mapping module 300 is further configured to: construct at least one set of vertex pairs based on the target graph vertices and all neighbor graph nodes, and map the neighbor lists of the target graph vertices and the corresponding neighbor graph nodes in each set of vertex pairs to a contiguous memory region.

[0096] In this embodiment of the application, the implementation module 400 is further configured to: determine the hash tree of each pair of vertices based on the index array; retrieve whether there are common neighbors in the neighbor list of each pair of vertices based on the hash tree; if there are common neighbors, take the common neighbors and the target graph vertex and the neighbor graph node corresponding to the vertex pair as a triple, and implement triangle counting based on the triple.

[0097] In this embodiment, the establishment module 200 is further configured to: obtain the target number of paths of the nodes in the hash tree; calculate the hash value of the vertex and the hash value of the neighbor graph nodes in the vertex's neighbor list, and insert the vertex and the neighbor graph nodes into the storage bucket of the corresponding hash tree node; if there are multiple neighbor graph nodes with the same hash value in the neighbor graph nodes of the vertex, then the multiple neighbor graph nodes are sequentially placed into the next position of the hash tree node until the number of nodes stored in the current hash tree reaches the target number of paths; if the number of nodes stored in the current hash tree reaches the target number of paths, then the multiple neighbor graph nodes with the same hash value are placed into the new storage bucket of the current hash tree node.

[0098] In this embodiment of the application, the establishment module 200 is further configured to: obtain the arrangement order of all vertices and the addresses of the target-level nodes of the corresponding hash trees of all vertices; construct an index array based on the arrangement order and the addresses of the target-level nodes of the corresponding hash trees of all vertices, wherein each element in the index array is a pointer to a node at the target level of the hash tree.

[0099] In this embodiment, the mapping module 300 is further configured to: obtain the neighbor list of the corresponding neighbor graph node in each pair of vertices; load the neighbor list of the target graph vertex and the neighbor list of the corresponding neighbor graph node into an array; determine the length of the neighbor list of the target graph vertex and the neighbor list of the corresponding neighbor graph node; construct a hash tree based on the shorter neighbor list and determine the longer neighbor list as the search space; enumerate each element in the search space and search for the existence of the same element based on the hash tree, wherein the same element is the same neighbor.

[0100] It should be noted that the foregoing explanation of the implementation method of triangle counting for graphics processors also applies to the implementation device of triangle counting for graphics processors in this embodiment, and will not be repeated here.

[0101] The present application proposes a triangle counting implementation device for a graphics processor. This device acquires graphics data from the graphics processor and identifies the neighbor lists of all vertices. A hash tree is then constructed using the neighbor lists of all vertices in a lock-free manner, thus avoiding performance bottlenecks caused by lock contention in multi-threaded or multi-GPU environments and alleviating branch divergence during execution. It fully considers the size and high parallelism of the memory space on the GPU. Furthermore, by establishing an index array for the hash tree corresponding to all vertices, the neighbor list of each vertex can be quickly accessed, thereby improving the efficiency of subsequent operations. When accessing a target graph vertex, all neighbor vertices of the target vertex are traversed in parallel, and the neighbor list is mapped to a contiguous memory region, improving memory access efficiency and reducing memory access latency. Triangle counting is implemented based on the index array and contiguous memory regions, effectively improving the computational power, computational efficiency, and memory access efficiency of the GPU when used for triangle counting.

[0102] Figure 6 A schematic diagram of the structure of a graphics processor provided in an embodiment of this application. The graphics processor may include:

[0103] The memory 601, the processor 602, and the computer program stored on the memory 601 and capable of running on the processor 602.

[0104] When the processor 602 executes the program, it implements the triangle counting method of the graphics processor provided in the above embodiments.

[0105] Furthermore, the graphics processor also includes:

[0106] Communication interface 603 is used for communication between memory 601 and processor 602.

[0107] The memory 601 is used to store computer programs that can run on the processor 602.

[0108] The memory 601 may include high-speed RAM memory, and may also include non-volatile memory, such as at least one disk storage device.

[0109] If the memory 601, processor 602, and communication interface 603 are implemented independently, then the communication interface 603, memory 601, and processor 602 can be interconnected via a bus to complete communication between them. The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. The bus can be divided into address bus, data bus, control bus, etc. For ease of representation, Figure 6 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.

[0110] Optionally, in a specific implementation, if the memory 601, processor 602, and communication interface 603 are integrated on a single chip, then the memory 601, processor 602, and communication interface 603 can communicate with each other through an internal interface.

[0111] The processor 602 may be a central processing unit (CPU), an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of this application.

[0112] This application also provides a computer-readable storage medium storing a computer program or instructions thereon, which, when executed by a processor, implements the above-described triangle counting method for a graphics processor.

[0113] This application also provides a computer program product, including a computer program or instructions, which, when executed, implement the above-described triangle counting implementation method for a graphics processor.

[0114] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0115] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "N" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0116] Any process or method described in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or N executable instructions for implementing custom logic functions or processes, and the scope of the preferred embodiments of this application includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as should be understood by those skilled in the art to which embodiments of this application pertain.

[0117] It should be understood that the various parts of this application can be implemented using hardware, software, firmware, or a combination thereof. In the above embodiments, the N steps or methods can be implemented using software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or more of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0118] Those skilled in the art will understand that all or part of the steps of the methods in the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, the program includes one or a combination of the steps of the method embodiments.

Claims

1. A method for implementing triangle counting in a graphics processor, characterized in that, Includes the following steps: Obtain graphics data from the graphics processor; Identify the neighbor list of all vertices in the graph data, construct a hash tree in a lock-free manner based on the neighbor list of all vertices, and establish an index array of the hash tree corresponding to all vertices; The step of constructing a hash tree in a lock-free manner based on the neighbor list of all vertices includes: obtaining the target number of paths for the nodes of the hash tree; calculating the hash value of the vertex and the hash values ​​of the neighbor graph nodes in the neighbor list of the vertex, inserting the vertex and the neighbor graph nodes into the storage buckets of the corresponding nodes of the hash tree; if there are multiple neighbor graph nodes with the same hash value in the neighbor graph nodes of the vertex, then sequentially placing the multiple neighbor graph nodes into the next position of the node of the hash tree, until the number of nodes stored in the current hash tree reaches the target number of paths; If the number of nodes stored in the current hash tree reaches the target number of paths, then multiple neighbor graph nodes with the same hash value are placed into a new storage bucket of the current hash tree node. When accessing a target graph vertex, all neighboring graph nodes of the target graph vertex are traversed in parallel, and the neighbor lists of all neighboring graph nodes are mapped to a contiguous memory region; before mapping the neighbor lists of all neighboring graph nodes to a contiguous memory region, the method further includes: constructing at least one set of vertex pairs based on the target graph vertex and all neighboring graph nodes, and mapping the neighbor lists of the target graph vertex and the corresponding neighboring graph nodes in each set of vertex pairs to a contiguous memory region; Triangle counting is implemented based on the index array and the contiguous memory region; the triangle counting based on the index array and the contiguous memory region includes: determining the hash tree of each pair of vertices based on the index array; searching the neighbor list of each pair of vertices based on the hash tree to see if there are any common neighbors; if there are common neighbors, then taking the common neighbors and the target graph vertex and neighbor graph node corresponding to the vertex pair as a triple, and implementing triangle counting based on the triple.

2. The method for implementing triangle counting in a graphics processor according to claim 1, characterized in that, The process of constructing the index array for the hash tree corresponding to all vertices includes: Obtain the arrangement order of all vertices and the addresses of the target-level nodes of the corresponding hash trees of all vertices; The index array is constructed based on the arrangement order and the addresses of the target-level nodes of the corresponding hash trees of all vertices, wherein each element in the index array is a pointer to a node at the target level of the hash tree.

3. The method for implementing triangle counting in a graphics processor according to claim 1, characterized in that, The step of retrieving the neighbor list of each pair of vertices based on a hash tree to determine if there are any common neighbors includes: Obtain the neighbor list of the corresponding neighbor graph node in each vertex pair; Load the neighbor list of the target graph vertex and the neighbor list of the corresponding neighbor graph node into an array; Determine the lengths of the neighbor lists of the target graph vertices and the neighbor lists of the corresponding neighbor graph nodes; A hash tree is constructed based on the short neighbor list, and the long neighbor list is determined as the search space. Enumerate each element in the search space and search for the existence of the same element based on the hash tree, wherein the same element is the same neighbor.

4. A triangle counting implementation device for a graphics processor, characterized in that, The device is provided with a triangle counting implementation method for a graphics processor as described in any one of claims 1-3, comprising: The acquisition module is used to acquire graphics data from the graphics processor. A module is established to identify the neighbor list of all vertices in the graphics data, construct a hash tree in a lock-free manner based on the neighbor list of all vertices, and establish an index array of the hash tree corresponding to all vertices; The mapping module is used to traverse all neighboring graph nodes of the target graph vertex in parallel when accessing the target graph vertex, and map the neighbor list of all neighboring graph nodes to a contiguous memory region; An implementation module is used to implement triangle counting based on the index array and the contiguous memory region.

5. A graphics processor, characterized in that, include: A memory, a processor, and a computer program stored in the memory and executable on the processor, the processor executing the program to implement the triangle counting implementation method for a graphics processor as described in any one of claims 1-3.

6. A computer-readable storage medium having a computer program or instructions stored thereon, characterized in that, The computer program or instructions are executed by a processor to implement the triangle counting implementation method for a graphics processor as described in any one of claims 1-3.

7. A computer program product, comprising a computer program or instructions, characterized in that, When the computer program or instructions are executed, they implement the triangle counting implementation method of the graphics processor as described in any one of claims 1-3.

Images