Display device

By setting up differential calculation circuits, gain delay circuits, gain limit calculation circuits and judgment circuits in the driving circuit of the display device, the flickering problem caused by the fluctuation of gain value in traditional display devices is solved, and the smooth transition of brightness and the rationality of output current are achieved. Control, improve display quality.

CN119479530AActive Publication Date: 2025-02-18WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
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Patent Information

Application Number
CN202411987106.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-31
Publication Date
2025-02-18
Estimated Expiration
2044-12-31

AI Technical Summary

Technical Problem

In traditional display devices, due to the large fluctuation of the gain value, the display panel flickers, affecting the display quality.

Method used

The differential calculation circuit, gain delay circuit, gain limit calculation circuit and judgment circuit are set up in the driver circuit. Through feedback signal control, the difference in the gain value is calculated and delayed processing is performed to limit the range of changes of the gain value and ensure that the output gain value is reasonable. Within range.

Benefits of technology

It effectively improves the flickering phenomenon of the display screen, ensures a smooth transition of brightness, avoids the adverse impact of excessive output current on the display panel, and thus improves the display quality.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The invention provides a display device. The display device comprises a display panel and a driving circuit. The driving circuit comprises a current value calculation circuit which is electrically connected with the signal input end; the gain calculation circuit is electrically connected with the current value calculation circuit; the difference calculation circuit is electrically connected with the gain calculation circuit; the gain delay circuit is electrically connected with the difference calculation circuit; the gain limit calculation circuit is electrically connected with the current value calculation circuit; the judgment circuit is electrically connected with the gain delay circuit and the gain limit calculation circuit; and the multiplication circuit is used for carrying out multiplication on the input first gray scale data and the first gain value output by the judgment circuit and outputting second gray scale data. The difference value of the gain values is calculated through the difference calculation circuit, the gain delay circuit carries out delay calculation processing on the difference value, the gain limit calculation circuit limits the change range of the gain values, and a feedback signal control mode is adopted, so that the flicker phenomenon of a display picture is effectively improved.
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Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display device. Background Art

[0002] In order to reduce the power consumption of the display panel, a brightness adjustment circuit is usually used to dynamically adjust the brightness of the display panel according to the content of the display picture.

[0003] like Figure 1 As shown, the conventional brightness adjustment circuit generally includes a current value calculation module, a gain calculation module and an operation module. The current value calculation module receives the input signal (grayscale data) and calculates the in-plane current value, the gain calculation module calculates the gain value according to the in-plane current value, and the operation module multiplies the input signal by the gain value to obtain the output signal. In this technical solution, due to the large fluctuation of the gain value, the fluctuation of the current signal output by the operation module is also large, which in turn causes the display panel to flicker.

[0004] like Figures 2 to 4 As shown in the figure, the gain value between different display frames varies greatly. Since the output signal is the product of the input signal and the gain value, a sharp change in the gain value will cause a sharp change in the output signal, causing the brightness of the display panel to fluctuate significantly between different frames. This brightness fluctuation is manifested as flickering of the display screen, which seriously affects the display quality of the display panel.

[0005] In addition, the simple correspondence between the gain value and the in-plane current value in the traditional solution may lead to excessive output current in certain display scenarios, which is not conducive to ensuring the stable operation and service life of the display panel.

[0006] Therefore, there is an urgent need to provide a new display panel driving solution to improve the display effect. Summary of the invention

[0007] The purpose of the present application is to provide a display device to solve the technical problem of display screen flickering in traditional display devices.

[0008] An embodiment of the present application provides a display device, including a display panel and a driving circuit, wherein the driving circuit includes: a current value calculation circuit, the current value calculation circuit is electrically connected to a signal input terminal of the driving circuit; a gain calculation circuit, the gain calculation circuit is electrically connected to the current value calculation circuit; a differential calculation circuit, the differential calculation circuit is electrically connected to the gain calculation circuit; a gain delay circuit, the gain delay circuit is electrically connected to the differential calculation circuit; a gain limit calculation circuit, the gain limit calculation circuit is electrically connected to the current value calculation circuit; a judgment circuit, the gain delay circuit and the gain limit calculation circuit are electrically connected; and a multiplication circuit, used to multiply the first grayscale data input from the signal input terminal and the first gain value output from the judgment circuit, and output second grayscale data.

[0009] In the above display device, the current value calculation circuit is used to receive the first grayscale data and calculate the current value.

[0010] In the above display device, the gain calculation circuit is used to calculate the second gain value according to the current value.

[0011] In the above display device, the difference calculation circuit is used to receive the second gain value and the first gain value output by the judgment circuit, and calculate the difference between the second gain value and the first gain value.

[0012] In the above-mentioned display device, the gain delay circuit is used to multiply the difference output by the differential calculation circuit by a preset coefficient to obtain a multiplication result, add the multiplication result to the first gain value to obtain an addition result, and output the addition result to the judgment circuit.

[0013] In the above display device, the value range of the preset coefficient is 0.01 to 1.

[0014] In the above display device, the gain limit calculation circuit is used to calculate a third gain value according to the current value.

[0015] In the above display device, when the current value is less than or equal to the first preset current value, the third gain value is the first preset gain value; when the current value is greater than the first preset current value, the third gain value decreases nonlinearly from the first preset gain value to the second preset gain value.

[0016] In the above display device, the first preset gain value is in the range of 0.9 to 1, and the second preset gain value is in the range of 0.2 to 0.6.

[0017] In the above display device, the judgment circuit is used to receive the fourth gain value output by the gain delay circuit and the third gain value output by the gain limit calculation circuit, and is used to select the smaller one between the fourth gain value and the third gain value as the first gain value output.

[0018] The display device provided by the present application can effectively improve the flickering phenomenon of the display screen by setting a differential calculation circuit, a gain delay circuit, a gain limit calculation circuit and a judgment circuit in the driving circuit, and adopting a feedback signal control method. Specifically, the differential calculation circuit receives the second gain value output by the gain calculation circuit and the first gain value output by the judgment circuit, and calculates the difference between the two. The gain delay circuit multiplies the difference with a preset coefficient and adds it to the first gain value. This calculation method makes the change of the gain value more gentle. At the same time, the gain limit calculation circuit calculates the third gain value according to the current value, limits the range of change of the gain value, and the judgment circuit selects a smaller value from the fourth gain value output by the gain delay circuit and the third gain value output by the gain limit calculation circuit as the first gain value output. This selection method ensures that the output gain value does not exceed a reasonable range.

[0019] In the above technical solution, the difference of the gain values ​​is calculated by the differential calculation circuit, and the difference is delayed by the gain delay circuit to slow down the change speed of the gain value; the third gain value is calculated by the gain limit calculation circuit, and the judgment circuit selects a smaller gain value to output, preventing the gain value from exceeding a reasonable range; the first gain value output by the judgment circuit is fed back to the differential calculation circuit, thereby realizing dynamic adjustment of the gain value. The above technical solution not only ensures a smooth transition of the brightness of the display screen and avoids flickering of the display screen, but also avoids the adverse effects of excessive output current on the display panel, thereby effectively improving the display effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 It is a schematic diagram of a brightness adjustment circuit in a conventional display device.

[0021] Figure 2 yes Figure 1 The waveform diagram of the signal of the brightness adjustment circuit shown.

[0022] Figure 3 It is traditional including Figure 1 Schematic diagram of flickering phenomenon occurring in a display device with a brightness adjustment circuit shown.

[0023] Figure 4 It is traditional including Figure 1 Schematic diagram of flickering phenomenon occurring in a display device with a brightness adjustment circuit shown.

[0024] Figure 5 is a schematic diagram of an embodiment of a display device provided in the present application.

[0025] Figure 6 is a schematic diagram of a driving circuit in an embodiment of a display device provided in the present application.

[0026] Figure 7 yes Figure 6 The waveform diagram of the signal of the driving circuit is shown.

[0027] Figure 8 yes Figure 6 Schematic diagram of the differential calculation circuit and gain delay circuit in the driving circuit shown.

[0028] Fig. 9 yes Figure 6 Schematic diagram of a curve of the second gain value and a curve of the third gain value of the driving circuit shown.

[0029] Fig.10 Schematic diagram of a driving circuit in Comparative Example 1 of a display device provided in the present application.

[0030] Fig.11 yes Fig.10 The waveform diagram of the signal of the display device shown.

[0031] Fig.12 yes Fig.11 Schematic diagram of the overcurrent phenomenon shown.

[0032] Fig.13 It is a schematic diagram of a driving circuit in comparative example 2 of the display device provided in the present application.

[0033] Fig.14 yes Fig.13 The waveform diagram of the signal of the display device shown. DETAILED DESCRIPTION

[0034] The specific implementation methods of the present application are described in detail below with reference to the accompanying drawings.

[0035] The terms "first", "second" and similar words do not indicate any order, quantity or importance, but are only used to distinguish different technical features. The term "plurality" and similar words mean two or more, unless otherwise clearly defined.

[0036] The embodiments of the present application may be combined with each other.

[0037] like Figure 5As shown, the display device provided in the embodiment of the present application includes a display panel, a timing controller, a source driving circuit and a power management chip (the power management chip can be integrated into the same chip with the timing controller). The display panel can be, for example, an OLED display panel, a Mini-LED display panel, or a Micro-LED display panel. The embodiment of the present application is described by taking the OLED display panel as an example.

[0038] The display panel includes a display area and a non-display area. The display area is provided with m×n pixel units PX arranged in an array, where m and n are integers greater than 1. The non-display area is located around the display area and is used to arrange a drive circuit and various signal lines. The display panel also includes a plurality of scan lines SCAN, a plurality of data lines DATA and a gate drive circuit. The plurality of scan lines SCAN extend along a first direction and are arranged along a second direction, and the plurality of data lines DATA extend along a second direction and are arranged along the first direction, and the first direction is perpendicular to the second direction. The gate drive circuit is arranged in the non-display area and is electrically connected to the plurality of scan lines SCAN. The source drive circuit is electrically connected to the plurality of data lines DATA through a flexible circuit board. The timing controller is electrically connected to the gate drive circuit and the source drive circuit, respectively.

[0039] The display panel includes an organic light emitting diode array substrate and an encapsulation layer. The organic light emitting diode array substrate includes a base substrate, a buffer layer arranged on the base substrate, an active layer arranged on the buffer layer, a gate insulating layer arranged on the active layer, a first metal layer arranged on the gate insulating layer, an interlayer insulating layer arranged on the first metal layer, a second metal layer arranged on the interlayer insulating layer, a planarization layer arranged on the second metal layer, a first electrode layer arranged on the planarization layer, a pixel defining layer arranged on the first electrode layer, an organic light emitting layer arranged in an opening area defined by the pixel defining layer, and a second electrode layer arranged on the organic light emitting layer. The first metal layer includes a scan line SCAN, a gate electrode, etc. The second metal layer includes a data line DATA, a source electrode, a drain electrode, etc. The encapsulation layer is sealed and connected to the organic light emitting diode array substrate to prevent moisture and oxygen from invading the organic light emitting layer.

[0040] Each pixel unit PX includes a pixel driving circuit and an organic light emitting diode OLED (light emitting device). The pixel driving circuit includes at least two thin film transistors and a storage capacitor. One of the thin film transistors is used as a switching transistor, and its gate is electrically connected to the corresponding scan line, and its source is electrically connected to the corresponding data line; the other thin film transistor is used as a driving transistor, and its gate is electrically connected to the drain of the switching transistor, the source is electrically connected to the first power supply voltage line, and the drain is electrically connected to the anode of the organic light emitting diode OLED. One end of the storage capacitor is electrically connected to the gate of the driving transistor, and the other end is electrically connected to the source or drain of the driving transistor. The cathode of the organic light emitting diode OLED is electrically connected to the second power supply voltage line.

[0041] The gate drive circuit includes n-stage cascaded gate drive units, and each stage of the gate drive unit is electrically connected to a scan line. Under the control of the timing controller, the gate drive unit outputs scan signals in sequence to scan each row of pixel units PX in the display area line by line. Under the control of the timing controller, the source drive circuit generates and outputs data signals according to the image data. The timing controller is used to receive and process external input image data and timing signals, generate control signals, and transmit image data to the source drive circuit. The power management chip PMIC is used to provide operating voltages for various parts of the display device, including providing a second power supply voltage VSS for the cathode of the organic light emitting diode OLED, providing a first power supply voltage VDD for the first power supply voltage line, and providing a gate drive voltage VGH / VGL for the gate drive circuit.

[0042] See also Figure 6 The driving circuit of the display device provided in the embodiment of the present application includes a current conversion circuit 501, a current value calculation circuit 502, a gain calculation circuit 503, a differential calculation circuit 504, a gain delay circuit 505, a gain limit calculation circuit 507, a judgment circuit 506 and a multiplication circuit 508. Among them, the current conversion circuit 501 is electrically connected to the signal input terminal, the current value calculation circuit 502 is electrically connected to the current conversion circuit 501, the gain calculation circuit 503 is electrically connected to the current value calculation circuit 502, the differential calculation circuit 504 is electrically connected to the gain calculation circuit 503, the gain delay circuit 505 is electrically connected to the differential calculation circuit 504, the gain limit calculation circuit 507 is electrically connected to the current value calculation circuit 502, and the judgment circuit 506 is electrically connected to the gain delay circuit 505 and the gain limit calculation circuit 507.

[0043] In an embodiment of the present application, the current value calculation circuit 502 is used to receive the first grayscale data (first current signal) and calculate the current value. The gain calculation circuit 503 is used to calculate the second gain value according to the current value. The differential calculation circuit 504 is used to receive the second gain value and the first gain value output by the judgment circuit 506, and calculate the difference between the second gain value and the first gain value. The gain delay circuit 505 is used to multiply the difference output by the differential calculation circuit 504 by a preset coefficient to obtain a multiplication result, and add the multiplication result to the first gain value to obtain an addition result, and then output the addition result as a fourth gain value to the judgment circuit 506. Among them, the value range of the preset coefficient is 0.01 to 1. The gain limit calculation circuit 507 is used to calculate the third gain value according to the current value. Specifically, when the current value is less than or equal to the first preset current value C1, the third gain value is the first preset gain value; when the current value is greater than the first preset current value C1, the third gain value is nonlinearly reduced from the first preset gain value to the second preset gain value. The first preset gain value is 1, and the second preset gain value is 0.4. The judgment circuit 506 is used to receive the fourth gain value output by the gain delay circuit 505 and the third gain value output by the gain limit calculation circuit 507, and select the smaller one between the fourth gain value and the third gain value as the first gain value to output. The multiplication circuit 508 is used to multiply the first grayscale data and the first gain value output by the judgment circuit 506, and output the second grayscale data (second current signal).

[0044] See also Figure 8 The gain delay circuit 505 includes a multiplier 5051 and an adder 5052. The first input terminal of the multiplier 5051 receives the difference signal from the difference calculation circuit 504, and the second input terminal receives the preset coefficient, which is used to control the change rate of the gain value. The multiplier 5051 multiplies the difference signal by the preset coefficient to obtain a multiplication result. This multiplication process realizes the scaling of the difference signal, and the change amplitude of the gain value can be controlled by adjusting the size of the preset coefficient. The first input terminal of the adder 5052 receives the output signal of the multiplier 5051, and the second input terminal receives the first gain value. The adder 5052 adds the two input signals to obtain the addition result, which is output as the fourth gain value. The combination of the multiplier 5051 and the adder 5052 realizes the adjustment of the gain value, so that the change of the gain value is more gentle. Among them, the value range of the preset coefficient is 0.01 to 1. A smaller preset coefficient will make the change of the gain value slower, while a larger preset coefficient will speed up the change speed of the gain value.

[0045] See also Fig. 9 , Fig. 9 The relationship between the second gain value output by the gain calculation circuit 503 and the third gain value output by the gain limit calculation circuit 507 is shown. Fig. 9 The horizontal axis represents the current value, and the vertical axis represents the gain value. When the current value is less than or equal to the first preset current value C1, the second gain value and the third gain value are both maintained at the first preset gain value 1; when the current value is greater than the first preset current value C1 and less than the second preset current value C2, the second gain value decreases nonlinearly with the increase of the current value, and its change curve presents a smooth transition characteristic, and the third gain value remains at the first preset gain value 1; when the current value is greater than or equal to the second preset current value C2 and less than the third preset current value C3, the second gain value and the third gain value decrease nonlinearly with the increase of the current value, and its change curve presents a smooth transition characteristic. When the current value is equal to the third preset current value C3, the second gain value and the third gain value drop to the second preset gain value 0.4. When the current value is greater than the first preset current value C1, the curve of the third gain value is located above the curve of the second gain value, and the change amplitude of the third gain value is smaller than the change amplitude of the second gain value.

[0046] The technical solution of the present application achieves different gain control effects in different current value ranges: maintaining a higher gain value in the medium and low current ranges to ensure display brightness, and controlling the gain value to decrease nonlinearly in the high current range to prevent excessive current. The technical solution of the present application not only ensures the stability of the display screen and avoids serious flickering, but also effectively reduces the power consumption of the display panel.

[0047]

[0048] Table 1 See Table 1, which shows the output value changes of each circuit module of the display device provided by the embodiment of the present application during 11 consecutive frames. The first line in the table is the frame number, from 0 to 10, a total of 11 frames; the second line is the second gain value output by the gain calculation circuit 503; the third line is the third gain value output by the gain limit calculation circuit 507; the fourth line is the fourth gain value output by the gain delay circuit 505; and the fifth line is the first gain value output by the judgment circuit 506.

[0049] Combination Fig. 9 After analysis, in the first frame, the corresponding current value is the fourth preset current value C4, which is between the first preset current value C1 and the second preset current value C2. At this time, the second gain value output by the gain calculation circuit 503 is 0.8, the third gain value output by the gain limit calculation circuit 507 is kept at 1, the gain delay circuit 505 calculates the gain values ​​of the previous frame and the current frame, and outputs the fourth gain value of 0.9, and the judgment circuit 506 compares the third gain value and the fourth gain value, and selects the smaller value 0.9 as the first gain value output.

[0050] In the fifth frame, the corresponding current value is the fifth preset current value C5, which is between the second preset current value C2 and the third preset current value C3. At this time, the second gain value output by the gain calculation circuit 503 drops to 0.5, the third gain value output by the gain limit calculation circuit 507 drops to 0.6, the fourth gain value output by the gain delay circuit 505 is 0.65625, and the judgment circuit 506 selects the smaller value 0.6 as the first gain value output.

[0051] In the ninth frame, the corresponding current value is the third preset current value C3. At this time, the second gain value output by the gain calculation circuit 503 and the third gain value output by the gain limit calculation circuit 507 are both reduced to the second preset gain value 0.4, the fourth gain value output by the gain delay circuit 505 is 0.45625, and the judgment circuit 506 selects the smaller value 0.4 as the first gain value output.

[0052] From the data changes in Table 1, it can be seen that the gain limiting calculation circuit 507 limits the gain value output by the gain calculation circuit 503 to prevent the gain value from decreasing too quickly. At the same time, the gain delay circuit 505 makes the gain value change more slowly by smoothing the gain value. The judgment circuit 506 ensures a smooth transition of the display brightness and avoids the occurrence of overcurrent by selecting a smaller gain value. This multi-control technical solution effectively improves the flickering phenomenon of the display screen and improves the display quality.

[0053] See also Fig.10 , Fig.10 A technical solution first invented by the inventor in the invention process is shown, which is a gain delay technical solution, and the technical solution serves as comparative example 1 of the embodiments of the present application.

[0054] like Fig.10 As shown, in comparative example 1, the driving circuit only includes the above-mentioned current conversion circuit 501, current value calculation circuit 502, gain calculation circuit 503, differential calculation circuit 504, gain delay circuit 505 and multiplication circuit 508.

[0055] Although the gain delay circuit 505 can make the gain signal change smoothly, due to the lack of current limiting mechanism, when the input signal suddenly increases, the output signal will be too large (overcurrent phenomenon), such as Fig.11 This overcurrent phenomenon may damage the display panel and reduce the service life of the display panel.

[0056] See also Fig.12 , Fig.12 The reason why the overcurrent phenomenon occurs in the display device during a plurality of consecutive display frames is demonstrated. Fig.12The horizontal axis represents display frames, including the Nth frame, the N+1th frame, the N+2th frame and the N+3th frame, and the vertical axis represents the numerical value of each signal.

[0057] During the period from the Nth frame to the N+3th frame, the value of the input signal is relatively large, and the gain signal is also relatively large at this time, which will cause the output signal to be too large.

[0058] When the input grayscale signal and the gain signal are at large values ​​at the same time, their product will exceed the safe range, resulting in overcurrent.

[0059] See also Fig.13 , Fig.13 A technical solution invented by the inventor in the process of invention for the above-mentioned comparative example 1 is shown, which is a technical solution of gain delay and current limitation, and serves as comparative example 2 of the embodiments of the present application.

[0060] like Fig.13 As shown, in comparative example 2, the driving circuit includes the above-mentioned current conversion circuit 501, current value calculation circuit 502, gain calculation circuit 503, differential calculation circuit 504, gain delay circuit 505, gain limit calculation circuit 507, judgment circuit 506 and multiplication circuit 508.

[0061] By adding a gain limiting calculation circuit 507 and using a judgment circuit 506 to select the smaller one of the third gain value output by the gain limiting calculation circuit 507 and the fourth gain value output by the gain delay circuit 505, the overcurrent phenomenon can be effectively prevented from occurring. However, due to the sudden limitation of the gain value, the output signal fluctuates greatly, resulting in an obvious flickering phenomenon, such as Fig.14 This flickering phenomenon will affect the viewing effect of the display and reduce the user experience.

[0062] In comparative example 2, in order to avoid overcurrent, the driving circuit limits the gain value through the gain limiting calculation circuit 507 during each frame. When the current value exceeds the preset threshold, the gain limiting calculation circuit 507 will immediately adjust the third gain value to a smaller value, and the judgment circuit 506 will select the smaller third gain value as the first gain value output. Although this method of directly limiting the gain value can effectively prevent the occurrence of overcurrent, the sudden decrease in the gain value causes a large difference in display brightness between adjacent frames. Specifically, when the current value of a frame exceeds the preset threshold, the gain limiting calculation circuit 507 will immediately reduce the third gain value of the frame to a safe range. This sudden change in brightness will cause the display screen to flicker. This flickering phenomenon is particularly obvious in high-brightness display scenarios, which seriously affects the display quality.

[0063] In order to solve the above flicker problem, a technical solution of the embodiment of the present invention is invented on the basis of the above comparative example 2, which is a technical solution of gain delay and current limitation and feedback.

[0064] In the embodiment of the present application, the first gain value output by the judgment circuit 506 is fed back to the differential calculation circuit 504 to achieve dynamic adjustment of the gain value. When the gain value is limited, the feedback control method composed of the differential calculation circuit 504, the gain delay circuit 505, the gain limit calculation circuit 507 and the judgment circuit 506 can make the gain value change more smoothly, avoiding the overcurrent phenomenon and reducing the flicker phenomenon. Figure 7 It can be seen from the waveform shown that the current signal waveform under this scheme is the most stable, there is no flickering phenomenon, and the display effect is the best.

[0065] Through the technical solution of the embodiments of the present application, the gain value can be dynamically adjusted to ensure that the output signal always remains within a reasonable range, thereby effectively protecting the display panel and improving the display quality.

[0066] The comparison of these three technical solutions clearly illustrates that the technical solution (delay + current limitation + feedback control) of the embodiment of the present application has obvious effect in solving the overcurrent and flicker problems in the display panel driving process, and effectively improves the display quality.

[0067] like Figure 6 As shown, an embodiment of the present application provides a display device, including a display panel and a driving circuit, wherein the driving circuit includes a current value calculation circuit 502, a gain calculation circuit 503, a differential calculation circuit 504, a gain delay circuit 505, a gain limit calculation circuit 507, a judgment circuit 506 and a multiplication circuit 508.

[0068] The current value calculation circuit 502 is electrically connected to the signal input terminal of the driving circuit; The gain calculation circuit 503 is electrically connected to the current value calculation circuit 502; The difference calculation circuit 504 is electrically connected to the gain calculation circuit 503; The gain delay circuit 505 is electrically connected to the differential calculation circuit 504; The gain limit calculation circuit 507 is electrically connected to the current value calculation circuit 502; The judgment circuit 506 is electrically connected to the gain delay circuit 505 and the gain limit calculation circuit 507; The multiplication circuit 508 is used to perform a multiplication operation on the first grayscale data (first current signal) input from the signal input terminal and the first gain value output from the determination circuit 506 , and output second grayscale data (second current signal).

[0069] The driving circuit further includes a current conversion circuit 501, which is electrically connected to the signal input terminal, and a current value calculation circuit 502 is electrically connected to the current conversion circuit 501. The current conversion circuit 501 is used to convert the first grayscale data into corresponding current data.

[0070] The current value calculation circuit 502 is used to receive the first grayscale data and calculate the current value. Specifically, the current value calculation circuit 502 is used to accumulate and calculate all current data within a frame period, and normalize the calculation result to obtain a standardized current value.

[0071] The timing controller is used to generate a plurality of control signals and to control the current value calculation circuit 502 to start calculating the current value at the start time of each frame.

[0072] The gain calculation circuit 503 is used to calculate a second gain value according to the current value.

[0073] In this embodiment, as an improvement, the gain calculation circuit 503 is used to search for the corresponding gain value in a preset current value-gain value correspondence table according to the current value, and is used to perform interpolation calculation according to the gain values ​​corresponding to two adjacent current values ​​in the correspondence table to obtain a second gain value when the current value is not in the correspondence table.

[0074] In this embodiment, as an improvement, the current value variation range is pre-divided into multiple intervals, and different gain calculation parameters are configured for each interval. The gain calculation parameters are used to determine the calculation method of the second gain value, for example: the reference gain value is used to set the reference value of the second gain value in the interval; the gain adjustment step is used to control the adjustment amplitude of the second gain value relative to the reference gain value; the gain change rate is used to control the speed at which the second gain value changes with the current value.

[0075] As an improvement, the gain calculation circuit 503 is also used to dynamically adjust the gain calculation parameters according to the current value change trend of multiple consecutive frames. For example, the gain calculation circuit 503 is also used to sample the current values ​​of multiple consecutive frames and calculate their change trend, specifically by calculating the current value difference between adjacent frames, and statistically determining the change trend in the direction and amplitude of the current value; and is used to update the gain calculation parameters of the current interval according to the change trend, and when it is detected that the current value shows a continuous upward trend, the reference gain value is correspondingly reduced and the gain adjustment step is increased; when it is detected that the current value shows a continuous downward trend, the reference gain value is correspondingly increased and the gain adjustment step is reduced; the gain calculation circuit 503 is also used to ensure a smooth transition of the gain value through progressive adjustment when the current value crosses different intervals, and avoid sudden changes in the gain value.

[0076] The difference calculation circuit 504 is used to receive the second gain value and the first gain value output by the determination circuit 506 , and calculate the difference between the second gain value and the first gain value.

[0077] In this embodiment, as an improvement, the difference calculation circuit 504 may include a cache unit and an operation unit, the cache unit is used to store the second gain value and the first gain value, and the operation unit is used to calculate the difference between the second gain value and the first gain value.

[0078] In this embodiment, as an improvement, the difference calculation circuit 504 is also used to control the second gain value and the first gain value to perform difference calculation at the same time. The difference calculation circuit 504 is also used to detect whether the difference calculation result exceeds a preset range, and to select a preset default difference as output when it is detected that the difference calculation result exceeds the preset range.

[0079] The preset range includes a preset upper threshold and a preset lower threshold. The difference calculation circuit 504 is also used to generate a preset default difference according to the current working state, and to calculate a transition difference according to the historical difference and the current difference when the difference exceeds the preset range, and to select to use the default difference or the transition difference according to the degree of exceeding the range.

[0080] like Figure 8 As shown, the gain delay circuit 505 is used to multiply the difference output by the difference calculation circuit 504 by a preset coefficient to obtain a multiplication result, add the multiplication result to the first gain value to obtain an addition result, and output the addition result to the judgment circuit 506.

[0081] The preset coefficient ranges from 0.01 to 1.

[0082] In this embodiment, the gain delay circuit 505 may include a multiplier 5051 and an adder 5052, the multiplier 5051 is used to multiply the difference output by the differential calculation circuit 504 by a preset coefficient to obtain a multiplication result, and the adder 5052 is used to add the multiplication result and the first gain value output by the judgment circuit 506 to obtain an addition result.

[0083] As an improvement, the gain delay circuit 505 may further include a coefficient selection unit, which is used to dynamically adjust the value of the preset coefficient according to the size of the difference. The gain delay circuit 505 may further include a smoothing processing unit, which is used to smooth the addition result. The gain delay circuit 505 may further include a storage unit, which is used to store the addition result of the historical frame. The gain delay circuit 505 may also include an average value calculation unit, which is used to calculate the weighted average value of the addition result of the current frame and the addition result of the historical frame as a fourth gain value output.

[0084] In this embodiment, the gain delay circuit 505 is further configured to perform an addition operation on the multiplication result and the first gain value at the same time.

[0085] As an improvement, the gain delay circuit 505 is also used to correct the addition operation result according to a preset compensation algorithm when abnormal fluctuations are detected in the addition operation result. The gain delay circuit 505 is also used to perform trend analysis on the addition operation results of multiple consecutive frames and adjust the calculation parameters of the weighted average value according to the analysis results.

[0086] The gain limit calculation circuit 507 is used to calculate a third gain value according to the current value.

[0087] When the current value is less than or equal to the first preset current value C1, the third gain value is the first preset gain value; when the current value is greater than the first preset current value C1, the third gain value decreases nonlinearly from the first preset gain value to the second preset gain value.

[0088] The first preset gain value is in the range of 0.9 to 1, and the second preset gain value is in the range of 0.2 to 0.6. Preferably, the first preset gain value is 1, and the second preset gain value is 0.4.

[0089] In this embodiment, as an improvement, the gain limit calculation circuit 507 may include a first comparison unit and a calculation unit, the first comparison unit is used to compare the current value with the first preset current value C1, the second preset current value C2 and the third preset current value C3 respectively, and the calculation unit is used to calculate the third gain value according to the comparison result: when the current value is less than or equal to the first preset current value C1, the calculation unit sets the third gain value to the first preset gain value; when the current value is greater than the first preset current value C1 and less than the second preset current value C2, the calculation unit keeps the third gain value as the first preset gain value; when the current value is greater than or equal to the second preset current value C2 and less than the third preset current value C3, the calculation unit calculates the third gain value according to a preset nonlinear function, so that it decreases nonlinearly from the first preset gain value; when the current value is greater than or equal to the third preset current value C3, the calculation unit sets the third gain value to the second preset gain value. The gain limit calculation circuit 507 may also include a function operation unit, which is used to calculate the third gain value according to a preset nonlinear function.

[0090] As an improvement, the gain limit calculation circuit 507 is further configured to dynamically adjust the parameters of the preset nonlinear function according to the content characteristics of the display picture.

[0091] The parameters of the preset nonlinear function include: a curve slope parameter for controlling the speed of the third gain value changing with the current value; an inflection point parameter for determining the position where the third gain value starts to change nonlinearly; and a curvature parameter for controlling the curvature of the third gain value change curve. Specifically, when calculating the third gain value, the gain limit calculation circuit 507 first determines whether the current value exceeds the threshold value set by the inflection point parameter according to the current current value, and when it exceeds, calculates the nonlinear reduction amount of the third gain value according to the curve slope parameter and the curvature parameter.

[0092] The judgment circuit 506 is used to receive the fourth gain value output by the gain delay circuit 505 and the third gain value output by the gain limit calculation circuit 507, and to select the smaller one between the fourth gain value and the third gain value as the first gain value to output.

[0093] In this embodiment, the judgment circuit 506 may include a second comparison unit and a selection unit, the second comparison unit is used to compare the fourth gain value and the third gain value, and the selection unit is used to select the smaller one as the first gain value output according to the comparison result.

[0094] The display device provided by the present application can effectively improve the flickering phenomenon of the display screen by setting a differential calculation circuit 504, a gain delay circuit 505, a gain limit calculation circuit 507 and a judgment circuit 506 in the driving circuit, and adopting a feedback signal control method. Specifically, the differential calculation circuit 504 receives the second gain value output by the gain calculation circuit 503 and the first gain value output by the judgment circuit 506, and calculates the difference between the two. The gain delay circuit 505 multiplies the difference with a preset coefficient and adds it to the first gain value. This calculation method makes the change of the gain value more gentle. At the same time, the gain limit calculation circuit 507 calculates the third gain value according to the current value, limits the range of change of the gain value, and the judgment circuit 506 selects a smaller value as the first gain value output from the fourth gain value output by the gain delay circuit 505 and the third gain value output by the gain limit calculation circuit 507. This selection method ensures that the output gain value does not exceed a reasonable range.

[0095] In the above technical solution, the difference of the gain value is calculated by the differential calculation circuit 504, and the gain delay circuit 505 performs delay calculation processing on the difference, thereby slowing down the change speed of the gain value; the third gain value is calculated by the gain limit calculation circuit 507, and the judgment circuit 506 selects a smaller gain value for output, thereby preventing the gain value from exceeding a reasonable range; and the first gain value output by the judgment circuit 506 is fed back to the differential calculation circuit 504, thereby realizing dynamic adjustment of the gain value. Figure 7As shown, the above technical solution not only ensures a smooth transition of the brightness of the display screen and avoids flickering of the display screen, but also avoids the adverse effect of excessive output current on the display panel, thereby effectively improving the display effect.

[0096] The embodiments of the present application are described in detail above, and the contents of this specification should not be construed as limiting the scope of protection of the present application.

Claims

1. A display device, characterized in that: The invention comprises a display panel and a driving circuit, wherein the driving circuit comprises: A current value calculation circuit, the current value calculation circuit is electrically connected to the signal input terminal of the driving circuit; a gain calculation circuit, the gain calculation circuit being electrically connected to the current value calculation circuit; A differential calculation circuit, the differential calculation circuit being electrically connected to the gain calculation circuit; A gain delay circuit, the gain delay circuit being electrically connected to the differential calculation circuit; a gain limiting calculation circuit, the gain limiting calculation circuit being electrically connected to the current value calculation circuit; a judgment circuit, electrically connected to the gain delay circuit and the gain limit calculation circuit; and The multiplication circuit is used for performing a multiplication operation on the first grayscale data inputted from the signal input terminal and the first gain value outputted from the judgment circuit, and outputting second grayscale data.

2. The display device according to claim 1, characterized in that The current value calculation circuit is used for receiving the first grayscale data and calculating the current value.

3. The display device according to claim 2, characterized in that: The gain calculation circuit is used for calculating a second gain value according to the current value.

4. The display device according to claim 3, characterized in that: The difference calculation circuit is used for receiving the second gain value and the first gain value output by the judgment circuit, and calculating the difference between the second gain value and the first gain value.

5. The display device according to claim 1, characterized in that The gain delay circuit is used to multiply the difference output by the differential calculation circuit by a preset coefficient to obtain a multiplication result, add the multiplication result to the first gain value to obtain an addition result, and output the addition result to the judgment circuit.

6. The display device according to claim 5, characterized in that: The value range of the preset coefficient is 0.01 to 1.

7. The display device according to claim 2, characterized in that: The gain limit calculation circuit is used to calculate a third gain value according to the current value.

8. The display device according to claim 7, characterized in that: When the current value is less than or equal to the first preset current value, the third gain value is the first preset gain value; When the current value is greater than the first preset current value, the third gain value decreases nonlinearly from the first preset gain value to a second preset gain value.

9. The display device according to claim 8, characterized in that: The first preset gain value is in the range of 0.9 to 1, and the second preset gain value is in the range of 0.2 to 0.

6.

10. The display device according to claim 1, characterized in that The judgment circuit is used to receive the fourth gain value output by the gain delay circuit and the third gain value output by the gain limit calculation circuit, and to select a smaller one between the fourth gain value and the third gain value as the first gain value to output.

Citation Information

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