Three-dimensional packaging substrate and manufacturing method thereof, three-dimensional packaging substrate connector and chip packaging method

Abstract

The invention provides a three-dimensional packaging substrate, a manufacturing method of the three-dimensional packaging substrate, a three-dimensional packaging substrate connector and a chip packaging method. The manufacturing method of the three-dimensional packaging substrate comprises the following steps: providing at least one roller jig; an annular structure with a conductive circuit is formed on the surface of the roller jig, the annular structure is provided with a side surface, the side surface of the annular structure is provided with a plane area, and the plane area serves as a packaging area of the three-dimensional packaging substrate; and the roller jig is removed. According to the technical scheme, the annular three-dimensional packaging substrate is formed on the surface of the roller jig, compared with a traditional plane packaging substrate, the stress support of the edge of the substrate can be increased, the warping influence is restrained, and meanwhile a single packaging body can integrate more chips.

Description

Technical Field

[0001] The present invention relates to the field of chip packaging, and in particular to a three-dimensional packaging substrate and a manufacturing method thereof, a three-dimensional packaging substrate connector and a chip packaging method. Background Art

[0002] The existing chip packaging process uses a flat packaging substrate. During the packaging process, due to the high process temperature, the flat packaging substrate may warp, affecting product quality. Therefore, how to improve the structure of the packaging substrate to suppress the warping effect is a problem that needs to be solved at present.

[0003] In addition, as semiconductor products develop towards high density, high integration and small size, more and more people are focusing on the development of advanced packaging technology. 3D packaging can certainly improve input and output (IO) density and electrical performance, but it is necessary to further improve the utilization of surface area and space to achieve more IO integration. Summary of the invention

[0004] The technical problem to be solved by the present invention is how to improve the structure of a packaging substrate to suppress the influence of warping, and to provide a three-dimensional packaging substrate and a manufacturing method thereof, a three-dimensional packaging substrate connector and a chip packaging method.

[0005] In order to solve the above problems, the present invention provides a method for manufacturing a three-dimensional packaging substrate, comprising the following steps: providing at least one roller jig; forming an annular structure with a conductive circuit on the surface of the roller jig, the annular structure having a side surface, and the side surface of the annular structure having a planar area, the planar area serving as the packaging area of ​​the three-dimensional packaging substrate; removing the roller jig.

[0006] In order to solve the above problems, the present invention provides a three-dimensional packaging substrate, including an annular structure with a conductive circuit, the annular structure has a side surface, and the side surface of the annular structure has a planar area; the planar area serves as a packaging area of ​​the three-dimensional packaging substrate.

[0007] In order to solve the above problems, the present invention provides a three-dimensional packaging substrate connector, which is used to be set on the surface of a circuit board, including: a plurality of card slots, each of the card slots is used to correspond to a three-dimensional packaging substrate, and the three-dimensional packaging substrate is made by the three-dimensional packaging substrate manufacturing method described in the present invention; a pin, located in each card slot, when the three-dimensional packaging substrate is inserted into the card slot, the pin is electrically connected to the three-dimensional packaging substrate; the three-dimensional packaging substrate connector is used to electrically connect the three-dimensional packaging substrate and the circuit board.

[0008] In order to solve the above problems, the present invention provides a chip packaging method, comprising the following steps: providing a three-dimensional packaging substrate and at least one chip, wherein the three-dimensional packaging substrate is manufactured using the three-dimensional packaging substrate manufacturing method described in the present invention; and packaging the chip in the packaging area of ​​the three-dimensional packaging substrate.

[0009] The above technical solution forms a ring-shaped three-dimensional packaging substrate on the surface of the roller fixture. Compared with the traditional planar packaging substrate, it can increase the force support on the edge of the substrate to suppress the influence of warping, and at the same time enable a single package to integrate more chips.

[0010] It should be understood that the above general description and the detailed description below are exemplary and explanatory only and cannot limit the present invention. The techniques, methods and devices known to ordinary technicians in the relevant field may not be discussed in detail, but where appropriate, the techniques, methods and devices should be considered as part of the authorization specification. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In order to more clearly illustrate the technical solutions in the specific embodiments of the present invention, the following is a brief introduction to the drawings required for the description of the specific embodiments. Obviously, the drawings described below are only some specific embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0012] Figure 1A It is a structural schematic diagram of a planar packaging substrate.

[0013] Figure 1B A schematic diagram of the structure for bonding a chip to a planar packaging substrate.

[0014] Figure 1C It is a schematic diagram of the structure of filling bottom filling glue between the chip and the planar packaging substrate.

[0015] Figure 2A FIG. 1 is a schematic structural diagram of an embodiment in which a planar package substrate is warped.

[0016] Figure 2B FIG. 4 is a schematic structural diagram of another embodiment in which a planar package substrate is warped.

[0017] Figure 3 The present invention is a flowchart of the steps of an embodiment of a method for manufacturing a three-dimensional packaging substrate.

[0018] Figure 4A A schematic diagram of the structure of a roller jig is provided for one embodiment of a method for manufacturing a three-dimensional packaging substrate according to the present invention.

[0019] Figure 4BThe structure schematic diagram of forming an annular structure on the surface of the roller jig according to an embodiment of a method for manufacturing a three-dimensional packaging substrate of the present invention.

[0020] Figure 4C It is a structural schematic diagram of an embodiment of the three-dimensional packaging substrate of the present invention.

[0021] Figure 5 It is a structural schematic diagram of another embodiment of the three-dimensional packaging substrate of the present invention.

[0022] Figure 6 It is a structural schematic diagram of an embodiment of the connection between the three-dimensional packaging substrate and the circuit board of the present invention.

[0023] Figure 7 The present invention is a flowchart of a chip packaging method according to an embodiment of the present invention.

[0024] Figure 8 It is a structural schematic diagram of packaging a chip onto the surface of the three-dimensional packaging substrate according to an embodiment of a chip packaging method of the present invention. DETAILED DESCRIPTION

[0025] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0026] Existing chip packaging processes such as Figure 1A to Figure 1C shown.

[0027] Figure 1A It is a schematic diagram of the structure of a planar package substrate. In the process of forming the planar package substrate 11, the process temperature needs to be increased from 25 degrees Celsius to 150 degrees Celsius, and then cooled to 25 degrees Celsius after the process is completed.

[0028] Figure 1B The schematic diagram of the structure of bonding the chip to the planar package substrate is shown in FIG. In the process of bonding the chip 12 to the planar package substrate 11, the process temperature needs to be increased from 25 degrees Celsius to 260 degrees Celsius, and then cooled to 25 degrees Celsius after the process is completed.

[0029] Figure 1C The schematic diagram of the structure of filling the bottom filling glue between the chip and the planar packaging substrate is shown in FIG. In the process of filling the bottom filling glue 13 between the chip 12 and the planar packaging substrate 11, the process temperature needs to be increased from 25 degrees Celsius to 150 degrees Celsius, and then cooled to 25 degrees Celsius after the process is completed.

[0030] After the temperature cycle in the process flow, the planar package substrate 11 is prone to warping during repeated heating and cooling. Figure 2A-2B As shown, the warping changes of the planar packaging substrate 11 include two types:

[0031] like Figure 2A As shown, the edge of the planar packaging substrate 11 is warped toward the surface away from the chip 12 (crying face);

[0032] like Figure 2B As shown, the edge of the planar packaging substrate 11 is warped toward the surface close to the chip 12 (smiley face).

[0033] Regardless of the type of warping, it will affect the quality of the packaged product. Therefore, in order to solve the above problem, the present invention provides a method for manufacturing a three-dimensional packaging substrate, which can increase the force support on the edge of the substrate to suppress the impact of warping.

[0034] See also Figure 3 , which is a flowchart of the steps of an embodiment of a method for manufacturing a three-dimensional packaging substrate according to the present invention. Figure 3 As shown, the method for manufacturing the three-dimensional packaging substrate includes the following steps: step S31, providing at least one roller jig; step S32, forming an annular structure with a conductive circuit on the surface of the roller jig, the annular structure having a side surface, and the side surface of the annular structure having a planar area, the planar area serving as the packaging area of ​​the three-dimensional packaging substrate; step S33, removing the roller jig.

[0035] Please refer to Figure 4A And step S31, providing at least one roller jig 40. The surface shape of the roller jig 40 is the same as the shape surface of the formed three-dimensional packaging substrate. In this embodiment, the roller jig 40 is a square with rounded corners. In other embodiments, the roller jig 40 can also be a circle with straight edges.

[0036] In some embodiments, in the step of providing a roller jig 40, an ultraviolet sensitive film (i.e., UV film) 401 is formed on the surface of the roller jig 40, and the subsequently formed annular structure is fixed to the surface of the roller jig 40 through the ultraviolet sensitive film 401; the step of removing the roller jig 40 includes: irradiating the ultraviolet sensitive film 401 with ultraviolet light. The ultraviolet sensitive film 401 is a special film whose viscosity changes significantly after ultraviolet irradiation. Before ultraviolet light irradiation, the viscosity of the ultraviolet sensitive film 401 is extremely high, and it can firmly adhere to the film layer formed on the surface of the roller jig 40 to ensure stability during processing. Once irradiated with ultraviolet light, the viscosity of the ultraviolet sensitive film 401 will drop significantly, which is convenient for the subsequent separation of the three-dimensional packaging substrate and the roller jig 40.

[0037] In some embodiments, in the step of providing a roller jig 40 , a plurality of the roller jigs 40 are distributed in an array to batch-produce the three-dimensional packaging substrates to improve production efficiency.

[0038] Please refer to Figure 4B And step S32, forming an annular structure 41 having a conductive circuit 410 on the surface of the roller jig 40, the annular structure 41 having a side surface, and the side surface of the annular structure 41 having a plane area, the plane area serving as the packaging area 411 of the three-dimensional packaging substrate. The area outside the packaging area 411 is a connection area 412 for connecting the conductive circuit 410 of the three-dimensional packaging substrate.

[0039] In some embodiments, forming an annular structure 41 having a conductive circuit 410 on the surface of the roller jig 40 further includes the following steps: (1) forming a metal circuit on the surface of the roller jig 40; (2) forming a dielectric layer on the surface of the metal circuit; (3) repeating the above steps to form multiple layers of metal circuits and dielectric layers on the surface of the roller jig 40.

[0040] The metal circuit formed on the surface of the roller jig 40 can be formed by directly depositing a patterned metal circuit on the surface of the roller jig 40 through a mask layer; or a metal layer can be first deposited on the surface of the roller jig 40, and then the metal layer is patterned to form the metal circuit. Taking the latter method as an example, in some embodiments, the metal circuit formed on the surface of the roller jig 40 further includes the following steps: (1) forming a metal layer on the surface of the roller jig 40; (2) baking; (3) patterning the metal layer to form the metal circuit. The metal layer is patterned using an etching process, and baking is performed before patterning the metal layer in order to further solidify the film layer (mainly the dielectric layer formed under the metal layer) that has been attached to the roller jig 40, so that the subsequent etching step has sufficient hardness support to avoid deformation of the film layer during the etching process, thereby causing a large error in the metal circuit formed by etching.

[0041] In some embodiments, forming a metal layer on the surface of the roller jig 40 further includes the following steps: (1) providing a copper sheet; (2) pressing the entire copper sheet onto the surface of the roller jig; and (3) connecting the gaps at the connection points of the copper sheet using an electroplating process to form a metal layer.

[0042] In some embodiments, forming a metal layer on the surface of the roller jig 40 further includes the following steps: (1) depositing a copper layer on the surface of the roller jig; and (2) thickening the copper layer by an electroplating process to form a metal layer.

[0043] In some embodiments, forming the dielectric layer on the surface of the metal layer further comprises the following steps: attaching the dielectric layer material around the metal circuit and performing preliminary lamination to control the thickness of the dielectric layer. In this embodiment, the dielectric layer material is polypropylene (PP for short). Polypropylene is a thermoplastic synthetic resin with excellent performance, and has chemical resistance, heat resistance, electrical insulation, high strength mechanical properties and good high wear resistance processing performance.

[0044] In some embodiments, when the metal circuit is formed again on the surface of the dielectric layer, it is pressed again to control the thickness of the dielectric layer. Combined with the aforementioned process steps of first forming a metal layer and then etching the metal layer to form the metal circuit, the dielectric layer material is initially pressed when it is attached to the surroundings of the previous metal circuit, and pressed again when the next metal layer is formed again on the surface of the dielectric layer. After two pressings, the thickness of the dielectric layer is controlled, and then the dielectric layer material is baked using its thermoplastic properties to solidify the dielectric layer material, providing sufficient support for the subsequent etching process.

[0045] Please refer to Figure 4C And step S33, removing the roller jig 40. In this embodiment, the roller jig 40 is removed by irradiating the ultraviolet light onto the ultraviolet sensitive film 401.

[0046] The above technical solution forms a ring-shaped three-dimensional packaging substrate on the surface of the roller fixture. Compared with the traditional planar packaging substrate, it can increase the force support on the edge of the substrate to suppress the influence of warping, and at the same time enable a single package to integrate more chips.

[0047] Based on the same inventive concept, an embodiment of the present invention further provides a three-dimensional packaging substrate.

[0048] See also Figure 4C , which is a schematic structural diagram of an embodiment of the three-dimensional packaging substrate of the present invention. Figure 4C As shown, the three-dimensional packaging substrate includes an annular structure 41 having a conductive circuit 410, the annular structure 41 has a side surface, and the side surface of the annular structure 41 has a plane area; the plane area serves as the packaging area 411 of the three-dimensional packaging substrate. The area outside the packaging area 411 is a connection area 412, which is used to connect the conductive circuit 410 of the three-dimensional packaging substrate.

[0049] like Figure 4CAs shown, in some embodiments, the cross section of the annular structure 41 is a square with rounded corners, wherein the straight sides of the square correspond to the packaging area 411 on the side surface of the annular structure 41 , and the rounded corners of the square correspond to the connection area 412 on the side surface of the annular structure 41 .

[0050] See also Figure 5 , which is a structural schematic diagram of another embodiment of the three-dimensional packaging substrate described in the present invention. Figure 5 The embodiment shown is Figure 4C The embodiment shown is different in that the cross section of the annular structure 51 is a circle with straight edges, wherein the straight edges of the circle correspond to the packaging area 511 on the side surface of the annular structure 51 , and the curved edges of the circle correspond to the connection area 512 on the side surface of the annular structure 51 .

[0051] Please continue reading Figure 4C In some embodiments, the side surface is the outer surface of the annular structure 41 .

[0052] See also Figure 6 , which is a structural schematic diagram of an embodiment of the connection between the three-dimensional packaging substrate and the circuit board of the present invention, wherein: Figure 6 In the figure, a plane area portion of the side surface of the annular structure of the three-dimensional packaging substrate is cut out as an example to show the connection relationship between the three-dimensional packaging substrate and the circuit board. The connection method between other areas and the circuit board is the same as the connection method between the plane area cut out in the figure and the circuit board. Figure 6 As shown, in some embodiments, a pad 613 is provided at least at one end of the annular structure 61, and the three-dimensional packaging substrate can be connected to a circuit board (PCB) 62 by welding technology. In this embodiment, the pad 613 of the three-dimensional packaging substrate is correspondingly welded to the conductive pad on the surface of the circuit board 62 by soldering, so as to electrically connect the three-dimensional packaging substrate and the circuit board 62.

[0053] The present invention also provides a three-dimensional packaging substrate connector, which is used to be arranged on the surface of a circuit board, and includes: a card slot and a pin. Each of the card slots is used to correspondingly card-connect a three-dimensional packaging substrate, and the three-dimensional packaging substrate is made by the manufacturing method of the three-dimensional packaging substrate of the present invention. In this embodiment, the three-dimensional packaging substrate connector includes one of the card slots, which can be used to correspondingly card-connect one of the three-dimensional packaging substrates. The pin is located in each card slot, and one end of the three-dimensional packaging substrate having the solder pad is inserted into the card slot, and the solder pad of the three-dimensional packaging substrate is electrically connected to the pin correspondingly, thereby making the pin electrically connected to the three-dimensional packaging substrate. The three-dimensional packaging substrate connector is used to electrically connect the three-dimensional packaging substrate with the circuit board.

[0054] In some embodiments, the three-dimensional packaging substrate connector includes a plurality of the card slots, which can be used to correspondingly card-connect a plurality of the three-dimensional packaging substrates.

[0055] See also Figure 7 , which is a flow chart of steps of an embodiment of a chip packaging method according to the present invention. Figure 7 As shown, the chip packaging method includes the following steps: step S71, providing a three-dimensional packaging substrate and at least one chip, the three-dimensional packaging substrate is made by the three-dimensional packaging substrate manufacturing method described in the present invention; step S72, packaging the chip in the packaging area of ​​the three-dimensional packaging substrate.

[0056] In some embodiments, in the step of packaging the chip in the packaging area of ​​the three-dimensional packaging substrate, the chip may be packaged in the entire packaging area of ​​the three-dimensional packaging substrate, or may be partially packaged according to a specific process.

[0057] like Figure 8 As shown, the three-dimensional packaging substrate 80 is fixed on the surface of the roller jig 81 before chip packaging. Therefore, in some embodiments, after the chip 82 is packaged on the three-dimensional packaging substrate 80, a step of removing the roller jig 81 is also included. In this embodiment, ultraviolet light is used to irradiate the ultraviolet sensitive film 83 on the surface of the roller jig 81 to remove the roller jig 81.

[0058] Experimental data show that the degree of warping is related to the curvature of the connection area. The three-dimensional packaging substrate provided by the present invention is a closed structure, which is conducive to improving the degree of warping. In addition, the three-dimensional packaging substrate provided by the present invention is more convenient for electrical performance routing due to the end-to-end connection of the annular structure. The three-dimensional packaging substrate with a closed structure can also be applied to 3D structure packaging.

[0059] The above technical solution forms a ring-shaped three-dimensional packaging substrate on the surface of the roller fixture. Compared with the traditional planar packaging substrate, it can increase the force support on the edge of the substrate to suppress the influence of warping, and at the same time increase the number of chips that can be packaged.

[0060] It should be noted that references in the specification to "an embodiment", "an embodiment", "an exemplary embodiment", "some embodiments", etc. indicate that the described embodiment may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases do not necessarily refer to the same embodiment. In addition, when a particular feature, structure, or characteristic is described in conjunction with an embodiment, whether or not explicitly described, it is within the knowledge of a technician in the relevant art to implement such feature, structure, or characteristic in conjunction with other embodiments.

[0061] Typically, a term can be understood at least in part from usage in context. For example, the term "one or more" as used herein depends at least in part on the context and can be used to describe any feature, structure or characteristic in a singular sense, or can be used to describe a combination of features, structures or features in a plural sense. Similarly, terms such as "one", "a" or "the" can also be understood to express singular usage or to express plural usage, depending at least in part on the context. In addition, the term "based on" can be understood to not necessarily be intended to express a set of exclusive factors, but can alternatively, also at least in part depending on the context, allow for the presence of other factors that are not necessarily explicitly described. It should also be noted in this specification that "connected / coupled" refers not only to the direct coupling of one component to another component, but also to the indirect coupling of one component to another component through an intermediate component.

[0062] It should be noted that the terms "including" and "having" and their variations involved in the documents of the present invention are intended to cover non-exclusive inclusions. The terms "first", "second", etc. are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. Unless the context clearly indicates otherwise, it should be understood that the data used in this way can be interchanged under appropriate circumstances. In addition, the embodiments of the present invention and the features in the embodiments can be combined with each other unless there is a conflict. In addition, in the above description, the description of well-known components and technologies is omitted to avoid unnecessary confusion of the concepts of the present invention. In the above embodiments, each embodiment focuses on the differences from other embodiments, and the same / similar parts between the embodiments can be referred to each other.

[0063] The above is only a preferred embodiment of the present invention. It should be pointed out that ordinary technicians in this technical field can make several improvements and modifications without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A method for manufacturing a three-dimensional packaging substrate, characterized in that: The steps include: Providing at least one roller fixture; An annular structure having a conductive circuit is formed on the surface of the roller jig, wherein the annular structure has a side surface, and the side surface of the annular structure has a plane area, and the plane area serves as a packaging area of ​​the three-dimensional packaging substrate; Remove the roller jig.

2. The method according to claim 1, characterized in that In the step of providing a roller jig, an ultraviolet photosensitive film is formed on the surface of the roller jig, and the subsequently formed annular structure is fixed on the surface of the roller jig through the ultraviolet photosensitive film; The step of removing the roller jig includes: irradiating the ultraviolet photosensitive film with ultraviolet light.

3. The method according to claim 1, characterized in that In the step of providing a roller jig, a plurality of the roller jigs are distributed in an array.

4. The method according to claim 1, characterized in that Forming an annular structure having a conductive circuit on the surface of the roller jig further comprises the following steps: forming a metal circuit on the surface of the roller jig; forming a dielectric layer on the surface of the metal circuit; Repeat the above steps to form multiple layers of metal circuits and dielectric layers on the surface of the roller fixture.

5. The method according to claim 4, characterized in that Forming a metal circuit on the surface of the roller jig further includes the following steps: forming a metal layer on the surface of the roller jig; bake; The metal layer is patterned to form the metal circuit.

6. The method according to claim 5, characterized in that Forming a metal layer on the surface of the roller jig further comprises the following steps: Provide a copper sheet; Pressing the entire copper sheet onto the surface of the roller jig; The gaps at the copper sheet connections are connected by electroplating to form a metal layer.

7. The method according to claim 5, characterized in that Forming a metal layer on the surface of the roller jig further comprises the following steps: Depositing a copper layer on the surface of the roller jig; The copper layer is thickened by an electroplating process to form a metal layer.

8. The method according to claim 4, characterized in that The step of forming a dielectric layer on the surface of the metal layer further includes the following steps: attaching dielectric layer material around the metal line and performing preliminary lamination to control the thickness of the dielectric layer.

9. The method according to claim 8, characterized in that When the metal circuit is formed again on the surface of the dielectric layer, lamination is performed again to control the thickness of the dielectric layer.

10. A three-dimensional packaging substrate, characterized in that: It comprises an annular structure with a conductive circuit, wherein the annular structure has a side surface, and the side surface of the annular structure has a plane area; the plane area serves as a packaging area of ​​the three-dimensional packaging substrate.

11. The three-dimensional packaging substrate according to claim 10, characterized in that: The cross section of the annular structure is a square with rounded corners.

12. The three-dimensional packaging substrate according to claim 10, characterized in that: The cross section of the annular structure is a circle with straight edges.

13. The three-dimensional packaging substrate according to claim 10, characterized in that: The side surface is the outer surface of the annular structure.

14. The three-dimensional packaging substrate according to claim 10, characterized in that: A welding pad is provided at least at one end of the annular structure.

15. A three-dimensional packaging substrate connector, used to be arranged on the surface of a circuit board, characterized in that: include: A card slot, the card slot being used for correspondingly carding a three-dimensional packaging substrate, the three-dimensional packaging substrate being manufactured by the method according to any one of claims 1 to 9; A plurality of pins are located in the card slot, and when the three-dimensional packaging substrate is inserted into the card slot, the pins are electrically connected to the three-dimensional packaging substrate; The three-dimensional packaging substrate connector is used to electrically connect the three-dimensional packaging substrate and the circuit board.

16. A chip packaging method, characterized in that: The steps include: Providing a three-dimensional packaging substrate and at least one chip, wherein the three-dimensional packaging substrate is manufactured by the method according to any one of claims 1 to 9; The chip is packaged in the packaging area of ​​the three-dimensional packaging substrate.

17. The method according to claim 16, characterized in that The method also includes the step of removing the roller jig.

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