Dead-time compensation method for common-mode voltage suppression PWM of two-level four-leg converter

Abstract

The present application relates to a kind of two-level four-bridge converter common-mode voltage suppression PWM dead-time compensation method, comprising: obtaining the current duty cycle of each phase bridge arm of two-level four-bridge converter, current output current value and circuit parameter;According to the current duty cycle of each phase bridge arm, current output current value and current circuit parameter, the instantaneous current value of each phase bridge arm switch action time in next cycle is predicted;Based on the absolute value of the instantaneous current value of each phase bridge arm switch action time in next cycle, target bridge arm is selected, and disturbance voltage is injected to target bridge arm, and bridge arm current is biased, so that the instantaneous current value of each phase bridge arm switch action time is greater than preset current threshold, and according to the current direction corresponding to the instantaneous current value of each phase bridge arm switch action time, dead-time compensation is carried out.Therefore, the dead-time compensation method based on the common-mode voltage suppression PWM of four-bridge solves the problem that common-mode voltage suppression PWM is ineffective due to dead-time effect.Improve the safety and stability of system.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power electronics, and in particular to a dead-time compensation method for common-mode voltage suppression PWM of a two-level four-bridge converter. BACKGROUND

[0002] The two-level four-bridge converter can be used for AC-DC conversion of a three-phase four-wire system and is suitable for various medium and low voltage application scenarios such as flexible interconnection of power distribution areas and DC remote supply. Due to the requirement of grounding, if a common PWM operation mode is used, a high-frequency common-mode voltage will be excited between the neutral point of the AC side and the DC side, resulting in a leakage current and causing the leakage protection system to act and the system to shut down.

[0003] In related technologies, a common-mode voltage suppression PWM method is used to eliminate the common-mode voltage and leakage current from the source.

[0004] However, the two-level four-bridge common-mode voltage suppression PWM in related technologies only suppresses the common-mode voltage in the steady state and does not consider the influence of the dead time. Moreover, the dead-time compensation method for the common-mode voltage suppression PWM is mostly established on the basis of a three-phase three-wire system and has a huge difference from the three-phase four-wire common-mode voltage suppression PWM, which cannot be used universally and needs to be solved urgently. SUMMARY

[0005] The present application provides a dead-time compensation method for common-mode voltage suppression PWM of a two-level four-bridge converter to solve the problem of invalidation of the common-mode voltage suppression PWM caused by the dead-time effect and improve the safety and stability of the system.

[0006] The first aspect of the present application provides a dead-time compensation method for common-mode voltage suppression PWM of a two-level four-bridge converter, including the following steps: obtaining the current duty cycle, current output current value and current circuit parameter of each phase bridge arm of the two-level four-bridge converter; predicting the instantaneous current value of the switching action time of each phase bridge arm in the next period according to the current duty cycle, current output current value and current circuit parameter of each phase bridge arm; selecting a target bridge arm based on the absolute value of the instantaneous current value of the switching action time of each phase bridge arm in the next period and injecting a disturbance voltage to bias the bridge arm current, so that the instantaneous current value of the switching action time of each phase bridge arm is greater than a preset current threshold, and performing dead-time compensation according to the current direction corresponding to the instantaneous current value of the switching action time of each phase bridge arm.

[0007] Further, in some embodiments, the target bridge arm is selected based on the absolute value of the instantaneous current value of the switching action time of each phase bridge arm, including: sequentially judging whether the absolute value of the instantaneous current value of the switching action time of each phase bridge arm is less than the preset current threshold; and taking the bridge arm with an absolute value of the instantaneous current value less than the preset current threshold as the target bridge arm.

[0008] Further, in some embodiments, after judging whether the absolute value of the instantaneous current value of the switching action time of each phase bridge arm is less than the preset current threshold value in turn, further comprising: obtaining the current direction corresponding to the bridge arm whose absolute value of the instantaneous current value is greater than or equal to the preset current threshold value; and performing dead-time compensation according to the current direction corresponding to the bridge arm whose absolute value of the instantaneous current value is greater than or equal to the preset current threshold value.

[0009] Further, in some embodiments, the injecting a disturbance voltage bias bridge arm current into the target bridge arm comprises: determining a current interval in which the target bridge arm is located; and injecting a first additional disturbance vector into a reference voltage vector in at least one first switching period according to a direction of the first additional disturbance vector corresponding to the current interval in which the target bridge arm is located, and injecting a second additional disturbance vector into the reference voltage vector in at least one second switching period, wherein the first additional disturbance vector and the second additional disturbance vector are opposite.

[0010] The dead-time compensation method for common-mode voltage suppression PWM of the two-level four-bridge converter provided by the embodiment of the present application generalizes the instantaneous current prediction method of the traditional three-phase three-wire system to the three-phase four-wire system, and combines the dead-time compensation method of the instantaneous current prediction and the active disturbance detection, considers one-beat delay of the control system, and is simple to calculate and fast, and solves the problem of invalidation of the common-mode voltage suppression PWM caused by the dead-time effect. The safety and stability of system operation are improved.

[0011] The second embodiment of the present application provides a dead-time compensation device for common-mode voltage suppression PWM of a two-level four-bridge converter, comprising: an acquisition module configured to acquire a current duty cycle, a current output current value and a current circuit parameter of each phase bridge arm of the two-level four-bridge converter; a calculation module configured to predict an instantaneous current value of a switching action time of each phase bridge arm in a next period according to the current duty cycle, the current output current value and the current circuit parameter of each phase bridge arm; and a control module configured to select a target bridge arm based on an absolute value of the instantaneous current value of the switching action time of each phase bridge arm in the next period, and inject a disturbance voltage into the target bridge arm to bias a bridge arm current, so that the instantaneous current value of the switching action time of each phase bridge arm is greater than a preset current threshold value, and perform dead-time compensation according to a current direction corresponding to the instantaneous current value of the switching action time of each phase bridge arm.

[0012] Further, in some embodiments, the target bridge arm is selected based on the absolute value of the instantaneous current value of the switching action time of each phase bridge arm, and the control module is specifically configured to: judge whether the absolute value of the instantaneous current value of the switching action time of each phase bridge arm is less than the preset current threshold value in turn; and take the bridge arm whose absolute value of the instantaneous current value is less than the preset current threshold value as the target bridge arm.

[0013] Further, in some embodiments, after judging whether the absolute value of the instantaneous current value of the switching action moment of each phase bridge arm is less than the preset current threshold value in sequence, the control module is further configured to: obtain the current direction corresponding to the bridge arm whose absolute value of the instantaneous current value is greater than or equal to the preset current threshold value; and perform dead-time compensation according to the current direction corresponding to the bridge arm whose absolute value of the instantaneous current value is greater than or equal to the preset current threshold value.

[0014] Further, in some embodiments, the control module is further configured to: determine the current interval in which the target bridge arm is located; and inject a first additional disturbance vector in the direction of the reference voltage vector in at least one first switching period and a second additional disturbance vector in the direction of the reference voltage vector in at least one second switching period according to the current interval in which the target bridge arm is located, wherein the first additional disturbance vector and the second additional disturbance vector are opposite.

[0015] The dead-time compensation device for common-mode voltage suppression PWM of a two-level four-bridge arm converter provided by the embodiment of the present application generalizes the instantaneous current prediction method of a traditional three-phase three-wire system to a three-phase four-wire system, and combines the dead-time compensation method of instantaneous current prediction and active disturbance detection, considers one-beat delay of the control system, and is simple to calculate and fast, and solves the problem of invalidation of common-mode voltage suppression PWM caused by the dead-time effect. The safety and stability of system operation are improved.

[0016] The third aspect of the present application provides an electronic device, comprising: at least one processor; and a memory in communication connection with the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are configured to execute the dead-time compensation method for common-mode voltage suppression PWM of a two-level four-bridge arm converter as described in the above embodiments.

[0017] The fourth aspect of the present application provides a computer readable storage medium having a computer program stored thereon, the program being executed by a processor to implement the dead-time compensation method for common-mode voltage suppression PWM of a two-level four-bridge arm converter as described in the above embodiments.

[0018] The fifth aspect of the present application provides a computer program product comprising a computer program, the computer program being executed by a processor to implement the dead-time compensation method for common-mode voltage suppression PWM of a two-level four-bridge arm converter as described in the above embodiments.

[0019] Additional aspects and advantages of the present application will be in part apparent and in part pointed out hereinafter. BRIEF DESCRIPTION OF DRAWINGS

[0020] The above and / or additional aspects and advantages of the present application will become apparent and more readily appreciated from the following description, taken in conjunction with the following drawings of which:

[0021] Figure 1 A flow chart of a dead-time compensation method for a common-mode voltage suppression PWM of a two-level four-leg converter according to an embodiment of the present application;

[0022] Figure 2 A circuit topology schematic diagram according to a specific embodiment of the present application;

[0023] Figure 3 A partitioning schematic diagram of a common-mode voltage suppression PWM according to a specific embodiment of the present application;

[0024] Figure 4 A waveform schematic diagram of an A-phase output voltage and a bridge-arm output current when a reference voltage vector is located in an "X-" region, X = A, B, C, according to a specific embodiment of the present application;

[0025] Figure 5 A waveform schematic diagram of an A-phase output voltage and a bridge-arm output current when a reference voltage vector is located in an "X+" region, X = A, B, C, according to a specific embodiment of the present application;

[0026] Figure 6 A common-mode voltage and grid-connected current waveform schematic diagram after using an instantaneous current prediction method + dead-time compensation according to a specific embodiment of the present application;

[0027] Figure 7 A common-mode voltage and grid-connected current waveform schematic diagram after using an instantaneous current prediction + active disturbance + dead-time compensation according to a specific embodiment of the present application;

[0028] Figure 8 A flow chart of a dead-time compensation method according to a specific embodiment of the present application;

[0029] Figure 9 A block schematic diagram of a dead-time compensation device for a common-mode voltage suppression PWM of a two-level four-leg converter according to an embodiment of the present application;

[0030] Figure 10 A block schematic diagram of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0031] Embodiments of the present application are described below in detail with reference to the accompanying drawings, wherein the same or similar components or components having the same or similar functions are denoted by the same or similar reference numerals throughout. The embodiments described below by reference to the accompanying drawings are exemplary and are intended to explain the present application, and cannot be understood as limiting the present application.

[0032] A dead-time compensation method of a common-mode voltage suppression PWM of a two-level four-leg converter is described below with reference to the accompanying drawings. In view of the problem of failure of the common-mode voltage suppression PWM caused by the dead-time effect mentioned in the background art, the present application provides a dead-time compensation method of a common-mode voltage suppression PWM of a two-level four-leg converter, in which the current direction at the switching time is predicted, the calculation is simplified by using the characteristics of the common-mode voltage suppression PWM, and a disturbance voltage is actively injected when the current is close to 0 to bias the bridge arm current so that the direction of the bridge arm current is known, at the same time, the one-beat delay of the control system is considered, and the calculation is simple and fast, thereby solving the problem of failure of the common-mode voltage suppression PWM caused by the dead-time effect.

[0033] Specifically, Figure 1 A flowchart of a dead-time compensation method of a common-mode voltage suppression PWM of a two-level four-leg converter provided by an embodiment of the present application is shown in the figure.

[0034] In this embodiment, the circuit topology of the two-level four-leg converter can be as shown in Figure 2

[0035] Specifically, in the circuit topology diagram, point a is the output point of phase A bridge arm of the converter, point b is the output point of phase B bridge arm of the converter, point c is the output point of phase C bridge arm of the converter, point f is the output point of neutral bridge arm of the converter, point O is the midpoint of the DC side of the converter, and point N is the neutral point of the AC side. According to the basic principle of the common-mode voltage suppression PWM of the two-level four-leg converter, the neutral point N of the AC side and the midpoint O of the DC side are always at the same potential, so the circuit model can be greatly simplified.

[0036] As shown in Figure 1 The dead-time compensation method of the common-mode voltage suppression PWM of the two-level four-leg converter includes the following steps:

[0037] In step S101, the current duty cycle, current output current value and current circuit parameters of each phase bridge arm of the two-level four-leg converter are obtained.

[0038] ​Specifically, the two-level four-leg converter has four legs, each leg containing two switching devices such as IGBT or MOSFET, capable of switching between two levels. The duty cycle refers to the ratio of the on-time of the switching device to the entire cycle time within a switching period, which can be completed by the built-in algorithm of the relevant register in the microcontroller or digital signal processor. The bridge arm output current refers to the outgoing current of the converter bridge arm output terminal. In order to obtain the current bridge arm output current value, a current sensor such as a Hall current sensor usually needs to be installed at the output end of the converter. The current sensor will convert the current value into a voltage or digital signal, which can be read by the microcontroller or DSP and further processed and analyzed. Circuit parameters include voltage, resistance, inductance, etc., which have important influence on the performance and stability of the converter. For example, the voltage value can be obtained by voltage sensor or voltage dividing circuit, and the resistance and inductance parameters usually need to be measured and calculated when designing the converter.

[0039] In step S102, the instantaneous current value at the switching action time of each phase bridge arm in the next cycle is predicted according to the current duty cycle of each phase bridge arm, the current output current value and the current circuit parameter.

[0040] It should be noted that due to the complexity and nonlinearity of the two-level four-leg converter, the instantaneous current value at the switching action time of each phase bridge arm needs to be obtained by combining the circuit topology and circuit characteristics.

[0041] Further, according to Kirchhoff's law, combined with Figure 2 The state equation of the four-phase bridge arm output current of the embodiment of the present application is shown in the circuit topology diagram of the two-level four-leg converter.

[0042]

[0043] Where, i a is the output current of phase A leg of the converter, i b is the output current of phase B leg of the converter, i c is the output current of phase C leg of the converter, i f is the output current of neutral leg of the converter, u ao is the voltage between point a and point O, u bo is the voltage between point b and point O, u co is the voltage between point c and point O, u fo is the voltage between point f and point O, u Ca is the voltage on the A-phase filter capacitor, u Cb is the voltage on the B-phase filter capacitor, and u CcL1 is the voltage across the C-phase filter capacitor, L2 is the single-phase inductance of the three-phase inductors (A, B, C) on the AC side, L0 is the inductance of the neutral line inductor on the converter side, and t is time.

[0044] Furthermore, the instantaneous value of the current at the switching moment can be derived. For phase F, it can be seen from the above equation that under steady state, the current must be greater than 0 at the voltage falling edge of phase F, and the current must be less than 0 at the voltage rising edge. Therefore, the dead time of phase F does not produce a dead time effect, and dead time compensation is not required. For the three phases A, B, and C, due to the characteristics of common-mode voltage suppression PWM, the circuit can achieve three-phase decoupling, that is, the state equation of phase A only contains the variables of phase A, and does not contain the variables of phases B, C, and F. Therefore, phases A, B, and C can be calculated separately.

[0045] It should be noted that for common-mode voltage rejection PWM in a two-level four-arm converter, the order of the vectors and the order of current increase / decrease within each switching cycle are related to the sector where the current reference voltage vector is located. This will be discussed in conjunction with... Figure 3 The common-mode voltage suppression PWM of the two-level four-bridge-arm converter is further explained.

[0046] Figure 3 This is a schematic diagram of the partitioning of a common-mode voltage suppression PWM according to an embodiment of the present invention.

[0047] like Figure 3 As shown, phase A is used as an example for explanation; phases B and C are similar. For phase A, when the reference voltage vector is located at... Figure 2 When the reference voltage is in the A+ region (i.e., the upper half-plane), the modulation wave of phase A is "Λ"-shaped, with the peak located in the center of the switching cycle and the trough on both sides. This results in a "concave" shaped output voltage for phase A, with the high level distributed on both sides of the switching cycle and the low level located in the center. Conversely, when the reference voltage is in the A- region (lower half-plane), the modulation wave of phase A is "V"-shaped, with the peak located on both sides of the switching cycle and the trough in the middle. This results in a "convex" shaped output voltage for phase A, with the low level distributed on both sides of the switching cycle and the high level located in the center. The current increase and decrease trends differ in these two cases, and will be discussed separately below.

[0048] Furthermore, when the reference voltage vector is located in the "X-" region, where X = A, B, C, the waveforms of the A-phase output voltage and the bridge arm output current are as follows: Figure 4 As shown in the figure. The dashed line indicates the boundary line of the switching cycle, α(n) is the duty cycle of the nth cycle, and i(n) is the current sampling value at the beginning of the nth cycle. rs (n) is the current at the rising edge of the voltage (that is, the current when the lower transistor is turned off and the upper transistor is turned on), i fl(n) is the current at the voltage falling edge (i.e. the current at the moment when the lower transistor is turned on and the upper transistor is turned off). Let the current at the moment be the nth cycle, thus the duty cycle of the (n+1)th cycle and before, the current value before the nth cycle is known, and the current value after the nth cycle is unknown, which is marked with "*" in the figure, representing the need to calculate the prediction.

[0049] Further, by formula (1) and formula (2), the current prediction value at the end of the nth cycle can be obtained:

[0050]

[0051] Where, T sw is the switching period, U dc is the DC bus voltage. Then, according to formula (3), the current instantaneous value at the voltage rising edge and falling edge of the next switching cycle can be obtained:

[0052]

[0053] Further, when the reference voltage vector is located in the "X+" region, X=A, B, C, the waveforms of the A-phase output voltage and the bridge arm output current are as shown in Figure 5 . Figure 5 is the A-phase output voltage and current waveform diagram when the reference voltage is located in the A+ region. According to formula (4), the current instantaneous value at the voltage rising edge and falling edge of the next switching cycle can be calculated:

[0054]

[0055] Thus, the instantaneous current value at the switching moment of the next cycle of a phase can be predicted.

[0056] In step S103, the target bridge arm is selected based on the absolute value of the instantaneous current value at the switching action moment of each phase bridge arm, and a disturbance voltage is injected to the target bridge arm to bias the bridge arm current, so that the instantaneous current value at the switching action moment of each phase bridge arm is greater than a preset current threshold, and the dead zone compensation is performed according to the current direction corresponding to the instantaneous current value at the switching action moment of each phase bridge arm.

[0057] Further, in some embodiments, selecting the target bridge arm based on the absolute value of the instantaneous current value at the switching action moment of each phase bridge arm comprises: sequentially judging whether the absolute value of the instantaneous current value at the switching action moment of each phase bridge arm is less than a preset current threshold; and taking the bridge arm with the absolute value of the instantaneous current value less than the preset current threshold as the target bridge arm.

[0058] It should be noted that since instantaneous current values ​​can be either positive or negative, the absolute value of the monitored instantaneous current needs to be taken to eliminate the influence of direction. This way, regardless of the current direction, comparisons and selections can be made based on its magnitude. If the absolute value of the instantaneous current in a certain bridge arm is less than a preset current threshold, then that bridge arm is considered a target bridge arm. This means that under the current control strategy or operating conditions, the current level of this bridge arm is low, requiring active biasing. This method can accurately identify bridge arms with low current levels in a multiphase bridge arm system, thereby achieving effective current control and optimization.

[0059] Furthermore, in some embodiments, injecting a disturbance voltage to bias the arm current of the target arm includes: determining the current range in which the target arm is located; injecting a first additional disturbance vector into the reference voltage vector in the direction of a first additional disturbance vector in at least a first switching cycle and injecting a second additional disturbance vector into the reference voltage vector in at least a second switching cycle, based on the current range in which the target arm is located, wherein the first additional disturbance vector and the second additional disturbance vector are opposite.

[0060] Specifically, the current range can be divided according to the specific needs and conditions of the system, such as low current range, medium current range, and high current range. The purpose of determining the current range is to control the current more precisely and to adopt different control strategies for different current levels. Based on the current range of the target bridge arm, the additional disturbance vector injected into the reference voltage vector in multiple switching cycles can be determined. The first and second additional disturbance vectors are opposite in direction to balance current fluctuations and reduce harmonic components. If the target bridge arm is in the high current range, a larger disturbance vector may be needed to reduce the current level; while if it is in the low current range, a smaller disturbance vector may be needed, or the original control strategy may remain unchanged. Simultaneously, by injecting disturbance vectors in opposite directions, the current waveform can be further smoothed, reducing fluctuations and distortion.

[0061] Furthermore, such as Figure 6 As shown, Figure 6 (a) shows the voltage and current waveforms of the dead-zone-free compensation algorithm. Figure 6 (b) shows the voltage and current waveforms with added instantaneous current prediction.

[0062] It should be noted that due to unavoidable errors in the system, such as errors in sampling current, circuit parameters, and various interferences, current prediction cannot be completely accurate. Therefore, when the current approaches zero, the prediction direction may be incorrect, leading to incorrect current direction judgment, erroneous dead-zone compensation, and failure to eliminate or even causing common-mode voltage spikes. Therefore, when the predicted current value of the current ripple prediction method of this invention satisfies that its absolute value is less than the threshold current i... thIf the prediction is not accurate enough and the direction of the current cannot be determined, then an active disturbance detection method is needed.

[0063] First, determine the threshold current i based on the actual conditions of the system. th Its specific value is affected by various factors such as current measurement accuracy, interference conditions, and system parameter accuracy, representing the maximum error in predicting the current. Taking phase A as an example: when any predicted current of phase A (including i...) fl and i rs , uniformly denoted as i prid Satisfying relation 0 prid th Then, for the next N1 consecutive switching cycles, a positive additional disturbance vector V is injected into the reference voltage vector. irpt This ensures that the predicted current value at the switching time of the next N1 cycles is always greater than i. th Then, for N2 consecutive switching cycles, a negative additional disturbance vector -N1 / N2*V is injected into the reference voltage vector. irpt This causes the current to quickly cross zero and become less than -i. th Conversely, when any predicted current in phase A satisfies the relationship -i th prid When <0, a negative additional disturbance vector -V is injected into the reference voltage vector for N1 consecutive switching cycles. irpt This ensures that the predicted current value at the switching time of the next N1 cycles is always less than -i. th Then, for N2 consecutive switching cycles, a positive additional disturbance vector N1 / N2*V is injected into the reference voltage vector. irpt This causes the current to quickly cross zero and become less than -i. th .

[0064] Specifically, N2 should be as small as possible within the range where the PWM modulator does not exceed the linear modulation ratio, ideally set to 1. After determining N2, N1 needs to satisfy the relationship shown in formula (5):

[0065]

[0066] Among them, I nom It is the effective value of the fundamental current under the current operating conditions. In order to minimize the impact of the disturbance on the power quality of the power grid, N1 should be taken as the smallest integer that satisfies equation (5).

[0067] Furthermore, make the disturbance vector V irpt The direction is the positive direction of the α axis, and the vector length satisfies the inequality shown in formula (6):

[0068]

[0069] To minimize the impact of disturbances on the power quality of the power grid, V​​​irpt N2 should be selected as the minimum value of full formula (6). After the above design is completed, if saturation occurs in the modulation, N2 is increased, and the above design process is repeated until saturation no longer occurs in the modulation.

[0070] Further, in the case of simultaneously using the instantaneous current prediction method and the active disturbance detection method, the parameters in the active disturbance detection are reasonably set, such as Figure 7 as shown in FIG. 1, Figure 7 (a) in FIG. 1 is a voltage and current waveform diagram of a dead-time compensation algorithm without dead-time compensation, Figure 7 (b) in FIG. 1 is a voltage and current waveform diagram in which the instantaneous current prediction and the active disturbance method are added. After the dead-time compensation is performed, the common-mode voltage spike caused by the dead-time effect can be completely eliminated, and the leakage current is greatly inhibited, so that the low-impedance grounding system is not shut down due to the leakage current protection. After the active disturbance detection method is used, the grid-connected current quality is slightly reduced compared to the case of using only the instantaneous current prediction method, but the current quality is still improved compared to the case before any dead-time compensation algorithm is used. Therefore, it can be considered that the instantaneous current prediction + active disturbance detection method of the present application can eliminate the common-mode voltage spike caused by the dead-time effect without affecting the grid-connected current quality.

[0071] It should be noted that the dead-time compensation method based on active disturbance provided by the embodiments of the present application is an optional method, not a mandatory method.

[0072] In order to enable a person skilled in the art to better understand the dead-time compensation method of the two-level four-bridge arm converter common-mode voltage suppression PWM of the embodiments of the present application, further description will be made in combination with specific implementation.

[0073] Figure 8 The dead-time compensation method flowchart provided for the specific embodiments of the present application includes the following steps:

[0074] In step S801, the three-phase duty cycles are obtained according to the position of the current reference voltage vector, and the current instantaneous values at the switching action time are obtained in combination with the sampled current values and the circuit parameter model.

[0075] In step S802, it is judged whether the instantaneous current is less than the threshold value. If the instantaneous current is less than the threshold value at this time, step S803 is executed. If the instantaneous current is greater than the threshold value at this time, step S804 is executed.

[0076] In step S803, since the instantaneous current is less than the threshold value at this time, the active disturbance detection method is added, and the bridge arm current is biased by actively injecting a disturbance voltage, so that the current amplitude is increased and the direction is controllable.

[0077] In step S804, the current direction is judged.

[0078] In step S805, dead-time compensation is performed, and three-phase modulation waves are output.

[0079] Thus, according to the current direction at the switching time, the dead-time effect compensation can be completed, and the common-mode voltage spike can be suppressed. The dead-time compensation of the common-mode voltage suppression PWM of the two-level four-leg converter according to the present application can effectively suppress the common-mode voltage spike caused by the dead-time effect, improve the effect of common-mode voltage suppression, and does not require additional hardware costs.

[0080] Further, in some embodiments, after sequentially judging whether the absolute value of the instantaneous current value at the switching action time of each phase leg is less than the preset current threshold, the method further comprises: obtaining the current direction corresponding to the leg whose absolute value of the instantaneous current value is greater than or equal to the preset current threshold; and performing dead-time compensation according to the current direction corresponding to the leg whose absolute value of the instantaneous current value is greater than or equal to the preset current threshold.

[0081] The purpose of the dead-time compensation is to adjust the switching time of the switching device to eliminate the current waveform distortion caused by factors such as switching delay and conduction voltage drop. Specifically, if the current direction is positive (for example, flowing from the power supply to the load), the corresponding switching device may need to be turned on in advance to ensure that the current can flow smoothly through the bridge arm. Conversely, if the current direction is negative (for example, flowing from the load back to the power supply), the corresponding switching device may need to be turned off with a delay to avoid the current waveform from being truncated or distorted.

[0082] It should be noted that the preset current threshold can be set artificially or determined through experimental data, which is not limited here.

[0083] The dead-time compensation method for common-mode voltage suppression PWM of a two-level four-leg converter according to the embodiments of the present application generalizes the instantaneous current prediction method of the traditional three-phase three-wire system to a three-phase four-wire system, and combines the dead-time compensation method of instantaneous current prediction and active disturbance detection, considers the one-beat delay of the control system, and is simple and fast to calculate, solves the problem of invalid common-mode voltage suppression PWM caused by the dead-time effect, and improves the safety and stability of system operation.

[0084] Next, the dead-time compensation device for common-mode voltage suppression PWM of a two-level four-leg converter according to the embodiments of the present application is described with reference to the accompanying drawings.

[0085] Figure 9 is a block schematic diagram of the dead-time compensation device for common-mode voltage suppression PWM of a two-level four-leg converter according to the embodiments of the present application.

[0086] As Figure 9 shown, the dead-time compensation device for common-mode voltage suppression PWM of a two-level four-leg converter 10 comprises an acquisition module 100, a calculation module 200, and a control module 300.

[0087] The acquisition module 100 is configured to acquire a current duty cycle, a current output current value and a current circuit parameter of each phase arm of the two-level four-arm converter; the calculation module 200 is configured to obtain an instantaneous current value at a switching action time of each phase arm according to the current duty cycle, the current output current value and the current circuit parameter of each phase arm; and the control module 300 is configured to select a target arm based on an absolute value of the instantaneous current value at the switching action time of each phase arm, and inject a disturbance voltage into the target arm to bias the arm current until the instantaneous current value at the switching action time of each phase arm is greater than a preset current threshold, and perform dead-time compensation according to a current direction corresponding to the instantaneous current value at the switching action time of each phase arm.

[0088] Further, in some embodiments, the control module 300 is specifically configured to: sequentially determine whether the absolute value of the instantaneous current value at the switching action time of each phase arm is less than the preset current threshold; and take the arm with the absolute value of the instantaneous current value less than the preset current threshold as the target arm.

[0089] Further, in some embodiments, after sequentially determining whether the absolute value of the instantaneous current value at the switching action time of each phase arm is less than the preset current threshold, the control module 300 is further configured to: acquire a current direction corresponding to the arm with the absolute value of the instantaneous current value greater than or equal to the preset current threshold; and perform dead-time compensation according to the current direction corresponding to the arm with the absolute value of the instantaneous current value greater than or equal to the preset current threshold.

[0090] Further, in some embodiments, the control module 300 is further configured to: determine a current interval in which the output current of the target arm is located; and inject a first additional disturbance vector into the reference voltage vector in at least one first switching period according to a direction of the current interval in which the target arm is located, and inject a second additional disturbance vector into the reference voltage vector in at least one second switching period, wherein the first additional disturbance vector and the second additional disturbance vector are opposite.

[0091] It should be noted that the foregoing explanation and description of the embodiment of the dead-time compensation method for the common-mode voltage suppression PWM of the two-level four-arm converter also apply to the dead-time compensation device for the common-mode voltage suppression PWM of the two-level four-arm converter of the embodiment, which will not be described here again.

[0092] The dead-time compensation device for the common-mode voltage suppression PWM of the two-level four-arm converter provided by the embodiment of the application extends the instantaneous current prediction method of the conventional three-phase three-wire system to the three-phase four-wire system, and combines the dead-time compensation method of instantaneous current prediction and active disturbance detection, considers one-beat delay of the control system, and is simple to calculate and fast, solves the problem of invalidation of the common-mode voltage suppression PWM caused by the dead-time effect, and improves the safety and stability of system operation.

[0093] Figure 10 A structural schematic diagram of an electronic device provided by an embodiment of the present application is shown. The electronic device can include:

[0094] The memory 1001, the processor 1002 and the computer program stored in the memory 1001 and executable on the processor 1002.

[0095] The processor 1002 implements the dead-time compensation method of the two-level four-bridge converter common-mode voltage suppression PWM provided in the above embodiments when executing the program.

[0096] Further, the electronic device further includes:

[0097] The communication interface 1003 is used for communication between the memory 1001 and the processor 1002.

[0098] The memory 1001 is used to store the computer program executable on the processor 1002.

[0099] The memory 1001 can include a high-speed RAM memory, and can also include a non-volatile memory, for example, at least one disk memory.

[0100] If the memory 1001, the processor 1002 and the communication interface 1003 are independently implemented, the communication interface 1003, the memory 1001 and the processor 1002 can be connected to each other through a bus and complete communication between each other. The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 10 In the figure, only one thick line is used to represent, but it does not mean that there is only one bus or one type of bus.

[0101] Optionally, in a specific implementation, if the memory 1001, the processor 1002 and the communication interface 1003 are integrated on a chip, the memory 1001, the processor 1002 and the communication interface 1003 can complete communication between each other through an internal interface.

[0102] The processor 1002 can be a central processing unit (CPU), or an application specific integrated circuit (ASIC), or one or more integrated circuits configured to perform the operations of the embodiments of the application.

[0103] The embodiments of the application further provide a computer readable storage medium, which stores a computer program, and the program is executed by a processor to implement the dead-time compensation method for the two-level four-leg converter common-mode voltage suppression PWM as described above.

[0104] The embodiments of the application further provide a computer program product, which comprises a computer program, and the computer program is executed by a processor to implement the dead-time compensation method for the two-level four-leg converter common-mode voltage suppression PWM as described above.

[0105] In the description of the present specification, the description of the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" and the like means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any appropriate manner in any one or N embodiments or examples. In addition, the person skilled in the art can combine and combine the different embodiments or examples described in the present specification and the features of the different embodiments or examples without contradiction.

[0106] In addition, the terms "first", "second" are only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with "first", "second" can explicitly or implicitly include at least one of the features. In the description of the present application, the meaning of "N" is at least two, for example, two, three, etc., unless otherwise specifically limited.

[0107] Any process or method descriptions in flow charts or described elsewhere herein can be understood as representing one or more steps of a computer readable medium comprising executable instructions for performing custom logic functions or processes, and the scope of preferred embodiments of the present application includes additional implementation in which the functions described are performed in different orders, including simultaneous performance of the functions described, or in reverse order, or in a different order, depending on the functionality involved, as will be understood by those skilled in the art.

[0108] It should be understood that portions of the application can be implemented in hardware, software, firmware, or combinations thereof. In the above embodiments, the N steps or methods can be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. If implemented in hardware, and in another embodiment, any of the following technologies, known in the art, or their combinations can be used: discrete logic circuitry having logic gates for implementing logic functions on data signals, application specific integrated circuits having appropriate combinational logic gates, etc.

[0109] Those skilled in the art can understand that all or part of the steps carried out by the above-mentioned embodiment methods can be completed by programs instructing related hardware, and the programs can be stored in a computer readable storage medium. When the program is executed, it includes one of the steps of the method embodiment or a combination thereof.

Claims

1. A dead-time compensation method for common-mode voltage suppression PWM in a two-level four-bridge-arm converter, characterized in that, Includes the following steps: Obtain the current duty cycle, current output current value, and current circuit parameters of each phase arm of the two-level four-arm converter; Predict the instantaneous current value at the switching action moment of each phase bridge arm in the next cycle based on the current duty cycle, current output current value and current circuit parameters of each phase bridge arm. Target bridge arms are selected based on the absolute value of the instantaneous current value at the switching action moment of each phase bridge arm in the next cycle, and a disturbance voltage is injected into the target bridge arm to bias the bridge arm current, so that the instantaneous current value at the switching action moment of each phase bridge arm is greater than a preset current threshold. Dead zone compensation is performed according to the current direction corresponding to the instantaneous current value at the switching action moment of each phase bridge arm. The step of selecting target bridge arms based on the absolute value of the instantaneous current value at the switching action time of each phase bridge arm includes: sequentially determining whether the absolute value of the instantaneous current value at the switching action time of each phase bridge arm is less than the preset current threshold; selecting bridge arms whose absolute value of the instantaneous current value is less than the preset current threshold as the target bridge arms; the step of injecting a disturbance voltage to bias the bridge arm current of the target bridge arm includes: determining the current range in which the target bridge arm is located; determining, based on the current range in which the target bridge arm is located, at least one first additional disturbance vector injected into the reference voltage vector within a first switching cycle, and simultaneously determining at least one second additional disturbance vector injected into the reference voltage vector within a second switching cycle, wherein the first additional disturbance vector and the second additional disturbance vector are opposite.

2. The method according to claim 1, characterized in that, After sequentially determining whether the absolute value of the instantaneous current at the moment of switching action of each phase bridge arm is less than the preset current threshold, the method further includes: Obtain the current direction corresponding to the bridge arm whose absolute value of the instantaneous current is greater than or equal to the preset current threshold; Dead zone compensation is performed based on the current direction corresponding to the bridge arm whose absolute value of the instantaneous current is greater than or equal to the preset current threshold.

3. A dead-time compensation device for common-mode voltage suppression PWM in a two-level four-bridge-arm converter, characterized in that, The device includes: The acquisition module is used to acquire the current duty cycle, current output current value and current circuit parameters of each phase arm of the two-level four-arm converter; The calculation module is used to predict the instantaneous current value at the switching action moment of each phase arm in the next cycle based on the current duty cycle, current output current value and current circuit parameters of each phase arm. The control module is used to filter out target bridge arms based on the absolute value of the instantaneous current value at the switching action time of each phase bridge arm in the next cycle, and inject a disturbance voltage to bias the bridge arm current to the target bridge arm so that the instantaneous current value at the switching action time of each phase bridge arm is greater than a preset current threshold, and perform dead zone compensation according to the current direction corresponding to the instantaneous current value at the switching action time of each phase bridge arm. Specifically, the control module is used to: sequentially determine whether the absolute value of the instantaneous current at the switching action moment of each phase bridge arm is less than the preset current threshold; and designate the bridge arm whose absolute value of the instantaneous current is less than the preset current threshold as the target bridge arm; the control module is also used to: determine the current range in which the target bridge arm is located; and, based on the current range in which the target bridge arm is located, determine at least one first additional disturbance vector injected into the reference voltage vector within a first switching cycle, and simultaneously determine at least one second additional disturbance vector injected into the reference voltage vector within a second switching cycle, wherein the first additional disturbance vector and the second additional disturbance vector are opposite.

4. The apparatus according to claim 3, characterized in that, After sequentially determining whether the absolute value of the instantaneous current at the moment of switching action of each phase bridge arm is less than the preset current threshold, the control module is further configured to: Obtain the current direction corresponding to the bridge arm whose absolute value of the instantaneous current is greater than or equal to the preset current threshold; Dead zone compensation is performed based on the current direction corresponding to the bridge arm whose absolute value of the instantaneous current is greater than or equal to the preset current threshold.

5. An electronic device, characterized in that, include: The memory, the processor, and the computer program stored in the memory and executable on the processor, the processor executing the program to implement the dead-time compensation method for common-mode voltage suppression PWM of a two-level four-arm converter as described in any one of claims 1-2.

6. A computer-readable storage medium having a computer program stored thereon, characterized in that, The program is executed by the processor to implement the dead-time compensation method for common-mode voltage suppression PWM of a two-level four-arm converter as described in any one of claims 1-2.

7. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the dead-time compensation method for common-mode voltage suppression PWM of a two-level four-bridge-arm converter as described in any one of claims 1-2.

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