A method and device for compensating bandwidth flatness of a large bandwidth signal source based on FPGA

Abstract

The present application relates to the field of signal processing technology, and in particular to a method and device for compensating the bandwidth flatness of a large bandwidth signal source based on FPGA, wherein the signal data of the required bandwidth is played through an analog front end based on FPGA, and its original amplitude-frequency response curve is measured through a spectrum analyzer; the amplitude-frequency response of the compensation filter is calculated and the compensation filter coefficient is obtained, and the compensation filter coefficient is quantified; the quantized compensation filter coefficient is sent to the FPGA to compensate the signal data, and then played through an analog front end, and the first pre-compensation amplitude-frequency response curve within the Nyquist frequency range is measured through a spectrum analyzer; and the frequency range exceeding the set bandwidth flatness is determined according to the first pre-compensation amplitude-frequency response curve, and a separate compensation is performed. Thus, the influence of the nonlinearity of DAC devices and related circuits is overcome, the amplitude-frequency response of the large bandwidth signal source is effectively compensated, the signal flatness within the bandwidth is improved, and the system stability and reliability are enhanced.

Description

Technical Field

[0001] The present application relates to the field of signal processing technology, and in particular to a method and device for compensating bandwidth flatness of a large-bandwidth signal source based on an FPGA (field programmable gate array). Background Art

[0002] Currently, broadband signal direct generation technology is used in the fields of large bandwidth signal sources and signal simulators, and the signal bandwidth often reaches several GHz or higher. However, since the high-speed DAC (digital-to-analog converter) device used in the broadband signal direct generator adopts a zero-order holder in its implementation, there is an inherent fading in its amplitude-frequency response characteristics, resulting in poor amplitude consistency of the broadband signal when it is output from the DAC; DAC device manufacturers have added configurable hardware units such as digital interpolation and digital filtering inside it, which can not only increase the DAC output conversion rate, but also effectively reduce the Sinc function fading, without adding processing outside the DAC device, and there is no need to increase the data transmission rate between devices.

[0003] However, the method of using digital interpolation technology to increase the DAC conversion rate only reduces the impact of Sinc fading to an acceptable level, and does not eliminate the Sinc fading phenomenon from the generation mechanism. It also makes the hardware PCB design of the signal source more difficult and increases power consumption, and still cannot meet the bandwidth and flatness requirements of the signal. Summary of the invention

[0004] In order to overcome the deficiencies in the prior art, the present application provides a method and device for compensating bandwidth flatness of a large-bandwidth signal source based on FPGA, which can effectively compensate the amplitude-frequency response of the large-bandwidth signal source and improve the signal flatness within the bandwidth.

[0005] In a first aspect, the present application provides a method for compensating bandwidth flatness of a large bandwidth signal source based on FPGA, the method comprising the following steps:

[0006] Based on FPGA, the signal data with required bandwidth is played through the analog front end, and the original amplitude-frequency response curve within the Nyquist frequency range is measured by the spectrum analyzer; wherein the required bandwidth of the signal data includes the set bandwidth range and bandwidth flatness; the original amplitude-frequency response curve represents the signal strength in terms of voltage value;

[0007] Calculating the amplitude-frequency response of the compensation filter; wherein, within a set bandwidth range, obtaining the fitting amplitude-frequency response of the original signal according to the original amplitude-frequency response curve, and determining the amplitude-frequency response of the compensation filter based on the fitting amplitude-frequency response of the original signal; outside the set bandwidth range, obtaining the amplitude-frequency response of the compensation filter according to a preset attenuation strategy;

[0008] Acquire compensation filter coefficients according to the calculated amplitude-frequency response of the compensation filter, and quantize the compensation filter coefficients;

[0009] After the quantized compensation filter coefficients are sent to the FPGA to compensate the signal data, they are played through the analog front end, and the first pre-compensation amplitude-frequency response curve within the Nyquist frequency range is measured by the spectrum analyzer; and the frequency range that exceeds the set bandwidth flatness is determined according to the first pre-compensation amplitude-frequency response curve, and is compensated separately.

[0010] In a possible implementation, the method further includes the following steps:

[0011] The amplitude-frequency response of the compensation filter is recalculated to obtain new quantized compensation filter coefficients; the signal data is compensated and played using the new quantized compensation filter coefficients in the FPGA, and a second pre-compensation amplitude-frequency response curve within the Nyquist frequency range is measured using a spectrum analyzer until the second pre-compensation amplitude-frequency response curve does not exceed the frequency range of the set bandwidth flatness.

[0012] In a possible implementation manner, the amplitude-frequency response of the compensation filter is determined based on the fitted amplitude-frequency response of the original signal by the following formula:

[0013]

[0014] in, To compensate the amplitude-frequency response of the filter, is the fitted amplitude-frequency response of the original signal.

[0015] In a possible implementation manner, obtaining compensation filter coefficients according to the calculated amplitude-frequency response of the compensation filter includes the following steps:

[0016] Based on the frequency sampling method, the amplitude-frequency response of the compensation filter is linearly interpolated onto a dense grid to obtain the amplitude-frequency response value on the dense grid;

[0017] The amplitude-frequency response values ​​on the dense grid are subjected to inverse Fourier transform to obtain a time domain sequence, and the time domain sequence is multiplied point by point with the Hamming window function to obtain compensation filter coefficients hcomp(i) of order N, where i = 1, 2, 3, ..., N+1.

[0018] In a possible implementation manner, quantizing the compensation filter coefficients comprises the following steps:

[0019] Normalizing the compensation filter coefficients;

[0020] The normalized compensation filter coefficients are quantized to the quantization bit number of the DAC by the following formula:

[0021]

[0022]

[0023] Among them, bit is the quantization bit number of DAC, round is the rounding function to the nearest integer, and max is the sequence maximum value function.

[0024] In a possible implementation manner, determining the frequency range exceeding the set bandwidth flatness according to the first pre-compensation amplitude-frequency response curve and performing separate compensation includes the following steps:

[0025] If it is determined according to the first pre-compensation amplitude-frequency response curve that the amplitude in the first frequency range is convex, controlling the amplitude-frequency response of the first frequency range of the corresponding compensation filter to be reduced;

[0026] If it is determined according to the first pre-compensation amplitude-frequency response curve that the amplitude is recessed in the second frequency range, the amplitude-frequency response of the corresponding compensation filter in the second frequency range is controlled to increase.

[0027] In a possible implementation, swept frequency signal data with the required bandwidth is generated inside the FPGA, or quantized swept frequency signal data with the required bandwidth is received and sent to the FPGA by external software.

[0028] In a second aspect, the present application provides a large bandwidth signal source bandwidth flatness compensation device based on FPGA, the device comprising:

[0029] A measurement module is used to play the signal data of the required bandwidth through the analog front end based on FPGA, and measure the original amplitude-frequency response curve within the Nyquist frequency range through a spectrum analyzer; wherein the required bandwidth of the signal data includes a set bandwidth range and bandwidth flatness; and the original amplitude-frequency response curve represents the signal strength in terms of voltage value;

[0030] A calculation module, used to calculate the amplitude-frequency response of the compensation filter; wherein, within a set bandwidth range, the fitting amplitude-frequency response of the original signal is obtained according to the original amplitude-frequency response curve, and the amplitude-frequency response of the compensation filter is determined based on the fitting amplitude-frequency response of the original signal; outside the set bandwidth range, the amplitude-frequency response of the compensation filter is obtained according to a preset attenuation strategy;

[0031] A quantization module, used to obtain compensation filter coefficients according to the calculated amplitude-frequency response of the compensation filter, and quantize the compensation filter coefficients;

[0032] The pre-compensation module is used to send the quantized compensation filter coefficients to the FPGA to compensate the signal data, play it through the analog front end, and measure the first pre-compensation amplitude-frequency response curve within the Nyquist frequency range through the spectrum analyzer; and determine the frequency range that exceeds the set bandwidth flatness according to the first pre-compensation amplitude-frequency response curve, and compensate it separately.

[0033] In a third aspect, the present application provides an electronic device, comprising: a processor, a memory and a bus, wherein the memory stores machine-readable instructions executable by the processor, and when the electronic device is running, the processor and the memory communicate through the bus, and when the machine-readable instructions are executed by the processor, the steps of the FPGA-based large-bandwidth signal source bandwidth flatness compensation method as described in any one of the first aspects are performed.

[0034] In a fourth aspect, the present application provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the steps of the FPGA-based large-bandwidth signal source bandwidth flatness compensation method as described in any one of the first aspects are executed.

[0035] The present embodiment provides a method and device for compensating the bandwidth flatness of a large bandwidth signal source based on FPGA. Based on FPGA, the signal data of the required bandwidth is played through the analog front end, and the original amplitude-frequency response curve within the Nyquist frequency range is measured through the spectrum analyzer; the amplitude-frequency response of the compensation filter is calculated; the compensation filter coefficient is obtained according to the calculated amplitude-frequency response of the compensation filter, and the compensation filter coefficient is quantized; the quantized compensation filter coefficient is sent to the FPGA to compensate the signal data, and then played through the analog front end, and the first pre-compensation amplitude-frequency response curve within the Nyquist frequency range is measured through the spectrum analyzer; and the frequency range exceeding the set bandwidth flatness is determined according to the first pre-compensation amplitude-frequency response curve, and a separate compensation is performed. In this way, the influence of the nonlinearity of the DAC device and the related circuits is overcome, the amplitude-frequency response of the large bandwidth signal source is effectively compensated, the signal flatness within the bandwidth is improved, and the system stability and reliability are enhanced. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0037] Figure 1 A flow chart of a method for compensating bandwidth flatness of a large bandwidth signal source based on FPGA according to an embodiment of the present application is shown;

[0038] Figure 2 It shows a schematic diagram of an ideal amplitude-frequency response of signal data requiring bandwidth according to an embodiment of the present application;

[0039] Figure 3 A schematic diagram showing an original amplitude-frequency response curve according to an embodiment of the present application is shown;

[0040] Figure 4 A schematic diagram showing the first pre-compensation amplitude-frequency response curve according to an embodiment of the present application is shown;

[0041] Figure 5 A schematic diagram showing the final amplitude-frequency response of signal data requiring bandwidth according to an embodiment of the present application is shown;

[0042] Figure 6 A schematic diagram of the structure of a bandwidth flatness compensation device for a large bandwidth signal source based on FPGA according to an embodiment of the present application is shown;

[0043] Figure 7 A structural block diagram of an electronic device described in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0044] To make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. It should be understood that the drawings in the present application only serve the purpose of explanation and description and are not used to limit the scope of protection of the present application. In addition, it should be understood that the schematic drawings are not drawn in real proportion. The flowchart used in this application shows the operations implemented according to some embodiments of the present application. It should be understood that the operations of the flowchart can be implemented out of sequence, and the steps without logical context can be reversed in order or implemented simultaneously. In addition, those skilled in the art can add one or more other operations to the flowchart under the guidance of the content of the present application, or remove one or more operations from the flowchart.

[0045] In addition, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application claimed for protection, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present application.

[0046] It should be noted that the term "comprising" will be used in the embodiments of the present application to indicate the existence of the features declared thereafter, but does not exclude the addition of other features.

[0047] In view of the technical problems raised by the background technology, the present application provides a method and device for compensating bandwidth flatness of a large-bandwidth signal source based on FPGA, which can effectively compensate the amplitude-frequency response of the large-bandwidth signal source and improve the signal flatness within the bandwidth.

[0048] In one embodiment, see the attached specification Figure 1 The present application provides a method for compensating bandwidth flatness of a large bandwidth signal source based on FPGA, the method comprising the following steps:

[0049] S1. Based on FPGA, the signal data with the required bandwidth is played through the analog front end, and the original amplitude-frequency response curve within the Nyquist frequency range is measured by the spectrum analyzer; wherein the required bandwidth of the signal data includes the set bandwidth range and bandwidth flatness; the original amplitude-frequency response curve represents the signal strength in terms of voltage value;

[0050] S2. Calculate the amplitude-frequency response of the compensation filter; wherein, within the set bandwidth range, obtain the fitting amplitude-frequency response of the original signal according to the original amplitude-frequency response curve, and determine the amplitude-frequency response of the compensation filter based on the fitting amplitude-frequency response of the original signal; outside the set bandwidth range, obtain the amplitude-frequency response of the compensation filter according to a preset attenuation strategy;

[0051] S3, obtaining compensation filter coefficients according to the calculated amplitude-frequency response of the compensation filter, and quantizing the compensation filter coefficients;

[0052] S4. Send the quantized compensation filter coefficients to the FPGA to compensate the signal data, play them through the analog front end, and measure the first pre-compensation amplitude-frequency response curve within the Nyquist frequency range through the spectrum analyzer; and determine the frequency range that exceeds the set bandwidth flatness according to the first pre-compensation amplitude-frequency response curve, and compensate it separately.

[0053] In step S1, it is first explained that the signal data with the required bandwidth as the signal source can be the swept frequency signal data with the required bandwidth generated inside the FPGA (field programmable gate array), or it can be the quantized swept frequency signal data generated and sent by the software. For example, the signal flatness of the swept frequency signal within the bandwidth is required to be ±0.1dB. Then, the FPGA plays the signal data through the analog front end, and connects the analog output signal to the spectrum analyzer. The spectrum analyzer performs frequency domain analysis on the input analog signal, measures the amplitude value corresponding to each frequency point of the swept frequency signal within the Nyquist frequency range, and draws the original amplitude-frequency response curve S (w). Among them, the amplitude-frequency response data of the broadband signal source is obtained, and the signal strength is generally expressed in power value. In this application, the signal strength expressed in power value is converted into the original amplitude-frequency response curve H (w) expressed in voltage value.

[0054] Among them, Nyquist frequency is an important concept related to the sampling frequency, which is generally half of the sampling frequency. Within this range, the frequency domain characteristics of the signal after being processed by the entire system can be accurately reflected. This should be a technical means well known to those skilled in the art, and will not be elaborated here. By drawing the original amplitude-frequency response curve S (w), the amplitude variation of the output signal of the broadband signal source at different frequencies can be intuitively displayed. By analyzing the curve, it can be determined whether the signal source meets the design requirements, such as whether the flatness of the signal meets expectations, thereby providing a basis for subsequent optimization of the signal source performance.

[0055] In step S2, when calculating the amplitude-frequency response Hcomp(w) of the compensation filter, there are two cases. One case is to make the amplitude-frequency response Hcomp(w) of the compensation filter and the fitting amplitude-frequency response of the original signal satisfy a specific calculation formula within a set bandwidth, with the purpose of correcting the undesirable amplitude-frequency characteristics of the original signal within the bandwidth through the compensation filter to achieve the desired flatness and other performance requirements. In one embodiment, the amplitude-frequency response of the compensation filter is determined based on the fitting amplitude-frequency response of the original signal by the following formula:

[0056]

[0057] in, To compensate the amplitude-frequency response of the filter; is the fitted amplitude-frequency response of the original signal, which is obtained by fitting the original amplitude-frequency response curve obtained in the previous step S1, for example, by using polynomial fitting, least squares fitting, etc. to determine its function expression. In the specific calculation, for each frequency point w within the bandwidth range, the corresponding H(w) is substituted into the above calculation formula to calculate the corresponding Hcomp (w) value.

[0058] Another situation is that outside the set bandwidth range, the bandwidth range belongs to the stopband area of ​​the compensation filter. The preset attenuation strategy requires that its amplitude-frequency response design is reasonable. Generally, the attenuation of the stopband is 30-60dB lower than the passband, thereby obtaining the amplitude-frequency response of the FIR (Finite Impulse Response) compensation filter. That is, within the stopband, the signal will be greatly attenuated after passing through the compensation filter to avoid interference with signals in other frequency bands.

[0059] In step S3, when obtaining the compensation filter coefficients according to the calculated amplitude-frequency response of the compensation filter, first, the amplitude-frequency response of the compensation filter is linearly interpolated to a dense grid based on the frequency sampling method to obtain the amplitude-frequency response value on the dense grid. This is because the original given amplitude-frequency response is relatively sparse in frequency point distribution and cannot well reflect the detailed frequency characteristics in the entire frequency domain. By extending it to a dense grid through linear interpolation, it can more accurately describe the desired filter amplitude-frequency response and provide a richer data basis for subsequent frequency sampling and accurate calculation of filter coefficients.

[0060] Then, the inverse Fourier transform and Hamming window are used to obtain the FIR compensation filter coefficients hcomp(i) of the required order N, i = 1,2,3,...,N+1. Specifically, after completing the linear interpolation of the frequency response and obtaining the amplitude-frequency response values ​​on the dense grid, these values ​​are regarded as discrete frequency sampling values, and the inverse Fourier transform (IDFT) operation is performed on these sampling values. According to the relationship between the discrete Fourier transform pairs, the sampling values ​​in the frequency domain are reversed to the time domain to obtain a corresponding discrete sequence. This discrete sequence theory is the impulse response sequence of the filter, but the filter impulse response obtained directly by inverse transformation often has some problems in practical applications, such as the Gibbs phenomenon (there will be large fluctuations at the passband and stopband edges of the filter), resulting in unsatisfactory filter performance. In order to improve this situation, it is necessary to perform windowing processing on it, such as selecting a Hamming window, and multiplying the time domain sequence obtained by inverse transform by the Hamming window function point by point to obtain a new sequence, that is, the required FIR compensation filter coefficients, which are used for the subsequent actual construction of the FIR compensation filter and the corresponding filtering compensation operation on the signal to improve the amplitude-frequency response characteristics of the signal.

[0061] In addition, when the compensation filter coefficients are quantized, the compensation filter coefficients are first normalized. Normalizing the compensation filter coefficients is to adjust their amplitude range to a standard interval, which is convenient for subsequent quantization and matching with the quantization range of the DAC. For example, the compensation filter coefficients are normalized to the interval [-1, 1].

[0062] The normalized compensation filter coefficients are then quantized to the quantization bit number of the DAC. A DAC (digital-to-analog converter) has a specific quantization bit number, which determines the accuracy with which the analog signal can be represented. For example, for an n-bit DAC, it can represent 2 n Different discrete level values ​​are used to quantize the filter coefficients to the quantization bit number of the DAC, that is, to map the normalized continuous value coefficients to a finite number of discrete values ​​that the DAC can represent, so that these coefficients can be correctly converted from digital to analog by the DAC in the subsequent process, and then applied to the actual signal processing link. In one embodiment, the normalized compensation filter coefficients are quantized to the quantization bit number of the DAC by the following formula:

[0063]

[0064]

[0065] Among them, bit is the quantization bit number of DAC, round is the rounding function to the nearest integer, and max is the maximum value function of the sequence. By quantizing the compensation filter coefficients, the compensation filter coefficients are adapted to the specific DAC hardware, which ensures the consistency and accuracy of the entire signal processing process from the digital domain to the analog domain conversion and subsequent processing, and helps to achieve effective compensation of the signal amplitude-frequency response and signal output that meets the overall performance requirements of the system.

[0066] In step S4, the quantized compensation filter coefficients are sent to the FPGA through the host computer, so that the FPGA performs FIR compensation filtering on the signal data before playback. Specifically, after receiving the quantized compensation filter coefficients from the host computer, the digital signal processing module inside the FPGA will use these coefficients to construct the FIR filter structure. When the signal data before playback flows through the FIR filter, the signal data is filtered according to the operation rules of the FIR filter, and then the pre-compensated swept frequency signal continues to be played, and the spectrum analyzer is used to measure the first pre-compensated amplitude-frequency response curve S1 (w) within the Nyquist frequency range of the analog signal output by the signal source. Since the amplitude-frequency response curve of the signal output by the DAC device is nonlinear, and the amplitude-frequency response curve of the output from the DAC to the analog front-end circuit AFE (analog front end) is also nonlinear, the pre-compensated amplitude-frequency response curve cannot achieve the desired flatness within the bandwidth, and may even partially exceed the flatness range. Therefore, for the frequency range that exceeds the bandwidth flatness, it is necessary to perform separate compensation again.

[0067] In one embodiment, if the amplitude in the frequency range of F1 to F2 is convex within the required bandwidth range, it means that the power of the signal in this frequency band is too high relative to other frequency bands and exceeds the range allowed by the bandwidth flatness. Then the amplitude-frequency response of F1 to F2 of the corresponding FIR compensation filter is controlled to appropriately reduce the power, such as reducing it to 0.9 times the original; if the amplitude in the frequency range of F1 to F2 is concave, it means that the signal power in this frequency band is lower than expected, resulting in an uneven overall amplitude-frequency response. Then the amplitude-frequency response of F1 to F2 of the corresponding FIR compensation filter is controlled to appropriately increase the power, such as increasing it to 1.1 times the original.

[0068] Furthermore, after the modification is completed, the new FIR compensation filter amplitude-frequency response is obtained , and then according to the above method, get the new quantized compensation filter coefficients , i = 1, 2, 3, ..., N+1. The new quantized compensation filter coefficients are used in the FPGA. After filtering the original frequency sweep signal data, play it back and use a spectrum analyzer to measure the second pre-compensation amplitude-frequency response curve S2(w) within the Nyquist frequency range of the signal source. If S2(w) meets the bandwidth requirements, the pre-compensation is completed. If there is still a part that exceeds the bandwidth flatness, continue to modify it according to the above method until the requirements are met. By continuously analyzing and adjusting the amplitude-frequency response of the FIR compensation filter and the iteration of the coefficients, the problem of uneven amplitude-frequency response caused by various factors in the circuit can be gradually overcome, and the amplitude-frequency characteristics of the signal source output signal can be finely optimized to ensure that it meets the bandwidth flatness requirements in practical applications and to ensure the performance and signal quality of the entire signal processing system.

[0069] In one embodiment, first, the high-speed DAC signal source playback device is initialized, wherein the DAC conversion rate is 20 GHz, the required bandwidth is 6 GHz, the signal frequency range is from 2.75 GHz to 8.75 GHz, and matlab uses the sweep signal formula to generate a sweep signal with a range of 2.75 GHz to 8.75 GHz, and generates the amplitude-frequency response Sideal(i) of the quantized signal data, as shown in the attached manual. Figure 2 Next, send the signal data to the FPGA, control the FPGA to broadcast the data, and use a spectrum analyzer to view the signal amplitude-frequency response S(w), as shown in the attached manual. Figure 3 Then, the power value in S(w) is converted into a voltage value to obtain the amplitude-frequency response curve H(w), and the amplitude-frequency response of the pre-compensation filter is calculated in the range of 2.75 GHz to 8.75 GHz. as follows:

[0070]

[0071] Outside the bandwidth,

[0072]

[0073] Then the pre-compensation filter amplitude-frequency response data is obtained .

[0074] Matlab uses the fir2 function to specify the filter generation order N using the frequency sampling method, and uses the amplitude-frequency response data The pre-compensation filter coefficients hcomp(i) are calculated, i = 1, 2, 3, ..., N+1.

[0075] hcomp = fir2(N,f, ), where f is a sequence of frequencies corresponding to each amplitude.

[0076] Then hcomp is quantized, and the quantized pre-compensation filter coefficients are sent to the FPGA, which controls the FPGA to filter the original swept frequency signal data, and then broadcasts the filtered swept frequency signal data. Its amplitude-frequency response is shown in the attached manual. Figure 4 shown.

[0077] From the instruction manual Figure 4 It can be seen that the amplitude-frequency response curve has a slight bulge in the range of 6GHz to 7GHz, and a slight depression in the range of 7GHz to 8GHz, resulting in the overall amplitude-frequency response bandwidth flatness not meeting the requirements. Make adjustments, i.e. The amplitude-frequency response value in the range of 6GHz to 7GHz is appropriately reduced, and the amplitude-frequency response value in the range of 7GHz to 8GHz is appropriately increased to generate a new pre-compensation filter Then, according to the above steps, write the new pre-compensation filter coefficients into the FPGA to filter the original signal data and then broadcast it to observe whether the amplitude-frequency response meets the requirements. If not, continue to Fine-tune and iterate until the requirements are met. The amplitude-frequency response curve of the swept frequency signal broadcast by the high-speed DAC that finally meets the requirements is as follows: Figure 5 As shown in the figure, it can be seen that the in-band flatness is ±1dB.

[0078] It can be seen that the FPGA-based large-bandwidth signal source bandwidth flatness compensation method provided in the present application can overcome the influence of the nonlinearity of DAC devices and related circuits, effectively compensate for the amplitude-frequency response of the large-bandwidth signal source, and improve the signal flatness within the bandwidth. It is also implemented based on FPGA, making full use of its programmable characteristics, with high flexibility, and can adjust the compensation parameters according to the actual signal conditions without changing the hardware structure, reducing costs and development cycles, and facilitating system upgrades and optimizations.

[0079] Based on the same inventive concept, an embodiment of the present application also provides a bandwidth flatness compensation device for a large bandwidth signal source based on FPGA. Since the principle of solving the problem by the device in the embodiment of the present application is similar to the above-mentioned bandwidth flatness compensation method for a large bandwidth signal source based on FPGA in the embodiment of the present application, the implementation of the device can refer to the implementation of the method, and the repeated parts will not be repeated.

[0080] As the instruction manual Figure 6 As shown, an embodiment of the present application provides a large bandwidth signal source bandwidth flatness compensation device based on FPGA, the device comprising:

[0081] The measurement module 601 is used to play the signal data of the required bandwidth through the analog front end based on the FPGA, and measure the original amplitude-frequency response curve within the Nyquist frequency range through the spectrum analyzer; wherein the required bandwidth of the signal data includes the set bandwidth range and bandwidth flatness; the original amplitude-frequency response curve represents the signal strength in terms of voltage value; wherein the swept frequency signal data of the required bandwidth is generated inside the FPGA, or the quantized swept frequency signal data of the required bandwidth is received and sent to the FPGA by external software;

[0082] A calculation module 602 is used to calculate the amplitude-frequency response of the compensation filter; wherein, within a set bandwidth range, the fitting amplitude-frequency response of the original signal is obtained according to the original amplitude-frequency response curve, and the amplitude-frequency response of the compensation filter is determined based on the fitting amplitude-frequency response of the original signal; outside the set bandwidth range, the amplitude-frequency response of the compensation filter is obtained according to a preset attenuation strategy;

[0083] A quantization module 603, configured to obtain compensation filter coefficients according to the calculated amplitude-frequency response of the compensation filter, and quantize the compensation filter coefficients;

[0084] The pre-compensation module 604 is used to send the quantized compensation filter coefficients to the FPGA to compensate the signal data, play it through the analog front end, and measure the first pre-compensation amplitude-frequency response curve within the Nyquist frequency range through the spectrum analyzer; and determine the frequency range that exceeds the set bandwidth flatness according to the first pre-compensation amplitude-frequency response curve, and perform separate compensation.

[0085] In one embodiment, the device further comprises:

[0086] The iterative module is used to recalculate the amplitude-frequency response of the compensation filter to obtain new quantized compensation filter coefficients; the signal data is compensated and played using the new quantized compensation filter coefficients in the FPGA, and a second pre-compensated amplitude-frequency response curve within the Nyquist frequency range is measured by a spectrum analyzer until the second pre-compensated amplitude-frequency response curve does not exceed the frequency range of the set bandwidth flatness.

[0087] In one embodiment, the calculation module 602 determines the amplitude-frequency response of the compensation filter based on the fitted amplitude-frequency response of the original signal by using the following formula:

[0088]

[0089] in, To compensate the amplitude-frequency response of the filter, is the fitted amplitude-frequency response of the original signal.

[0090] In one embodiment, the quantization module 603 obtains the compensation filter coefficients according to the calculated amplitude-frequency response of the compensation filter, including: based on the frequency sampling method, linearly interpolating the amplitude-frequency response of the compensation filter to a dense grid to obtain the amplitude-frequency response value on the dense grid; performing an inverse Fourier transform on the amplitude-frequency response value on the dense grid to obtain a time domain sequence, and multiplying the time domain sequence with the Hamming window function point by point to obtain the compensation filter coefficients hcomp(i) of order N, i = 1, 2, 3, ..., N+1. And, quantizing the compensation filter coefficients includes: normalizing the compensation filter coefficients; quantizing the normalized compensation filter coefficients to the quantization bit number of the DAC by the following formula:

[0091]

[0092]

[0093] Among them, bit is the quantization bit number of DAC, round is the rounding function to the nearest integer, and max is the sequence maximum value function.

[0094] In one embodiment, the pre-compensation module 604 determines the frequency range that exceeds the set bandwidth flatness according to the first pre-compensation amplitude-frequency response curve, and performs separate compensation, including: if it is determined according to the first pre-compensation amplitude-frequency response curve that the amplitude in the first frequency range is convex, controlling the amplitude-frequency response of the first frequency range of the corresponding compensation filter to decrease; if it is determined according to the first pre-compensation amplitude-frequency response curve that the amplitude in the second frequency range is concave, controlling the amplitude-frequency response of the second frequency range of the corresponding compensation filter to increase.

[0095] The present application provides a FPGA-based large bandwidth signal source bandwidth flatness compensation device, which plays the signal data of the required bandwidth through the analog front end based on the FPGA through the measurement module, and measures the original amplitude-frequency response curve within the Nyquist frequency range through the spectrum analyzer; calculates the amplitude-frequency response of the compensation filter through the calculation module; obtains the compensation filter coefficient according to the calculated amplitude-frequency response of the compensation filter through the quantization module, and quantizes the compensation filter coefficient; sends the quantized compensation filter coefficient to the FPGA through the pre-compensation module to compensate the signal data, plays it through the analog front end, and measures the first pre-compensation amplitude-frequency response curve within the Nyquist frequency range through the spectrum analyzer; and determines the frequency range that exceeds the set bandwidth flatness according to the first pre-compensation amplitude-frequency response curve, and compensates it separately. In this way, the influence of the nonlinearity of the DAC device and the related circuits is overcome, the amplitude-frequency response of the large bandwidth signal source is effectively compensated, the signal flatness within the bandwidth is improved, and the system stability and reliability are enhanced.

[0096] Based on the same concept of the present invention, the specification is attached Figure 7 As shown, the structure of an electronic device 700 provided in an embodiment of the present application includes: at least one processor 701, at least one network interface 704 or other user interface 703, a memory 705, and at least one communication bus 702. The communication bus 702 is used to realize the connection and communication between these components. The electronic device 700 optionally includes a user interface 703, including a display (for example, a touch screen, LCD, CRT, holographic imaging (Holographic) or projection (Projector), etc.), a keyboard or a pointing device (for example, a mouse, a trackball (trackball), a touch pad or a touch screen, etc.).

[0097] The memory 705 may include a read-only memory and a random access memory, and provides instructions and data to the processor 701. A portion of the memory 705 may also include a non-volatile random access memory (NVRAM).

[0098] In some implementations, the memory 705 stores the following elements, executable modules or data structures, or a subset thereof, or an extended set thereof:

[0099] Operating system 7051, including various system programs for implementing various basic services and processing hardware-based tasks;

[0100] The application module 7052 includes various application programs, such as a launcher, a media player, a browser, etc., which are used to implement various application services.

[0101] In an embodiment of the present application, by calling the program or instructions stored in the memory 705, the processor 701 is used to execute steps in a bandwidth flatness compensation method for a large-bandwidth signal source based on FPGA, which can effectively compensate for the amplitude-frequency response of the large-bandwidth signal source and improve the signal flatness within the bandwidth.

[0102] The present application also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps in the FPGA-based large-bandwidth signal source bandwidth flatness compensation method are executed.

[0103] Specifically, the storage medium can be a general storage medium, such as a mobile disk, a hard disk, etc. When the computer program on the storage medium is run, the above-mentioned FPGA-based large-bandwidth signal source bandwidth flatness compensation method can be executed.

[0104] In the embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some communication interfaces, and the indirect coupling or communication connection of devices or units can be electrical, mechanical or other forms.

[0105] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0106] In addition, each functional unit in the embodiments provided in the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0107] If the function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the various embodiments of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, and other media that can store program codes.

[0108] Finally, it should be noted that the above embodiments are only specific implementation methods of the present application, which are used to illustrate the technical solutions of the present application, rather than to limit them. The protection scope of the present application is not limited thereto. Although the present application is described in detail with reference to the aforementioned embodiments, ordinary technicians in the field should understand that any technician familiar with the technical field can still modify the technical solutions recorded in the aforementioned embodiments within the technical scope disclosed in the present application, or can easily think of changes, or make equivalent replacements for some of the technical features therein; and these modifications, changes or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application. They should all be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A method for compensating bandwidth flatness of a large bandwidth signal source based on FPGA, characterized in that: The method comprises the following steps: Based on FPGA, the signal data with required bandwidth is played through the analog front end, and the original amplitude-frequency response curve within the Nyquist frequency range is measured by the spectrum analyzer; wherein the required bandwidth of the signal data includes the set bandwidth range and bandwidth flatness; the original amplitude-frequency response curve represents the signal strength in terms of voltage value; Calculating the amplitude-frequency response of the compensation filter; wherein, within a set bandwidth range, obtaining the fitting amplitude-frequency response of the original signal according to the original amplitude-frequency response curve, and determining the amplitude-frequency response of the compensation filter based on the fitting amplitude-frequency response of the original signal; outside the set bandwidth range, obtaining the amplitude-frequency response of the compensation filter according to a preset attenuation strategy; Obtaining compensation filter coefficients according to the calculated amplitude-frequency response of the compensation filter, and quantizing the compensation filter coefficients; wherein, obtaining the compensation filter coefficients according to the calculated amplitude-frequency response of the compensation filter comprises the following steps: based on a frequency sampling method, linearly interpolating the amplitude-frequency response of the compensation filter onto a dense grid to obtain an amplitude-frequency response value on the dense grid; performing an inverse Fourier transform on the amplitude-frequency response value on the dense grid to obtain a time domain sequence, and point-by-point multiplying the time domain sequence with a Hamming window function to obtain compensation filter coefficients hcomp(i) of order N, where i = 1, 2, 3, ..., N+1; After the quantized compensation filter coefficients are sent to the FPGA to compensate the signal data, they are played through the analog front end, and the first pre-compensation amplitude-frequency response curve within the Nyquist frequency range is measured by the spectrum analyzer; and the frequency range that exceeds the set bandwidth flatness is determined according to the first pre-compensation amplitude-frequency response curve, and is compensated separately.

2. According to claim 1, a method for compensating bandwidth flatness of a large bandwidth signal source based on FPGA, characterized in that: The method further comprises the following steps: The amplitude-frequency response of the compensation filter is recalculated to obtain new quantized compensation filter coefficients; the signal data is compensated and played using the new quantized compensation filter coefficients in the FPGA, and a second pre-compensation amplitude-frequency response curve within the Nyquist frequency range is measured using a spectrum analyzer until the second pre-compensation amplitude-frequency response curve does not exceed the frequency range of the set bandwidth flatness.

3. According to claim 2, a method for compensating bandwidth flatness of a large bandwidth signal source based on FPGA, characterized in that: The amplitude-frequency response of the compensation filter is determined based on the fitted amplitude-frequency response of the original signal by the following formula: in, To compensate the amplitude-frequency response of the filter, is the fitted amplitude-frequency response of the original signal.

4. According to the FPGA-based large bandwidth signal source bandwidth flatness compensation method of claim 3, the quantization of the compensation filter coefficients comprises the following steps: Normalizing the compensation filter coefficients; The normalized compensation filter coefficients are quantized to the quantization bit number of the DAC by the following formula: Among them, bit is the quantization bit of DAC, round is the rounding function to the nearest integer, and max is the function of taking the maximum value of the sequence. is the intermediate value of the compensation filter coefficient hcomp(i) during quantization, It is the final result of quantization of the compensation filter coefficient hcomp(i).

5. According to the FPGA-based large bandwidth signal source bandwidth flatness compensation method of claim 4, the frequency range exceeding the set bandwidth flatness is determined according to the first pre-compensation amplitude-frequency response curve, and a separate compensation is performed, comprising the following steps: If it is determined according to the first pre-compensation amplitude-frequency response curve that the amplitude in the first frequency range is convex, controlling the amplitude-frequency response of the corresponding compensation filter in the first frequency range to be reduced; If it is determined according to the first pre-compensation amplitude-frequency response curve that the amplitude is recessed in the second frequency range, the amplitude-frequency response of the corresponding compensation filter in the second frequency range is controlled to increase.

6. According to claim 5, a method for compensating bandwidth flatness of a large bandwidth signal source based on FPGA, wherein: Generate sweep signal data of the required bandwidth inside the FPGA, or receive quantized sweep signal data of the required bandwidth generated by external software and sent to the FPGA.

7. A bandwidth flatness compensation device for a large bandwidth signal source based on FPGA, characterized in that: The device comprises: A measurement module is used to play the signal data of the required bandwidth through the analog front end based on FPGA, and measure the original amplitude-frequency response curve within the Nyquist frequency range through a spectrum analyzer; wherein the required bandwidth of the signal data includes a set bandwidth range and bandwidth flatness; and the original amplitude-frequency response curve represents the signal strength in terms of voltage value; A calculation module, used to calculate the amplitude-frequency response of the compensation filter; wherein, within a set bandwidth range, the fitting amplitude-frequency response of the original signal is obtained according to the original amplitude-frequency response curve, and the amplitude-frequency response of the compensation filter is determined based on the fitting amplitude-frequency response of the original signal; outside the set bandwidth range, the amplitude-frequency response of the compensation filter is obtained according to a preset attenuation strategy; A quantization module, used for obtaining compensation filter coefficients according to the calculated amplitude-frequency response of the compensation filter, and quantizing the compensation filter coefficients; wherein, obtaining the compensation filter coefficients according to the calculated amplitude-frequency response of the compensation filter comprises the following steps: based on a frequency sampling method, linearly interpolating the amplitude-frequency response of the compensation filter onto a dense grid to obtain an amplitude-frequency response value on the dense grid; performing an inverse Fourier transform on the amplitude-frequency response value on the dense grid to obtain a time domain sequence, and point-by-point multiplying the time domain sequence with a Hamming window function to obtain compensation filter coefficients hcomp(i) of order N, where i = 1, 2, 3, ..., N+1; The pre-compensation module is used to send the quantized compensation filter coefficients to the FPGA to compensate the signal data, play it through the analog front end, and measure the first pre-compensation amplitude-frequency response curve within the Nyquist frequency range through the spectrum analyzer; and determine the frequency range that exceeds the set bandwidth flatness according to the first pre-compensation amplitude-frequency response curve, and compensate it separately.

8. An electronic device, characterized in that: include: A processor, a memory and a bus, wherein the memory stores machine-readable instructions executable by the processor, and when the electronic device is running, the processor and the memory communicate via the bus, and when the machine-readable instructions are executed by the processor, the steps of the FPGA-based large-bandwidth signal source bandwidth flatness compensation method as described in any one of claims 1 to 7 are performed.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the FPGA-based large-bandwidth signal source bandwidth flatness compensation method as claimed in any one of claims 1 to 7 are executed.

Images