Flow control method, flow control module and communication equipment
By moving the pending packets from on-chip memory to off-chip memory under specific conditions, the packet loss and scheduling restrictions caused by congestion in traditional technology are solved, and the service quality of network services is improved.
Patent Information
- Application Number
- CN202310970818.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-08-03
- Publication Date
- 2025-02-18
AI Technical Summary
Traditional congestion avoidance and congestion management technologies may lead to reduced service quality of network services, including packet loss and scheduling limitations.
A flow control method is provided to transfer the message from the on-chip memory to the off-chip memory when the to-processed message meets a specific condition and the traffic of the moving message is less than the moving bandwidth.
This method reduces packet loss caused by limited on-chip memory resources in congestion scenarios, avoids scheduling limitations caused by insufficient off-chip memory bandwidth, and improves the service quality of network services.
Smart Images
Figure CN119484325A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of communication technology, and in particular to a flow control method, a flow control module, and a communication device. Background Art
[0002] With the rapid development of the Internet, users have higher demands on network services. However, network resources are always limited, and the concept of traffic management has emerged to ensure the service quality of network services. Congestion avoidance and congestion management are important technologies for traffic management. Congestion avoidance relieves network overload by specifying a packet discard strategy, and congestion management ensures that high-priority services are processed first by specifying a packet scheduling order.
[0003] However, traditional congestion avoidance and congestion management technologies may cause problems such as packet loss and scheduling restrictions, thereby reducing the service quality of network services. Summary of the invention
[0004] The embodiments of the present disclosure provide a flow control method, a flow control module, and a communication device.
[0005] In a first aspect, an embodiment of the present disclosure provides a flow control method, comprising: storing a message to be processed; and moving the message to be processed to the off-chip memory when the message to be processed meets a migration condition and the flow of the message moved from an on-chip memory to an off-chip memory is less than a migration bandwidth.
[0006] In a second aspect, an embodiment of the present disclosure provides a flow control module, comprising: an on-chip memory for storing messages to be processed; and a moving component for moving the messages to be processed to the off-chip memory when the messages to be processed meet a moving condition and the flow of the messages moved from the on-chip memory to the off-chip memory is less than a moving bandwidth.
[0007] In a third aspect, an embodiment of the present disclosure provides a communication device, comprising the flow control module described in the second aspect of the embodiment of the present disclosure.
[0008] In the flow control method and flow control module provided by the embodiments of the present disclosure, the to-be-processed message is moved from the on-chip memory to the off-chip memory only when the to-be-processed message meets the moving conditions and the flow of the moved message from the on-chip memory to the off-chip memory is less than the moving bandwidth. This can not only reduce the packet loss caused by the limited on-chip memory resources in the congested scenario, but also avoid the problem that a large number of messages are moved to the off-chip memory in the congested scenario, resulting in the limited scheduling of the messages stored in the off-chip memory due to insufficient bandwidth of the off-chip memory, which is beneficial to improving the service quality of network services. BRIEF DESCRIPTION OF THE DRAWINGS
[0009] Figure 1 is a flow chart of a flow control method in an embodiment of the present disclosure;
[0010] Figure 2 is a flowchart of some steps in another flow control method in an embodiment of the present disclosure;
[0011] Figure 3 is a flow chart of some steps in another flow control method in an embodiment of the present disclosure;
[0012] Figure 4 is a schematic diagram of the composition of a flow control module in an embodiment of the present disclosure;
[0013] Figure 5 Schematic diagram of another flow control module in the embodiment of the present disclosure:
[0014] Figure 6 is a schematic diagram of the composition of a communication device in an embodiment of the present disclosure;
[0015] Figure 7 It is a schematic diagram of the composition of a flow control system in an embodiment of the present disclosure;
[0016] Figure 8 is a schematic diagram of a message migration process in an embodiment of the present disclosure;
[0017] Fig. 9 It is a schematic diagram of a message switching back process in an embodiment of the present disclosure. DETAILED DESCRIPTION
[0018] In order to enable those skilled in the art to better understand the technical solution of the present disclosure, the flow control method, flow control module, and communication device provided by the present disclosure are described in detail below with reference to the accompanying drawings.
[0019] Example embodiments will be described more fully below with reference to the accompanying drawings, but the example embodiments may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. On the contrary, the purpose of providing these embodiments is to make the present disclosure thorough and complete and to enable those skilled in the art to fully understand the scope of the present disclosure.
[0020] In the absence of conflict, the various embodiments of the present disclosure and the various features therein may be combined with each other.
[0021] As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.
[0022] The terms used herein are only used to describe specific embodiments and are not intended to limit the present disclosure. As used herein, the singular forms "a", "an" and "the" are also intended to include the plural forms, unless the context clearly indicates otherwise. It will also be understood that when the terms "comprising" and / or "made of" are used in this specification, the presence of the features, wholes, steps, operations, elements and / or components is specified, but the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups thereof is not excluded.
[0023] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted as having an idealized or overly formal meaning unless explicitly defined as such herein.
[0024] In some related technologies, in order to reduce packet loss caused by limited on-chip memory resources in congestion scenarios, the messages stored in the on-chip memory can be moved to the off-chip memory. For example, if the sum of the message length of the currently received message and the on-chip queue depth of the queue corresponding to the current message is greater than the migration threshold, the current message is moved to the off-chip memory. However, the read and write bandwidth of the off-chip memory is limited. When a large number of messages are moved from the on-chip memory to the off-chip memory in a congestion scenario, the message scheduling of the off-chip memory may be blocked due to the large amount of off-chip memory bandwidth occupied, thereby reducing the service quality of the network business.
[0025] In view of this, firstly, refer to Figure 1 , the present disclosure provides a flow control method, including:
[0026] S1, storing messages to be processed;
[0027] S2: When the message to be processed meets the migration condition and the migration flow of the message from the on-chip memory to the off-chip memory is less than the migration bandwidth, the message to be processed is moved to the off-chip memory.
[0028] The flow control method provided in the embodiment of the present disclosure is applied to the flow control module in the communication field related chips such as network chips.
[0029] In the embodiment of the present disclosure, the message received by the chip is stored in the on-chip memory. In some embodiments, the message determined not to be moved to the off-chip memory after steps S1 to S2 is also stored in the on-chip memory.
[0030] In the embodiment of the present disclosure, the message to be processed refers to a message that enters the chip and is stored in the on-chip memory. In the embodiment of the present disclosure, the message to be processed meets the moving condition, which means that the message length and the on-chip queue depth of the message to be processed meet the preset conditions. For example, if the sum of the message length of the message to be processed and the on-chip queue depth of the queue corresponding to the message to be processed is greater than the moving threshold, it means that the message to be processed meets the moving condition.
[0031] In the disclosed embodiment, the flow of messages moved from the on-chip memory to the off-chip memory is monitored, and only when the message to be processed meets the moving conditions and the flow of messages moved from the on-chip memory to the off-chip memory is less than the moving bandwidth, the message to be processed is moved from the on-chip memory to the off-chip memory; for messages that do not meet the moving conditions, or meet the moving conditions but the flow of messages moved is greater than the moving bandwidth, they are stored in the on-chip memory.
[0032] In the embodiment of the present disclosure, the transfer bandwidth may be equal to the read / write bandwidth of the off-chip memory, or may be a fixed bandwidth allocated to the message, which is not specifically limited in the embodiment of the present disclosure.
[0033] The flow control method provided by the embodiment of the present disclosure can not only reduce packet loss caused by limited on-chip memory resources in congested scenarios, but also avoid the problem of a large number of messages being moved to off-chip memory in congested scenarios, resulting in the scheduling of messages stored in the off-chip memory being limited due to insufficient off-chip memory bandwidth, which is beneficial to improving the service quality of network services.
[0034] In the disclosed embodiment, the migration message flow of the message moved from the on-chip memory to the off-chip memory can be monitored in real time; or when the message enters the chip and meets the migration condition, the migration message flow of the message moved from the on-chip memory to the off-chip memory can be obtained. The disclosed embodiment does not make special limitations on this.
[0035] In some embodiments, reference Figure 2 , the flow control method further includes:
[0036] S3. Monitoring the migration message flow of the message moved from the on-chip memory to the off-chip memory.
[0037] The embodiments of the present disclosure do not impose any special limitation on how to monitor the migration message flow of messages that are moved from the on-chip memory to the off-chip memory.
[0038] In some embodiments, monitoring the flow of messages moving from an on-chip memory to an off-chip memory includes:
[0039] Determine the sum of the lengths of messages moved from the on-chip memory to the off-chip memory within a time window;
[0040] The migration message flow is determined according to the time window and the message length.
[0041] In the embodiment of the present disclosure, the transfer bandwidth may be equal to the read / write bandwidth of the off-chip memory, or may be a fixed bandwidth allocated to the message, which is not specifically limited in the embodiment of the present disclosure.
[0042] Accordingly, in some embodiments, reference Figure 2 , before monitoring the migration message flow of the message moved from the on-chip memory to the off-chip memory, the flow control method further includes:
[0043] S4. Allocate a transfer bandwidth for the message transferred from the on-chip memory to the off-chip memory.
[0044] The embodiments of the present disclosure do not specifically limit the migration conditions. In some embodiments, a three-level migration strategy is adopted, namely, a queue-level, a port-level, and a system-level migration strategy.
[0045] Accordingly, in some embodiments, at least one of the following conditions is met, indicating that the to-be-processed message meets the migration condition:
[0046] The on-chip queue depth of the queue corresponding to the to-be-processed message is greater than the queue-level migration threshold;
[0047] The on-chip queue depth of the outgoing port corresponding to the to-be-processed message is greater than the port-level migration threshold;
[0048] The system-level on-chip queue depth is greater than the system-level migration threshold.
[0049] In the embodiment of the present disclosure, a three-level migration strategy is adopted, namely queue level, port level, and system level. When the on-chip queue depth at any one or more levels of queue level, port level, and system level is greater than the migration threshold, message migration can be triggered, thereby minimizing packet loss caused by limited on-chip memory resources in congestion scenarios.
[0050] The disclosed embodiment also supports switching messages in the off-chip memory back to the on-chip memory.
[0051] In some embodiments, reference Figure 3 , after the to-be-processed message is moved to the off-chip memory, the flow control method further comprises:
[0052] S5. When the message to be processed meets a switching back condition, switch the message to be processed back to the on-chip memory.
[0053] In the embodiments of the present disclosure, the message meets the switchback condition, which may refer to the message length and the off-chip queue depth of the message meeting the preset conditions; or the on-chip memory being free; or the message length and the off-chip queue depth of the message meeting the preset conditions, and the on-chip memory being free. The embodiments of the present disclosure do not specifically limit this.
[0054] In the disclosed embodiment, the messages that meet the switchback conditions are switched back to the on-chip storage, which is beneficial to fully utilize the resources of the on-chip memory and improve the message processing efficiency.
[0055] In some embodiments, a three-level switchback strategy is adopted, namely, queue-level, port-level, and system-level migration strategies.
[0056] Accordingly, in some embodiments, if at least one of the following conditions is met and the on-chip queue depth of the queue corresponding to the to-be-processed message is less than a preset threshold, it indicates that the to-be-processed message meets the switchback condition:
[0057] The off-chip queue depth of the queue corresponding to the to-be-processed message is less than the queue-level switching back threshold;
[0058] The off-chip queue depth of the outbound port corresponding to the to-be-processed message is less than the port-level reversal threshold;
[0059] The system-level off-chip queue depth is less than the system-level switchback threshold.
[0060] In the disclosed embodiment, a three-level switchback strategy is adopted, which is beneficial to improving the utilization rate of on-chip memory resources.
[0061] Second, refer to Figure 4 , the present disclosure provides a flow control module, including:
[0062] On-chip memory 101, used to store messages to be processed;
[0063] The moving component 102 is used to move the message to be processed to the off-chip memory when the message to be processed meets the moving condition and the flow of the moving message from the on-chip memory to the off-chip memory is less than the moving bandwidth.
[0064] The flow control module provided in the embodiments of the present disclosure is applied to chips related to the communication field, such as network chips.
[0065] In the disclosed embodiment, the message received by the chip is stored in the on-chip memory. In some embodiments, the message that does not need to be moved to the off-chip memory is also stored in the on-chip memory.
[0066] In the embodiment of the present disclosure, the message to be processed refers to a message that enters the chip and is stored in the on-chip memory. In the embodiment of the present disclosure, the message to be processed meets the moving condition, which means that the message length and the on-chip queue depth of the message to be processed meet the preset conditions. For example, if the sum of the message length of the message to be processed and the on-chip queue depth of the queue corresponding to the message to be processed is greater than the moving threshold, it means that the message to be processed meets the moving condition.
[0067] In the disclosed embodiment, the flow of messages moved from the on-chip memory to the off-chip memory is monitored, and only when the message to be processed meets the moving conditions and the flow of messages moved from the on-chip memory to the off-chip memory is less than the moving bandwidth, the message to be processed is moved from the on-chip memory to the off-chip memory; for messages that do not meet the moving conditions, or meet the moving conditions but the flow of messages moved is greater than the moving bandwidth, they are stored in the on-chip memory.
[0068] In the embodiment of the present disclosure, the transfer bandwidth may be equal to the read / write bandwidth of the off-chip memory, or may be a fixed bandwidth allocated to the message, which is not specifically limited in the embodiment of the present disclosure.
[0069] The flow control module provided by the embodiment of the present disclosure can not only reduce packet loss caused by limited on-chip memory resources in congestion scenarios, but also avoid the problem of a large number of messages being moved to off-chip memory in congestion scenarios, resulting in the scheduling of messages stored in the off-chip memory being limited due to insufficient bandwidth of the off-chip memory, which is beneficial to improving the service quality of network services.
[0070] In the disclosed embodiment, the migration message flow of the message moved from the on-chip memory to the off-chip memory can be monitored in real time; or when the message enters the chip and meets the migration condition, the migration message flow of the message moved from the on-chip memory to the off-chip memory can be obtained. The disclosed embodiment does not make special limitations on this.
[0071] In some embodiments, reference Figure 5 , the flow control module also includes:
[0072] The speed measuring component 103 is used to monitor the migration message flow of the message moved from the on-chip memory 101 to the off-chip memory.
[0073] The embodiments of the present disclosure do not impose any special limitation on how to monitor the migration message flow of messages that are moved from the on-chip memory to the off-chip memory.
[0074] In some embodiments, the speed measurement component 103 is used to determine the sum of the lengths of messages moved from the on-chip memory 101 to the off-chip memory within a time window; and determine the moved message flow rate based on the time window and the sum of the message lengths.
[0075] In the embodiment of the present disclosure, the transfer bandwidth may be equal to the read / write bandwidth of the off-chip memory, or may be a fixed bandwidth allocated to the message, which is not specifically limited in the embodiment of the present disclosure.
[0076] In some embodiments, the migration component 102 is further used to allocate migration bandwidth for the message migrated from the on-chip memory 101 to the off-chip memory.
[0077] The embodiments of the present disclosure do not specifically limit the migration conditions. In some embodiments, a three-level migration strategy is adopted, namely, a queue-level, a port-level, and a system-level migration strategy.
[0078] Accordingly, in some embodiments, at least one of the following conditions is met, indicating that the to-be-processed message meets the migration condition:
[0079] The on-chip queue depth of the queue corresponding to the to-be-processed message is greater than the queue-level migration threshold;
[0080] The on-chip queue depth of the outgoing port corresponding to the to-be-processed message is greater than the port-level migration threshold;
[0081] The system-level on-chip queue depth is greater than the system-level migration threshold.
[0082] The disclosed embodiment also supports switching messages in the off-chip memory back to the on-chip memory 101 .
[0083] In some embodiments, reference Figure 5 , the flow control module also includes:
[0084] The switchback component 104 is used to switch the message to be processed back to the on-chip memory 101 when the message to be processed meets the switchback condition.
[0085] In the embodiments of the present disclosure, the message meets the switchback condition, which may refer to the message length and the off-chip queue depth of the message meeting the preset conditions; or the on-chip memory being free; or the message length and the off-chip queue depth of the message meeting the preset conditions, and the on-chip memory being free. The embodiments of the present disclosure do not specifically limit this.
[0086] In the disclosed embodiment, the messages that meet the switchback conditions are switched back to the on-chip storage, which is beneficial to fully utilize the resources of the on-chip memory and improve the message processing efficiency.
[0087] In some embodiments, a three-level switchback strategy is adopted, namely, queue-level, port-level, and system-level migration strategies.
[0088] Accordingly, in some embodiments, if at least one of the following conditions is met and the on-chip queue depth of the queue corresponding to the to-be-processed message is less than a preset threshold, it indicates that the to-be-processed message meets the switchback condition:
[0089] The off-chip queue depth of the queue corresponding to the to-be-processed message is less than the queue-level switching back threshold;
[0090] The off-chip queue depth of the outbound port corresponding to the to-be-processed message is less than the port-level reversal threshold;
[0091] The system-level off-chip queue depth is less than the system-level switchback threshold.
[0092] Thirdly, refer to Figure 6 An embodiment of the present disclosure provides a communication device, including the flow control module described in the second aspect of the embodiment of the present disclosure.
[0093] The embodiments of the present disclosure do not specifically limit the communication device. For example, the communication device may be a chip related to the communication field, such as a network chip or a switching chip, or may be a device related to the communication field, such as a network device or a switching device.
[0094] In a fourth aspect, an embodiment of the present disclosure provides an electronic device, comprising:
[0095] one or more processors;
[0096] A memory having one or more programs stored thereon, wherein when the one or more programs are executed by one or more processors, the one or more processors implement the flow control method described in the first aspect of the embodiment of the present disclosure;
[0097] One or more I / O interfaces are connected between the processor and the memory and are configured to implement information exchange between the processor and the memory.
[0098] Among them, the processor is a device with data processing capabilities, including but not limited to the central processing unit (CPU) and the like; the memory is a device with data storage capabilities, including but not limited to random access memory (RAM, more specifically SDRAM, DDR, etc.), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory (FLASH); the I / O interface (read-write interface) is connected between the processor and the memory, and can realize information exchange between the processor and the memory, including but not limited to the data bus (Bus) and the like.
[0099] In some embodiments, the processor, memory, and I / O interface are connected to each other and, in turn, to other components of the computing device via a bus.
[0100] In a fifth aspect, an embodiment of the present disclosure provides a computer-readable medium having a computer program stored thereon, and when the program is executed by a processor, the flow control method described in the first aspect of the embodiment of the present disclosure is implemented.
[0101] In order to enable those skilled in the art to more clearly understand the technical solutions provided by the embodiments of the present disclosure, the technical solutions provided by the embodiments of the present disclosure are described in detail below through specific embodiments:
[0102] Embodiment 1
[0103] In this embodiment, refer to Figure 7 ,The flow control system includes on-chip memory, speed measuring components, moving components, switching back components, and off-chip memory.
[0104] The on-chip memory is used to store messages that have just entered the chip and messages that have been judged and stored in the on-chip memory;
[0105] The speed measurement component is used to monitor the flow of migration messages to the off-chip memory;
[0106] The migration component is used to migrate the messages that meet the migration conditions to the off-chip memory;
[0107] The switchback component is used to switch back the message that meets the switchback condition to the on-chip memory;
[0108] The off-chip memory is used to store messages moved to the off-chip memory.
[0109] Embodiment 2
[0110] This embodiment is based on the flow control system of embodiment 1. In this embodiment, flow control is mainly divided into three parts: movement, speed measurement, and switchback.
[0111] In this embodiment, the message transfer process is as follows: Figure 8 shown.
[0112] Messages entering the chip are stored in on-chip memory;
[0113] The migration component determines whether to migrate the message to the off-chip memory. This embodiment adopts a three-level migration strategy, namely, queue-level, port-level and system-level migration. The conditions for migrating the message include: the on-chip queue depth of the queue corresponding to the currently received message is greater than the queue-level migration threshold; the on-chip queue depth of the outgoing port corresponding to the currently received message is greater than the port-level migration threshold; the current system-level on-chip queue depth is greater than the system-level migration threshold. If at least one of the above conditions is met and the migration message flow to the off-chip memory is less than the allocated migration bandwidth, the message is moved to the off-chip memory; messages that do not meet the migration conditions are stored in the on-chip memory.
[0114] In this embodiment, the test component monitors the flow of messages moved to the off-chip memory in real time. For example, the sum of the message lengths of messages moved to the off-chip memory within a unit time window is calculated to convert the flow of messages moved within a unit time.
[0115] The message switching process in this embodiment is as follows: Fig. 9 shown.
[0116] The switchback component switches the message back to the on-chip memory when the switchback condition is met (the on-chip memory is idle and meets the preset switchback condition). This embodiment adopts a three-level switchback strategy, and the preset switchback conditions include: the queue-level off-chip queue depth is less than the queue-level switchback threshold, the port-level off-chip queue depth meets the port-level switchback threshold, and the system-level off-chip queue depth meets the system-level switchback threshold. In this embodiment, when the conditions are met at the queue level, port level, and system level, and the queue-level on-chip queue depth is 0, the message is switched back to the on-chip memory to make full use of the on-chip memory resources.
[0117] It will be appreciated by those skilled in the art that all or some of the steps, systems, and functional modules / units in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. In hardware implementations, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed by several physical components in cooperation. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or temporary medium). As known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and can be accessed by a computer. In addition, it is well known to those skilled in the art that communication media typically contain computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.
[0118] Example embodiments have been disclosed herein, and although specific terms are employed, they are used and should be interpreted only in a general illustrative sense and not for limiting purposes. In some instances, it will be apparent to those skilled in the art that, unless otherwise expressly noted, features, characteristics, and / or elements described in conjunction with a particular embodiment may be used alone or in combination with features, characteristics, and / or elements described in conjunction with other embodiments. Therefore, those skilled in the art will appreciate that various changes in form and detail may be made without departing from the scope of the present disclosure as set forth in the appended claims.
Claims
1. A flow control method, comprising: Storing messages to be processed; When the message to be processed meets the migration condition and the migration flow of the message from the on-chip memory to the off-chip memory is less than the migration bandwidth, the message to be processed is moved to the off-chip memory.
2. The flow control method according to claim 1, wherein: The flow control method further comprises: Monitoring the migration message flow of the message moved from the on-chip memory to the off-chip memory.
3. The flow control method according to claim 2, wherein: Monitor the traffic of messages moving from on-chip memory to off-chip memory, including: Determine the sum of the lengths of messages moved from the on-chip memory to the off-chip memory within a time window; The migration message flow is determined according to the time window and the message length.
4. The flow control method according to claim 2, wherein: Before monitoring the migration message flow of the message moved from the on-chip memory to the off-chip memory, the flow control method further includes: A transfer bandwidth is allocated for the message transferred from the on-chip memory to the off-chip memory.
5. The flow control method according to any one of claims 1 to 4, wherein: If at least one of the following conditions is met, it means that the message to be processed meets the migration condition: The on-chip queue depth of the queue corresponding to the to-be-processed message is greater than the queue-level migration threshold; The on-chip queue depth of the outgoing port corresponding to the to-be-processed message is greater than the port-level migration threshold; The system-level on-chip queue depth is greater than the system-level migration threshold.
6. The flow control method according to any one of claims 1 to 4, wherein: After the to-be-processed message is moved to the off-chip memory, the flow control method further includes: When the message to be processed meets the switching back condition, the message to be processed is switched back to the on-chip memory.
7. The flow control method according to claim 6, wherein: If at least one of the following conditions is met and the on-chip queue depth of the queue corresponding to the to-be-processed message is less than a preset threshold, it means that the to-be-processed message meets the switchback condition: The off-chip queue depth of the queue corresponding to the to-be-processed message is less than the queue-level switching back threshold; The off-chip queue depth of the outbound port corresponding to the to-be-processed message is less than the port-level reversal threshold; The system-level off-chip queue depth is less than the system-level switchback threshold.
8. A flow control module, comprising: On-chip memory for storing messages to be processed; The moving component is used to move the message to be processed to the off-chip memory when the message to be processed meets the moving condition and the flow of the moving message from the on-chip memory to the off-chip memory is less than the moving bandwidth.
9. The flow control module according to claim 8, wherein: The flow control module also includes: The speed measurement component is used to monitor the migration message flow of the message moved from the on-chip memory to the off-chip memory.
10. The flow control module according to claim 9, wherein: The speed measurement component is used to determine the sum of message lengths moved from the on-chip memory to the off-chip memory within a time window; and determine the migration message flow based on the time window and the sum of message lengths.
11. The flow control module according to claim 9, wherein: The migration component is also used to allocate migration bandwidth for the message migrated from the on-chip memory to the off-chip memory.
12. The flow control module according to any one of claims 8 to 11, wherein: If at least one of the following conditions is met, it means that the message to be processed meets the migration condition: The on-chip queue depth of the queue corresponding to the to-be-processed message is greater than the queue-level migration threshold; The on-chip queue depth of the outgoing port corresponding to the to-be-processed message is greater than the port-level migration threshold; The system-level on-chip queue depth is greater than the system-level migration threshold.
13. The flow control module according to any one of claims 8 to 11, wherein: The flow control module also includes: The switchback component is used to switch the message to be processed back to the on-chip memory when the message to be processed meets the switchback condition.
14. The flow control module according to claim 13, wherein: If at least one of the following conditions is met and the on-chip queue depth of the queue corresponding to the to-be-processed message is less than a preset threshold, it means that the to-be-processed message meets the switchback condition: The off-chip queue depth of the queue corresponding to the to-be-processed message is less than the queue-level switching back threshold; The off-chip queue depth of the outbound port corresponding to the to-be-processed message is less than the port-level reversal threshold; The system-level off-chip queue depth is less than the system-level switchback threshold.
15. A communication device, comprising the flow control module according to any one of claims 8 to 14.