Semiconductor device and method of manufacturing the same

Abstract

Embodiments provide a semiconductor device capable of improving strength and a method of manufacturing the same. According to one embodiment, a semiconductor device includes a semiconductor substrate having an upper surface and a lower surface on an opposite side from the upper surface. The semiconductor substrate includes a first end portion, a second end portion, an element portion, a first beam portion, and a second beam portion. The first end portion is located at an end portion of the semiconductor substrate in a second direction perpendicular to a first direction from the lower surface toward the upper surface. The second end portion is separated from the first end portion in the second direction. The element portion is located between the first end portion and the second end portion. A semiconductor element is formed in the element portion. The first beam portion protrudes from a first portion between the first end portion and the element portion to a position lower than the first end portion and the element portion, and extends in a third direction perpendicular to the first direction and the second direction. The second beam portion protrudes from a second portion between the second end portion and the element portion to a position lower than the second end portion and the element portion, and extends in the third direction.

Description

[0001] Reference to related applications

[0002] This application claims the priority of Japanese Patent Application No. 2023-124567 (filing date: July 31, 2023) as a basic application. The present application incorporates the entire contents of the basic application by reference. Technical Field

[0003] Embodiments of the present invention relate to a semiconductor device and a method for manufacturing the same. Background Art

[0004] For example, in semiconductor devices including transistors, thinning of semiconductor substrates is being studied. However, if the semiconductor substrate is thinned, the strength may be reduced. Summary of the invention

[0005] An object of the present invention is to provide a semiconductor device having improved strength and a method for manufacturing the same.

[0006] A semiconductor device of an embodiment includes a semiconductor substrate having an upper surface and a lower surface on a side opposite to the upper surface. The semiconductor substrate includes a first end, a second end, an element portion, a first beam portion, and a second beam portion. The first end portion is located at an end of the semiconductor substrate in a second direction perpendicular to a first direction from the lower surface toward the upper surface. The second end portion is separated from the first end portion in the second direction. The element portion is located between the first end portion and the second end portion. A semiconductor element is formed in the element portion. The first beam portion protrudes from a first portion between the first end portion and the element portion to a position lower than the first end portion and the element portion, and extends in a third direction perpendicular to the first direction and the second direction. The second beam portion protrudes from a second portion between the second end portion and the element portion to a position lower than the second end portion and the element portion, and extends in the third direction. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 is a schematic cross-sectional view of a semiconductor device according to an exemplary embodiment.

[0008] Figure 2 is a schematic top view of a semiconductor device according to an exemplary embodiment.

[0009] Figure 3 is a schematic cross-sectional view of a semiconductor device 100 according to an exemplary embodiment.

[0010] Figure 4 is a schematic top view of a semiconductor device according to an exemplary embodiment.

[0011] Figure 5 is a schematic cross-sectional view of a semiconductor device according to an exemplary embodiment.

[0012] Figure 6 It is a schematic plan view of a semiconductor device illustrating a modification of the embodiment.

[0013] Figure 7 (a)~ Figure 7 (b) is a schematic diagram illustrating a method for manufacturing a semiconductor device according to an embodiment.

[0014] Figure 8 (a)~ Figure 8 (b) is a schematic diagram illustrating a method for manufacturing a semiconductor device according to an embodiment.

[0015] Fig. 9 (a)~ Fig. 9 (c) is a schematic diagram illustrating a method for manufacturing a semiconductor device according to an embodiment.

[0016] Fig.10 (a)~ Fig.10 (b) is a schematic diagram illustrating a method for manufacturing a semiconductor device according to an embodiment.

[0017] Fig.11 (a)~ Fig.11 (c) is a schematic diagram illustrating a method for manufacturing a semiconductor device according to an embodiment.

[0018] Fig.12 (a) and Fig.12 (b) is a schematic diagram illustrating pickup of a semiconductor device.

[0019] Fig.13 (a) and Fig.13 (b) is a schematic top view illustrating a lift position during pickup of a semiconductor device.

[0020] Description of Reference Numerals

[0021] 10: first electrode; 10a-10i: region; 10s: lower surface; 20: second electrode; 25: third electrode; 30: semiconductor substrate; 30a-30d: first side to fourth side; 30e, 30f: side; 30s: lower surface; 30sa: region; 30t: upper surface; 31: first end; 32: second end; 33: element portion; 35-38: region; 40: connecting material; 41: conductive portion; 42: conductive portion; 51-54: insulating portion; 60: conductive component; 61: conductive component; 90: workbench; 91: hole; 93: pin; 95: chuck; 100, 101, 110, 190: semiconductor device; 301: first portion; 302: second Part; 311: first beam portion; 311a, 311b: side; 311e: one end; 311f: the other end; 312: second beam portion; 312a, 312b: side; 312e: one end; 312f: the other end; 331~332: first semiconductor region~third semiconductor region; G1: first groove; G2: second groove; P1: first position; P2: second position; Pu1: lifting position; S1: first surface; S2: second surface; T1, T10, T2, T31, T311, T32, T33: thickness; TP1, TP2: belt; Tr1: groove; W1: wafer; WG1, WG2: width; e1, e2: outer part; f1, f2: inner part. DETAILED DESCRIPTION

[0022] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0023] The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the ratio of the size between parts, etc. are not necessarily the same as in reality. Even when the same part is shown, there are cases where the sizes and ratios are shown differently depending on the drawings.

[0024] In the specification and drawings of the present application, the same reference numerals are used for the same elements as those already described, and detailed description thereof will be appropriately omitted.

[0025] Figure 1 is a schematic cross-sectional view of a semiconductor device according to an exemplary embodiment.

[0026] Figure 2 is a schematic top view of a semiconductor device according to an exemplary embodiment.

[0027] Figure 2 Indicates observation from below Figure 1 The semiconductor device 100 of the embodiment shown. Figure 1 express Figure 2 A cross section at line A1-A2 is shown.

[0028] like Figure 1 As shown, the semiconductor device 100 includes a first electrode 10, a second electrode 20, and a semiconductor substrate 30. Figure 2 In the figure, the first electrode 10 is omitted.

[0029] like Figure 1 As shown, the semiconductor substrate 30 has an upper surface 30t and a lower surface 30s. In the description of the embodiment, the direction from the lower surface 30s toward the upper surface 30t is set as the Z direction (first direction). The Z direction is, for example, the thickness direction of the semiconductor substrate 30, and is a direction perpendicular to the upper surface 30t. In addition, a direction perpendicular to the Z direction is set as the X direction (second direction), and a direction perpendicular to the Z direction and the X direction is set as the Y direction (third direction). In addition, for the sake of convenience of explanation, the direction from the lower surface 30s toward the upper surface 30t is referred to as "up", and the opposite direction is referred to as "down". These directions are based on the relative positional relationship between the lower surface 30s and the upper surface 30t, and have nothing to do with the direction of gravity.

[0030] The upper surface 30t extends along the XY plane. The upper surface 30t is, for example, flat. On the other hand, the lower surface 30s is provided with projections and depressions. That is, as described later, the regions near the two opposing sides of the semiconductor substrate 30 are thickened. The upper surface 30t is flatter than the lower surface 30s.

[0031] The semiconductor substrate 30 includes a first end portion 31, a second end portion 32, and an element portion 33. The first end portion 31 and the second end portion 32 are ends in the X direction of the semiconductor substrate 30. The second end portion 32 is separated from the first end portion 31 in the X direction.

[0032] The element portion 33 is located between the first end portion 31 and the second end portion 32. The element portion 33 is a region where a semiconductor element such as a transistor is formed. According to the operation of the semiconductor element, a current flows between the first electrode 10 and the second electrode 20 via the element portion 33 (semiconductor element). Figure 1 In the figure, for convenience, the structure of the semiconductor element is omitted.

[0033] like Figure 1 As shown, the semiconductor substrate 30 further includes a first portion 301 and a first beam portion 311. The first portion 301 is located between the first end portion 31 and the element portion 33. The first beam portion 311 protrudes from the first portion 301 to a position below the first end portion 31 and the element portion 33.

[0034] The semiconductor substrate 30 further includes a second portion 302 and a second beam portion 312. The second portion 302 is located between the second end portion 32 and the element portion 33. The second beam portion 312 protrudes from the second portion 302 to a position below the second end portion 32 and the element portion 33.

[0035] In addition, at least a portion of the upper surface 30t of the semiconductor substrate 30 is formed by the upper surface of the first end portion 31, the upper surface of the second end portion 32, the upper surface of the element portion 33, the upper surface of the first portion 301, and the upper surface of the second portion 302. At least a portion of the lower surface 30s of the semiconductor substrate 30 is formed by the lower surface of the first end portion 31, the lower surface of the second end portion 32, the lower surface of the element portion 33, the lower surface and side surfaces of the first beam portion 311, and the lower surface and side surfaces of the second beam portion 312.

[0036] The thickness T32 (length along the Z direction) of the second end portion 32 may be the same as the thickness T31 (length along the Z direction) of the first end portion 31. The thickness T33 (length along the Z direction) of the element portion 33 may be the same as the thickness T31 of the first end portion 31. The thickness T33 of the element portion 33 is, for example, 30 μm or less. In addition, the element portion 33 may be thinner or thicker than the first end portion 31. The thicknesses of the first portion 301 and the second portion 302 may be the same as the thickness T33 of the element portion 33.

[0037] The thickness T33 of the element portion 33 is thinner than the thickness T1 at the position where the first beam portion 311 is provided. The thickness T1 is the sum of the thickness (length along the Z direction) of the first portion 301 and the thickness (length along the Z direction) of the first beam portion 311. The thickness T1 is, for example, not less than 50 μm.

[0038] The thickness T2 at the position where the second beam portion 312 is provided may be the same as the thickness T1 at the position where the first beam portion 311 is provided. In addition, the thickness T2 is the sum of the thickness of the second portion 302 (length along the Z direction) and the thickness of the second beam portion 312 (length along the Z direction).

[0039] In this example, the width (length along the X direction) of the first beam portion 311 is wider than the width (length along the X direction) of the first end portion 31. In addition, the width (length along the X direction) of the second beam portion 312 is wider than the width (length along the X direction) of the second end portion 32. Without limitation thereto, the width of the first beam portion 311 may be narrower than the width of the first end portion 31, and the width of the second beam portion 312 may be narrower than the width of the second end portion 32.

[0040] The second electrode 20 is provided on the element portion 33. The second electrode 20 is electrically connected to the semiconductor element of the element portion 33.

[0041] The first electrode 10 is provided on the lower surface 30s of the semiconductor substrate 30 and is electrically connected to the semiconductor element of the element portion 33. The first electrode 10 covers substantially the entirety of the lower surface 30s and is in contact with substantially the entirety of the lower surface 30s. That is, the first electrode 10 is continuously provided under the element portion 33, the first beam portion 311, the second beam portion 312, the first end portion 31, and the second end portion 32.

[0042] The thickness T10 of the first electrode 10 is thinner than the thickness T311 of the first beam portion 311. The thickness T10 of the first electrode 10 may be constant along the lower surface 30s of the semiconductor substrate 30. The lower surface 10s of the first electrode 10 has concavities and convexities along the concavities and convexities on the lower surface 30s of the semiconductor substrate 30.

[0043] like Figure 2 As shown, the semiconductor substrate 30 is rectangular in a plan view perpendicular to the Z direction. The semiconductor substrate 30 has a first side 30a extending along the Y direction, a second side 30b extending along the Y direction, a third side 30c extending along the X direction, and a fourth side 30d extending along the X direction. The first side 30a is located at the first end 31. The second side 30b is located at the second end 32. One end of the third side 30c is connected to one end of the first side 30a, and the other end of the third side 30c is connected to one end of the second side 30b. One end of the fourth side 30d is connected to the other end of the first side 30a, and the other end of the fourth side 30d is connected to the other end of the second side 30b.

[0044] The first end portion 31 , the first beam portion 311 , the second end portion 32 , and the second beam portion 312 extend from the third side 30 c to the fourth side 30 d along the Y direction, respectively.

[0045] For example, the first side 30a may be longer than the third side 30c or the fourth side 30d. The second side 30b may be longer than the third side 30c or the fourth side 30d. That is, the first beam 311 and the second beam 312 may also be provided on the long side of the semiconductor substrate 30.

[0046] In addition, if Figure 2 As shown, the region 30sa located between the first beam portion 311 and the second beam portion 312 in a plan view in the lower surface 30s of the semiconductor substrate 30 has no convex portion as a whole. That is, the region 30sa is recessed upward from the lower ends of the first beam portion 311 and the second beam portion 312 as a whole.

[0047] In other words, if Figure 1As shown, the semiconductor substrate 30 does not include a portion that is aligned with the first beam portion 311 and the second beam portion 312 in the X direction between the first beam portion 311 and the second beam portion 312. For example, a portion of the semiconductor substrate 30 is not provided between the end portion of the first beam portion 311 in the Y direction and the end portion of the second beam portion 312 in the Y direction. In other words, the beam portion (convex portion) provided on the lower surface side of the semiconductor substrate 30 is not in a shape that surrounds the element portion 33 when viewed from above. Figure 1 As shown, the entire region between the first portion 301 and the second portion 302 in the semiconductor substrate 30 may have a constant thickness that is thinner than the thickness T1 .

[0048] Figure 3 is a schematic cross-sectional view of a semiconductor device 100 according to an exemplary embodiment.

[0049] exist Figure 3 In the example shown, the semiconductor device 100 is mounted on the conductive member 60 via the conductive connection material 40 (mounting material). For example, a conductive member 61 is electrically connected to the second electrode 20. In addition, the conductive member 61 is shown as a schematic circuit diagram.

[0050] The conductive member 60 is disposed below the semiconductor substrate 30 and the first electrode 10. The connection material 40 is in contact with the lower surface of the first electrode 10 and the upper surface of the conductive member 60. The first electrode 10 is electrically connected to the conductive member 60 via the connection material 40.

[0051] More specifically, the first electrode 10 includes Figure 3 Regions 10a to 10i are shown.

[0052] The region 10a is in contact with the lower surface of the first end portion 31. The region 10b is in contact with the side surface 311a of the first beam portion 311. The region 10c is in contact with the lower surface of the first beam portion 311. The region 10d is in contact with the side surface 311b of the first beam portion 311. The region 10e is in contact with the lower surface of the element portion 33. The region 10f is in contact with the side surface 312b of the second beam portion 312. The region 10g is in contact with the lower surface of the second beam portion 312. The region 10h is in contact with the side surface 312a of the second beam portion 312. The region 10i is in contact with the lower surface of the second end portion 32.

[0053] The connection material 40 is in contact with at least the region 10c, the region 10d, the region 10e, the region 10f, and the region 10g. The connection material 40 may be in contact with the region 10a, the region 10b, the region 10h, and the region 10i.

[0054] In this example, the connection material 40 is in contact with the inner portion f1 of the region 10a, but not in contact with the outer portion e1 of the region 10a. Similarly, in this example, the connection material 40 is in contact with the inner portion f2 of the region 10i, but not in contact with the outer portion e2 of the region 10i. In addition, the connection material 40 is not in contact with the side surface 30e and the side surface 30f of the semiconductor substrate 30.

[0055] In addition, the thickness (length along the Z direction) of each region 10a, region 10c, region 10e, region 10g, and region 10i may be the same as each other. The thickness (length along the X direction) of each region 10b, region 10d, region 10f, and region 10h may be the same as each other. The thickness of region 10a and the thickness of region 10b may be the same as each other.

[0056] As an example, the conductive component 60 is a die pad of a lead frame. The conductive component 61 may also be, for example, a lead of the lead frame or a wire connected to the lead. For example, the on-current of the transistor provided in the element portion 33 flows from the conductive component 60 to the conductive component 61 via the connecting material 40, the first electrode 10, the element portion 33, and the second electrode 20.

[0057] The present invention is not limited to this, and the semiconductor device 100 may be mounted on, for example, a base substrate on which a ceramic layer and a conductive layer are stacked. In other words, the conductive member 60 may be a conductive layer of the base substrate.

[0058] Figure 4 is a schematic top view of a semiconductor device according to an exemplary embodiment.

[0059] Figure 5 is a schematic cross-sectional view of a semiconductor device according to an exemplary embodiment.

[0060] Reference Figure 4 and Figure 5 An example of a semiconductor element formed on the semiconductor substrate 30 will be described. In this example, the semiconductor element is a vertical MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor).

[0061] Figure 4 FIG. 1 shows a state where the semiconductor device 100 is viewed from above. Figure 5 Corresponds to Figure 4 Cross section at line A3-A4.

[0062] like Figure 4 As shown, the second electrode 20 (source electrode) and the third electrode 25 (gate electrode) are provided on the upper surface of the substantially rectangular element portion 33. The third electrode 25 is separated from the second electrode 20 and is smaller than the second electrode 20.

[0063] like Figure 5 As shown, the element portion 33 in the semiconductor substrate 30 is provided with a first semiconductor region 331 (drift region) of the first conductivity type, a second semiconductor region 332 (substrate region) of the second conductivity type, and a third semiconductor region 333 (source region) of the first conductivity type. In addition, in this example, the first conductivity type is n-type and the second conductivity type is p-type. However, the first conductivity type may be set to p-type and the second conductivity type may be set to n-type.

[0064] The first semiconductor region 331 is disposed on the first electrode 10 (drain electrode). The first semiconductor region 331 is in contact with the first electrode 10 and is electrically connected to the first electrode 10. The second semiconductor region 332 is disposed on the first semiconductor region 331. The second semiconductor region 332 is in contact with the first semiconductor region 331 and is electrically connected to the first semiconductor region 331. The third semiconductor region 333 is disposed on the second semiconductor region 332. The third semiconductor region 333 is in contact with the second semiconductor region 332 and is electrically connected to the second semiconductor region 332. The n-type impurity concentration (atoms / cm 3 ) is higher than the n-type impurity concentration (atoms / cm 3 ). The second electrode 20 is disposed on the third semiconductor region 333. The second electrode 20 is in contact with the third semiconductor region 333 and is electrically connected to the third semiconductor region 333.

[0065] In addition, the element portion 33 is provided with a conductive portion 41 (gate), a conductive portion 42 (field plate), an insulating portion 51 (gate insulating film), an insulating portion 52, an insulating portion 53, and an insulating portion 54. The conductive portion 41 is opposed to a portion of the first semiconductor region 331, the second semiconductor region 332, and the third semiconductor region 333 via the insulating portion 51. In this example, the conductive portion 41 is arranged with a portion of the first semiconductor region 331, the second semiconductor region 332, and the third semiconductor region 333 in the X direction. In addition, the conductive portion 41 is located below the second electrode 20 via the insulating portion 54. The conductive portion 41 is insulated from the semiconductor substrate 30 and the second electrode 20. The conductive portion 41 is electrically connected to the third electrode 25 through a wiring portion not shown.

[0066] The conductive portion 42 faces the first semiconductor region 331 via the insulating portion 52. In this example, the conductive portion 42 is located below the conductive portion 41 via the insulating portion 53 and is aligned with the first semiconductor region 331 in the X direction. The conductive portion 42 is insulated from the conductive portion 41 and the semiconductor substrate 30.

[0067] More specifically, a trench Tr1 is formed in the semiconductor substrate 30. The trench Tr1 extends from the upper surface of the third semiconductor region 333 to the first semiconductor region 331. Insulating portions 51 and 52 are provided on the inner wall of the trench Tr1. Conductive portions 41 and 42 are provided inside the insulating portions 51 and 52.

[0068] Figure 5 The structure shown is repeatedly arranged in the X direction and extends in the Y direction. That is, a plurality of trenches Tr1, a plurality of conductive portions 41, and a plurality of conductive portions 42 are arranged in the X direction. Each trench Tr1, each conductive portion 41, and each conductive portion 42 extends in the Y direction.

[0069] The voltage of the conductive portion 41 is controlled by the voltage of the third electrode 25 relative to the second electrode 20, and the on and off of the transistor is controlled. If the voltage of the third electrode 25 exceeds the threshold voltage, the transistor is turned on. For example, the on-current flows from the first electrode 10 to the second electrode 20 via the first semiconductor region 331, the second semiconductor region 332, and the third semiconductor region 333. When the voltage of the third electrode 25 is below the threshold voltage, the transistor is turned off, and the on-current does not flow.

[0070] Thus, the element portion 33 includes the second semiconductor region 332 and the third semiconductor region 333. In addition, the conductive portion 41 is provided in the element portion 33. The element portion 33 overlaps with the second electrode 20 and the third electrode 25 in the Z direction. On the other hand, the second semiconductor region 332, the third semiconductor region 333 and the conductive portion 41 are not provided in the first end portion 31 and the second end portion 32. The first end portion 31 and the second end portion 32 do not overlap with the second electrode 20 and the third electrode 25 in the Z direction. The second semiconductor region 332, the third semiconductor region 333 and the conductive portion 41 may not be provided in the first portion 301 and the second portion 302 where the beam portion is provided. The first portion 301 and the second portion 302 may not overlap with the second electrode 20 and the third electrode 25 in the Z direction.

[0071] An example of the material of each element of the semiconductor device 100 is described.

[0072] The first electrode 10 and the second electrode 20 include metal such as aluminum, for example.

[0073] The conductive portion 41 and the conductive portion 42 include a conductive material such as polysilicon.

[0074] The insulating portion 51 , the insulating portion 52 , the insulating portion 53 , and the insulating portion 54 include an insulating material such as silicon oxide or silicon nitride.

[0075] The semiconductor substrate 30 includes silicon as a semiconductor material. As an n-type impurity, arsenic, phosphorus, or antimony can be used. As a p-type impurity, boron can be used.

[0076] Solder is used as the connection material 40 .

[0077] The conductive members 60 and 61 are made of metal such as aluminum, copper, or iron.

[0078] The effects of the embodiment will be described.

[0079] For example, if the semiconductor substrate becomes thinner, the elastic modulus of the semiconductor substrate decreases, and the strength of the semiconductor substrate decreases. As a result, cracks and warping of the semiconductor substrate may occur. For example, in the case of a Si chip, if the thickness is less than 50 μm, the elastic modulus is sometimes greatly reduced. In contrast, in an embodiment, the semiconductor substrate 30 includes a first beam portion 311 and a second beam portion 312. The semiconductor substrate is partially thickened by using the first beam portion 311 and the second beam portion 312. As a result, the strength can be improved.

[0080] In addition, as regards Figure 1 As described, the thickness T33 of the element portion 33 is thinner than the thickness T1 (the sum of the thickness of the first portion 301 and the thickness of the first beam portion 311). As a result, the on-resistance of the semiconductor element provided in the element portion 33 can be reduced. The semiconductor device 100 is, for example, a structure in which the substrate is thin in the device region and the strength of the chip is ensured by the beam at the end. According to the embodiment, the on-resistance can be reduced and the reduction in strength can be suppressed.

[0081] In addition, as regards Figure 2 As described above, the first side 30a of the semiconductor substrate 30 may be located at the first end 31 and longer than the third side 30c. The first beam portion 311 extends along the first side 30a. That is, when the semiconductor substrate 30 is rectangular, the long side of the semiconductor substrate 30 is thickened by providing the first beam portion 311. Thus, the strength can be further improved.

[0082] exist Figure 2 In the plan view shown in FIG. 3 , the first beam portion 311 extends from the third side 30c to the fourth side 30d. In this way, by providing the first beam portion 311 in a wider area, the strength can be further improved.

[0083] In addition, for example, as regards Figure 1 As described above, the first electrode 10 is continuously provided below the element portion 33, the first beam portion 311, the second beam portion 312, the first end portion 31, and the second end portion 32. Furthermore, the lower surface 10s of the first electrode 10 has a concave-convex shape along the concave-convex shape on the lower surface 30s of the semiconductor substrate 30. Thus, the first electrode 10 covers substantially the entire lower surface 30s of the semiconductor substrate 30. Figure 3The connection material 40 (mounting material such as solder) shown makes it easy to connect the semiconductor substrate 30 and the conductive member 60. For example, since the first electrode 10 contains metal, the wettability of the connection material 40 to the first electrode 10 is higher than the wettability of the connection material 40 to the semiconductor substrate 30. As a result, the connection material 40 and the first electrode 10 can be easily connected.

[0084] In addition, as regards Figure 3 As described above, the connection material 40 is in contact with the region 10e (first conductive region), the region 10c (second conductive region), and the region 10a (third conductive region) of the first electrode 10. Here, as described above, the first beam portion 311 protrudes from the first portion 301 to a position below the first end portion 31. In other words, a step is formed between the first beam portion 311 and the first end portion 31. Thus, it is possible to suppress the connection material 40 from climbing up to the side surface 30e of the semiconductor substrate 30.

[0085] In addition, for example, it is also considered to provide a beam portion at the bottom of the semiconductor substrate 30 in a manner that surrounds the element portion 33 of the semiconductor substrate 30 when viewed from above. For example, it is also considered to thicken the four sides of the semiconductor substrate 30. However, in this case, if air is trapped between the element portion 33 and the connecting material 40, the air is surrounded by the beam portion, so it is difficult to release the air to the outside. Therefore, there is a possibility that a gap will be generated. In contrast, in the embodiment, as described with respect to Figure 2 As described above, the region 30sa located between the first beam portion 311 and the second beam portion 312 in the lower surface 30s of the semiconductor substrate 30 is generally recessed upward from the lower ends of the first beam portion 311 and the second beam portion 312. That is, the beam portion (convex portion) provided on the lower surface side of the semiconductor substrate 30 is not in a shape that surrounds the element portion 33 in a plan view. Even if air is mixed between the element portion 33 and the connection material 40, the air can be released to the outside from the end in the Y direction. Thus, the generation of voids can be suppressed.

[0086] Figure 6 It is a schematic plan view of a semiconductor device illustrating a modification of the embodiment.

[0087] Figure 6 Representation and Figure 2Similarly, the semiconductor device 101 of the embodiment is observed from below. In this example, one end 311e of the first beam portion 311 in the Y direction is between the third side 30c and the fourth side 30d. The other end 311f of the first beam portion 311 in the Y direction is between the one end 311e and the fourth side 30d. Similarly, one end 312e of the second beam portion 312 in the Y direction is between the third side 30c and the fourth side 30d. The other end 312f of the second beam portion 312 in the Y direction is between the one end 312e and the fourth side 30d. In this case, for example, it is possible to suppress the connection material 40 from climbing up to the side of the semiconductor substrate 30 in the Y direction.

[0088] A region 35 between one end 311e of the first beam portion 311 and the third side 30c and a region 36 between the other end 311f and the fourth side 30d in the semiconductor substrate 30 are not aligned with the element portion 33 in the X direction. A region 37 between one end 312e of the second beam portion 312 and the third side 30c and a region 38 between the other end 312f and the fourth side 30d in the semiconductor substrate 30 are not aligned with the element portion 33 in the X direction.

[0089] Next, a method for manufacturing the semiconductor device 100 will be described.

[0090] Figure 7 (a)~ Figure 7 (b) Figure 8 (a)~ Figure 8 (b) Fig. 9 (a)~ Fig. 9 (c) Fig.10 (a)~ Fig.10 (b) Fig.11 (a)~ Fig.11 (e) is a schematic diagram illustrating a method for manufacturing a semiconductor device according to an embodiment. These drawings show a method for manufacturing the semiconductor device 100 in order of steps.

[0091] like Figure 7 As shown in (a) of FIG. 1 , a wafer W1 (semiconductor wafer) to be the semiconductor substrate 30 is prepared. Figure 7 (b) illustrates Figure 7 The wafer W1 has a first surface S1 (connected to Figure 1 The lower surface 30s in the figure corresponds to the second surface S2 (corresponding to the lower surface 30s in the figure). Figure 1 The wafer W1 includes a plurality of element portions 33 arranged in the X direction and the Y direction. Although not shown in the figure, a second electrode 20 is formed on the second surface S2 side of each element portion 33.

[0092] like Figure 7As shown in (b) of FIG. 1 , the second surface S2 of the wafer W1 is attached to the tape TP1 . Then, the first surface S1 side is ground to thin the wafer W1 (back grinding (BG) step).

[0093] Afterwards, if Figure 8 As shown in (a) of FIG. 1 , a plurality of first grooves G1 and a plurality of second grooves G2 are formed on the first surface S1 of the wafer W1 . Figure 8 (b) illustrates Figure 8 (a) is the cross section of .

[0094] A plurality of first grooves G1 are arranged in the X direction, and each first groove G1 extends in the Y direction. The position of at least a portion of each first groove G1 in the X direction is the same as the position of at least a portion of a certain element portion 33 in the X direction. For example, each first groove G1 is provided so as to overlap in the Z direction with the entire element portions 33 arranged in the Y direction.

[0095] The plurality of second grooves G2 are arranged in the X direction, and each second groove G2 extends in the Y direction. Each second groove G2 is located between two mutually adjacent first grooves G1. Each second groove G2 does not overlap with the element portion 33 in the Z direction. The first grooves G1 and the second grooves G2 are alternately arranged along the X direction. The depths of the plurality of first grooves G1 and the plurality of second grooves G2 may be the same.

[0096] For example, the width WG1 (length along the X direction) of the first groove G1 may be the same as or different from the width WG2 (length along the X direction) of the second groove G2. Figure 8 In the example shown in (b), the width WG1 is wider than the width WG2.

[0097] In forming the first groove G1 and the second groove G2, for example, mechanical processing is used. For example, the first groove G1 and the second groove G2 are formed by cutting the wafer W1 with a tool. Alternatively, the first groove G1 and the second groove G2 may also be formed by wet etching. In addition, in this example, the groove extending along the X direction may not be provided on the wafer W1. Thus, the manufacturing process can be simplified.

[0098] After forming the first groove G1 and the second groove G2, the crushed layer generated during the formation of the grooves is removed. Fig. 9 As shown in (a) of FIG. 1 , the first electrode 10 is formed on the first surface S1 by, for example, a sputtering method.

[0099] Afterwards, if Fig. 9 As shown in (b), the wafer W1 is transferred to the tape TP2 (slicing tape). That is, the wafer W1 is peeled off from the tape TP1, and the first surface S1 side of the wafer W1 is attached to the tape TP2. Fig. 9As shown in (c), the wafer W1 may be transferred to another tape TP2. That is, another tape TP2 may be attached to the second surface S of the wafer W1, and the tape TP2 attached to the first surface S1 may be peeled off. Fig.10 (a) and Fig.10 (b) illustrates the non-execution Fig. 9 (c) is re-transferred and Fig. 9 The case where the cutting process is performed in the state (b).

[0100] Afterwards, in Fig.10 The wafer W1 is cut at the plurality of first positions P1 and the plurality of second positions P2 shown in (a) (dicing step). Thus, the wafer W1 is divided into a plurality of chips (semiconductor devices 100). Fig.10 (b) illustrates Fig.10 The plurality of chips each include a plurality of element portions 33 .

[0101] Each first position P1 is a position where each second groove G2 is provided. That is, the first position P1 overlaps with the second groove G2 in the Z direction and extends in the Y direction. Each second position P2 is located between two element portions 33 adjacent to each other in the Y direction and extends in the X direction. Fig. 9 Similarly, in the wafer W1 that has been re-transferred as in (c), the wafer W1 can be cut at the first position P1 and the second position P2.

[0102] Afterwards, if Fig.11 (a)~ Fig.11 As shown in (c) , each chip (semiconductor device 100 ) is peeled off from tape TP2 and picked up (pick-up step).

[0103] like Fig.11 As shown in (a) of FIG. 1 , the tape TP2 and the semiconductor device 100 are placed on a table 90 having a hole 91. The pin 93 passing through the hole 91 is brought into contact with the tape TP2 from below the table 90.

[0104] like Fig.11 As shown in (b) of FIG. 1 , the semiconductor device 100 is lifted up via the tape TP2 by the pin 93. As a result, the tape TP2 is bent, and the end of the semiconductor device 100 is peeled off from the tape TP2. In addition, the semiconductor device 100 is sucked from above by the chuck 95.

[0105] Furthermore, the semiconductor device 100 is lifted up by the pin 93, and the semiconductor device 100 is lifted up by the clamp 95. Fig.11 As shown in (c), the semiconductor device 100 is picked up.

[0106] In such a pickup process, if the semiconductor substrate is thin, the semiconductor substrate may be warped and cracked. In addition, the chip may be cracked with the contact portion of the pin 93 as a base point.

[0107] Fig.12 (a) and Fig.12 (b) is a schematic diagram illustrating pickup of a semiconductor device.

[0108] Fig.12 The semiconductor device 190 shown in (a) is a chip in which the first beam portion 311 and the second beam portion 312 are not provided. Fig.12 The semiconductor device 110 shown in (b) is different from the semiconductor device 190 in that a first beam portion 311 and a second beam portion 312 are provided.

[0109] like Fig.12 As shown in (a) of FIG. 1 , in the semiconductor device 190 , when the tape TP2 is bent by the lifting of the pin 93 during pickup, the chip is easily deformed, so the chip is not peeled off from the tape, and the chip may be broken.

[0110] In contrast, Fig.12 As shown in (b) of FIG. 1 , in the semiconductor device 110 , when the tape TP2 is bent by the lifting of the pins 93 during pickup, the chip is difficult to deform, and thus the chip is easily peeled off from the tape.

[0111] As described above, according to the embodiment, by providing the first beam portion 311 and the second beam portion 312 to thicken a portion of the semiconductor substrate 30 , it is possible to suppress chip warping during pickup or chip damage due to lifting.

[0112] Fig.13 (a) and Fig.13 (b) is a schematic top view illustrating a lift position during pickup of a semiconductor device.

[0113] and Figure 2 same, Fig.13 (a) and Fig.13 (b) shows a state where the semiconductor device 100 is viewed from below.

[0114] like Fig.13 (a) and Fig.13 As shown in (b), the semiconductor device 100 is lifted up by pins 93 at four lifting positions Pu1 arranged in the X direction and the Y direction. Fig.13 As shown in (a) of FIG. 1 , the push-up position Pu1 may be located between the first beam portion 311 and the second beam portion 312 in a plan view.

[0115] like Fig.13As shown in (b), the lifting position Pu1 may be located at the first beam portion 311 or the second beam portion 312 in a plan view. In this case, not the thinner portion of the semiconductor substrate 30 but the thicker portion of the semiconductor substrate 30 is lifted by the pin 93. Thus, for example, chip damage caused by lifting can be further suppressed.

[0116] The embodiments may include the following structures.

[0117] (Structure 1)

[0118] A semiconductor device includes a semiconductor substrate having an upper surface and a lower surface opposite to the upper surface, wherein:

[0119] The semiconductor substrate comprises:

[0120] a first end portion located at an end portion of the semiconductor substrate in a second direction perpendicular to the first direction from the lower surface toward the upper surface;

[0121] a second end portion separated from the first end portion in the second direction;

[0122] an element portion, which is located between the first end portion and the second end portion and has a semiconductor element formed therein;

[0123] a first beam portion that protrudes from a first portion between the first end portion and the element portion to a position below the first end portion and the element portion and extends in a third direction perpendicular to the first direction and the second direction; and

[0124] The second beam portion protrudes from a second portion between the second end portion and the element portion to a position below the second end portion and the element portion and extends in the third direction.

[0125] (Structure 2)

[0126] The semiconductor device according to Structure 1, wherein:

[0127] The semiconductor substrate has:

[0128] a first side, which is located at the first end and extends along the third direction;

[0129] a second side, which is located at the second end and extends along the third direction;

[0130] a third side connected to one end of the first side and one end of the second side and extending in the second direction; and

[0131] a fourth side connected to the other end of the first side and the other end of the second side and extending in the second direction;

[0132] The first side is longer than the third side,

[0133] The first beam portion extends along the first side.

[0134] (Structure 3)

[0135] The semiconductor device according to Structure 2, wherein:

[0136] In a plan view, the first beam portion extends from the third side to the fourth side.

[0137] (Structure 4)

[0138] The semiconductor device according to any one of Structures 1 to 3, further comprising:

[0139] A first electrode disposed on the lower surface of the semiconductor substrate; and

[0140] A second electrode disposed on the element portion;

[0141] The thickness of the element portion is thinner than the sum of the thickness of the first portion and the thickness of the first beam portion.

[0142] (Structure 5)

[0143] The semiconductor device according to Structure 4, wherein:

[0144] The first electrode is continuously disposed under the element portion, the first beam portion, the second beam portion, the first end portion, and the second end portion.

[0145] The first electrode is electrically connected to a conductive member disposed below the semiconductor substrate via a conductive connecting material.

[0146] The lower surface of the first electrode has projections and depressions, and the projections and depressions are structures along the projections and depressions provided on the lower surface of the semiconductor substrate.

[0147] (Structure 6)

[0148] The semiconductor device according to Structure 5, wherein:

[0149] The first electrode includes a first conductive region covering a lower portion of the element portion, a second conductive region covering a lower portion of the first beam portion, and a third conductive region covering a lower portion of the first end portion.

[0150] The connection material is connected to the first conductive region, the second conductive region, and the third conductive region.

[0151] (Structure 7)

[0152] The semiconductor device according to any one of Structures 1 to 6, wherein:

[0153] A region of the lower surface of the semiconductor substrate located between the first beam portion and the second beam portion in a plan view is entirely recessed upward relative to lower ends of the first beam portion and the second beam portion.

[0154] (Structure 8)

[0155] A method for manufacturing a semiconductor device, comprising:

[0156] A step of preparing a wafer having a first surface and a second surface opposite to the first surface, and having a plurality of element portions formed with semiconductor elements arranged in a second direction and a third direction perpendicular to a first direction from the first surface toward the second surface;

[0157] A process of forming a plurality of first grooves and a plurality of second grooves on the first surface of the wafer, wherein the first grooves extend in the third direction and overlap with the element portions arranged in the third direction in the first direction, respectively, and the second grooves extend along the third direction between two adjacent first grooves; and

[0158] The step of cutting the wafer at the first position where the second groove is provided to divide the wafer into a plurality of chips including the element portion.

[0159] According to the embodiment, a semiconductor device capable of improving strength and a method for manufacturing the same can be provided.

[0160] Several embodiments of the present invention are illustrated above, but these embodiments are proposed as examples and are not intended to limit the scope of the invention. These new embodiments can be implemented in various other ways, and various omissions, substitutions, changes, etc. can be made without departing from the scope of the main purpose of the invention. These embodiments and their modifications are included in the scope and main purpose of the invention, and are included in the invention described in the claims and the scope of their equivalents. In addition, the aforementioned embodiments can be implemented in combination with each other.

Claims

1. A semiconductor device comprising a semiconductor substrate having an upper surface and a lower surface opposite to the upper surface, wherein: The semiconductor substrate comprises: a first end portion located at an end portion of the semiconductor substrate in a second direction perpendicular to the first direction from the lower surface toward the upper surface; a second end portion separated from the first end portion in the second direction; an element portion, which is located between the first end portion and the second end portion and has a semiconductor element formed therein; a first beam portion protruding from a first portion between the first end portion and the element portion to a position below the first end portion and the element portion and extending in a third direction perpendicular to the first direction and the second direction; as well as The second beam portion protrudes from a second portion between the second end portion and the element portion to a position below the second end portion and the element portion and extends in the third direction.

2. The semiconductor device according to claim 1, wherein: The semiconductor substrate has: a first side, which is located at the first end and extends along the third direction; a second side, which is located at the second end and extends along the third direction; a third side connected to one end of the first side and one end of the second side and extending in the second direction; as well as a fourth side connected to the other end of the first side and the other end of the second side and extending in the second direction; The first side is longer than the third side, The first beam portion extends along the first side.

3. The semiconductor device according to claim 2, wherein: In a plan view, the first beam portion extends from the third side to the fourth side.

4. The semiconductor device according to any one of claims 1 to 3, characterized in that Also available: A first electrode disposed on the lower surface of the semiconductor substrate; and A second electrode disposed on the element portion; The thickness of the element portion is thinner than the sum of the thickness of the first portion and the thickness of the first beam portion.

5. The semiconductor device according to claim 4, wherein: The first electrode is continuously disposed under the element portion, the first beam portion, the second beam portion, the first end portion, and the second end portion. The first electrode is electrically connected to a conductive member disposed below the semiconductor substrate via a conductive connecting material. The lower surface of the first electrode has projections and depressions, and the projections and depressions are structures along the projections and depressions provided on the lower surface of the semiconductor substrate.

6. The semiconductor device according to claim 5, wherein: The first electrode includes a first conductive region covering a lower portion of the element portion, a second conductive region covering a lower portion of the first beam portion, and a third conductive region covering a lower portion of the first end portion. The connection material is connected to the first conductive region, the second conductive region, and the third conductive region.

7. The semiconductor device according to any one of claims 1 to 3, characterized in that A region of the lower surface of the semiconductor substrate located between the first beam portion and the second beam portion in a plan view is entirely recessed upward relative to lower ends of the first beam portion and the second beam portion.

8. A method for manufacturing a semiconductor device, characterized in that: have: A step of preparing a wafer having a first surface and a second surface opposite to the first surface, and having a plurality of element portions formed with semiconductor elements arranged in a second direction and a third direction perpendicular to a first direction from the first surface toward the second surface; A step of forming a plurality of first grooves and a plurality of second grooves on the first surface of the wafer, wherein the first grooves extend in the third direction and overlap with the element portions arranged in the third direction in the first direction, respectively, and the second grooves extend along the third direction between two adjacent first grooves; as well as The step of cutting the wafer at the first position where the second groove is provided to divide the wafer into a plurality of chips including the element portion.

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